From cb7399b9998e9ec2d6439c5eb75c8312641770a4 Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Wed, 27 Oct 2021 18:05:18 +0200 Subject: [PATCH] msp init improvements --- hal/src/fsfw_hal/stm32h7/definitions.h | 25 ++++++++++ hal/src/fsfw_hal/stm32h7/spi/SpiCookie.cpp | 6 +-- hal/src/fsfw_hal/stm32h7/spi/SpiCookie.h | 10 ++-- hal/src/fsfw_hal/stm32h7/spi/mspInit.cpp | 28 +++++------ hal/src/fsfw_hal/stm32h7/spi/mspInit.h | 50 +++++++++++++------ .../fsfw_hal/stm32h7/spi/stm32h743ziSpi.cpp | 22 ++++---- 6 files changed, 90 insertions(+), 51 deletions(-) create mode 100644 hal/src/fsfw_hal/stm32h7/definitions.h diff --git a/hal/src/fsfw_hal/stm32h7/definitions.h b/hal/src/fsfw_hal/stm32h7/definitions.h new file mode 100644 index 00000000..af63a541 --- /dev/null +++ b/hal/src/fsfw_hal/stm32h7/definitions.h @@ -0,0 +1,25 @@ +#ifndef FSFW_HAL_STM32H7_DEFINITIONS_H_ +#define FSFW_HAL_STM32H7_DEFINITIONS_H_ + +#include +#include "stm32h7xx.h" + +namespace stm32h7 { + +/** + * Typedef for STM32 GPIO pair where the first entry is the port used (e.g. GPIOA) + * and the second entry is the pin number + */ +struct GpioCfg { + GpioCfg(): port(nullptr), pin(0), altFnc(0) {}; + + GpioCfg(GPIO_TypeDef* port, uint16_t pin, uint8_t altFnc = 0): + port(port), pin(pin), altFnc(altFnc) {}; + GPIO_TypeDef* port; + uint16_t pin; + uint8_t altFnc; +}; + +} + +#endif /* #ifndef FSFW_HAL_STM32H7_DEFINITIONS_H_ */ diff --git a/hal/src/fsfw_hal/stm32h7/spi/SpiCookie.cpp b/hal/src/fsfw_hal/stm32h7/spi/SpiCookie.cpp index e9cbac8e..200d4651 100644 --- a/hal/src/fsfw_hal/stm32h7/spi/SpiCookie.cpp +++ b/hal/src/fsfw_hal/stm32h7/spi/SpiCookie.cpp @@ -3,7 +3,7 @@ SpiCookie::SpiCookie(address_t deviceAddress, spi::SpiBus spiIdx, spi::TransferModes transferMode, spi::MspCfgBase* mspCfg, uint32_t spiSpeed, spi::SpiModes spiMode, - size_t maxRecvSize, GpioPair csGpio): + size_t maxRecvSize, stm32h7::GpioCfg csGpio): deviceAddress(deviceAddress), spiIdx(spiIdx), spiSpeed(spiSpeed), spiMode(spiMode), transferMode(transferMode), csGpio(csGpio), mspCfg(mspCfg), maxRecvSize(maxRecvSize) { @@ -24,11 +24,11 @@ SpiCookie::SpiCookie(address_t deviceAddress, spi::SpiBus spiIdx, spi::TransferM } uint16_t SpiCookie::getChipSelectGpioPin() const { - return csGpio.second; + return csGpio.pin; } GPIO_TypeDef* SpiCookie::getChipSelectGpioPort() { - return csGpio.first; + return csGpio.port; } address_t SpiCookie::getDeviceAddress() const { diff --git a/hal/src/fsfw_hal/stm32h7/spi/SpiCookie.h b/hal/src/fsfw_hal/stm32h7/spi/SpiCookie.h index f5698999..56c6e800 100644 --- a/hal/src/fsfw_hal/stm32h7/spi/SpiCookie.h +++ b/hal/src/fsfw_hal/stm32h7/spi/SpiCookie.h @@ -3,6 +3,7 @@ #include "spiDefinitions.h" #include "mspInit.h" +#include "../definitions.h" #include "fsfw/devicehandlers/CookieIF.h" @@ -20,11 +21,6 @@ class SpiCookie: public CookieIF { friend class SpiComIF; public: - /** - * Typedef for STM32 GPIO pair where the first entry is the port used (e.g. GPIOA) - * and the second entry is the pin number - */ - using GpioPair = std::pair; /** * Allows construction of a SPI cookie for a connected SPI device @@ -44,7 +40,7 @@ public: */ SpiCookie(address_t deviceAddress, spi::SpiBus spiIdx, spi::TransferModes transferMode, spi::MspCfgBase* mspCfg, uint32_t spiSpeed, spi::SpiModes spiMode, - size_t maxRecvSize, GpioPair csGpio = GpioPair(nullptr, 0)); + size_t maxRecvSize, stm32h7::GpioCfg csGpio = stm32h7::GpioCfg(nullptr, 0, 0)); uint16_t getChipSelectGpioPin() const; GPIO_TypeDef* getChipSelectGpioPort(); @@ -64,7 +60,7 @@ private: spi::SpiModes spiMode; spi::TransferModes transferMode; volatile spi::TransferStates transferState = spi::TransferStates::IDLE; - GpioPair csGpio; + stm32h7::GpioCfg csGpio; // The MSP configuration is cached here. Be careful when using this, it is automatically // deleted by the SPI communication interface if it is not required anymore! diff --git a/hal/src/fsfw_hal/stm32h7/spi/mspInit.cpp b/hal/src/fsfw_hal/stm32h7/spi/mspInit.cpp index 4df61f9b..b7ff2f70 100644 --- a/hal/src/fsfw_hal/stm32h7/spi/mspInit.cpp +++ b/hal/src/fsfw_hal/stm32h7/spi/mspInit.cpp @@ -118,40 +118,40 @@ void spi::halMspInitPolling(SPI_HandleTypeDef* hspi, MspCfgBase* cfgBase) { GPIO_InitTypeDef GPIO_InitStruct = {}; /*##-1- Enable peripherals and GPIO Clocks #################################*/ /* Enable GPIO TX/RX clock */ - cfg->setupMacroWrapper(); + cfg->setupCb(); /*##-2- Configure peripheral GPIO ##########################################*/ /* SPI SCK GPIO pin configuration */ - GPIO_InitStruct.Pin = cfg->sckPin; + GPIO_InitStruct.Pin = cfg->sck.pin; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_PULLDOWN; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; - GPIO_InitStruct.Alternate = cfg->sckAlternateFunction; - HAL_GPIO_Init(cfg->sckPort, &GPIO_InitStruct); + GPIO_InitStruct.Alternate = cfg->sck.altFnc; + HAL_GPIO_Init(cfg->sck.port, &GPIO_InitStruct); /* SPI MISO GPIO pin configuration */ - GPIO_InitStruct.Pin = cfg->misoPin; - GPIO_InitStruct.Alternate = cfg->misoAlternateFunction; - HAL_GPIO_Init(cfg->misoPort, &GPIO_InitStruct); + GPIO_InitStruct.Pin = cfg->miso.pin; + GPIO_InitStruct.Alternate = cfg->miso.altFnc; + HAL_GPIO_Init(cfg->miso.port, &GPIO_InitStruct); /* SPI MOSI GPIO pin configuration */ - GPIO_InitStruct.Pin = cfg->mosiPin; - GPIO_InitStruct.Alternate = cfg->mosiAlternateFunction; - HAL_GPIO_Init(cfg->mosiPort, &GPIO_InitStruct); + GPIO_InitStruct.Pin = cfg->mosi.pin; + GPIO_InitStruct.Alternate = cfg->mosi.altFnc; + HAL_GPIO_Init(cfg->mosi.port, &GPIO_InitStruct); } void spi::halMspDeinitPolling(SPI_HandleTypeDef* hspi, MspCfgBase* cfgBase) { auto cfg = reinterpret_cast(cfgBase); // Reset peripherals - cfg->cleanUpMacroWrapper(); + cfg->cleanupCb(); // Disable peripherals and GPIO Clocks /* Configure SPI SCK as alternate function */ - HAL_GPIO_DeInit(cfg->sckPort, cfg->sckPin); + HAL_GPIO_DeInit(cfg->sck.port, cfg->sck.pin); /* Configure SPI MISO as alternate function */ - HAL_GPIO_DeInit(cfg->misoPort, cfg->misoPin); + HAL_GPIO_DeInit(cfg->miso.port, cfg->miso.pin); /* Configure SPI MOSI as alternate function */ - HAL_GPIO_DeInit(cfg->mosiPort, cfg->mosiPin); + HAL_GPIO_DeInit(cfg->mosi.port, cfg->mosi.pin); } void spi::halMspInitInterrupt(SPI_HandleTypeDef* hspi, MspCfgBase* cfgBase) { diff --git a/hal/src/fsfw_hal/stm32h7/spi/mspInit.h b/hal/src/fsfw_hal/stm32h7/spi/mspInit.h index e6de2f8e..0fb553f7 100644 --- a/hal/src/fsfw_hal/stm32h7/spi/mspInit.h +++ b/hal/src/fsfw_hal/stm32h7/spi/mspInit.h @@ -2,6 +2,7 @@ #define FSFW_HAL_STM32H7_SPI_MSPINIT_H_ #include "spiDefinitions.h" +#include "../definitions.h" #include "../dma.h" #include "stm32h7xx_hal_spi.h" @@ -12,6 +13,8 @@ extern "C" { #endif +using mspCb = void (*) (void); + /** * @brief This file provides MSP implementation for DMA, IRQ and Polling mode for the * SPI peripheral. This configuration is required for the SPI communication to work. @@ -19,27 +22,37 @@ extern "C" { namespace spi { struct MspCfgBase { + MspCfgBase(); + MspCfgBase(stm32h7::GpioCfg sck, stm32h7::GpioCfg mosi, stm32h7::GpioCfg miso, + mspCb cleanupCb = nullptr, mspCb setupCb = nullptr): + sck(sck), mosi(mosi), miso(miso), cleanupCb(cleanupCb), + setupCb(setupCb) {} + virtual ~MspCfgBase() = default; - void (* cleanUpMacroWrapper) (void) = nullptr; - void (* setupMacroWrapper) (void) = nullptr; + stm32h7::GpioCfg sck; + stm32h7::GpioCfg mosi; + stm32h7::GpioCfg miso; - GPIO_TypeDef* sckPort = nullptr; - uint32_t sckPin = 0; - uint8_t sckAlternateFunction = 0; - GPIO_TypeDef* mosiPort = nullptr; - uint32_t mosiPin = 0; - uint8_t mosiAlternateFunction = 0; - GPIO_TypeDef* misoPort = nullptr; - uint32_t misoPin = 0; - uint8_t misoAlternateFunction = 0; + mspCb cleanupCb = nullptr; + mspCb setupCb = nullptr; }; -struct MspPollingConfigStruct: public MspCfgBase {}; +struct MspPollingConfigStruct: public MspCfgBase { + MspPollingConfigStruct(): MspCfgBase() {}; + MspPollingConfigStruct(stm32h7::GpioCfg sck, stm32h7::GpioCfg mosi, stm32h7::GpioCfg miso, + mspCb cleanupCb = nullptr, mspCb setupCb = nullptr): + MspCfgBase(sck, mosi, miso, cleanupCb, setupCb) {} +}; /* A valid instance of this struct must be passed to the MSP initialization function as a void* argument */ struct MspIrqConfigStruct: public MspPollingConfigStruct { + MspIrqConfigStruct(): MspPollingConfigStruct() {}; + MspIrqConfigStruct(stm32h7::GpioCfg sck, stm32h7::GpioCfg mosi, stm32h7::GpioCfg miso, + mspCb cleanupCb = nullptr, mspCb setupCb = nullptr): + MspPollingConfigStruct(sck, mosi, miso, cleanupCb, setupCb) {} + SpiBus spiBus = SpiBus::SPI_1; user_handler_t spiIrqHandler = nullptr; user_args_t spiUserArgs = nullptr; @@ -53,11 +66,16 @@ struct MspIrqConfigStruct: public MspPollingConfigStruct { /* A valid instance of this struct must be passed to the MSP initialization function as a void* argument */ struct MspDmaConfigStruct: public MspIrqConfigStruct { + MspDmaConfigStruct(): MspIrqConfigStruct() {}; + MspDmaConfigStruct(stm32h7::GpioCfg sck, stm32h7::GpioCfg mosi, stm32h7::GpioCfg miso, + mspCb cleanupCb = nullptr, mspCb setupCb = nullptr): + MspIrqConfigStruct(sck, mosi, miso, cleanupCb, setupCb) {} void (* dmaClkEnableWrapper) (void) = nullptr; - dma::DMAIndexes txDmaIndex; - dma::DMAIndexes rxDmaIndex; - dma::DMAStreams txDmaStream; - dma::DMAStreams rxDmaStream; + + dma::DMAIndexes txDmaIndex = dma::DMAIndexes::DMA_1; + dma::DMAIndexes rxDmaIndex = dma::DMAIndexes::DMA_1; + dma::DMAStreams txDmaStream = dma::DMAStreams::STREAM_0; + dma::DMAStreams rxDmaStream = dma::DMAStreams::STREAM_0; IRQn_Type txDmaIrqNumber = DMA1_Stream0_IRQn; IRQn_Type rxDmaIrqNumber = DMA1_Stream1_IRQn; // Priorities for NVIC diff --git a/hal/src/fsfw_hal/stm32h7/spi/stm32h743ziSpi.cpp b/hal/src/fsfw_hal/stm32h7/spi/stm32h743ziSpi.cpp index 43194704..8247d002 100644 --- a/hal/src/fsfw_hal/stm32h7/spi/stm32h743ziSpi.cpp +++ b/hal/src/fsfw_hal/stm32h7/spi/stm32h743ziSpi.cpp @@ -23,17 +23,17 @@ void spiDmaClockEnableWrapper() { } void spi::h743zi::standardPollingCfg(MspPollingConfigStruct& cfg) { - cfg.setupMacroWrapper = &spiSetupWrapper; - cfg.cleanUpMacroWrapper = &spiCleanUpWrapper; - cfg.sckPort = GPIOA; - cfg.sckPin = GPIO_PIN_5; - cfg.misoPort = GPIOA; - cfg.misoPin = GPIO_PIN_6; - cfg.mosiPort = GPIOA; - cfg.mosiPin = GPIO_PIN_7; - cfg.sckAlternateFunction = GPIO_AF5_SPI1; - cfg.mosiAlternateFunction = GPIO_AF5_SPI1; - cfg.misoAlternateFunction = GPIO_AF5_SPI1; + cfg.setupCb = &spiSetupWrapper; + cfg.cleanupCb = &spiCleanUpWrapper; + cfg.sck.port = GPIOA; + cfg.sck.pin = GPIO_PIN_5; + cfg.miso.port = GPIOA; + cfg.miso.pin = GPIO_PIN_6; + cfg.mosi.port = GPIOA; + cfg.mosi.pin = GPIO_PIN_7; + cfg.sck.altFnc = GPIO_AF5_SPI1; + cfg.mosi.altFnc = GPIO_AF5_SPI1; + cfg.miso.altFnc = GPIO_AF5_SPI1; } void spi::h743zi::standardInterruptCfg(MspIrqConfigStruct& cfg, IrqPriorities spiIrqPrio,