diff --git a/linux/obc/PdecConfig.cpp b/linux/obc/PdecConfig.cpp
index eaa32512..321e5940 100644
--- a/linux/obc/PdecConfig.cpp
+++ b/linux/obc/PdecConfig.cpp
@@ -33,6 +33,6 @@ uint32_t PdecConfig::getConfigWord(uint8_t wordNo) {
 }
 
 uint32_t PdecConfig::getImrReg() {
-  return static_cast<uint32_t>(enableNewFarIrq << 2) | static_cast<uint32_t>(enableTcAbortIrq << 1)
-      | static_cast<uint32_t>(enableTcNewIrq);
+  return static_cast<uint32_t>(enableNewFarIrq << 2) |
+         static_cast<uint32_t>(enableTcAbortIrq << 1) | static_cast<uint32_t>(enableTcNewIrq);
 }
diff --git a/linux/obc/PdecHandler.cpp b/linux/obc/PdecHandler.cpp
index 2d852caf..0f29ea3c 100644
--- a/linux/obc/PdecHandler.cpp
+++ b/linux/obc/PdecHandler.cpp
@@ -78,63 +78,16 @@ ReturnValue_t PdecHandler::initialize() {
   return returnvalue::OK;
 }
 
-MessageQueueId_t PdecHandler::getCommandQueue() const { return commandQueue->getId(); }
-
-void PdecHandler::writePdecConfig() {
-  PdecConfig pdecConfig;
-
-  *(memoryBaseAddress + FRAME_HEADER_OFFSET) = pdecConfig.getConfigWord(0);
-  *(memoryBaseAddress + FRAME_HEADER_OFFSET + 1) = pdecConfig.getConfigWord(1);
-
-  // Configure interrupt mask register to enable interrupts
-  *(memoryBaseAddress + PDEC_IMR_OFFSET) = pdecConfig.getImrReg();
-
-  // Configure all MAP IDs as invalid
-  for (int idx = 0; idx <= MAX_MAP_ADDR; idx += 4) {
-    *(memoryBaseAddress + MAP_ADDR_LUT_OFFSET + idx / 4) =
-        NO_DESTINATION << 24 | NO_DESTINATION << 16 | NO_DESTINATION << 8 | NO_DESTINATION;
-  }
-
-  // All TCs with MAP ID 7 will be routed to the PM module (can then be read from memory)
-  uint8_t routeToPm = calcMapAddrEntry(PM_BUFFER);
-  *(memoryBaseAddress + MAP_ADDR_LUT_OFFSET + 1) =
-      (NO_DESTINATION << 24) | (NO_DESTINATION << 16) | (NO_DESTINATION << 8) | routeToPm;
-
-  // Write map id clock frequencies
-  for (int idx = 0; idx <= MAX_MAP_ADDR; idx += 4) {
-    *(memoryBaseAddress + MAP_CLK_FREQ_OFFSET + idx / 4) =
-        MAP_CLK_FREQ << 24 | MAP_CLK_FREQ << 16 | MAP_CLK_FREQ << 8 | MAP_CLK_FREQ;
-  }
-
-}
-
-ReturnValue_t PdecHandler::resetFarStatFlag() {
-  uint32_t pdecFar = *(registerBaseAddress + PDEC_FAR_OFFSET);
-  if (pdecFar != FAR_RESET) {
-    sif::warning << "PdecHandler::resetFarStatFlag: FAR register did not match expected value."
-                 << " Read value: 0x" << std::hex << static_cast<unsigned int>(pdecFar)
-                 << std::endl;
-    return returnvalue::FAILED;
-  }
-#if OBSW_DEBUG_PDEC_HANDLER == 1
-  sif::debug << "PdecHandler::resetFarStatFlag: read FAR with value: 0x" << std::hex << pdecFar
-             << std::endl;
-#endif /* OBSW_DEBUG_PDEC_HANDLER == 1 */
-  return returnvalue::OK;
-}
-
-ReturnValue_t PdecHandler::releasePdec() {
-  ReturnValue_t result = returnvalue::OK;
-  result = gpioComIF->pullHigh(pdecReset);
-  if (result != returnvalue::OK) {
-    sif::error << "PdecHandler::releasePdec: Failed to release PDEC reset signal" << std::endl;
-  }
-  return result;
-}
-
 ReturnValue_t PdecHandler::performOperation(uint8_t operationCode) {
   ReturnValue_t result = returnvalue::OK;
+  if (OP_MODE == Modes::POLLED) {
+    polledOperation();
+  } else if (OP_MODE == Modes::IRQ) {
+    irqOperation();
+  }
+}
 
+ReturnValue_t PdecHandler::polledOperation() {
   readCommandQueue();
 
   switch (state) {
@@ -164,6 +117,13 @@ ReturnValue_t PdecHandler::performOperation(uint8_t operationCode) {
   return returnvalue::OK;
 }
 
+ReturnValue_t PdecHandler::irqOperation() {
+  while (true) {
+    readCommandQueue();
+  }
+  return returnvalue::OK;
+}
+
 void PdecHandler::readCommandQueue(void) {
   CommandMessage commandMessage;
   ReturnValue_t result = returnvalue::FAILED;
@@ -181,6 +141,61 @@ void PdecHandler::readCommandQueue(void) {
   }
 }
 
+MessageQueueId_t PdecHandler::getCommandQueue() const { return commandQueue->getId(); }
+
+void PdecHandler::writePdecConfig() {
+  PdecConfig pdecConfig;
+
+  *(memoryBaseAddress + FRAME_HEADER_OFFSET) = pdecConfig.getConfigWord(0);
+  *(memoryBaseAddress + FRAME_HEADER_OFFSET + 1) = pdecConfig.getConfigWord(1);
+
+  if (OP_MODE == Modes::IRQ) {
+    // Configure interrupt mask register to enable interrupts
+    *(memoryBaseAddress + PDEC_IMR_OFFSET) = pdecConfig.getImrReg();
+  }
+
+  // Configure all MAP IDs as invalid
+  for (int idx = 0; idx <= MAX_MAP_ADDR; idx += 4) {
+    *(memoryBaseAddress + MAP_ADDR_LUT_OFFSET + idx / 4) =
+        NO_DESTINATION << 24 | NO_DESTINATION << 16 | NO_DESTINATION << 8 | NO_DESTINATION;
+  }
+
+  // All TCs with MAP ID 7 will be routed to the PM module (can then be read from memory)
+  uint8_t routeToPm = calcMapAddrEntry(PM_BUFFER);
+  *(memoryBaseAddress + MAP_ADDR_LUT_OFFSET + 1) =
+      (NO_DESTINATION << 24) | (NO_DESTINATION << 16) | (NO_DESTINATION << 8) | routeToPm;
+
+  // Write map id clock frequencies
+  for (int idx = 0; idx <= MAX_MAP_ADDR; idx += 4) {
+    *(memoryBaseAddress + MAP_CLK_FREQ_OFFSET + idx / 4) =
+        MAP_CLK_FREQ << 24 | MAP_CLK_FREQ << 16 | MAP_CLK_FREQ << 8 | MAP_CLK_FREQ;
+  }
+}
+
+ReturnValue_t PdecHandler::resetFarStatFlag() {
+  uint32_t pdecFar = *(registerBaseAddress + PDEC_FAR_OFFSET);
+  if (pdecFar != FAR_RESET) {
+    sif::warning << "PdecHandler::resetFarStatFlag: FAR register did not match expected value."
+                 << " Read value: 0x" << std::hex << static_cast<unsigned int>(pdecFar)
+                 << std::endl;
+    return returnvalue::FAILED;
+  }
+#if OBSW_DEBUG_PDEC_HANDLER == 1
+  sif::debug << "PdecHandler::resetFarStatFlag: read FAR with value: 0x" << std::hex << pdecFar
+             << std::endl;
+#endif /* OBSW_DEBUG_PDEC_HANDLER == 1 */
+  return returnvalue::OK;
+}
+
+ReturnValue_t PdecHandler::releasePdec() {
+  ReturnValue_t result = returnvalue::OK;
+  result = gpioComIF->pullHigh(pdecReset);
+  if (result != returnvalue::OK) {
+    sif::error << "PdecHandler::releasePdec: Failed to release PDEC reset signal" << std::endl;
+  }
+  return result;
+}
+
 bool PdecHandler::newTcReceived() {
   uint32_t pdecFar = *(registerBaseAddress + PDEC_FAR_OFFSET);
 
diff --git a/linux/obc/PdecHandler.h b/linux/obc/PdecHandler.h
index 20a9642d..d003bae2 100644
--- a/linux/obc/PdecHandler.h
+++ b/linux/obc/PdecHandler.h
@@ -33,6 +33,8 @@
  */
 class PdecHandler : public SystemObject, public ExecutableObjectIF, public HasActionsIF {
  public:
+  enum class Modes { POLLED, IRQ };
+
   /**
    * @brief   Constructor
    * @param objectId  Object ID of PDEC handler system object
@@ -78,6 +80,8 @@ class PdecHandler : public SystemObject, public ExecutableObjectIF, public HasAc
  private:
   static const uint8_t INTERFACE_ID = CLASS_ID::PDEC_HANDLER;
 
+  static constexpr Modes OP_MODE = Modes::POLLED;
+
   static const ReturnValue_t ABANDONED_CLTU = MAKE_RETURN_CODE(0xA0);
   static const ReturnValue_t FRAME_DIRTY = MAKE_RETURN_CODE(0xA1);
   static const ReturnValue_t FRAME_ILLEGAL_ONE_REASON = MAKE_RETURN_CODE(0xA2);
@@ -234,6 +238,9 @@ class PdecHandler : public SystemObject, public ExecutableObjectIF, public HasAc
    */
   void readCommandQueue(void);
 
+  ReturnValue_t polledOperation();
+  ReturnValue_t irqOperation();
+
   /**
    * @brief   This functions writes the configuration parameters to the configuration
    *          section of the PDEC.
diff --git a/mission/devices/ImtqHandler.cpp b/mission/devices/ImtqHandler.cpp
index d27b6f65..a0e717f8 100644
--- a/mission/devices/ImtqHandler.cpp
+++ b/mission/devices/ImtqHandler.cpp
@@ -321,7 +321,8 @@ ReturnValue_t ImtqHandler::scanForReply(const uint8_t* start, size_t remainingSi
       break;
     case (IMTQ::CC::PAST_AVAILABLE_RESPONSE_BYTES): {
       sif::warning << "IMTQHandler::scanForReply: Read 0xFF command byte, reading past available "
-                      "bytes. Keep 1 ms delay between I2C send and read" << std::endl;
+                      "bytes. Keep 1 ms delay between I2C send and read"
+                   << std::endl;
       result = IGNORE_REPLY_DATA;
       break;
     }