diff --git a/CHANGELOG.md b/CHANGELOG.md index 276a6b1f..d3a8ed70 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -16,6 +16,12 @@ will consitute of a breaking change warranting a new major release: # [unreleased] +## Changed + +- Changed PDEC addresses depending on which firmware version is used. It is suspected that + the previous addresses were invalid and not properly covered by the Linux memory protection. + The OBSW will use the old addresses for older FW versions. + # [v7.2.0] 2023-10-27 - `eive-tmtc` v5.10.1 diff --git a/bsp_q7s/boardconfig/busConf.h b/bsp_q7s/boardconfig/busConf.h index dc3779a7..aab8ce44 100644 --- a/bsp_q7s/boardconfig/busConf.h +++ b/bsp_q7s/boardconfig/busConf.h @@ -18,7 +18,8 @@ static constexpr char I2C_Q7_EIVE[] = "/dev/i2c_q7"; static constexpr char UART_GNSS_DEV[] = "/dev/gps0"; static constexpr char UART_PLOC_MPSOC_DEV[] = "/dev/ul_plmpsoc"; -static constexpr char UART_PLOC_SUPERVSIOR_DEV[] = "/dev/ploc_supv"; +static constexpr char UART_PLOC_SUPERVISOR_DEV_FALLBACK[] = "/dev/ttyUL4"; +static constexpr char UART_PLOC_SUPERVISOR_DEV[] = "/dev/ploc_supv"; static constexpr char UART_SYRLINKS_DEV[] = "/dev/ul_syrlinks"; static constexpr char UART_STAR_TRACKER_DEV[] = "/dev/ul_str"; static constexpr char UART_SCEX_DEV[] = "/dev/scex"; diff --git a/bsp_q7s/em/emObjectFactory.cpp b/bsp_q7s/em/emObjectFactory.cpp index ca75e123..41dab3e6 100644 --- a/bsp_q7s/em/emObjectFactory.cpp +++ b/bsp_q7s/em/emObjectFactory.cpp @@ -163,8 +163,8 @@ void ObjectFactory::produce(void* args) { #if OBSW_ADD_CCSDS_IP_CORES == 1 CcsdsIpCoreHandler* ipCoreHandler = nullptr; CcsdsComponentArgs ccsdsArgs(*gpioComIF, *ipcStore, *tmStore, stores, *pusFunnel, *cfdpFunnel, - &ipCoreHandler); - createCcsdsIpComponentsAddTmRouting(ccsdsArgs); + &ipCoreHandler, 0, 0); + createCcsdsIpComponentsWrapper(ccsdsArgs); #endif /* OBSW_ADD_CCSDS_IP_CORES == 1 */ /* Test Task */ diff --git a/bsp_q7s/fmObjectFactory.cpp b/bsp_q7s/fmObjectFactory.cpp index e4a61124..b154ac52 100644 --- a/bsp_q7s/fmObjectFactory.cpp +++ b/bsp_q7s/fmObjectFactory.cpp @@ -115,8 +115,8 @@ void ObjectFactory::produce(void* args) { #if OBSW_ADD_CCSDS_IP_CORES == 1 CcsdsIpCoreHandler* ipCoreHandler = nullptr; CcsdsComponentArgs ccsdsArgs(*gpioComIF, *ipcStore, *tmStore, stores, *pusFunnel, *cfdpFunnel, - &ipCoreHandler); - createCcsdsIpComponentsAddTmRouting(ccsdsArgs); + &ipCoreHandler, 0, 0); + createCcsdsIpComponentsWrapper(ccsdsArgs); #endif /* OBSW_ADD_CCSDS_IP_CORES == 1 */ #if OBSW_ADD_SCEX_DEVICE == 1 diff --git a/bsp_q7s/objectFactory.cpp b/bsp_q7s/objectFactory.cpp index c8e6f555..d0c0f924 100644 --- a/bsp_q7s/objectFactory.cpp +++ b/bsp_q7s/objectFactory.cpp @@ -642,8 +642,12 @@ void ObjectFactory::createPayloadComponents(LinuxLibgpioIF* gpioComIF, PowerSwit auto supvGpioCookie = new GpioCookie; supvGpioCookie->addGpio(gpioIds::ENABLE_SUPV_UART, gpioConfigSupv); gpioComIF->addGpios(supvGpioCookie); + const char* plocSupvDev = q7s::UART_PLOC_SUPERVISOR_DEV; + if(not std::filesystem::exists(plocSupvDev)) { + plocSupvDev = q7s::UART_PLOC_SUPERVISOR_DEV_FALLBACK; + } auto supervisorCookie = new SerialCookie(objects::PLOC_SUPERVISOR_HANDLER, - q7s::UART_PLOC_SUPERVSIOR_DEV, serial::PLOC_SUPV_BAUD, + plocSupvDev, serial::PLOC_SUPV_BAUD, supv::MAX_PACKET_SIZE * 20, UartModes::NON_CANONICAL); supervisorCookie->setNoFixedSizeReply(); auto supvHelper = new PlocSupvUartManager(objects::PLOC_SUPERVISOR_HELPER); @@ -836,7 +840,7 @@ ReturnValue_t ObjectFactory::createCcsdsComponents(CcsdsComponentArgs& args) { uioNames.registers = q7s::UIO_PDEC_REGISTERS; uioNames.irq = q7s::UIO_PDEC_IRQ; new PdecHandler(objects::PDEC_HANDLER, objects::CCSDS_HANDLER, &args.gpioComIF, - gpioIds::PDEC_RESET, uioNames); + gpioIds::PDEC_RESET, uioNames, args.pdecCfgMemBaseAddr, args.pdecRamBaseAddr); GpioCookie* gpioRS485Chip = new GpioCookie; gpio = new GpiodRegularByLineName(q7s::gpioNames::RS485_EN_TX_CLOCK, "RS485 Transceiver", Direction::OUT, Levels::LOW); @@ -1062,7 +1066,13 @@ ReturnValue_t ObjectFactory::readFirmwareVersion() { return returnvalue::OK; } -ReturnValue_t ObjectFactory::createCcsdsIpComponentsAddTmRouting(CcsdsComponentArgs& ccsdsArgs) { +ReturnValue_t ObjectFactory::createCcsdsIpComponentsWrapper(CcsdsComponentArgs& ccsdsArgs) { + ccsdsArgs.pdecCfgMemBaseAddr = config::pdec::PDEC_CONFIG_BASE_ADDR; + ccsdsArgs.pdecRamBaseAddr = config::pdec::PDEC_RAM_ADDR; + if (core::FW_VERSION_MAJOR < 6) { + ccsdsArgs.pdecCfgMemBaseAddr = config::pdec::PDEC_CONFIG_BASE_ADDR_LEGACY; + ccsdsArgs.pdecRamBaseAddr = config::pdec::PDEC_RAM_ADDR_LEGACY; + } ReturnValue_t result = createCcsdsComponents(ccsdsArgs); #if OBSW_TM_TO_PTME == 1 if (ccsdsArgs.normalLiveTmDest != MessageQueueIF::NO_QUEUE) { diff --git a/bsp_q7s/objectFactory.h b/bsp_q7s/objectFactory.h index 223031e6..b3dfa83b 100644 --- a/bsp_q7s/objectFactory.h +++ b/bsp_q7s/objectFactory.h @@ -31,14 +31,17 @@ namespace ObjectFactory { struct CcsdsComponentArgs { CcsdsComponentArgs(LinuxLibgpioIF& gpioIF, StorageManagerIF& ipcStore, StorageManagerIF& tmStore, PersistentTmStores& stores, PusTmFunnel& pusFunnel, CfdpTmFunnel& cfdpFunnel, - CcsdsIpCoreHandler** ipCoreHandler) + CcsdsIpCoreHandler** ipCoreHandler, uint32_t pdecCfgMemBaseAddr, + uint32_t pdecRamBaseAddr) : gpioComIF(gpioIF), ipcStore(ipcStore), tmStore(tmStore), stores(stores), pusFunnel(pusFunnel), cfdpFunnel(cfdpFunnel), - ipCoreHandler(ipCoreHandler) {} + ipCoreHandler(ipCoreHandler), + pdecCfgMemBaseAddr(pdecCfgMemBaseAddr), + pdecRamBaseAddr(pdecRamBaseAddr) {} LinuxLibgpioIF& gpioComIF; StorageManagerIF& ipcStore; StorageManagerIF& tmStore; @@ -46,6 +49,8 @@ struct CcsdsComponentArgs { PusTmFunnel& pusFunnel; CfdpTmFunnel& cfdpFunnel; CcsdsIpCoreHandler** ipCoreHandler; + uint32_t pdecCfgMemBaseAddr; + uint32_t pdecRamBaseAddr; MessageQueueId_t normalLiveTmDest = MessageQueueIF::NO_QUEUE; MessageQueueId_t cfdpLiveTmDest = MessageQueueIF::NO_QUEUE; }; @@ -75,7 +80,7 @@ void createSolarArrayDeploymentComponents(PowerSwitchIF& pwrSwitcher, GpioIF& gp void createSyrlinksComponents(PowerSwitchIF* pwrSwitcher); void createPayloadComponents(LinuxLibgpioIF* gpioComIF, PowerSwitchIF& pwrSwitcher); void createReactionWheelComponents(LinuxLibgpioIF* gpioComIF, PowerSwitchIF* pwrSwitcher); -ReturnValue_t createCcsdsIpComponentsAddTmRouting(CcsdsComponentArgs& args); +ReturnValue_t createCcsdsIpComponentsWrapper(CcsdsComponentArgs& args); ReturnValue_t createCcsdsComponents(CcsdsComponentArgs& args); ReturnValue_t readFirmwareVersion(); void createMiscComponents(); diff --git a/common/config/eive/definitions.h b/common/config/eive/definitions.h index b51eefdb..0b63a017 100644 --- a/common/config/eive/definitions.h +++ b/common/config/eive/definitions.h @@ -115,6 +115,18 @@ static constexpr float SCHED_BLOCK_10_PERIOD = } // namespace spiSched +namespace pdec { + +// Pre FW v6.0.0 +static constexpr uint32_t PDEC_CONFIG_BASE_ADDR_LEGACY = 0x24000000; +static constexpr uint32_t PDEC_RAM_ADDR_LEGACY = 0x26000000; + +// Post FW v6.0.0 +static constexpr uint32_t PDEC_CONFIG_BASE_ADDR = 0x4000000; +static constexpr uint32_t PDEC_RAM_ADDR = 0x7000000; + +} // namespace pdec + } // namespace config #endif /* COMMON_CONFIG_DEFINITIONS_H_ */ diff --git a/linux/ipcore/PdecHandler.cpp b/linux/ipcore/PdecHandler.cpp index 8f86ee9c..28598aa8 100644 --- a/linux/ipcore/PdecHandler.cpp +++ b/linux/ipcore/PdecHandler.cpp @@ -24,12 +24,15 @@ using namespace pdec; uint32_t PdecHandler::CURRENT_FAR = 0; PdecHandler::PdecHandler(object_id_t objectId, object_id_t tcDestinationId, - LinuxLibgpioIF* gpioComIF, gpioId_t pdecReset, UioNames names) + LinuxLibgpioIF* gpioComIF, gpioId_t pdecReset, UioNames names, + uint32_t cfgMemPhyAddr, uint32_t pdecRamPhyAddr) : SystemObject(objectId), tcDestinationId(tcDestinationId), gpioComIF(gpioComIF), pdecReset(pdecReset), actionHelper(this, nullptr), + cfgMemBaseAddr(cfgMemPhyAddr), + pdecRamBaseAddr(pdecRamPhyAddr), uioNames(names), paramHelper(this) { auto mqArgs = MqArgs(objectId, static_cast(this)); @@ -67,7 +70,7 @@ ReturnValue_t PdecHandler::initialize() { }; memoryBaseAddress = static_cast( mmap(0, PDEC_CFG_MEM_SIZE, static_cast(UioMapper::Permissions::READ_WRITE), MAP_SHARED, - fd, PDEC_CFG_MEM_PHY_ADDR)); + fd, cfgMemBaseAddr)); if (memoryBaseAddress == nullptr) { return ObjectManagerIF::CHILD_INIT_FAILED; } @@ -75,7 +78,7 @@ ReturnValue_t PdecHandler::initialize() { ramBaseAddress = static_cast(mmap(0, PDEC_RAM_SIZE, static_cast(UioMapper::Permissions::READ_WRITE), - MAP_SHARED, fd, PDEC_RAM_PHY_ADDR)); + MAP_SHARED, fd, pdecRamBaseAddr)); if (ramBaseAddress == nullptr) { return ObjectManagerIF::CHILD_INIT_FAILED; } @@ -466,11 +469,6 @@ bool PdecHandler::newTcReceived() { } void PdecHandler::doPeriodicWork() { - // scuffed test code - // if(testCntr < 30) { - // triggerEvent(pdec::INVALID_TC_FRAME, FRAME_DIRTY_RETVAL); - // testCntr++; - // } checkLocks(); } @@ -645,7 +643,7 @@ void PdecHandler::handleNewTc() { } ReturnValue_t PdecHandler::readTc(uint32_t& tcLength) { - uint32_t tcOffset = (*(registerBaseAddress + PDEC_BPTR_OFFSET) - PHYSICAL_RAM_BASE_ADDRESS) / 4; + uint32_t tcOffset = (*(registerBaseAddress + PDEC_BPTR_OFFSET) - pdecRamBaseAddr) / 4; #if OBSW_DEBUG_PDEC_HANDLER == 1 sif::debug << "PdecHandler::readTc: TC offset: 0x" << std::hex << tcOffset << std::endl; diff --git a/linux/ipcore/PdecHandler.h b/linux/ipcore/PdecHandler.h index 19968da6..8832b5d5 100644 --- a/linux/ipcore/PdecHandler.h +++ b/linux/ipcore/PdecHandler.h @@ -52,9 +52,7 @@ class PdecHandler : public SystemObject, public: static constexpr dur_millis_t IRQ_TIMEOUT_MS = 500; static constexpr uint32_t PDEC_CFG_MEM_SIZE = 0x1000; - static constexpr uint32_t PDEC_CFG_MEM_PHY_ADDR = 0x24000000; static constexpr uint32_t PDEC_RAM_SIZE = 0x10000; - static constexpr uint32_t PDEC_RAM_PHY_ADDR = 0x26000000; enum class Modes { POLLED, IRQ }; @@ -68,7 +66,7 @@ class PdecHandler : public SystemObject, * @param uioregsiters String of uio device file same mapped to the PDEC register space */ PdecHandler(object_id_t objectId, object_id_t tcDestinationId, LinuxLibgpioIF* gpioComIF, - gpioId_t pdecReset, UioNames names); + gpioId_t pdecReset, UioNames names, uint32_t cfgMemPhyAddr, uint32_t pdecRamPhyAddr); virtual ~PdecHandler(); @@ -103,12 +101,6 @@ class PdecHandler : public SystemObject, static const size_t MAX_TC_SEGMENT_SIZE = 1017; static const uint8_t MAP_ID_MASK = 0x3F; -#ifdef TE0720_1CFA - static const uint32_t PHYSICAL_RAM_BASE_ADDRESS = 0x32000000; -#else - static const uint32_t PHYSICAL_RAM_BASE_ADDRESS = 0x26000000; -#endif - // Expected value stored in FAR register after reset static const uint32_t FAR_RESET = 0x7FE0; @@ -195,6 +187,9 @@ class PdecHandler : public SystemObject, MessageQueueId_t commandedBy = MessageQueueIF::NO_QUEUE; bool ptmeResetWithReinitializationPending = false; + uint32_t cfgMemBaseAddr; + uint32_t pdecRamBaseAddr; + UioNames uioNames; ParameterHelper paramHelper;