From ec903abd491c30f19ef1515ab75105a622c555a2 Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Tue, 24 Oct 2023 15:00:10 +0200 Subject: [PATCH 1/8] pdec handler start addr change --- linux/ipcore/PdecHandler.cpp | 3 ++- linux/ipcore/PdecHandler.h | 10 +++------- tmtc | 2 +- 3 files changed, 6 insertions(+), 9 deletions(-) diff --git a/linux/ipcore/PdecHandler.cpp b/linux/ipcore/PdecHandler.cpp index 8f86ee9c..d5f45ae7 100644 --- a/linux/ipcore/PdecHandler.cpp +++ b/linux/ipcore/PdecHandler.cpp @@ -24,7 +24,8 @@ using namespace pdec; uint32_t PdecHandler::CURRENT_FAR = 0; PdecHandler::PdecHandler(object_id_t objectId, object_id_t tcDestinationId, - LinuxLibgpioIF* gpioComIF, gpioId_t pdecReset, UioNames names) + LinuxLibgpioIF* gpioComIF, gpioId_t pdecReset, UioNames names, + uint32_t cfgMemPhyAddr, uint32_t pdecRamPhyAddr) : SystemObject(objectId), tcDestinationId(tcDestinationId), gpioComIF(gpioComIF), diff --git a/linux/ipcore/PdecHandler.h b/linux/ipcore/PdecHandler.h index 19968da6..3a802cdd 100644 --- a/linux/ipcore/PdecHandler.h +++ b/linux/ipcore/PdecHandler.h @@ -68,7 +68,7 @@ class PdecHandler : public SystemObject, * @param uioregsiters String of uio device file same mapped to the PDEC register space */ PdecHandler(object_id_t objectId, object_id_t tcDestinationId, LinuxLibgpioIF* gpioComIF, - gpioId_t pdecReset, UioNames names); + gpioId_t pdecReset, UioNames names, uint32_t cfgMemPhyAddr, uint32_t pdecRamPhyAddr); virtual ~PdecHandler(); @@ -103,12 +103,6 @@ class PdecHandler : public SystemObject, static const size_t MAX_TC_SEGMENT_SIZE = 1017; static const uint8_t MAP_ID_MASK = 0x3F; -#ifdef TE0720_1CFA - static const uint32_t PHYSICAL_RAM_BASE_ADDRESS = 0x32000000; -#else - static const uint32_t PHYSICAL_RAM_BASE_ADDRESS = 0x26000000; -#endif - // Expected value stored in FAR register after reset static const uint32_t FAR_RESET = 0x7FE0; @@ -152,6 +146,8 @@ class PdecHandler : public SystemObject, LinuxLibgpioIF* gpioComIF = nullptr; + uint32_t cfgMemBaseAddr = 0x0; + uint32_t pdecRamBaseAddr = 0x0; uint32_t interruptCounter = 0; Countdown interruptWindowCd = Countdown(1000); diff --git a/tmtc b/tmtc index 60f7ae54..8f8bcde9 160000 --- a/tmtc +++ b/tmtc @@ -1 +1 @@ -Subproject commit 60f7ae5453b387ee5ebcf6a338c34284004dbce7 +Subproject commit 8f8bcde90e3b9113388cfedc47775426888d0781 -- 2.43.0 From f55b475f7e9fc89ab5c691bbdb62e4431e5d6bda Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Wed, 25 Oct 2023 08:23:36 +0200 Subject: [PATCH 2/8] add new addrs --- common/config/eive/definitions.h | 3 +++ linux/ipcore/PdecHandler.cpp | 8 +++++--- linux/ipcore/PdecHandler.h | 9 +++++---- 3 files changed, 13 insertions(+), 7 deletions(-) diff --git a/common/config/eive/definitions.h b/common/config/eive/definitions.h index b51eefdb..033d703f 100644 --- a/common/config/eive/definitions.h +++ b/common/config/eive/definitions.h @@ -115,6 +115,9 @@ static constexpr float SCHED_BLOCK_10_PERIOD = } // namespace spiSched +namespace pdec { +static constexpr uint32_t PDEC_CONFIG_BASE_ADDR_LEGACY = 0x24000000; +} } // namespace config #endif /* COMMON_CONFIG_DEFINITIONS_H_ */ diff --git a/linux/ipcore/PdecHandler.cpp b/linux/ipcore/PdecHandler.cpp index d5f45ae7..d9065314 100644 --- a/linux/ipcore/PdecHandler.cpp +++ b/linux/ipcore/PdecHandler.cpp @@ -31,6 +31,8 @@ PdecHandler::PdecHandler(object_id_t objectId, object_id_t tcDestinationId, gpioComIF(gpioComIF), pdecReset(pdecReset), actionHelper(this, nullptr), + cfgMemBaseAddr(cfgMemPhyAddr), + pdecRamBaseAddr(pdecRamPhyAddr), uioNames(names), paramHelper(this) { auto mqArgs = MqArgs(objectId, static_cast(this)); @@ -68,7 +70,7 @@ ReturnValue_t PdecHandler::initialize() { }; memoryBaseAddress = static_cast( mmap(0, PDEC_CFG_MEM_SIZE, static_cast(UioMapper::Permissions::READ_WRITE), MAP_SHARED, - fd, PDEC_CFG_MEM_PHY_ADDR)); + fd, cfgMemBaseAddr)); if (memoryBaseAddress == nullptr) { return ObjectManagerIF::CHILD_INIT_FAILED; } @@ -76,7 +78,7 @@ ReturnValue_t PdecHandler::initialize() { ramBaseAddress = static_cast(mmap(0, PDEC_RAM_SIZE, static_cast(UioMapper::Permissions::READ_WRITE), - MAP_SHARED, fd, PDEC_RAM_PHY_ADDR)); + MAP_SHARED, fd, pdecRamBaseAddr)); if (ramBaseAddress == nullptr) { return ObjectManagerIF::CHILD_INIT_FAILED; } @@ -646,7 +648,7 @@ void PdecHandler::handleNewTc() { } ReturnValue_t PdecHandler::readTc(uint32_t& tcLength) { - uint32_t tcOffset = (*(registerBaseAddress + PDEC_BPTR_OFFSET) - PHYSICAL_RAM_BASE_ADDRESS) / 4; + uint32_t tcOffset = (*(registerBaseAddress + PDEC_BPTR_OFFSET) - pdecRamBaseAddr) / 4; #if OBSW_DEBUG_PDEC_HANDLER == 1 sif::debug << "PdecHandler::readTc: TC offset: 0x" << std::hex << tcOffset << std::endl; diff --git a/linux/ipcore/PdecHandler.h b/linux/ipcore/PdecHandler.h index 3a802cdd..1119999c 100644 --- a/linux/ipcore/PdecHandler.h +++ b/linux/ipcore/PdecHandler.h @@ -52,9 +52,9 @@ class PdecHandler : public SystemObject, public: static constexpr dur_millis_t IRQ_TIMEOUT_MS = 500; static constexpr uint32_t PDEC_CFG_MEM_SIZE = 0x1000; - static constexpr uint32_t PDEC_CFG_MEM_PHY_ADDR = 0x24000000; + //static constexpr uint32_t PDEC_CFG_MEM_PHY_ADDR = 0x24000000; static constexpr uint32_t PDEC_RAM_SIZE = 0x10000; - static constexpr uint32_t PDEC_RAM_PHY_ADDR = 0x26000000; + //static constexpr uint32_t PDEC_RAM_PHY_ADDR = 0x26000000; enum class Modes { POLLED, IRQ }; @@ -146,8 +146,6 @@ class PdecHandler : public SystemObject, LinuxLibgpioIF* gpioComIF = nullptr; - uint32_t cfgMemBaseAddr = 0x0; - uint32_t pdecRamBaseAddr = 0x0; uint32_t interruptCounter = 0; Countdown interruptWindowCd = Countdown(1000); @@ -191,6 +189,9 @@ class PdecHandler : public SystemObject, MessageQueueId_t commandedBy = MessageQueueIF::NO_QUEUE; bool ptmeResetWithReinitializationPending = false; + uint32_t cfgMemBaseAddr; + uint32_t pdecRamBaseAddr; + UioNames uioNames; ParameterHelper paramHelper; -- 2.43.0 From 817182b45fab42a9ace33e1d74e2f9001438eb11 Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Wed, 25 Oct 2023 09:10:04 +0200 Subject: [PATCH 3/8] finished addr change --- bsp_q7s/em/emObjectFactory.cpp | 4 ++-- bsp_q7s/fmObjectFactory.cpp | 4 ++-- bsp_q7s/objectFactory.cpp | 12 +++++++++--- bsp_q7s/objectFactory.h | 11 ++++++++--- common/config/eive/definitions.h | 11 ++++++++++- linux/ipcore/PdecHandler.h | 4 ++-- tmtc | 2 +- 7 files changed, 34 insertions(+), 14 deletions(-) diff --git a/bsp_q7s/em/emObjectFactory.cpp b/bsp_q7s/em/emObjectFactory.cpp index ca75e123..41dab3e6 100644 --- a/bsp_q7s/em/emObjectFactory.cpp +++ b/bsp_q7s/em/emObjectFactory.cpp @@ -163,8 +163,8 @@ void ObjectFactory::produce(void* args) { #if OBSW_ADD_CCSDS_IP_CORES == 1 CcsdsIpCoreHandler* ipCoreHandler = nullptr; CcsdsComponentArgs ccsdsArgs(*gpioComIF, *ipcStore, *tmStore, stores, *pusFunnel, *cfdpFunnel, - &ipCoreHandler); - createCcsdsIpComponentsAddTmRouting(ccsdsArgs); + &ipCoreHandler, 0, 0); + createCcsdsIpComponentsWrapper(ccsdsArgs); #endif /* OBSW_ADD_CCSDS_IP_CORES == 1 */ /* Test Task */ diff --git a/bsp_q7s/fmObjectFactory.cpp b/bsp_q7s/fmObjectFactory.cpp index e4a61124..b154ac52 100644 --- a/bsp_q7s/fmObjectFactory.cpp +++ b/bsp_q7s/fmObjectFactory.cpp @@ -115,8 +115,8 @@ void ObjectFactory::produce(void* args) { #if OBSW_ADD_CCSDS_IP_CORES == 1 CcsdsIpCoreHandler* ipCoreHandler = nullptr; CcsdsComponentArgs ccsdsArgs(*gpioComIF, *ipcStore, *tmStore, stores, *pusFunnel, *cfdpFunnel, - &ipCoreHandler); - createCcsdsIpComponentsAddTmRouting(ccsdsArgs); + &ipCoreHandler, 0, 0); + createCcsdsIpComponentsWrapper(ccsdsArgs); #endif /* OBSW_ADD_CCSDS_IP_CORES == 1 */ #if OBSW_ADD_SCEX_DEVICE == 1 diff --git a/bsp_q7s/objectFactory.cpp b/bsp_q7s/objectFactory.cpp index c8e6f555..552eb6a6 100644 --- a/bsp_q7s/objectFactory.cpp +++ b/bsp_q7s/objectFactory.cpp @@ -834,9 +834,9 @@ ReturnValue_t ObjectFactory::createCcsdsComponents(CcsdsComponentArgs& args) { uioNames.configMemory = q7s::UIO_PDEC_CONFIG_MEMORY; uioNames.ramMemory = q7s::UIO_PDEC_RAM; uioNames.registers = q7s::UIO_PDEC_REGISTERS; - uioNames.irq = q7s::UIO_PDEC_IRQ; + uint32_t cfgMemAddr = config::pdec::PDEC_CONFIG_BASE_ADDR_LEGACY; new PdecHandler(objects::PDEC_HANDLER, objects::CCSDS_HANDLER, &args.gpioComIF, - gpioIds::PDEC_RESET, uioNames); + gpioIds::PDEC_RESET, uioNames, args.pdecCfgMemBaseAddr, args.pdecRamBaseAddr); GpioCookie* gpioRS485Chip = new GpioCookie; gpio = new GpiodRegularByLineName(q7s::gpioNames::RS485_EN_TX_CLOCK, "RS485 Transceiver", Direction::OUT, Levels::LOW); @@ -1062,7 +1062,13 @@ ReturnValue_t ObjectFactory::readFirmwareVersion() { return returnvalue::OK; } -ReturnValue_t ObjectFactory::createCcsdsIpComponentsAddTmRouting(CcsdsComponentArgs& ccsdsArgs) { +ReturnValue_t ObjectFactory::createCcsdsIpComponentsWrapper(CcsdsComponentArgs& ccsdsArgs) { + ccsdsArgs.pdecCfgMemBaseAddr = config::pdec::PDEC_CONFIG_BASE_ADDR; + ccsdsArgs.pdecRamBaseAddr = config::pdec::PDEC_RAM_ADDR; + if (core::FW_VERSION_MAJOR < 6) { + ccsdsArgs.pdecCfgMemBaseAddr = config::pdec::PDEC_CONFIG_BASE_ADDR_LEGACY; + ccsdsArgs.pdecRamBaseAddr = config::pdec::PDEC_RAM_ADDR_LEGACY; + } ReturnValue_t result = createCcsdsComponents(ccsdsArgs); #if OBSW_TM_TO_PTME == 1 if (ccsdsArgs.normalLiveTmDest != MessageQueueIF::NO_QUEUE) { diff --git a/bsp_q7s/objectFactory.h b/bsp_q7s/objectFactory.h index 223031e6..b3dfa83b 100644 --- a/bsp_q7s/objectFactory.h +++ b/bsp_q7s/objectFactory.h @@ -31,14 +31,17 @@ namespace ObjectFactory { struct CcsdsComponentArgs { CcsdsComponentArgs(LinuxLibgpioIF& gpioIF, StorageManagerIF& ipcStore, StorageManagerIF& tmStore, PersistentTmStores& stores, PusTmFunnel& pusFunnel, CfdpTmFunnel& cfdpFunnel, - CcsdsIpCoreHandler** ipCoreHandler) + CcsdsIpCoreHandler** ipCoreHandler, uint32_t pdecCfgMemBaseAddr, + uint32_t pdecRamBaseAddr) : gpioComIF(gpioIF), ipcStore(ipcStore), tmStore(tmStore), stores(stores), pusFunnel(pusFunnel), cfdpFunnel(cfdpFunnel), - ipCoreHandler(ipCoreHandler) {} + ipCoreHandler(ipCoreHandler), + pdecCfgMemBaseAddr(pdecCfgMemBaseAddr), + pdecRamBaseAddr(pdecRamBaseAddr) {} LinuxLibgpioIF& gpioComIF; StorageManagerIF& ipcStore; StorageManagerIF& tmStore; @@ -46,6 +49,8 @@ struct CcsdsComponentArgs { PusTmFunnel& pusFunnel; CfdpTmFunnel& cfdpFunnel; CcsdsIpCoreHandler** ipCoreHandler; + uint32_t pdecCfgMemBaseAddr; + uint32_t pdecRamBaseAddr; MessageQueueId_t normalLiveTmDest = MessageQueueIF::NO_QUEUE; MessageQueueId_t cfdpLiveTmDest = MessageQueueIF::NO_QUEUE; }; @@ -75,7 +80,7 @@ void createSolarArrayDeploymentComponents(PowerSwitchIF& pwrSwitcher, GpioIF& gp void createSyrlinksComponents(PowerSwitchIF* pwrSwitcher); void createPayloadComponents(LinuxLibgpioIF* gpioComIF, PowerSwitchIF& pwrSwitcher); void createReactionWheelComponents(LinuxLibgpioIF* gpioComIF, PowerSwitchIF* pwrSwitcher); -ReturnValue_t createCcsdsIpComponentsAddTmRouting(CcsdsComponentArgs& args); +ReturnValue_t createCcsdsIpComponentsWrapper(CcsdsComponentArgs& args); ReturnValue_t createCcsdsComponents(CcsdsComponentArgs& args); ReturnValue_t readFirmwareVersion(); void createMiscComponents(); diff --git a/common/config/eive/definitions.h b/common/config/eive/definitions.h index 033d703f..0b63a017 100644 --- a/common/config/eive/definitions.h +++ b/common/config/eive/definitions.h @@ -116,8 +116,17 @@ static constexpr float SCHED_BLOCK_10_PERIOD = } // namespace spiSched namespace pdec { + +// Pre FW v6.0.0 static constexpr uint32_t PDEC_CONFIG_BASE_ADDR_LEGACY = 0x24000000; -} +static constexpr uint32_t PDEC_RAM_ADDR_LEGACY = 0x26000000; + +// Post FW v6.0.0 +static constexpr uint32_t PDEC_CONFIG_BASE_ADDR = 0x4000000; +static constexpr uint32_t PDEC_RAM_ADDR = 0x7000000; + +} // namespace pdec + } // namespace config #endif /* COMMON_CONFIG_DEFINITIONS_H_ */ diff --git a/linux/ipcore/PdecHandler.h b/linux/ipcore/PdecHandler.h index 1119999c..c2badb62 100644 --- a/linux/ipcore/PdecHandler.h +++ b/linux/ipcore/PdecHandler.h @@ -52,9 +52,9 @@ class PdecHandler : public SystemObject, public: static constexpr dur_millis_t IRQ_TIMEOUT_MS = 500; static constexpr uint32_t PDEC_CFG_MEM_SIZE = 0x1000; - //static constexpr uint32_t PDEC_CFG_MEM_PHY_ADDR = 0x24000000; + // static constexpr uint32_t PDEC_CFG_MEM_PHY_ADDR = 0x24000000; static constexpr uint32_t PDEC_RAM_SIZE = 0x10000; - //static constexpr uint32_t PDEC_RAM_PHY_ADDR = 0x26000000; + // static constexpr uint32_t PDEC_RAM_PHY_ADDR = 0x26000000; enum class Modes { POLLED, IRQ }; diff --git a/tmtc b/tmtc index 8f8bcde9..97f99415 160000 --- a/tmtc +++ b/tmtc @@ -1 +1 @@ -Subproject commit 8f8bcde90e3b9113388cfedc47775426888d0781 +Subproject commit 97f99415d6be40d35bf9c373fea40b41c8457386 -- 2.43.0 From 94f3d89f7b98c3172c30266cb3f2bf77d2be0eb2 Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Wed, 25 Oct 2023 09:11:45 +0200 Subject: [PATCH 4/8] smaller tweak --- bsp_q7s/objectFactory.cpp | 1 - 1 file changed, 1 deletion(-) diff --git a/bsp_q7s/objectFactory.cpp b/bsp_q7s/objectFactory.cpp index 552eb6a6..dff68f1f 100644 --- a/bsp_q7s/objectFactory.cpp +++ b/bsp_q7s/objectFactory.cpp @@ -834,7 +834,6 @@ ReturnValue_t ObjectFactory::createCcsdsComponents(CcsdsComponentArgs& args) { uioNames.configMemory = q7s::UIO_PDEC_CONFIG_MEMORY; uioNames.ramMemory = q7s::UIO_PDEC_RAM; uioNames.registers = q7s::UIO_PDEC_REGISTERS; - uint32_t cfgMemAddr = config::pdec::PDEC_CONFIG_BASE_ADDR_LEGACY; new PdecHandler(objects::PDEC_HANDLER, objects::CCSDS_HANDLER, &args.gpioComIF, gpioIds::PDEC_RESET, uioNames, args.pdecCfgMemBaseAddr, args.pdecRamBaseAddr); GpioCookie* gpioRS485Chip = new GpioCookie; -- 2.43.0 From d5ca0f9f5e1b1ff22b757cfc571cbb96f68ce70a Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Wed, 25 Oct 2023 09:45:16 +0200 Subject: [PATCH 5/8] should not delete that --- bsp_q7s/objectFactory.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/bsp_q7s/objectFactory.cpp b/bsp_q7s/objectFactory.cpp index dff68f1f..479d59c0 100644 --- a/bsp_q7s/objectFactory.cpp +++ b/bsp_q7s/objectFactory.cpp @@ -834,6 +834,7 @@ ReturnValue_t ObjectFactory::createCcsdsComponents(CcsdsComponentArgs& args) { uioNames.configMemory = q7s::UIO_PDEC_CONFIG_MEMORY; uioNames.ramMemory = q7s::UIO_PDEC_RAM; uioNames.registers = q7s::UIO_PDEC_REGISTERS; + uioNames.irq = q7s::UIO_PDEC_IRQ; new PdecHandler(objects::PDEC_HANDLER, objects::CCSDS_HANDLER, &args.gpioComIF, gpioIds::PDEC_RESET, uioNames, args.pdecCfgMemBaseAddr, args.pdecRamBaseAddr); GpioCookie* gpioRS485Chip = new GpioCookie; -- 2.43.0 From c784d1251b6a019360d4e28a7afd5b00d953b265 Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Wed, 25 Oct 2023 09:54:29 +0200 Subject: [PATCH 6/8] remove old code --- linux/ipcore/PdecHandler.cpp | 5 ----- linux/ipcore/PdecHandler.h | 2 -- 2 files changed, 7 deletions(-) diff --git a/linux/ipcore/PdecHandler.cpp b/linux/ipcore/PdecHandler.cpp index d9065314..28598aa8 100644 --- a/linux/ipcore/PdecHandler.cpp +++ b/linux/ipcore/PdecHandler.cpp @@ -469,11 +469,6 @@ bool PdecHandler::newTcReceived() { } void PdecHandler::doPeriodicWork() { - // scuffed test code - // if(testCntr < 30) { - // triggerEvent(pdec::INVALID_TC_FRAME, FRAME_DIRTY_RETVAL); - // testCntr++; - // } checkLocks(); } diff --git a/linux/ipcore/PdecHandler.h b/linux/ipcore/PdecHandler.h index c2badb62..8832b5d5 100644 --- a/linux/ipcore/PdecHandler.h +++ b/linux/ipcore/PdecHandler.h @@ -52,9 +52,7 @@ class PdecHandler : public SystemObject, public: static constexpr dur_millis_t IRQ_TIMEOUT_MS = 500; static constexpr uint32_t PDEC_CFG_MEM_SIZE = 0x1000; - // static constexpr uint32_t PDEC_CFG_MEM_PHY_ADDR = 0x24000000; static constexpr uint32_t PDEC_RAM_SIZE = 0x10000; - // static constexpr uint32_t PDEC_RAM_PHY_ADDR = 0x26000000; enum class Modes { POLLED, IRQ }; -- 2.43.0 From f8d4eb04a56fa9b63dceb3bc0e5960bcafda0aa3 Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Wed, 25 Oct 2023 17:47:51 +0200 Subject: [PATCH 7/8] slight improvement --- bsp_q7s/boardconfig/busConf.h | 3 ++- bsp_q7s/objectFactory.cpp | 6 +++++- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/bsp_q7s/boardconfig/busConf.h b/bsp_q7s/boardconfig/busConf.h index dc3779a7..aab8ce44 100644 --- a/bsp_q7s/boardconfig/busConf.h +++ b/bsp_q7s/boardconfig/busConf.h @@ -18,7 +18,8 @@ static constexpr char I2C_Q7_EIVE[] = "/dev/i2c_q7"; static constexpr char UART_GNSS_DEV[] = "/dev/gps0"; static constexpr char UART_PLOC_MPSOC_DEV[] = "/dev/ul_plmpsoc"; -static constexpr char UART_PLOC_SUPERVSIOR_DEV[] = "/dev/ploc_supv"; +static constexpr char UART_PLOC_SUPERVISOR_DEV_FALLBACK[] = "/dev/ttyUL4"; +static constexpr char UART_PLOC_SUPERVISOR_DEV[] = "/dev/ploc_supv"; static constexpr char UART_SYRLINKS_DEV[] = "/dev/ul_syrlinks"; static constexpr char UART_STAR_TRACKER_DEV[] = "/dev/ul_str"; static constexpr char UART_SCEX_DEV[] = "/dev/scex"; diff --git a/bsp_q7s/objectFactory.cpp b/bsp_q7s/objectFactory.cpp index 479d59c0..d0c0f924 100644 --- a/bsp_q7s/objectFactory.cpp +++ b/bsp_q7s/objectFactory.cpp @@ -642,8 +642,12 @@ void ObjectFactory::createPayloadComponents(LinuxLibgpioIF* gpioComIF, PowerSwit auto supvGpioCookie = new GpioCookie; supvGpioCookie->addGpio(gpioIds::ENABLE_SUPV_UART, gpioConfigSupv); gpioComIF->addGpios(supvGpioCookie); + const char* plocSupvDev = q7s::UART_PLOC_SUPERVISOR_DEV; + if(not std::filesystem::exists(plocSupvDev)) { + plocSupvDev = q7s::UART_PLOC_SUPERVISOR_DEV_FALLBACK; + } auto supervisorCookie = new SerialCookie(objects::PLOC_SUPERVISOR_HANDLER, - q7s::UART_PLOC_SUPERVSIOR_DEV, serial::PLOC_SUPV_BAUD, + plocSupvDev, serial::PLOC_SUPV_BAUD, supv::MAX_PACKET_SIZE * 20, UartModes::NON_CANONICAL); supervisorCookie->setNoFixedSizeReply(); auto supvHelper = new PlocSupvUartManager(objects::PLOC_SUPERVISOR_HELPER); -- 2.43.0 From e45f9899ff376c2a3eadb3ebc29c3ab065ec97e9 Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Mon, 30 Oct 2023 14:46:46 +0100 Subject: [PATCH 8/8] changelog --- CHANGELOG.md | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 276a6b1f..d3a8ed70 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -16,6 +16,12 @@ will consitute of a breaking change warranting a new major release: # [unreleased] +## Changed + +- Changed PDEC addresses depending on which firmware version is used. It is suspected that + the previous addresses were invalid and not properly covered by the Linux memory protection. + The OBSW will use the old addresses for older FW versions. + # [v7.2.0] 2023-10-27 - `eive-tmtc` v5.10.1 -- 2.43.0