#ifndef FSFWCONFIG_DEVICES_GPIOIDS_H_ #define FSFWCONFIG_DEVICES_GPIOIDS_H_ #include namespace gpioIds { enum gpioId_t { HEATER_0, HEATER_1, HEATER_2, HEATER_3, HEATER_4, HEATER_5, HEATER_6, HEATER_7, DEPLSA1, DEPLSA2, MGM_0_LIS3_CS, MGM_1_RM3100_CS, GYRO_0_ADIS_CS, GYRO_1_L3G_CS, GYRO_2_ADIS_CS, GYRO_3_L3G_CS, MGM_2_LIS3_CS, MGM_3_RM3100_CS, GNSS_0_NRESET, GNSS_1_NRESET, GNSS_0_ENABLE, GNSS_1_ENABLE, GNSS_SELECT, GYRO_0_ENABLE, GYRO_2_ENABLE, TEST_ID_0, TEST_ID_1, RTD_IC_3, RTD_IC_4, RTD_IC_5, RTD_IC_6, RTD_IC_7, RTD_IC_8, RTD_IC_9, RTD_IC_10, RTD_IC_11, RTD_IC_12, RTD_IC_13, RTD_IC_14, RTD_IC_15, RTD_IC_16, RTD_IC_17, RTD_IC_18, CS_SUS_0, CS_SUS_1, CS_SUS_2, CS_SUS_3, CS_SUS_4, CS_SUS_5, CS_SUS_6, CS_SUS_7, CS_SUS_8, CS_SUS_9, CS_SUS_10, CS_SUS_11, SPI_MUX_BIT_0, SPI_MUX_BIT_1, SPI_MUX_BIT_2, SPI_MUX_BIT_3, SPI_MUX_BIT_4, SPI_MUX_BIT_5, CS_RAD_SENSOR, ENABLE_RADFET, PL_I2C_ARESETN, PAPB_BUSY_N, PAPB_EMPTY, EN_RW1, EN_RW2, EN_RW3, EN_RW4, CS_RW1, CS_RW2, CS_RW3, CS_RW4, EN_RW_CS, SPI_MUX, VC0_PAPB_EMPTY, VC1_PAPB_EMPTY, VC2_PAPB_EMPTY, VC3_PAPB_EMPTY, PTME_RESETN, PDEC_RESET, RS485_EN_TX_DATA, RS485_EN_TX_CLOCK, RS485_EN_RX_DATA, RS485_EN_RX_CLOCK, BIT_RATE_SEL, PLPCDU_ENB_VBAT0, PLPCDU_ENB_VBAT1, PLPCDU_ENB_DRO, PLPCDU_ENB_X8, PLPCDU_ENB_TX, PLPCDU_ENB_HPA, PLPCDU_ENB_MPA, PLPCDU_ADC_CS, ENABLE_MPSOC_UART, ENABLE_SUPV_UART }; } #endif /* FSFWCONFIG_DEVICES_GPIOIDS_H_ */