/*
 * SyrlinksDefinitions.h
 *
 *  Created on: 18.02.2021
 *      Author: jakob
 */

#ifndef MISSION_DEVICES_DEVICEDEFINITIONS_SYRLINKSDEFINITIONS_H_
#define MISSION_DEVICES_DEVICEDEFINITIONS_SYRLINKSDEFINITIONS_H_


namespace SYRLINKS {

    static const DeviceCommandId_t NONE = 0x0;
    static const DeviceCommandId_t RESET_UNIT = 0x01;
    /** Reads out all status registers */
    static const DeviceCommandId_t READ_RX_STATUS_REGISTERS = 0x02;
    /** Sets Tx mode to standby */
    static const DeviceCommandId_t SET_TX_MODE_STANDBY = 0x03;
    /** Starts transmission mode. Only reached when clock signal is applying to the data tx input */
    static const DeviceCommandId_t SET_TX_MODE_MODULATION = 0x04;
    /** Sends out a single carrier wave for testing purpose */
    static const DeviceCommandId_t SET_TX_MODE_CW = 0x05;

    /** Size of a simple transmission success response */
    static const uint8_t REQUEST_STATUS_REPLY_SIZE = 11;
    static const uint8_t SIZE_CRC_AND_TERMINATION = 5;
    /** The size of the header with the message identifier and the payload size field */
    static const uint8_t MESSAGE_HEADER_SIZE = 5;
    /** Size of reply to an rx status registers request */
    static const uint8_t RX_STATUS_REGISTERS_REPLY_SIZE = 39;

    static const uint8_t RX_STATUS_REGISTERS_SET_ID = READ_RX_STATUS_REGISTERS;

class RxStatusRegistersDataset: public StaticLocalDataSet<sizeof(float)> {
public:

    RxStatusRegistersDataset(HasLocalDataPoolIF* owner) :
            StaticLocalDataSet(owner, RX_STATUS_REGISTERS_SET_ID) {
    }

    RxStatusRegistersDataset(object_id_t objectId) :
            StaticLocalDataSet(sid_t(objectId, RX_STATUS_REGISTERS_SET_ID)) {
    }

    lp_var_t<uint8_t> fpgaVersion = lp_var_t<uint8_t>(sid.objectId, FPGA_VERSION, this);
    lp_var_t<uint8_t> fpgaBuild = lp_var_t<uint8_t>(sid.objectId, FPGA_BUILD, this);
    lp_var_t<uint32_t> hardwareId = lp_var_t<uint32_t>(sid.objectId, HARDWARE_ID, this);
    lp_var_t<uint8_t> fpgaType = lp_var_t<uint8_t>(sid.objectId, FPGA_TYPE, this);
    lp_var_t<uint8_t> lclStatus = lp_var_t<uint8_t>(sid.objectId, LCL_STATUS, this);
    lp_var_t<uint8_t> fpgaOption = lp_var_t<uint8_t>(sid.objectId, FPGA_OPTION, this);
    lp_var_t<uint8_t> rxStatus = lp_var_t<uint8_t>(sid.objectId, RX_STATUS, this);
    lp_var_t<uint32_t> rxSensitivity = lp_var_t<uint32_t>(sid.objectId, RX_SENSITIVITY, this);
    lp_var_t<uint32_t> rxFrequencyShift = lp_var_t<uint32_t>(sid.objectId, RX_FREQUENCY_SHIFT, this);
    lp_var_t<uint16_t> rxIqPower = lp_var_t<uint16_t>(sid.objectId, RX_IQ_POWER, this);
    lp_var_t<uint16_t> rxAgcValue = lp_var_t<uint16_t>(sid.objectId, RX_AGC_VALUE, this);
    lp_var_t<uint32_t> rxDemodEb = lp_var_t<uint32_t>(sid.objectId, RX_DEMOD_EB, this);
    lp_var_t<uint32_t> rxDemodN0 = lp_var_t<uint32_t>(sid.objectId, RX_DEMOD_N0, this);
    lp_var_t<uint8_t> rxDataRate = lp_var_t<uint8_t>(sid.objectId, RX_DEMOD_N0, this);
    lp_var_t<uint8_t> txStatus = lp_var_t<uint8_t>(sid.objectId, TX_STATUS, this);
    lp_var_t<uint8_t> txConvDiff = lp_var_t<uint8_t>(sid.objectId, TX_CONV_DIFF, this);
    lp_var_t<uint16_t> txConvFilter = lp_var_t<uint16_t>(sid.objectId, TX_CONV_FILTER, this);
    lp_var_t<uint8_t> txWaveform = lp_var_t<uint8_t>(sid.objectId, TX_WAVEFORM, this);
    lp_var_t<uint8_t> txPcmIndex = lp_var_t<uint8_t>(sid.objectId, TX_PCM_INDEX, this);
    lp_var_t<uint16_t> txAgcValue = lp_var_t<uint16_t>(sid.objectId, TX_AGC_VALUE, this);
};

}


#endif /* MISSION_DEVICES_DEVICEDEFINITIONS_SYRLINKSDEFINITIONS_H_ */