#ifndef LINUX_OBC_PDECHANDLER_H_ #define LINUX_OBC_PDECHANDLER_H_ #include #include #include "OBSWConfig.h" #include "PdecConfig.h" #include "eive/definitions.h" #include "fsfw/action/ActionHelper.h" #include "fsfw/action/HasActionsIF.h" #include "fsfw/objectmanager/SystemObject.h" #include "fsfw/parameters/ParameterHelper.h" #include "fsfw/parameters/ReceivesParameterMessagesIF.h" #include "fsfw/returnvalues/returnvalue.h" #include "fsfw/storagemanager/StorageManagerIF.h" #include "fsfw/tasks/ExecutableObjectIF.h" #include "fsfw/tmtcservices/AcceptsTelecommandsIF.h" #include "fsfw_hal/common/gpio/gpioDefinitions.h" #include "fsfw_hal/linux/gpio/LinuxLibgpioIF.h" struct UioNames { const char* configMemory; const char* ramMemory; const char* registers; const char* irq; }; /** * @brief This class controls the PDEC IP Core implemented in the programmable logic of the * Zynq-7020. All registers and memories of the PDEC IP Core are accessed via UIO * drivers. * * @details The PDEC IP Core is responsible for processing data received in form of CLTUs from the * S-Band transceiver. This comprises the BCH decoding of the CLTUs and reconstruction of * telecommand transfer frames. Finally the PDEC stores the TC segment transported with * the TC transfer frame in a register. As soon as a new TC has been received a new * frame acceptance report (FAR) will be generated. If the FAR confirms the validity of * a received TC segment, the data can be read out from the associated register. * Currently, the ground software only supports transmissions of CLTUs containing one * space packet. * Link to datasheet of PDEC IP Core: https://eive-cloud.irs.uni-stuttgart.de/index.php/ * apps/files/?dir=/EIVE_IRS/Arbeitsdaten/08_Used%20Components/CCSDS_IP_Cores&fileid=1108967 * * @author J. Meier */ class PdecHandler : public SystemObject, public ExecutableObjectIF, public HasActionsIF, public ReceivesParameterMessagesIF { public: static constexpr dur_millis_t IRQ_TIMEOUT_MS = 500; static constexpr uint32_t PDEC_CFG_MEM_SIZE = 0x1000; static constexpr uint32_t PDEC_CFG_MEM_PHY_ADDR = 0x24000000; static constexpr uint32_t PDEC_RAM_SIZE = 0x10000; static constexpr uint32_t PDEC_RAM_PHY_ADDR = 0x26000000; enum class Modes { POLLED, IRQ }; /** * @brief Constructor * @param objectId Object ID of PDEC handler system object * @param tcDestinationId Object ID of object responsible for processing TCs. * @param gpioComIF Pointer to GPIO interace responsible for driving GPIOs. * @param pdecReset GPIO ID of GPIO connected to the reset signal of the PDEC. * @param uioConfigMemory String of uio device file same mapped to the PDEC memory space * @param uioregsiters String of uio device file same mapped to the PDEC register space */ PdecHandler(object_id_t objectId, object_id_t tcDestinationId, LinuxLibgpioIF* gpioComIF, gpioId_t pdecReset, UioNames names, uint32_t cfgMemPhyAddr, uint32_t pdecRamPhyAddr); virtual ~PdecHandler(); ReturnValue_t performOperation(uint8_t operationCode = 0); ReturnValue_t initialize() override; MessageQueueId_t getCommandQueue() const; ReturnValue_t executeAction(ActionId_t actionId, MessageQueueId_t commandedBy, const uint8_t* data, size_t size) override; ReturnValue_t getParameter(uint8_t domainId, uint8_t uniqueIdentifier, ParameterWrapper* parameterWrapper, const ParameterWrapper* newValues, uint16_t startAtIndex) override; private: static constexpr Modes OP_MODE = Modes::IRQ; static const uint32_t QUEUE_SIZE = config::CCSDS_HANDLER_QUEUE_SIZE; #ifdef TE0720_1CFA static const int CONFIG_MEMORY_MAP_SIZE = 0x400; static const int RAM_MAP_SIZE = 0x4000; static const int REGISTER_MAP_SIZE = 0x10000; #else static const int CONFIG_MEMORY_MAP_SIZE = 0x400; static const int RAM_MAP_SIZE = 0x4000; static const int REGISTER_MAP_SIZE = 0x4000; #endif /* BOARD_TE0720 == 1 */ static const size_t MAX_TC_SEGMENT_SIZE = 1017; static const uint8_t MAP_ID_MASK = 0x3F; // Expected value stored in FAR register after reset static const uint32_t FAR_RESET = 0x7FE0; static const uint32_t TC_SEGMENT_LEN = 1017; static const uint32_t NO_RF_MASK = 0x8000; static const uint32_t NO_BITLOCK_MASK = 0x4000; static const uint32_t MAX_INIT_TRIES = 20; class ParameterId { public: // ID of the parameter to update the positive window of AD frames static const uint8_t POSITIVE_WINDOW = 0; // ID of the parameter to update the negative window of AD frames static const uint8_t NEGATIVE_WINDOW = 1; }; static constexpr uint32_t MAX_ALLOWED_IRQS_PER_WINDOW = 800; enum class IReason_t : uint8_t { NO_REPORT, ERROR_VERSION_NUMBER, ILLEGAL_COMBINATION, INVALID_SC_ID, INVALID_VC_ID_LSB, INVALID_VC_ID_MSB, NS_NOT_ZERO, INCORRECT_BC_CC }; enum class State : uint8_t { INIT, PDEC_RESET, RUNNING, WAIT_FOR_RECOVERY }; static uint32_t CURRENT_FAR; Countdown genericCheckCd = Countdown(IRQ_TIMEOUT_MS); object_id_t tcDestinationId; int irqFd = 0; AcceptsTelecommandsIF* tcDestination = nullptr; LinuxLibgpioIF* gpioComIF = nullptr; uint32_t cfgMemBaseAddr = 0x0; uint32_t pdecRamBaseAddr = 0x0; uint32_t interruptCounter = 0; Countdown interruptWindowCd = Countdown(1000); /** * Reset signal is required to hold PDEC in reset state until the configuration has been * written to the appropriate memory space. * Can also be used to reboot PDEC in case of erros. */ gpioId_t pdecReset = gpio::NO_GPIO; uint32_t tcAbortCounter = 0; ActionHelper actionHelper; StorageManagerIF* tcStore = nullptr; MessageQueueIF* commandQueue = nullptr; State state = State::INIT; /** * Pointer pointing to base address of the PDEC memory space. * This address is equivalent with the base address of the section named configuration area in * the PDEC datasheet. */ uint32_t* memoryBaseAddress = nullptr; uint32_t* ramBaseAddress = nullptr; // Pointer pointing to base address of register space uint32_t* registerBaseAddress = nullptr; uint8_t tcSegment[TC_SEGMENT_LEN]; // Used to check carrier and bit lock changes (default set to no rf and no bitlock) uint32_t lastClcw = 0xC000; bool carrierLock = false; bool bitLock = false; MessageQueueId_t commandedBy = MessageQueueIF::NO_QUEUE; bool ptmeResetWithReinitializationPending = false; UioNames uioNames; ParameterHelper paramHelper; PdecConfig pdecConfig; uint32_t initTries = 0; // scuffed test counter. uint8_t testCntr = 0; /** * @brief Performs initialization stuff which must be performed in first * loop of running task * * @return OK if successful, otherwise FAILED */ ReturnValue_t firstLoop(); /** * @brief Reads and handles messages stored in the commandQueue */ void readCommandQueue(void); ReturnValue_t polledOperation(); ReturnValue_t irqOperation(); ReturnValue_t handleInitState(); void openIrqFile(); ReturnValue_t checkAndHandleIrqs(uint32_t& info); uint32_t readFar(); /** * @brief This functions writes the configuration parameters to the configuration * section of the PDEC. */ void writePdecConfigDuringReset(PdecConfig& config); /** * @brief Reading the FAR resets the set stat flag which signals a new TC. Without clearing * this flag no new TC will be excepted. After start up the flag is set and needs * to be reset. * Stat flag 0 - new TC received * Stat flag 1 - old TC (ready to receive next TC) */ ReturnValue_t resetFarStatFlag(); /** * @brief Releases the PDEC from reset state. PDEC will start with loading the written * configuration parameters. */ ReturnValue_t releasePdec(); /** * @brief Will set PDEC in reset state. Use releasePdec() to release PDEC * from reset state * * @return OK if successful, otherwise error return value */ ReturnValue_t pdecToReset(); /** * @brief Reads the FAR register and checks if a new TC has been received. */ bool newTcReceived(); /** * @brief Checks if carrier lock or bit lock has been detected and triggers appropriate * event. */ void doPeriodicWork(); void checkLocks(); void resetIrqLimiters(); /** * @brief Analyzes the FramAna field (frame analysis data) of a FAR report. * * @return True if frame valid, otherwise false. */ bool checkFrameAna(uint32_t pdecFar); /** * @brief This function handles the IReason field of the frame analysis report. * * @details In case frame as been declared illegal for multiple reasons, the reason with the * lowest value will be shown. */ void handleIReason(uint32_t pdecFar, ReturnValue_t parameter1); /** * @brief Checks if PDEC configuration is still correct */ void checkConfig(); /** * @brief Handles the reception of new TCs. Reads the pointer to the storage location of the * new TC segment, extracts the PUS packet and forwards the data to the object * responsible for processing the TC. */ void handleNewTc(); /** * @brief Function reads the last received TC segment from the PDEC memory and copies * the data to the tcSegement array. * * @param tcLength The length of the received TC. * */ ReturnValue_t readTc(uint32_t& tcLength); /** * @brief Prints the tc segment data */ void printTC(uint32_t tcLength); /** * @brief This function calculates the entry for the configuration of the MAP ID routing. * * @param mapAddr The MAP ID to configure * @param moduleId The destination module where all TCs with the map id mapAddr will be routed * to. * * @details The PDEC has different modules where the TCs can be routed to. A lookup table is * used which links the MAP ID field to the destination module. The entry for this * lookup table is created by this function and must be stored in the configuration * memory region of the PDEC. The entry has a specific format */ uint8_t calcMapAddrEntry(uint8_t moduleId); /** * brief Returns the 32-bit wide communication link control word (CLCW) */ uint32_t getClcw(); /** * @brief Returns the PDEC monitor register content * */ uint32_t getPdecMon(); /** * @brief Reads and prints the CLCW. Can be useful for debugging. */ void printClcw(); /** * @brief Prints monitor register information to debug console. */ void printPdecMon(); void pdecResetNoInit(); ReturnValue_t postResetOperation(); void initializeReset(); void initFailedHandler(ReturnValue_t reason); std::string getMonStatusString(uint32_t status); }; #endif /* LINUX_OBC_PDECHANDLER_H_ */