342 lines
9.2 KiB
C++
342 lines
9.2 KiB
C++
#include "fsfw-hal/stm32h7/spi/spiCore.h"
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#include "fsfw-hal/stm32h7/spi/spiDefinitions.h"
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#include <cstdio>
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SPI_HandleTypeDef* spiHandle = nullptr;
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DMA_HandleTypeDef* hdmaTx = nullptr;
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DMA_HandleTypeDef* hdmaRx = nullptr;
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spi_transfer_cb_t rxTxCb = nullptr;
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void* rxTxArgs = nullptr;
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spi_transfer_cb_t txCb = nullptr;
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void* txArgs = nullptr;
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spi_transfer_cb_t rxCb = nullptr;
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void* rxArgs = nullptr;
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spi_transfer_cb_t errorCb = nullptr;
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void* errorArgs = nullptr;
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void mapIndexAndStream(DMA_HandleTypeDef* handle, dma::DMAType dmaType, dma::DMAIndexes dmaIdx,
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dma::DMAStreams dmaStream, IRQn_Type* dmaIrqNumber);
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void mapSpiBus(DMA_HandleTypeDef *handle, dma::DMAType dmaType, spi::SpiBus spiBus);
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void spi::configureDmaHandle(DMA_HandleTypeDef *handle, spi::SpiBus spiBus, dma::DMAType dmaType,
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dma::DMAIndexes dmaIdx, dma::DMAStreams dmaStream, IRQn_Type* dmaIrqNumber,
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uint32_t dmaMode, uint32_t dmaPriority) {
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using namespace dma;
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mapIndexAndStream(handle, dmaType, dmaIdx, dmaStream, dmaIrqNumber);
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mapSpiBus(handle, dmaType, spiBus);
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if(dmaType == DMAType::TX) {
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handle->Init.Direction = DMA_MEMORY_TO_PERIPH;
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}
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else {
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handle->Init.Direction = DMA_PERIPH_TO_MEMORY;
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}
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handle->Init.Priority = dmaPriority;
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handle->Init.Mode = dmaMode;
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// Standard settings for the rest for now
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handle->Init.FIFOMode = DMA_FIFOMODE_DISABLE;
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handle->Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
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handle->Init.MemBurst = DMA_MBURST_INC4;
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handle->Init.PeriphBurst = DMA_PBURST_INC4;
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handle->Init.PeriphInc = DMA_PINC_DISABLE;
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handle->Init.MemInc = DMA_MINC_ENABLE;
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handle->Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
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handle->Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
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}
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void spi::setDmaHandles(DMA_HandleTypeDef* txHandle, DMA_HandleTypeDef* rxHandle) {
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hdmaTx = txHandle;
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hdmaRx = rxHandle;
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}
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void spi::getDmaHandles(DMA_HandleTypeDef** txHandle, DMA_HandleTypeDef** rxHandle) {
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*txHandle = hdmaTx;
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*rxHandle = hdmaRx;
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}
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void spi::setSpiHandle(SPI_HandleTypeDef *spiHandle_) {
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if(spiHandle_ == NULL) {
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return;
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}
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spiHandle = spiHandle_;
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}
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void spi::assignTransferRxTxCompleteCallback(spi_transfer_cb_t callback, void *userArgs) {
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rxTxCb = callback;
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rxTxArgs = userArgs;
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}
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void spi::assignTransferRxCompleteCallback(spi_transfer_cb_t callback, void *userArgs) {
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rxCb = callback;
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rxArgs = userArgs;
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}
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void spi::assignTransferTxCompleteCallback(spi_transfer_cb_t callback, void *userArgs) {
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txCb = callback;
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txArgs = userArgs;
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}
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void spi::assignTransferErrorCallback(spi_transfer_cb_t callback, void *userArgs) {
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errorCb = callback;
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errorArgs = userArgs;
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}
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SPI_HandleTypeDef* spi::getSpiHandle() {
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return spiHandle;
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}
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/**
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* @brief TxRx Transfer completed callback.
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* @param hspi: SPI handle
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*/
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extern "C" void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi) {
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if(rxTxCb != NULL) {
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rxTxCb(hspi, rxTxArgs);
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}
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else {
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printf("HAL_SPI_TxRxCpltCallback: No user callback specified\n");
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}
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}
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/**
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* @brief TxRx Transfer completed callback.
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* @param hspi: SPI handle
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*/
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extern "C" void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi) {
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if(txCb != NULL) {
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txCb(hspi, txArgs);
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}
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else {
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printf("HAL_SPI_TxCpltCallback: No user callback specified\n");
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}
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}
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/**
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* @brief TxRx Transfer completed callback.
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* @param hspi: SPI handle
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*/
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extern "C" void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi) {
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if(rxCb != nullptr) {
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rxCb(hspi, rxArgs);
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}
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else {
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printf("HAL_SPI_RxCpltCallback: No user callback specified\n");
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}
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}
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/**
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* @brief SPI error callbacks.
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* @param hspi: SPI handle
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* @note This example shows a simple way to report transfer error, and you can
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* add your own implementation.
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* @retval None
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*/
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extern "C" void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi) {
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if(errorCb != nullptr) {
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errorCb(hspi, rxArgs);
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}
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else {
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printf("HAL_SPI_ErrorCallback: No user callback specified\n");
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}
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}
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void mapIndexAndStream(DMA_HandleTypeDef* handle, dma::DMAType dmaType, dma::DMAIndexes dmaIdx,
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dma::DMAStreams dmaStream, IRQn_Type* dmaIrqNumber) {
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using namespace dma;
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if(dmaIdx == DMAIndexes::DMA_1) {
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#ifdef DMA1
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switch(dmaStream) {
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case(DMAStreams::STREAM_0): {
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#ifdef DMA1_Stream0
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handle->Instance = DMA1_Stream0;
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if(dmaIrqNumber != nullptr) {
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*dmaIrqNumber = DMA1_Stream0_IRQn;
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}
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#endif
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break;
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}
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case(DMAStreams::STREAM_1): {
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#ifdef DMA1_Stream1
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handle->Instance = DMA1_Stream1;
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if(dmaIrqNumber != nullptr) {
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*dmaIrqNumber = DMA1_Stream1_IRQn;
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}
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#endif
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break;
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}
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case(DMAStreams::STREAM_2): {
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#ifdef DMA1_Stream2
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handle->Instance = DMA1_Stream2;
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if(dmaIrqNumber != nullptr) {
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*dmaIrqNumber = DMA1_Stream2_IRQn;
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}
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#endif
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break;
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}
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case(DMAStreams::STREAM_3): {
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#ifdef DMA1_Stream3
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handle->Instance = DMA1_Stream3;
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if(dmaIrqNumber != nullptr) {
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*dmaIrqNumber = DMA1_Stream3_IRQn;
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}
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#endif
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break;
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}
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case(DMAStreams::STREAM_4): {
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#ifdef DMA1_Stream4
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handle->Instance = DMA1_Stream4;
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if(dmaIrqNumber != nullptr) {
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*dmaIrqNumber = DMA1_Stream4_IRQn;
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}
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#endif
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break;
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}
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case(DMAStreams::STREAM_5): {
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#ifdef DMA1_Stream5
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handle->Instance = DMA1_Stream5;
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if(dmaIrqNumber != nullptr) {
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*dmaIrqNumber = DMA1_Stream5_IRQn;
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}
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#endif
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break;
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}
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case(DMAStreams::STREAM_6): {
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#ifdef DMA1_Stream6
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handle->Instance = DMA1_Stream6;
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if(dmaIrqNumber != nullptr) {
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*dmaIrqNumber = DMA1_Stream6_IRQn;
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}
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#endif
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break;
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}
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case(DMAStreams::STREAM_7): {
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#ifdef DMA1_Stream7
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handle->Instance = DMA1_Stream7;
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if(dmaIrqNumber != nullptr) {
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*dmaIrqNumber = DMA1_Stream7_IRQn;
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}
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#endif
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break;
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}
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}
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if(dmaType == DMAType::TX) {
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handle->Init.Request = DMA_REQUEST_SPI1_TX;
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}
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else {
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handle->Init.Request = DMA_REQUEST_SPI1_RX;
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}
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#endif /* DMA1 */
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}
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if(dmaIdx == DMAIndexes::DMA_2) {
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#ifdef DMA2
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switch(dmaStream) {
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case(DMAStreams::STREAM_0): {
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#ifdef DMA2_Stream0
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handle->Instance = DMA2_Stream0;
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if(dmaIrqNumber != nullptr) {
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*dmaIrqNumber = DMA2_Stream0_IRQn;
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}
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#endif
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break;
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}
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case(DMAStreams::STREAM_1): {
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#ifdef DMA2_Stream1
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handle->Instance = DMA2_Stream1;
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if(dmaIrqNumber != nullptr) {
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*dmaIrqNumber = DMA2_Stream1_IRQn;
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}
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#endif
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break;
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}
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case(DMAStreams::STREAM_2): {
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#ifdef DMA2_Stream2
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handle->Instance = DMA2_Stream2;
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if(dmaIrqNumber != nullptr) {
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*dmaIrqNumber = DMA2_Stream2_IRQn;
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}
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#endif
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break;
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}
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case(DMAStreams::STREAM_3): {
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#ifdef DMA2_Stream3
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handle->Instance = DMA2_Stream3;
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if(dmaIrqNumber != nullptr) {
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*dmaIrqNumber = DMA2_Stream3_IRQn;
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}
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#endif
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break;
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}
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case(DMAStreams::STREAM_4): {
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#ifdef DMA2_Stream4
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handle->Instance = DMA2_Stream4;
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if(dmaIrqNumber != nullptr) {
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*dmaIrqNumber = DMA2_Stream4_IRQn;
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}
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#endif
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break;
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}
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case(DMAStreams::STREAM_5): {
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#ifdef DMA2_Stream5
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handle->Instance = DMA2_Stream5;
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if(dmaIrqNumber != nullptr) {
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*dmaIrqNumber = DMA2_Stream5_IRQn;
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}
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#endif
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break;
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}
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case(DMAStreams::STREAM_6): {
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#ifdef DMA2_Stream6
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handle->Instance = DMA2_Stream6;
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if(dmaIrqNumber != nullptr) {
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*dmaIrqNumber = DMA2_Stream6_IRQn;
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}
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#endif
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break;
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}
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case(DMAStreams::STREAM_7): {
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#ifdef DMA2_Stream7
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handle->Instance = DMA2_Stream7;
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if(dmaIrqNumber != nullptr) {
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*dmaIrqNumber = DMA2_Stream7_IRQn;
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}
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#endif
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break;
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}
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}
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#endif /* DMA2 */
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}
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}
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void mapSpiBus(DMA_HandleTypeDef *handle, dma::DMAType dmaType, spi::SpiBus spiBus) {
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if(dmaType == dma::DMAType::TX) {
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if(spiBus == spi::SpiBus::SPI_1) {
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#ifdef DMA_REQUEST_SPI1_TX
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handle->Init.Request = DMA_REQUEST_SPI1_TX;
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#endif
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}
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else if(spiBus == spi::SpiBus::SPI_2) {
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#ifdef DMA_REQUEST_SPI2_TX
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handle->Init.Request = DMA_REQUEST_SPI2_TX;
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#endif
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}
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}
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else {
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if(spiBus == spi::SpiBus::SPI_1) {
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#ifdef DMA_REQUEST_SPI1_RX
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handle->Init.Request = DMA_REQUEST_SPI1_RX;
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#endif
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}
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else if(spiBus == spi::SpiBus::SPI_2) {
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#ifdef DMA_REQUEST_SPI2_RX
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handle->Init.Request = DMA_REQUEST_SPI2_RX;
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#endif
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}
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}
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}
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