run afmt
This commit is contained in:
@ -44,17 +44,18 @@
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32h7xx_hal.h"
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#include "lwip/opt.h"
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#include "lwip/timeouts.h"
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#include "lwip/netif.h"
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#include "netif/etharp.h"
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#include "ethernetif.h"
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#include "lan8742.h"
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#include <string.h>
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#include <stdbool.h>
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#include <string.h>
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#include "fsfw/FSFW.h"
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#include "lan8742.h"
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#include "lwip/netif.h"
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#include "lwip/opt.h"
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#include "lwip/timeouts.h"
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#include "netif/etharp.h"
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#include "stm32h7xx_hal.h"
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#ifdef FSFW_OSAL_RTEMS
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#include <rtems.h>
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@ -66,11 +67,11 @@
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#define IFNAME0 's'
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#define IFNAME1 't'
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#define ETH_DMA_TRANSMIT_TIMEOUT (20U)
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#define ETH_DMA_TRANSMIT_TIMEOUT (20U)
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#define ETH_RX_BUFFER_SIZE 1536U
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#define ETH_RX_BUFFER_CNT 12U
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#define ETH_TX_BUFFER_MAX ((ETH_TX_DESC_CNT) * 2U)
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#define ETH_RX_BUFFER_SIZE 1536U
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#define ETH_RX_BUFFER_CNT 12U
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#define ETH_TX_BUFFER_MAX ((ETH_TX_DESC_CNT)*2U)
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#define DMA_DESCRIPTOR_ALIGNMENT 0x20
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@ -93,49 +94,47 @@ stack they will return back to DMA after been processed by the stack.
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2.b. Rx Buffers must have the same size: ETH_RX_BUFFER_SIZE, this value must
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passed to ETH DMA in the init field (EthHandle.Init.RxBuffLen)
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*/
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typedef enum
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{
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RX_ALLOC_OK = 0x00,
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RX_ALLOC_ERROR = 0x01
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} RxAllocStatusTypeDef;
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typedef enum { RX_ALLOC_OK = 0x00, RX_ALLOC_ERROR = 0x01 } RxAllocStatusTypeDef;
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typedef struct
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{
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typedef struct {
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struct pbuf_custom pbuf_custom;
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uint8_t buff[(ETH_RX_BUFFER_SIZE + 31) & ~31] __ALIGNED(32);
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} RxBuff_t;
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#if defined(__ICCARM__) /*!< IAR Compiler */
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#pragma location=0x30000000
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ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
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#pragma location=0x30000200
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ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */
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#pragma location = 0x30000000
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ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
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#pragma location = 0x30000200
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ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */
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#elif defined(__CC_ARM) /* MDK ARM Compiler */
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__attribute__((section(".RxDecripSection"))) ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
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__attribute__((section(".TxDecripSection"))) ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */
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__attribute__((section(".RxDecripSection")))
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ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
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__attribute__((section(".TxDecripSection")))
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ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */
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#elif defined(__GNUC__) /* GNU Compiler */
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#ifdef FSFW_OSAL_RTEMS
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/* Put into special RTEMS section and align correctly */
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ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT] __attribute__((
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section(".bsp_nocache"),
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__aligned__(DMA_DESCRIPTOR_ALIGNMENT))); /* Ethernet Rx DMA Descriptors */
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ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]
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__attribute__((section(".bsp_nocache"),
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__aligned__(DMA_DESCRIPTOR_ALIGNMENT))); /* Ethernet Rx DMA Descriptors */
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/* Put into special RTEMS section and align correctly */
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ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT] __attribute__((
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section(".bsp_nocache"),
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__aligned__(DMA_DESCRIPTOR_ALIGNMENT))); /* Ethernet Tx DMA Descriptors */
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ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]
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__attribute__((section(".bsp_nocache"),
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__aligned__(DMA_DESCRIPTOR_ALIGNMENT))); /* Ethernet Tx DMA Descriptors */
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/* Ethernet Receive Buffers. Just place somewhere is BSS instead of explicitely
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* placing it */
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uint8_t Rx_Buff[ETH_RX_DESC_CNT][ETH_RX_BUFFER_SIZE];
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#elif defined FSFW_OSAL_FREERTOS
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ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT] __attribute__((section(".RxDecripSection"))); /* Ethernet Rx DMA Descriptors */
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ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT] __attribute__((section(".TxDecripSection"))); /* Ethernet Tx DMA Descriptors */
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ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]
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__attribute__((section(".RxDecripSection"))); /* Ethernet Rx DMA Descriptors */
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ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]
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__attribute__((section(".TxDecripSection"))); /* Ethernet Tx DMA Descriptors */
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#endif /* FSFW_OSAL_RTEMS */
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@ -144,14 +143,14 @@ ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT] __attribute__((section(".TxDecr
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/* Memory Pool Declaration */
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LWIP_MEMPOOL_DECLARE(RX_POOL, ETH_RX_BUFFER_CNT, sizeof(RxBuff_t), "Zero-copy RX PBUF pool");
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#if defined ( __ICCARM__ ) /*!< IAR Compiler */
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#if defined(__ICCARM__) /*!< IAR Compiler */
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#pragma location = 0x30000400
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extern u8_t memp_memory_RX_POOL_base[];
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#elif defined ( __CC_ARM ) /* MDK ARM Compiler */
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#elif defined(__CC_ARM) /* MDK ARM Compiler */
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__attribute__((section(".Rx_PoolSection"))) extern u8_t memp_memory_RX_POOL_base[];
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#elif defined ( __GNUC__ ) /* GNU Compiler */
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#elif defined(__GNUC__) /* GNU Compiler */
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__attribute__((section(".Rx_PoolSection"))) extern u8_t memp_memory_RX_POOL_base[];
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#endif
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@ -170,17 +169,14 @@ ETH_TxPacketConfig TxConfig;
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u32_t sys_now(void);
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extern void Error_Handler(void);
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int32_t ETH_PHY_IO_Init(void);
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int32_t ETH_PHY_IO_DeInit (void);
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int32_t ETH_PHY_IO_DeInit(void);
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int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal);
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int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal);
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int32_t ETH_PHY_IO_GetTick(void);
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lan8742_Object_t LAN8742;
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lan8742_IOCtx_t LAN8742_IOCtx = {ETH_PHY_IO_Init,
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ETH_PHY_IO_DeInit,
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ETH_PHY_IO_WriteReg,
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ETH_PHY_IO_ReadReg,
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ETH_PHY_IO_GetTick};
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lan8742_IOCtx_t LAN8742_IOCtx = {ETH_PHY_IO_Init, ETH_PHY_IO_DeInit, ETH_PHY_IO_WriteReg,
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ETH_PHY_IO_ReadReg, ETH_PHY_IO_GetTick};
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/* Private functions ---------------------------------------------------------*/
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void pbuf_free_custom(struct pbuf *p);
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@ -195,7 +191,8 @@ void pbuf_free_custom(struct pbuf *p);
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* for this ethernetif
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*/
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static void low_level_init(struct netif *netif) {
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uint8_t macaddress[6]= {ETH_MAC_ADDR0, ETH_MAC_ADDR1, ETH_MAC_ADDR2, ETH_MAC_ADDR3, ETH_MAC_ADDR4, ETH_MAC_ADDR5};
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uint8_t macaddress[6] = {ETH_MAC_ADDR0, ETH_MAC_ADDR1, ETH_MAC_ADDR2,
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ETH_MAC_ADDR3, ETH_MAC_ADDR4, ETH_MAC_ADDR5};
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EthHandle.Instance = ETH;
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EthHandle.Init.MACAddr = macaddress;
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@ -211,12 +208,12 @@ static void low_level_init(struct netif *netif) {
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netif->hwaddr_len = ETH_HWADDR_LEN;
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/* set MAC hardware address */
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netif->hwaddr[0] = ETH_MAC_ADDR0;
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netif->hwaddr[1] = ETH_MAC_ADDR1;
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netif->hwaddr[2] = ETH_MAC_ADDR2;
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netif->hwaddr[3] = ETH_MAC_ADDR3;
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netif->hwaddr[4] = ETH_MAC_ADDR4;
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netif->hwaddr[5] = ETH_MAC_ADDR5;
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netif->hwaddr[0] = ETH_MAC_ADDR0;
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netif->hwaddr[1] = ETH_MAC_ADDR1;
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netif->hwaddr[2] = ETH_MAC_ADDR2;
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netif->hwaddr[3] = ETH_MAC_ADDR3;
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netif->hwaddr[4] = ETH_MAC_ADDR4;
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netif->hwaddr[5] = ETH_MAC_ADDR5;
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/* maximum transfer unit */
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netif->mtu = ETH_MAX_PAYLOAD;
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@ -229,7 +226,7 @@ static void low_level_init(struct netif *netif) {
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LWIP_MEMPOOL_INIT(RX_POOL);
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/* Set Tx packet config common parameters */
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memset(&TxConfig, 0 , sizeof(ETH_TxPacketConfig));
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memset(&TxConfig, 0, sizeof(ETH_TxPacketConfig));
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TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD;
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TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC;
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TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT;
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@ -265,23 +262,19 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p) {
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err_t errval = ERR_OK;
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ETH_BufferTypeDef Txbuffer[ETH_TX_DESC_CNT] = {0};
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memset(Txbuffer, 0 , ETH_TX_DESC_CNT*sizeof(ETH_BufferTypeDef));
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memset(Txbuffer, 0, ETH_TX_DESC_CNT * sizeof(ETH_BufferTypeDef));
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for(q = p; q != NULL; q = q->next)
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{
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if(i >= ETH_TX_DESC_CNT)
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return ERR_IF;
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for (q = p; q != NULL; q = q->next) {
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if (i >= ETH_TX_DESC_CNT) return ERR_IF;
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Txbuffer[i].buffer = q->payload;
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Txbuffer[i].len = q->len;
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if(i>0)
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{
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Txbuffer[i-1].next = &Txbuffer[i];
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if (i > 0) {
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Txbuffer[i - 1].next = &Txbuffer[i];
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}
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if(q->next == NULL)
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{
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if (q->next == NULL) {
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Txbuffer[i].next = NULL;
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}
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@ -294,8 +287,7 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p) {
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HAL_StatusTypeDef ret = HAL_ETH_Transmit(&EthHandle, &TxConfig, ETH_DMA_TRANSMIT_TIMEOUT);
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if (ret != HAL_OK) {
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printf("low_level_output: Could not transmit ethernet packet, code %d!\n\r",
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ret);
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printf("low_level_output: Could not transmit ethernet packet, code %d!\n\r", ret);
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}
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return errval;
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}
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@ -311,8 +303,7 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p) {
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static struct pbuf *low_level_input(struct netif *netif) {
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struct pbuf *p = NULL;
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if(RxAllocStatus == RX_ALLOC_OK)
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{
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if (RxAllocStatus == RX_ALLOC_OK) {
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HAL_ETH_ReadData(&EthHandle, (void **)&p);
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}
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@ -331,19 +322,15 @@ static struct pbuf *low_level_input(struct netif *netif) {
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void ethernetif_input(struct netif *netif) {
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struct pbuf *p = NULL;
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do
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{
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p = low_level_input( netif );
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if (p != NULL)
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{
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if (netif->input( p, netif) != ERR_OK )
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{
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do {
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p = low_level_input(netif);
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if (p != NULL) {
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if (netif->input(p, netif) != ERR_OK) {
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pbuf_free(p);
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}
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}
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} while(p!=NULL);
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} while (p != NULL);
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}
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/**
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@ -388,12 +375,11 @@ err_t ethernetif_init(struct netif *netif) {
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* @retval None
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*/
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void pbuf_free_custom(struct pbuf *p) {
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struct pbuf_custom* custom_pbuf = (struct pbuf_custom*)p;
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struct pbuf_custom *custom_pbuf = (struct pbuf_custom *)p;
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LWIP_MEMPOOL_FREE(RX_POOL, custom_pbuf);
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/* If the Rx Buffer Pool was exhausted, signal the ethernetif_input task to
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* call HAL_ETH_GetRxDataBuffer to rebuild the Rx descriptors. */
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if (RxAllocStatus == RX_ALLOC_ERROR)
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{
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if (RxAllocStatus == RX_ALLOC_ERROR) {
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RxAllocStatus = RX_ALLOC_OK;
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}
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}
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@ -505,10 +491,8 @@ int32_t ETH_PHY_IO_DeInit(void) { return 0; }
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* @param pRegVal: pointer to hold the register value
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* @retval 0 if OK -1 if Error
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*/
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int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr,
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uint32_t *pRegVal) {
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if (HAL_ETH_ReadPHYRegister(&EthHandle, DevAddr, RegAddr, pRegVal) !=
|
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HAL_OK) {
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int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal) {
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if (HAL_ETH_ReadPHYRegister(&EthHandle, DevAddr, RegAddr, pRegVal) != HAL_OK) {
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return -1;
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}
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@ -522,10 +506,8 @@ int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr,
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* @param RegVal: Value to be written
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* @retval 0 if OK -1 if Error
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*/
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int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr,
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uint32_t RegVal) {
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if (HAL_ETH_WritePHYRegister(&EthHandle, DevAddr, RegAddr, RegVal) !=
|
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HAL_OK) {
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int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal) {
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if (HAL_ETH_WritePHYRegister(&EthHandle, DevAddr, RegAddr, RegVal) != HAL_OK) {
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return -1;
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}
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@ -549,42 +531,37 @@ void ethernet_link_check_state(struct netif *netif) {
|
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|
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PHYLinkState = LAN8742_GetLinkState(&LAN8742);
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|
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if(netif_is_link_up(netif) && (PHYLinkState <= LAN8742_STATUS_LINK_DOWN))
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{
|
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if (netif_is_link_up(netif) && (PHYLinkState <= LAN8742_STATUS_LINK_DOWN)) {
|
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HAL_ETH_Stop_IT(&EthHandle);
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netif_set_down(netif);
|
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netif_set_link_down(netif);
|
||||
}
|
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else if(!netif_is_link_up(netif) && (PHYLinkState > LAN8742_STATUS_LINK_DOWN))
|
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{
|
||||
switch (PHYLinkState)
|
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{
|
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case LAN8742_STATUS_100MBITS_FULLDUPLEX:
|
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duplex = ETH_FULLDUPLEX_MODE;
|
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speed = ETH_SPEED_100M;
|
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linkchanged = 1;
|
||||
break;
|
||||
case LAN8742_STATUS_100MBITS_HALFDUPLEX:
|
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duplex = ETH_HALFDUPLEX_MODE;
|
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speed = ETH_SPEED_100M;
|
||||
linkchanged = 1;
|
||||
break;
|
||||
case LAN8742_STATUS_10MBITS_FULLDUPLEX:
|
||||
duplex = ETH_FULLDUPLEX_MODE;
|
||||
speed = ETH_SPEED_10M;
|
||||
linkchanged = 1;
|
||||
break;
|
||||
case LAN8742_STATUS_10MBITS_HALFDUPLEX:
|
||||
duplex = ETH_HALFDUPLEX_MODE;
|
||||
speed = ETH_SPEED_10M;
|
||||
linkchanged = 1;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
} else if (!netif_is_link_up(netif) && (PHYLinkState > LAN8742_STATUS_LINK_DOWN)) {
|
||||
switch (PHYLinkState) {
|
||||
case LAN8742_STATUS_100MBITS_FULLDUPLEX:
|
||||
duplex = ETH_FULLDUPLEX_MODE;
|
||||
speed = ETH_SPEED_100M;
|
||||
linkchanged = 1;
|
||||
break;
|
||||
case LAN8742_STATUS_100MBITS_HALFDUPLEX:
|
||||
duplex = ETH_HALFDUPLEX_MODE;
|
||||
speed = ETH_SPEED_100M;
|
||||
linkchanged = 1;
|
||||
break;
|
||||
case LAN8742_STATUS_10MBITS_FULLDUPLEX:
|
||||
duplex = ETH_FULLDUPLEX_MODE;
|
||||
speed = ETH_SPEED_10M;
|
||||
linkchanged = 1;
|
||||
break;
|
||||
case LAN8742_STATUS_10MBITS_HALFDUPLEX:
|
||||
duplex = ETH_HALFDUPLEX_MODE;
|
||||
speed = ETH_SPEED_10M;
|
||||
linkchanged = 1;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
if(linkchanged)
|
||||
{
|
||||
if (linkchanged) {
|
||||
/* Get MAC Config MAC */
|
||||
HAL_ETH_GetMACConfig(&EthHandle, &MACConf);
|
||||
MACConf.DuplexMode = duplex;
|
||||
@ -597,28 +574,23 @@ void ethernet_link_check_state(struct netif *netif) {
|
||||
}
|
||||
}
|
||||
|
||||
void HAL_ETH_RxAllocateCallback(uint8_t **buff)
|
||||
{
|
||||
void HAL_ETH_RxAllocateCallback(uint8_t **buff) {
|
||||
struct pbuf_custom *p = LWIP_MEMPOOL_ALLOC(RX_POOL);
|
||||
if (p)
|
||||
{
|
||||
if (p) {
|
||||
/* Get the buff from the struct pbuf address. */
|
||||
*buff = (uint8_t *)p + offsetof(RxBuff_t, buff);
|
||||
p->custom_free_function = pbuf_free_custom;
|
||||
/* Initialize the struct pbuf.
|
||||
* This must be performed whenever a buffer's allocated because it may be
|
||||
* changed by lwIP or the app, e.g., pbuf_free decrements ref. */
|
||||
* This must be performed whenever a buffer's allocated because it may be
|
||||
* changed by lwIP or the app, e.g., pbuf_free decrements ref. */
|
||||
pbuf_alloced_custom(PBUF_RAW, 0, PBUF_REF, p, *buff, ETH_RX_BUFFER_SIZE);
|
||||
}
|
||||
else
|
||||
{
|
||||
} else {
|
||||
RxAllocStatus = RX_ALLOC_ERROR;
|
||||
*buff = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t Length)
|
||||
{
|
||||
void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t Length) {
|
||||
struct pbuf **ppStart = (struct pbuf **)pStart;
|
||||
struct pbuf **ppEnd = (struct pbuf **)pEnd;
|
||||
struct pbuf *p = NULL;
|
||||
@ -630,22 +602,18 @@ void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t
|
||||
p->len = Length;
|
||||
|
||||
/* Chain the buffer. */
|
||||
if (!*ppStart)
|
||||
{
|
||||
if (!*ppStart) {
|
||||
/* The first buffer of the packet. */
|
||||
*ppStart = p;
|
||||
}
|
||||
else
|
||||
{
|
||||
} else {
|
||||
/* Chain the buffer to the end of the packet. */
|
||||
(*ppEnd)->next = p;
|
||||
}
|
||||
*ppEnd = p;
|
||||
*ppEnd = p;
|
||||
|
||||
/* Update the total length of all the buffers of the chain. Each pbuf in the chain should have its tot_len
|
||||
* set to its own length, plus the length of all the following pbufs in the chain. */
|
||||
for (p = *ppStart; p != NULL; p = p->next)
|
||||
{
|
||||
/* Update the total length of all the buffers of the chain. Each pbuf in the chain should have its
|
||||
* tot_len set to its own length, plus the length of all the following pbufs in the chain. */
|
||||
for (p = *ppStart; p != NULL; p = p->next) {
|
||||
p->tot_len += Length;
|
||||
}
|
||||
|
||||
@ -653,10 +621,7 @@ void HAL_ETH_RxLinkCallback(void **pStart, void **pEnd, uint8_t *buff, uint16_t
|
||||
SCB_InvalidateDCache_by_Addr((uint32_t *)buff, Length);
|
||||
}
|
||||
|
||||
void HAL_ETH_TxFreeCallback(uint32_t * buff)
|
||||
{
|
||||
pbuf_free((struct pbuf *)buff);
|
||||
}
|
||||
void HAL_ETH_TxFreeCallback(uint32_t *buff) { pbuf_free((struct pbuf *)buff); }
|
||||
|
||||
ETH_HandleTypeDef *getEthernetHandle() { return &EthHandle; }
|
||||
|
||||
|
Reference in New Issue
Block a user