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@ -72,8 +72,8 @@
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/* Private variables ---------------------------------------------------------*/
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/*
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@Note: This interface is implemented to operate in zero-copy mode only:
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- Rx buffers are allocated statically and passed directly to the LwIP stack
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they will return back to DMA after been processed by the stack.
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- Rx buffers are allocated statically and passed directly to the LwIP
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stack they will return back to DMA after been processed by the stack.
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- Tx Buffers will be allocated from LwIP stack memory heap,
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then passed to ETH HAL driver.
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@ -91,40 +91,44 @@
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#if defined(__ICCARM__) /*!< IAR Compiler */
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#pragma location = 0x30040000
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ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
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ETH_DMADescTypeDef
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DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
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#pragma location = 0x30040060
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ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */
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ETH_DMADescTypeDef
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DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */
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#pragma location = 0x30040200
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uint8_t Rx_Buff[ETH_RX_DESC_CNT][ETH_RX_BUFFER_SIZE]; /* Ethernet Receive Buffers */
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uint8_t Rx_Buff[ETH_RX_DESC_CNT]
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[ETH_RX_BUFFER_SIZE]; /* Ethernet Receive Buffers */
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#elif defined(__CC_ARM) /* MDK ARM Compiler */
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__attribute__((section(".RxDecripSection")))
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ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
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__attribute__((section(".TxDecripSection")))
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ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */
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__attribute__((section(".RxArraySection")))
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uint8_t Rx_Buff[ETH_RX_DESC_CNT][ETH_RX_BUFFER_SIZE]; /* Ethernet Receive Buffer */
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__attribute__((section(".RxDecripSection"))) ETH_DMADescTypeDef
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DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
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__attribute__((section(".TxDecripSection"))) ETH_DMADescTypeDef
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DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */
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__attribute__((section(".RxArraySection"))) uint8_t
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Rx_Buff[ETH_RX_DESC_CNT][ETH_RX_BUFFER_SIZE]; /* Ethernet Receive Buffer */
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#elif defined(__GNUC__) /* GNU Compiler */
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#ifdef FSFW_OSAL_RTEMS
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/* Put into special RTEMS section and align correctly */
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ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]
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__attribute__((section(".bsp_nocache"),
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__aligned__(DMA_DESCRIPTOR_ALIGNMENT))); /* Ethernet Rx DMA Descriptors */
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ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT] __attribute__((
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section(".bsp_nocache"),
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__aligned__(DMA_DESCRIPTOR_ALIGNMENT))); /* Ethernet Rx DMA Descriptors */
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/* Put into special RTEMS section and align correctly */
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ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]
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__attribute__((section(".bsp_nocache"),
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__aligned__(DMA_DESCRIPTOR_ALIGNMENT))); /* Ethernet Tx DMA Descriptors */
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/* Ethernet Receive Buffers. Just place somewhere is BSS instead of explicitely placing it */
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ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT] __attribute__((
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section(".bsp_nocache"),
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__aligned__(DMA_DESCRIPTOR_ALIGNMENT))); /* Ethernet Tx DMA Descriptors */
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/* Ethernet Receive Buffers. Just place somewhere is BSS instead of explicitely
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* placing it */
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uint8_t Rx_Buff[ETH_RX_DESC_CNT][ETH_RX_BUFFER_SIZE];
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#elif defined FSFW_OSAL_FREERTOS
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/* Placement and alignment specified in linker script here */
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ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]
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__attribute__((section(".RxDecripSection"))); /* Ethernet Rx DMA Descriptors */
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ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]
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__attribute__((section(".TxDecripSection"))); /* Ethernet Tx DMA Descriptors */
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ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT] __attribute__((
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section(".RxDecripSection"))); /* Ethernet Rx DMA Descriptors */
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ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT] __attribute__((
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section(".TxDecripSection"))); /* Ethernet Tx DMA Descriptors */
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uint8_t Rx_Buff[ETH_RX_DESC_CNT][ETH_RX_BUFFER_SIZE]
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__attribute__((section(".RxArraySection"))); /* Ethernet Receive Buffers */
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#endif /* FSFW_FREERTOS */
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@ -148,12 +152,15 @@ void pbuf_free_custom(struct pbuf *p);
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int32_t ETH_PHY_IO_Init(void);
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int32_t ETH_PHY_IO_DeInit(void);
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int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal);
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int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal);
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int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr,
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uint32_t *pRegVal);
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int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr,
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uint32_t RegVal);
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int32_t ETH_PHY_IO_GetTick(void);
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lan8742_IOCtx_t LAN8742_IOCtx = {ETH_PHY_IO_Init, ETH_PHY_IO_DeInit, ETH_PHY_IO_WriteReg,
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ETH_PHY_IO_ReadReg, ETH_PHY_IO_GetTick};
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lan8742_IOCtx_t LAN8742_IOCtx = {ETH_PHY_IO_Init, ETH_PHY_IO_DeInit,
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ETH_PHY_IO_WriteReg, ETH_PHY_IO_ReadReg,
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ETH_PHY_IO_GetTick};
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/* Private functions ---------------------------------------------------------*/
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/*******************************************************************************
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LL Driver Interface ( LwIP stack --> ETH)
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@ -207,7 +214,8 @@ static void low_level_init(struct netif *netif) {
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/* Set Tx packet config common parameters */
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memset(&TxConfig, 0, sizeof(ETH_TxPacketConfig));
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TxConfig.Attributes = ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD;
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TxConfig.Attributes =
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ETH_TX_PACKETS_FEATURES_CSUM | ETH_TX_PACKETS_FEATURES_CRCPAD;
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TxConfig.ChecksumCtrl = ETH_CHECKSUM_IPHDR_PAYLOAD_INSERT_PHDR_CALC;
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TxConfig.CRCPadCtrl = ETH_CRC_PAD_INSERT;
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@ -221,12 +229,13 @@ static void low_level_init(struct netif *netif) {
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}
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/**
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* @brief This function should do the actual transmission of the packet. The packet is
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* contained in the pbuf that is passed to the function. This pbuf
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* @brief This function should do the actual transmission of the packet. The
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* packet is contained in the pbuf that is passed to the function. This pbuf
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* might be chained.
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*
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* @param netif the lwip network interface structure for this ethernetif
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* @param p the MAC packet to send (e.g. IP packet including MAC addresses and type)
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* @param p the MAC packet to send (e.g. IP packet including MAC addresses and
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* type)
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* @return ERR_OK if the packet could be sent
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* an err_t value if the packet couldn't be sent
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*
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@ -242,7 +251,8 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p) {
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ETH_BufferTypeDef Txbuffer[ETH_TX_DESC_CNT];
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for (q = p; q != NULL; q = q->next) {
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if (i >= ETH_TX_DESC_CNT) return ERR_IF;
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if (i >= ETH_TX_DESC_CNT)
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return ERR_IF;
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Txbuffer[i].buffer = q->payload;
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Txbuffer[i].len = q->len;
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@ -265,7 +275,8 @@ static err_t low_level_output(struct netif *netif, struct pbuf *p) {
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HAL_StatusTypeDef ret = HAL_ETH_Transmit(&EthHandle, &TxConfig, 20);
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if (ret != HAL_OK) {
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printf("low_level_output: Could not transmit ethernet packet, code %d!\n\r", ret);
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printf("low_level_output: Could not transmit ethernet packet, code %d!\n\r",
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ret);
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}
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return errval;
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@ -289,10 +300,12 @@ static struct pbuf *low_level_input(struct netif *netif) {
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HAL_ETH_GetRxDataLength(&EthHandle, &framelength);
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/* Invalidate data cache for ETH Rx Buffers */
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SCB_InvalidateDCache_by_Addr((uint32_t *)Rx_Buff, (ETH_RX_DESC_CNT * ETH_RX_BUFFER_SIZE));
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SCB_InvalidateDCache_by_Addr((uint32_t *)Rx_Buff,
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(ETH_RX_DESC_CNT * ETH_RX_BUFFER_SIZE));
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p = pbuf_alloced_custom(PBUF_RAW, framelength, PBUF_POOL, &rx_pbuf[current_pbuf_idx],
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RxBuff.buffer, ETH_RX_BUFFER_SIZE);
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p = pbuf_alloced_custom(PBUF_RAW, framelength, PBUF_POOL,
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&rx_pbuf[current_pbuf_idx], RxBuff.buffer,
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ETH_RX_BUFFER_SIZE);
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if (current_pbuf_idx < (ETH_RX_DESC_CNT - 1)) {
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current_pbuf_idx++;
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} else {
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@ -306,11 +319,11 @@ static struct pbuf *low_level_input(struct netif *netif) {
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}
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/**
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* @brief This function is the ethernetif_input task, it is processed when a packet
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* is ready to be read from the interface. It uses the function low_level_input()
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* that should handle the actual reception of bytes from the network
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* interface. Then the type of the received packet is determined and
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* the appropriate input function is called.
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* @brief This function is the ethernetif_input task, it is processed when a
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* packet is ready to be read from the interface. It uses the function
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* low_level_input() that should handle the actual reception of bytes from the
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* network interface. Then the type of the received packet is determined and the
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* appropriate input function is called.
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*
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* @param netif the lwip network interface structure for this ethernetif
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*/
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@ -322,7 +335,8 @@ void ethernetif_input(struct netif *netif) {
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p = low_level_input(netif);
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/* no packet could be read, silently ignore this */
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if (p == NULL) return;
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if (p == NULL)
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return;
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/* entry point to the LwIP stack */
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err = netif->input(p, netif);
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@ -413,7 +427,8 @@ void HAL_ETH_MspInit(ETH_HandleTypeDef *heth) {
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__HAL_RCC_GPIOC_CLK_ENABLE();
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__HAL_RCC_GPIOG_CLK_ENABLE();
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/* Ethernet pins configuration ************************************************/
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/* Ethernet pins configuration
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* ************************************************/
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/*
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RMII_REF_CLK ----------------------> PA1
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RMII_MDIO -------------------------> PA2
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@ -492,8 +507,10 @@ int32_t ETH_PHY_IO_DeInit(void) { return 0; }
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* @param pRegVal: pointer to hold the register value
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* @retval 0 if OK -1 if Error
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*/
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int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal) {
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if (HAL_ETH_ReadPHYRegister(&EthHandle, DevAddr, RegAddr, pRegVal) != HAL_OK) {
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int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr,
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uint32_t *pRegVal) {
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if (HAL_ETH_ReadPHYRegister(&EthHandle, DevAddr, RegAddr, pRegVal) !=
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HAL_OK) {
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return -1;
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}
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@ -507,8 +524,10 @@ int32_t ETH_PHY_IO_ReadReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t *pRegVal
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* @param RegVal: Value to be written
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* @retval 0 if OK -1 if Error
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*/
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int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr, uint32_t RegVal) {
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if (HAL_ETH_WritePHYRegister(&EthHandle, DevAddr, RegAddr, RegVal) != HAL_OK) {
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int32_t ETH_PHY_IO_WriteReg(uint32_t DevAddr, uint32_t RegAddr,
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uint32_t RegVal) {
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if (HAL_ETH_WritePHYRegister(&EthHandle, DevAddr, RegAddr, RegVal) !=
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HAL_OK) {
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return -1;
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}
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@ -536,30 +555,31 @@ void ethernet_link_check_state(struct netif *netif) {
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HAL_ETH_Stop(&EthHandle);
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netif_set_down(netif);
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netif_set_link_down(netif);
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} else if (!netif_is_link_up(netif) && (PHYLinkState > LAN8742_STATUS_LINK_DOWN)) {
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} else if (!netif_is_link_up(netif) &&
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(PHYLinkState > LAN8742_STATUS_LINK_DOWN)) {
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switch (PHYLinkState) {
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case LAN8742_STATUS_100MBITS_FULLDUPLEX:
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duplex = ETH_FULLDUPLEX_MODE;
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speed = ETH_SPEED_100M;
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linkchanged = 1;
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break;
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case LAN8742_STATUS_100MBITS_HALFDUPLEX:
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duplex = ETH_HALFDUPLEX_MODE;
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speed = ETH_SPEED_100M;
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linkchanged = 1;
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break;
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case LAN8742_STATUS_10MBITS_FULLDUPLEX:
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duplex = ETH_FULLDUPLEX_MODE;
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speed = ETH_SPEED_10M;
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linkchanged = 1;
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break;
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case LAN8742_STATUS_10MBITS_HALFDUPLEX:
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duplex = ETH_HALFDUPLEX_MODE;
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speed = ETH_SPEED_10M;
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linkchanged = 1;
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break;
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default:
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break;
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case LAN8742_STATUS_100MBITS_FULLDUPLEX:
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duplex = ETH_FULLDUPLEX_MODE;
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speed = ETH_SPEED_100M;
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linkchanged = 1;
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break;
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case LAN8742_STATUS_100MBITS_HALFDUPLEX:
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duplex = ETH_HALFDUPLEX_MODE;
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speed = ETH_SPEED_100M;
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linkchanged = 1;
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break;
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case LAN8742_STATUS_10MBITS_FULLDUPLEX:
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duplex = ETH_FULLDUPLEX_MODE;
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speed = ETH_SPEED_10M;
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linkchanged = 1;
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break;
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case LAN8742_STATUS_10MBITS_HALFDUPLEX:
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duplex = ETH_HALFDUPLEX_MODE;
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speed = ETH_SPEED_10M;
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linkchanged = 1;
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break;
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default:
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break;
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}
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if (linkchanged) {
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