diff --git a/bsp_stm32_freertos/STM32CubeH7/Boards/NUCLEO-H743ZI/Inc/spiConf.h b/bsp_stm32_freertos/STM32CubeH7/Boards/NUCLEO-H743ZI/Inc/spiConf.h new file mode 100644 index 0000000..eb1a0cf --- /dev/null +++ b/bsp_stm32_freertos/STM32CubeH7/Boards/NUCLEO-H743ZI/Inc/spiConf.h @@ -0,0 +1,48 @@ +#ifndef FSFW_HAL_STM32H7_DEVICETEST_SPICONF_H_ +#define FSFW_HAL_STM32H7_DEVICETEST_SPICONF_H_ + +#include "stm32h7xx_nucleo.h" + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* User can use this section to tailor SPIx instance used and associated + resources */ +/* Definition for SPIx clock resources */ +#define SPIx SPI1 +#define SPIx_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE() +#define DMAx_CLK_ENABLE() __HAL_RCC_DMA2_CLK_ENABLE() +#define SPIx_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define SPIx_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() +#define SPIx_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE() + +#define SPIx_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET() +#define SPIx_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET() + +/* Definition for SPIx Pins */ +#define SPIx_SCK_PIN GPIO_PIN_5 +#define SPIx_SCK_GPIO_PORT GPIOA +#define SPIx_SCK_AF GPIO_AF5_SPI1 +#define SPIx_MISO_PIN GPIO_PIN_6 +#define SPIx_MISO_GPIO_PORT GPIOA +#define SPIx_MISO_AF GPIO_AF5_SPI1 +#define SPIx_MOSI_PIN GPIO_PIN_7 +#define SPIx_MOSI_GPIO_PORT GPIOA +#define SPIx_MOSI_AF GPIO_AF5_SPI1 +/* Definition for SPIx's DMA */ +#define SPIx_TX_DMA_STREAM DMA2_Stream3 +#define SPIx_RX_DMA_STREAM DMA2_Stream2 + +#define SPIx_TX_DMA_REQUEST DMA_REQUEST_SPI1_TX +#define SPIx_RX_DMA_REQUEST DMA_REQUEST_SPI1_RX + +/* Definition for SPIx's NVIC */ +#define SPIx_DMA_TX_IRQn DMA2_Stream3_IRQn +#define SPIx_DMA_RX_IRQn DMA2_Stream2_IRQn + +#define SPIx_DMA_TX_IRQHandler DMA2_Stream3_IRQHandler +#define SPIx_DMA_RX_IRQHandler DMA2_Stream2_IRQHandler + +#define SPIx_IRQn SPI1_IRQn +#define SPIx_IRQHandler SPI1_IRQHandler + +#endif /* FSFW_HAL_STM32H7_DEVICETEST_SPICONF_H_ */ diff --git a/bsp_stm32_freertos/STM32CubeH7/Boards/NUCLEO-H743ZI/Inc/stm32h7xx_spi_dma_msp.h b/bsp_stm32_freertos/STM32CubeH7/Boards/NUCLEO-H743ZI/Inc/stm32h7xx_spi_dma_msp.h new file mode 100644 index 0000000..82f0e33 --- /dev/null +++ b/bsp_stm32_freertos/STM32CubeH7/Boards/NUCLEO-H743ZI/Inc/stm32h7xx_spi_dma_msp.h @@ -0,0 +1,16 @@ +#ifndef BSP_STM32_FREERTOS_STM32CUBEH7_BOARDS_NUCLEO_H743ZI_INC_STM32H7XX_SPI_DMA_MSP_H_ +#define BSP_STM32_FREERTOS_STM32CUBEH7_BOARDS_NUCLEO_H743ZI_INC_STM32H7XX_SPI_DMA_MSP_H_ + +#include "stm32h7xx_hal_dma.h" + +#ifdef __cplusplus +extern "C" { +#endif + +void setDmaHandles(DMA_HandleTypeDef* txHandle, DMA_HandleTypeDef* rxHandle); + +#ifdef __cplusplus +} +#endif + +#endif /* BSP_STM32_FREERTOS_STM32CUBEH7_BOARDS_NUCLEO_H743ZI_INC_STM32H7XX_SPI_DMA_MSP_H_ */ diff --git a/bsp_stm32_freertos/STM32CubeH7/Boards/NUCLEO-H743ZI/Src/CMakeLists.txt b/bsp_stm32_freertos/STM32CubeH7/Boards/NUCLEO-H743ZI/Src/CMakeLists.txt index 3819282..4c9133c 100644 --- a/bsp_stm32_freertos/STM32CubeH7/Boards/NUCLEO-H743ZI/Src/CMakeLists.txt +++ b/bsp_stm32_freertos/STM32CubeH7/Boards/NUCLEO-H743ZI/Src/CMakeLists.txt @@ -2,6 +2,7 @@ target_sources(${TARGET_NAME} PRIVATE freertos.c hardware_init.c stm32h7xx_hal_timebase_tim.c + stm32h7xx_spi_dma_msp.c stm32h7xx_it.c syscalls.c cmsis_os.c diff --git a/bsp_stm32_freertos/STM32CubeH7/Boards/NUCLEO-H743ZI/Src/stm32h7xx_spi_dma_msp.c b/bsp_stm32_freertos/STM32CubeH7/Boards/NUCLEO-H743ZI/Src/stm32h7xx_spi_dma_msp.c new file mode 100644 index 0000000..31351ce --- /dev/null +++ b/bsp_stm32_freertos/STM32CubeH7/Boards/NUCLEO-H743ZI/Src/stm32h7xx_spi_dma_msp.c @@ -0,0 +1,162 @@ +#include "spiConf.h" + +#include "stm32h743xx.h" +#include "stm32h7xx_hal_spi.h" +#include "stm32h7xx_hal_dma.h" +#include "stm32h7xx_hal_def.h" + +#include + +DMA_HandleTypeDef* hdma_tx = NULL; +DMA_HandleTypeDef* hdma_rx = NULL; + +void setDmaHandles(DMA_HandleTypeDef* txHandle, DMA_HandleTypeDef* rxHandle) { + hdma_tx = txHandle; + hdma_rx = rxHandle; +} + +/** + * @brief SPI MSP Initialization + * This function configures the hardware resources used in this example: + * - Peripheral's clock enable + * - Peripheral's GPIO Configuration + * - DMA configuration for transmission request by peripheral + * - NVIC configuration for DMA interrupt request enable + * @param hspi: SPI handle pointer + * @retval None + */ +void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi) +{ + GPIO_InitTypeDef GPIO_InitStruct; + + if(hdma_tx == NULL || hdma_rx == NULL) { + printf("HAL_SPI_MspInit: Invalid DMA handles. Make sure to call setDmaHandles!\n"); + return; + } + if (hspi->Instance == SPI1) + { + /*##-1- Enable peripherals and GPIO Clocks #################################*/ + /* Enable GPIO TX/RX clock */ + SPIx_SCK_GPIO_CLK_ENABLE(); + SPIx_MISO_GPIO_CLK_ENABLE(); + SPIx_MOSI_GPIO_CLK_ENABLE(); + /* Enable SPI1 clock */ + SPIx_CLK_ENABLE(); + /* Enable DMA clock */ + DMAx_CLK_ENABLE(); + + /*##-2- Configure peripheral GPIO ##########################################*/ + /* SPI SCK GPIO pin configuration */ + GPIO_InitStruct.Pin = SPIx_SCK_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLDOWN; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; + GPIO_InitStruct.Alternate = SPIx_SCK_AF; + HAL_GPIO_Init(SPIx_SCK_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MISO GPIO pin configuration */ + GPIO_InitStruct.Pin = SPIx_MISO_PIN; + GPIO_InitStruct.Alternate = SPIx_MISO_AF; + HAL_GPIO_Init(SPIx_MISO_GPIO_PORT, &GPIO_InitStruct); + + /* SPI MOSI GPIO pin configuration */ + GPIO_InitStruct.Pin = SPIx_MOSI_PIN; + GPIO_InitStruct.Alternate = SPIx_MOSI_AF; + HAL_GPIO_Init(SPIx_MOSI_GPIO_PORT, &GPIO_InitStruct); + + /*##-3- Configure the DMA ##################################################*/ + /* Configure the DMA handler for Transmission process */ + hdma_tx->Instance = SPIx_TX_DMA_STREAM; + hdma_tx->Init.FIFOMode = DMA_FIFOMODE_DISABLE; + hdma_tx->Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; + hdma_tx->Init.MemBurst = DMA_MBURST_INC4; + hdma_tx->Init.PeriphBurst = DMA_PBURST_INC4; + hdma_tx->Init.Request = SPIx_TX_DMA_REQUEST; + hdma_tx->Init.Direction = DMA_MEMORY_TO_PERIPH; + hdma_tx->Init.PeriphInc = DMA_PINC_DISABLE; + hdma_tx->Init.MemInc = DMA_MINC_ENABLE; + hdma_tx->Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + hdma_tx->Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + hdma_tx->Init.Mode = DMA_NORMAL; + hdma_tx->Init.Priority = DMA_PRIORITY_LOW; + + HAL_DMA_Init(hdma_tx); + + /* Associate the initialized DMA handle to the the SPI handle */ + __HAL_LINKDMA(hspi, hdmatx, *hdma_tx); + + /* Configure the DMA handler for Transmission process */ + hdma_rx->Instance = SPIx_RX_DMA_STREAM; + + hdma_rx->Init.FIFOMode = DMA_FIFOMODE_DISABLE; + hdma_rx->Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; + hdma_rx->Init.MemBurst = DMA_MBURST_INC4; + hdma_rx->Init.PeriphBurst = DMA_PBURST_INC4; + hdma_rx->Init.Request = SPIx_RX_DMA_REQUEST; + hdma_rx->Init.Direction = DMA_PERIPH_TO_MEMORY; + hdma_rx->Init.PeriphInc = DMA_PINC_DISABLE; + hdma_rx->Init.MemInc = DMA_MINC_ENABLE; + hdma_rx->Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + hdma_rx->Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + hdma_rx->Init.Mode = DMA_NORMAL; + hdma_rx->Init.Priority = DMA_PRIORITY_HIGH; + + HAL_DMA_Init(hdma_rx); + + /* Associate the initialized DMA handle to the the SPI handle */ + __HAL_LINKDMA(hspi, hdmarx, *hdma_rx); + + /*##-4- Configure the NVIC for DMA #########################################*/ + /* NVIC configuration for DMA transfer complete interrupt (SPI1_TX) */ + HAL_NVIC_SetPriority(SPIx_DMA_TX_IRQn, 1, 1); + HAL_NVIC_EnableIRQ(SPIx_DMA_TX_IRQn); + + /* NVIC configuration for DMA transfer complete interrupt (SPI1_RX) */ + HAL_NVIC_SetPriority(SPIx_DMA_RX_IRQn, 1, 0); + HAL_NVIC_EnableIRQ(SPIx_DMA_RX_IRQn); + + /*##-5- Configure the NVIC for SPI #########################################*/ + /* NVIC configuration for SPI transfer complete interrupt (SPI1) */ + HAL_NVIC_SetPriority(SPIx_IRQn, 1, 0); + HAL_NVIC_EnableIRQ(SPIx_IRQn); + } +} + +/** + * @brief SPI MSP De-Initialization + * This function frees the hardware resources used in this example: + * - Disable the Peripheral's clock + * - Revert GPIO, DMA and NVIC configuration to their default state + * @param hspi: SPI handle pointer + * @retval None + */ +void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi) +{ + if(hspi->Instance == SPIx) + { + /*##-1- Reset peripherals ##################################################*/ + SPIx_FORCE_RESET(); + SPIx_RELEASE_RESET(); + + /*##-2- Disable peripherals and GPIO Clocks ################################*/ + /* Deconfigure SPI SCK */ + HAL_GPIO_DeInit(SPIx_SCK_GPIO_PORT, SPIx_SCK_PIN); + /* Deconfigure SPI MISO */ + HAL_GPIO_DeInit(SPIx_MISO_GPIO_PORT, SPIx_MISO_PIN); + /* Deconfigure SPI MOSI */ + HAL_GPIO_DeInit(SPIx_MOSI_GPIO_PORT, SPIx_MOSI_PIN); + + /*##-3- Disable the DMA ####################################################*/ + /* De-Initialize the DMA associated to transmission process */ + HAL_DMA_DeInit(hdma_tx); + /* De-Initialize the DMA associated to reception process */ + HAL_DMA_DeInit(hdma_rx); + + /*##-4- Disable the NVIC for DMA ###########################################*/ + HAL_NVIC_DisableIRQ(SPIx_DMA_TX_IRQn); + HAL_NVIC_DisableIRQ(SPIx_DMA_RX_IRQn); + + /*##-5- Disable the NVIC for SPI ###########################################*/ + HAL_NVIC_EnableIRQ(SPIx_IRQn); + } +} diff --git a/common/stm32_nucleo/STM32TestTask.cpp b/common/stm32_nucleo/STM32TestTask.cpp index 09729dc..17e18fb 100644 --- a/common/stm32_nucleo/STM32TestTask.cpp +++ b/common/stm32_nucleo/STM32TestTask.cpp @@ -29,4 +29,6 @@ ReturnValue_t STM32TestTask::performOneShotAction() { void STM32TestTask::performSpiL3gd20hTest() { SPI_HandleTypeDef spiHandle = {}; GyroL3GD20H gyroDevice(&spiHandle); + gyroDevice.initialize(); + gyroDevice.performOperation(); } diff --git a/fsfw_hal b/fsfw_hal index 4c54682..dc6327b 160000 --- a/fsfw_hal +++ b/fsfw_hal @@ -1 +1 @@ -Subproject commit 4c546820fdb28bf46fae6606716ae34e2f4ba950 +Subproject commit dc6327b909005c968a4794c3d8b2f9ac94ad59e1