#include "hardware_init.h" #include #include #include #include #include #include #include #include #include #include #include #include struct netif gnetif; void Netif_Config(void); void MPU_Config(void); void hardware_init() { /* Configure MPU for networking */ MPU_Config(); BSP_LED_Init(LED1); BSP_LED_Init(LED2); BSP_LED_Init(LED3); #if OBSW_ADD_LWIP_NETWORKING == 1 /* Initialize the LwIP stack */ lwip_init(); /* Configure the Network interface */ Netif_Config(); #endif } void Netif_Config(void) { ip_addr_t ipaddr; ip_addr_t netmask; ip_addr_t gw; #if LWIP_DHCP == 1 ip_addr_set_zero_ip4(&ipaddr); ip_addr_set_zero_ip4(&netmask); ip_addr_set_zero_ip4(&gw); #else /* IP address default setting */ set_lwip_addresses(&ipaddr, &netmask, &gw); #endif /* add the network interface */ struct netif* netif_valid = netif_add(&gnetif, (ip4_addr_t*)&ipaddr, (ip4_addr_t*)&netmask, (ip4_addr_t*) &gw, NULL, ðernetif_init, ðernet_input); if(netif_valid == NULL) { printf("Error: netif initialization failed!\n\r"); return; } /* Registers the default network interface */ netif_set_default(&gnetif); ethernet_link_status_updated(&gnetif); #if LWIP_NETIF_LINK_CALLBACK == 1 netif_set_link_callback(&gnetif, ethernet_link_status_updated); #endif } /* Configure the MPU attributes */ void MPU_Config(void) { MPU_Region_InitTypeDef MPU_InitStruct; /* Disable the MPU */ HAL_MPU_Disable(); /* Configure the MPU attributes as Device not cacheable for ETH DMA descriptors */ MPU_InitStruct.Enable = MPU_REGION_ENABLE; MPU_InitStruct.BaseAddress = 0x30040000; MPU_InitStruct.Size = MPU_REGION_SIZE_256B; MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS; MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE; MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE; MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; MPU_InitStruct.Number = MPU_REGION_NUMBER0; MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0; MPU_InitStruct.SubRegionDisable = 0x00; MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE; HAL_MPU_ConfigRegion(&MPU_InitStruct); /* Configure the MPU attributes as Cacheable write through for LwIP RAM heap which contains the Tx buffers */ MPU_InitStruct.Enable = MPU_REGION_ENABLE; MPU_InitStruct.BaseAddress = 0x30044000; MPU_InitStruct.Size = MPU_REGION_SIZE_16KB; MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS; MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE; MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE; MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; MPU_InitStruct.Number = MPU_REGION_NUMBER1; MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0; MPU_InitStruct.SubRegionDisable = 0x00; MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE; HAL_MPU_ConfigRegion(&MPU_InitStruct); /* Enable the MPU */ HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT); }