56 lines
1.0 KiB
Rust
56 lines
1.0 KiB
Rust
#[bitbybit::bitfield(u32)]
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pub struct RxFifo {
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#[bits(0..=7, r)]
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pub data: u8,
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}
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#[bitbybit::bitfield(u32)]
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pub struct TxFifo {
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#[bits(0..=7, w)]
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pub data: u8,
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}
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#[bitbybit::bitfield(u32)]
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pub struct Status {
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#[bit(7, r)]
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pub parity_error: bool,
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#[bit(6, r)]
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pub frame_error: bool,
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#[bit(5, r)]
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pub overrun_error: bool,
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#[bit(4, r)]
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pub intr_enabled: bool,
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#[bit(3, r)]
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pub tx_fifo_full: bool,
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#[bit(2, r)]
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pub tx_fifo_empty: bool,
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#[bit(1, r)]
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pub rx_fifo_full: bool,
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/// RX FIFO contains valid data.
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#[bit(0, r)]
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pub rx_fifo_valid_data: bool,
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}
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#[bitbybit::bitfield(u32, default = 0x0)]
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pub struct Control {
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#[bit(4, w)]
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enable_interrupt: bool,
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#[bit(1, w)]
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reset_rx_fifo: bool,
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#[bit(0, w)]
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reset_tx_fifo: bool,
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}
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#[derive(derive_mmio::Mmio)]
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#[repr(C)]
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pub struct AxiUartlite {
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#[mmio(RO)]
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rx_fifo: RxFifo,
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tx_fifo: TxFifo,
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#[mmio(RO)]
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stat_reg: Status,
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ctrl_reg: Control,
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}
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unsafe impl Send for MmioAxiUartlite<'static> {}
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