diff --git a/satrs-example/minisim/src/acs/mgm.rs b/satrs-example/minisim/src/acs/mgm.rs index 2e7c140..03f9ac8 100644 --- a/satrs-example/minisim/src/acs/mgm.rs +++ b/satrs-example/minisim/src/acs/mgm.rs @@ -103,7 +103,7 @@ impl Model for MgmModel {} mod tests { use std::time::Duration; - use satrs_minisim::{acs::mgm, SimComponent, SimReply, SimRequest, SimRequestWithTime}; + use satrs_minisim::{acs::mgm, ComponentId, SimReply, SimRequest, SimRequestWithTime}; use types::pcdu::{SwitchId, SwitchStateBinary}; use crate::{ @@ -134,7 +134,7 @@ mod tests { let sim_reply = sim_testbench.try_receive_next_reply(); assert!(sim_reply.is_some()); let sim_reply = sim_reply.unwrap(); - assert_eq!(sim_reply.component(), SimComponent::Mgm0Lis3Mdl); + assert_eq!(sim_reply.component(), ComponentId::Mgm0Lis3Mdl); let (id, reply) = unwrap_mgm_reply(sim_reply); assert_eq!(id, mgm::Id::Mgm0); assert_eq!(reply.switch_state, SwitchStateBinary::Off); @@ -227,7 +227,7 @@ mod tests { let mut sim_reply_res = sim_testbench.try_receive_next_reply(); assert!(sim_reply_res.is_some()); let mut sim_reply = sim_reply_res.unwrap(); - assert_eq!(sim_reply.component(), SimComponent::Mgm0Lis3Mdl); + assert_eq!(sim_reply.component(), ComponentId::Mgm0Lis3Mdl); let first_reply = unwrap_mgm_reply(sim_reply).1; sim_testbench.step_until(Duration::from_millis(50)).unwrap(); @@ -281,7 +281,7 @@ mod tests { let sim_reply = sim_testbench .try_receive_next_reply() .expect("no MGM0 reply received"); - assert_eq!(sim_reply.component(), SimComponent::Mgm0Lis3Mdl); + assert_eq!(sim_reply.component(), ComponentId::Mgm0Lis3Mdl); let (id, reply) = unwrap_mgm_reply(sim_reply); assert_eq!(id, mgm::Id::Mgm0); assert_eq!(reply.switch_state, SwitchStateBinary::Off); @@ -289,7 +289,7 @@ mod tests { let sim_reply = sim_testbench .try_receive_next_reply() .expect("no MGM1 reply received"); - assert_eq!(sim_reply.component(), SimComponent::Mgm1Lis3Mdl); + assert_eq!(sim_reply.component(), ComponentId::Mgm1Lis3Mdl); let (id, reply) = unwrap_mgm_reply(sim_reply); assert_eq!(id, mgm::Id::Mgm1); assert_eq!(reply.switch_state, SwitchStateBinary::On); diff --git a/satrs-example/minisim/src/acs/mgt.rs b/satrs-example/minisim/src/acs/mgt.rs index f07b65c..33a69d3 100644 --- a/satrs-example/minisim/src/acs/mgt.rs +++ b/satrs-example/minisim/src/acs/mgt.rs @@ -9,7 +9,8 @@ use satrs_minisim::{ use std::{sync::mpsc, time::Duration}; use types::pcdu::SwitchStateBinary; -pub struct MagnetorquerModel { +/// Simple magnetorquer simulation model. +pub struct MgtModel { switch_state: SwitchStateBinary, torquing: bool, torque_dipole: mgt::Dipole, @@ -17,7 +18,7 @@ pub struct MagnetorquerModel { reply_sender: mpsc::Sender, } -impl MagnetorquerModel { +impl MgtModel { pub fn new(reply_sender: mpsc::Sender) -> Self { Self { switch_state: SwitchStateBinary::Off, @@ -90,7 +91,7 @@ impl MagnetorquerModel { } } -impl Model for MagnetorquerModel {} +impl Model for MgtModel {} #[cfg(test)] mod tests { diff --git a/satrs-example/minisim/src/controller.rs b/satrs-example/minisim/src/controller.rs index a49d312..9818537 100644 --- a/satrs-example/minisim/src/controller.rs +++ b/satrs-example/minisim/src/controller.rs @@ -11,7 +11,7 @@ use satrs_minisim::{ }; use crate::{ - acs::{mgm::MgmModel, mgt::MagnetorquerModel}, + acs::{mgm::MgmModel, mgt::MgtModel}, eps::PcduModel, }; @@ -26,7 +26,7 @@ pub struct ModelAddrWrapper { mgm_0_addr: Address, mgm_1_addr: Address, pcdu_addr: Address, - mgt_addr: Address, + mgt_addr: Address, } // The simulation controller processes requests and drives the simulation. @@ -45,7 +45,7 @@ impl ModelAddrWrapper { mgm_0_addr: Address, mgm_1_addr: Address, pcdu_addr: Address, - mgt_addr: Address, + mgt_addr: Address, ) -> Self { Self { mgm_0_addr, @@ -184,7 +184,7 @@ impl SimController { mgt::Request::ApplyTorque { duration, dipole } => self .simulation .process_event( - MagnetorquerModel::apply_torque, + MgtModel::apply_torque, (duration, dipole), &self.addr_wrapper.mgt_addr, ) @@ -192,7 +192,7 @@ impl SimController { mgt::Request::RequestHk => self .simulation .process_event( - MagnetorquerModel::request_housekeeping_data, + MgtModel::request_housekeeping_data, (), &self.addr_wrapper.mgt_addr, ) diff --git a/satrs-example/minisim/src/eps.rs b/satrs-example/minisim/src/eps.rs index 460685c..468a362 100644 --- a/satrs-example/minisim/src/eps.rs +++ b/satrs-example/minisim/src/eps.rs @@ -75,7 +75,7 @@ pub(crate) mod tests { use super::*; use std::time::Duration; - use satrs_minisim::{eps::PcduRequest, SimComponent, SimRequestWithTime}; + use satrs_minisim::{eps::PcduRequest, ComponentId, SimRequestWithTime}; use types::pcdu::SwitchMapBinary; use crate::test_helpers::SimTestbench; @@ -118,7 +118,7 @@ pub(crate) mod tests { let sim_reply = sim_testbench.try_receive_next_reply(); assert!(sim_reply.is_some()); let sim_reply = sim_reply.unwrap(); - assert_eq!(sim_reply.component(), SimComponent::Pcdu); + assert_eq!(sim_reply.component(), ComponentId::Pcdu); let SimReply::Pcdu(pcdu_reply) = sim_reply else { panic!("unexpected reply"); }; @@ -154,7 +154,7 @@ pub(crate) mod tests { let sim_reply = sim_testbench.try_receive_next_reply(); assert!(sim_reply.is_some()); let sim_reply = sim_reply.unwrap(); - assert_eq!(sim_reply.component(), SimComponent::Pcdu); + assert_eq!(sim_reply.component(), ComponentId::Pcdu); let SimReply::Pcdu(pcdu_reply) = sim_reply else { panic!("unexpected reply"); }; diff --git a/satrs-example/minisim/src/lib.rs b/satrs-example/minisim/src/lib.rs index 470af78..592245b 100644 --- a/satrs-example/minisim/src/lib.rs +++ b/satrs-example/minisim/src/lib.rs @@ -8,7 +8,7 @@ use crate::{ /// Used by clients to route replies to the component handling them. #[derive(Debug, Copy, Clone, PartialEq, Eq, Serialize, Deserialize, Hash)] -pub enum SimComponent { +pub enum ComponentId { SimCtrl, Mgm0Lis3Mdl, Mgm1Lis3Mdl, @@ -70,12 +70,12 @@ pub enum SimReply { } impl SimReply { - pub fn component(&self) -> SimComponent { + pub fn component(&self) -> ComponentId { match self { - SimReply::SimCtrl(_) => SimComponent::SimCtrl, + SimReply::SimCtrl(_) => ComponentId::SimCtrl, SimReply::Mgm { id, .. } => id.sim_component(), - SimReply::Mgt(_) => SimComponent::Mgt, - SimReply::Pcdu(_) => SimComponent::Pcdu, + SimReply::Mgt(_) => ComponentId::Mgt, + SimReply::Pcdu(_) => ComponentId::Pcdu, } } } @@ -141,7 +141,7 @@ pub mod acs { use serde::{Deserialize, Serialize}; use types::pcdu::SwitchStateBinary; - use crate::SimComponent; + use crate::ComponentId; /// Fault mode injected on the simulated SPI bus, independent of the switch state. /// @@ -218,10 +218,10 @@ pub mod acs { } impl Id { - pub const fn sim_component(&self) -> SimComponent { + pub const fn sim_component(&self) -> ComponentId { match self { - Id::Mgm0 => SimComponent::Mgm0Lis3Mdl, - Id::Mgm1 => SimComponent::Mgm1Lis3Mdl, + Id::Mgm0 => ComponentId::Mgm0Lis3Mdl, + Id::Mgm1 => ComponentId::Mgm1Lis3Mdl, } } } @@ -355,7 +355,7 @@ pub mod tests { #[test] fn test_reply_serde_roundtrip() { let sim_reply = SimReply::from(SimCtrlReply::Pong); - assert_eq!(sim_reply.component(), SimComponent::SimCtrl); + assert_eq!(sim_reply.component(), ComponentId::SimCtrl); let json = serde_json::to_string(&sim_reply).unwrap(); let deserialized: SimReply = serde_json::from_str(&json).unwrap(); assert_eq!(deserialized, sim_reply); diff --git a/satrs-example/minisim/src/main.rs b/satrs-example/minisim/src/main.rs index 2af4518..85bf768 100644 --- a/satrs-example/minisim/src/main.rs +++ b/satrs-example/minisim/src/main.rs @@ -1,4 +1,4 @@ -use acs::{mgm::MgmModel, mgt::MagnetorquerModel}; +use acs::{mgm::MgmModel, mgt::MgtModel}; use controller::{ModelAddrWrapper, SimController}; use eps::PcduModel; use nexosim::simulation::{Mailbox, SimInit}; @@ -60,11 +60,11 @@ fn create_sim_controller( .mgm_1_switch .connect(MgmModel::switch_device, &mgm_1_addr); - let mut mgt_model = MagnetorquerModel::new(reply_sender.clone()); + let mut mgt_model = MgtModel::new(reply_sender.clone()); // Input connections. pcdu_model .mgt_switch - .connect(MagnetorquerModel::switch_device, &mgt_addr); + .connect(MgtModel::switch_device, &mgt_addr); // Output connections. mgt_model .gen_magnetic_field diff --git a/satrs-example/src/interface/sim_client_udp.rs b/satrs-example/src/interface/sim_client_udp.rs index 0882966..5b4ddbb 100644 --- a/satrs-example/src/interface/sim_client_udp.rs +++ b/satrs-example/src/interface/sim_client_udp.rs @@ -6,10 +6,10 @@ use std::{ }; use satrs::HandlingStatus; -use satrs_minisim::{SimComponent, SimReply, SimRequestWithTime, udp::SIM_CTRL_PORT}; +use satrs_minisim::{ComponentId, SimReply, SimRequestWithTime, udp::SIM_CTRL_PORT}; use satrs_minisim::{SimCtrlReply, SimCtrlRequest}; -struct SimReplyMap(pub HashMap>); +struct SimReplyMap(pub HashMap>); pub fn create_sim_client( sim_request_rx: mpsc::Receiver, @@ -166,7 +166,7 @@ impl SimClientUdp { pub fn add_reply_recipient( &mut self, - component: SimComponent, + component: ComponentId, reply_sender: mpsc::Sender, ) { self.reply_map.0.insert(component, reply_sender); @@ -187,7 +187,7 @@ pub mod tests { }; use satrs_minisim::{ - SimComponent, SimCtrlReply, SimCtrlRequest, SimReply, SimRequest, SimRequestWithTime, + ComponentId, SimCtrlReply, SimCtrlRequest, SimReply, SimRequest, SimRequestWithTime, eps::{PcduReply, PcduRequest}, }; @@ -343,7 +343,7 @@ pub mod tests { // Creating the client also performs the connection test. let mut client = SimClientUdp::new(server_addr, client_sim_req_rx).unwrap(); - client.add_reply_recipient(SimComponent::Pcdu, client_pcdu_reply_tx); + client.add_reply_recipient(ComponentId::Pcdu, client_pcdu_reply_tx); let sim_request = server_sim_request_rx .recv_timeout(Duration::from_millis(50)) @@ -382,7 +382,7 @@ pub mod tests { match client_pcdu_reply_rx.try_recv() { Ok(sim_reply) => { - assert_eq!(sim_reply.component(), SimComponent::Pcdu); + assert_eq!(sim_reply.component(), ComponentId::Pcdu); assert_eq!(sim_reply, SimReply::Pcdu(pcdu_reply.clone())); pcdu_reply_received = true; break; diff --git a/satrs-example/src/main.rs b/satrs-example/src/main.rs index 8b56378..900498a 100644 --- a/satrs-example/src/main.rs +++ b/satrs-example/src/main.rs @@ -173,30 +173,29 @@ fn main() { let shared_mgm_0_set = Arc::default(); let shared_mgm_1_set = Arc::default(); - let (mgm_0_spi_interface, mgm_1_spi_interface) = - if let Some(sim_client) = opt_sim_client.as_mut() { - sim_client - .add_reply_recipient(satrs_minisim::SimComponent::Mgm0Lis3Mdl, mgm_0_sim_reply_tx); - sim_client - .add_reply_recipient(satrs_minisim::SimComponent::Mgm1Lis3Mdl, mgm_1_sim_reply_tx); - ( - mgm::SpiCommunication::Sim(mgm::SpiSimInterface { - id: mgm::MgmId::_0, - sim_request_tx: sim_request_tx.clone(), - sim_reply_rx: mgm_0_sim_reply_rx, - }), - mgm::SpiCommunication::Sim(mgm::SpiSimInterface { - id: mgm::MgmId::_1, - sim_request_tx: sim_request_tx.clone(), - sim_reply_rx: mgm_1_sim_reply_rx, - }), - ) - } else { - ( - mgm::SpiCommunication::Dummy(mgm::SpiDummyInterface::default()), - mgm::SpiCommunication::Dummy(mgm::SpiDummyInterface::default()), - ) - }; + let (mgm_0_spi_interface, mgm_1_spi_interface) = if let Some(sim_client) = + opt_sim_client.as_mut() + { + sim_client.add_reply_recipient(satrs_minisim::ComponentId::Mgm0Lis3Mdl, mgm_0_sim_reply_tx); + sim_client.add_reply_recipient(satrs_minisim::ComponentId::Mgm1Lis3Mdl, mgm_1_sim_reply_tx); + ( + mgm::SpiCommunication::Sim(mgm::SpiSimInterface { + id: mgm::MgmId::_0, + sim_request_tx: sim_request_tx.clone(), + sim_reply_rx: mgm_0_sim_reply_rx, + }), + mgm::SpiCommunication::Sim(mgm::SpiSimInterface { + id: mgm::MgmId::_1, + sim_request_tx: sim_request_tx.clone(), + sim_reply_rx: mgm_1_sim_reply_rx, + }), + ) + } else { + ( + mgm::SpiCommunication::Dummy(mgm::SpiDummyInterface::default()), + mgm::SpiCommunication::Dummy(mgm::SpiDummyInterface::default()), + ) + }; let mut mgm_0_handler = mgm::MgmHandlerLis3Mdl::new( mgm::MgmId::_0, TmtcQueues { @@ -276,7 +275,7 @@ fn main() { ); let pcdu_serial_interface = if let Some(sim_client) = opt_sim_client.as_mut() { - sim_client.add_reply_recipient(satrs_minisim::SimComponent::Pcdu, pcdu_sim_reply_tx); + sim_client.add_reply_recipient(satrs_minisim::ComponentId::Pcdu, pcdu_sim_reply_tx); SerialSimInterfaceWrapper::Sim(SerialInterfaceToSim::new( sim_request_tx.clone(), pcdu_sim_reply_rx,