From 2bb8a89e8bceb9e4628e9cdb839c9d2b1138b254 Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Wed, 10 Sep 2025 18:06:50 +0200 Subject: [PATCH] updated STM32F3 RTICv2 example --- Cargo.toml | 2 +- embedded-examples/embedded-client/Cargo.toml | 17 + embedded-examples/embedded-client/config.toml | 2 + embedded-examples/embedded-client/src/main.rs | 126 + .../{def_config.toml => config.toml.template} | 2 +- .../stm32f3-disco-rtic/.gitignore | 2 +- .../stm32f3-disco-rtic/Cargo.lock | 1212 +- .../stm32f3-disco-rtic/Cargo.toml | 58 +- .../stm32f3-disco-rtic/STM32F303.svd | 38601 ---------------- .../stm32f3-disco-rtic/legacy/jlink.gdb | 10 - .../stm32f3-disco-rtic/legacy/openocd.cfg | 12 - .../stm32f3-disco-rtic/legacy/openocd.gdb | 42 - .../stm32f3-disco-rtic/pyclient/.gitignore | 8 - .../pyclient/def_tmtc_conf.json | 4 - .../stm32f3-disco-rtic/pyclient/main.py | 305 - .../pyclient/requirements.txt | 2 - .../stm32f3-disco-rtic/src/bin/blinky.rs | 111 +- .../stm32f3-disco-rtic/src/lib.rs | 215 +- .../stm32f3-disco-rtic/src/main.rs | 815 +- .../stm32h7-nucleo-rtic/Cargo.lock | 641 +- .../stm32h7-nucleo-rtic/Cargo.toml | 11 +- satrs/src/pus/verification.rs | 20 +- 22 files changed, 2063 insertions(+), 40155 deletions(-) create mode 100644 embedded-examples/embedded-client/Cargo.toml create mode 100644 embedded-examples/embedded-client/config.toml create mode 100644 embedded-examples/embedded-client/src/main.rs rename embedded-examples/stm32f3-disco-rtic/.cargo/{def_config.toml => config.toml.template} (98%) delete mode 100644 embedded-examples/stm32f3-disco-rtic/STM32F303.svd delete mode 100644 embedded-examples/stm32f3-disco-rtic/legacy/jlink.gdb delete mode 100644 embedded-examples/stm32f3-disco-rtic/legacy/openocd.cfg delete mode 100644 embedded-examples/stm32f3-disco-rtic/legacy/openocd.gdb delete mode 100644 embedded-examples/stm32f3-disco-rtic/pyclient/.gitignore delete mode 100644 embedded-examples/stm32f3-disco-rtic/pyclient/def_tmtc_conf.json delete mode 100755 embedded-examples/stm32f3-disco-rtic/pyclient/main.py delete mode 100644 embedded-examples/stm32f3-disco-rtic/pyclient/requirements.txt diff --git a/Cargo.toml b/Cargo.toml index 25aed30..6f8771f 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -5,7 +5,7 @@ members = [ "satrs-mib", "satrs-example", "satrs-minisim", - "satrs-shared", + "satrs-shared", "embedded-examples/embedded-client", ] exclude = [ diff --git a/embedded-examples/embedded-client/Cargo.toml b/embedded-examples/embedded-client/Cargo.toml new file mode 100644 index 0000000..a70b34b --- /dev/null +++ b/embedded-examples/embedded-client/Cargo.toml @@ -0,0 +1,17 @@ +[package] +name = "embedded-client" +version = "0.1.0" +edition = "2024" + +[dependencies] +clap = { version = "4", features = ["derive"] } +serialport = "4" +toml = "0.9" +serde = { version = "1", features = ["derive"] } +satrs-stm32f3-disco-rtic = { path = "../stm32f3-disco-rtic" } +spacepackets = { git = "https://egit.irs.uni-stuttgart.de/rust/spacepackets.git", version = "0.17" } +postcard = { version = "1", features = ["alloc"] } +cobs = "0.5" +fern = "0.7" +humantime = "2" +log = "0.4" diff --git a/embedded-examples/embedded-client/config.toml b/embedded-examples/embedded-client/config.toml new file mode 100644 index 0000000..5b018b6 --- /dev/null +++ b/embedded-examples/embedded-client/config.toml @@ -0,0 +1,2 @@ +[interface] +serial_port = "/dev/ttyUSB0" diff --git a/embedded-examples/embedded-client/src/main.rs b/embedded-examples/embedded-client/src/main.rs new file mode 100644 index 0000000..3e349b1 --- /dev/null +++ b/embedded-examples/embedded-client/src/main.rs @@ -0,0 +1,126 @@ +use std::{ + fs::File, + io::Read, + path::Path, + time::{Duration, SystemTime}, +}; + +use clap::Parser; +use cobs::CobsDecoderOwned; +use satrs_stm32f3_disco_rtic::Request; +use spacepackets::{CcsdsPacketCreator, CcsdsPacketReader, SpHeader}; + +#[derive(Parser, Debug)] +struct Cli { + #[arg(short, long)] + ping: bool, + + /// Set frequency in milliseconds. + #[arg(short, long)] + set_led_frequency: Option, +} + +#[derive(Debug, serde::Deserialize)] +struct Config { + interface: Interface, +} + +#[derive(Debug, serde::Deserialize)] +struct Interface { + serial_port: String, +} + +fn setup_logger() -> Result<(), fern::InitError> { + fern::Dispatch::new() + .format(|out, message, record| { + out.finish(format_args!( + "[{} {} {}] {}", + humantime::format_rfc3339_seconds(SystemTime::now()), + record.level(), + record.target(), + message + )) + }) + .level(log::LevelFilter::Debug) + .chain(std::io::stdout()) + .chain(fern::log_file("output.log")?) + .apply()?; + Ok(()) +} + +fn main() { + setup_logger().expect("failed to initialize logger"); + println!("sat-rs embedded examples TMTC client"); + + let cli = Cli::parse(); + let mut config_file = + File::open(Path::new("config.toml")).expect("opening config.toml file failed"); + let mut toml_str = String::new(); + config_file + .read_to_string(&mut toml_str) + .expect("reading config.toml file failed"); + let config: Config = toml::from_str(&toml_str).expect("parsing config.toml file failed"); + println!("Connecting to serial port {}", config.interface.serial_port); + + let mut serial = serialport::new(config.interface.serial_port, 115200) + .open() + .expect("opening serial port failed"); + + if cli.ping { + let request = Request::Ping; + let tc_encoded_raw = create_stm32f3_tc(&request); + log::info!("Sending ping request"); + serial.write_all(&tc_encoded_raw).unwrap(); + } + + if let Some(freq_ms) = cli.set_led_frequency { + let request = Request::ChangeBlinkFrequency(Duration::from_millis(freq_ms as u64)); + let tc_encoded_raw = create_stm32f3_tc(&request); + log::info!("Sending change blink frequency request: {:?}", request); + serial.write_all(&tc_encoded_raw).unwrap(); + } + + let mut cobs_decoder = CobsDecoderOwned::new(1024); + log::info!("Waiting for response..."); + loop { + let mut reception_buffer = [0u8; 1024]; + let received_bytes = serial.read(&mut reception_buffer); + match received_bytes { + Ok(0) => { + std::thread::sleep(std::time::Duration::from_millis(100)); + } + Ok(n) => { + for byte in &reception_buffer[..n] { + match cobs_decoder.feed(*byte) { + Ok(Some(packet_len)) => { + let reader = CcsdsPacketReader::new_with_checksum( + &cobs_decoder.dest()[0..packet_len], + ); + log::debug!("Received packet: {:?}", reader); + } + Ok(None) => (), + Err(e) => { + log::error!("COBS decoding error {e}, resetting decoder"); + } + } + } + } + Err(e) => { + if e.kind() != std::io::ErrorKind::TimedOut + && e.kind() != std::io::ErrorKind::WouldBlock + { + log::error!("Error reading from serial port: {:?}", e); + } + std::thread::sleep(std::time::Duration::from_millis(100)); + } + } + } +} + +fn create_stm32f3_tc(request: &Request) -> Vec { + let req_raw = postcard::to_allocvec(&request).unwrap(); + let sp_header = SpHeader::new_from_apid(satrs_stm32f3_disco_rtic::APID); + let ccsds_tc_packet = CcsdsPacketCreator::new_tc_with_checksum(sp_header, &req_raw).unwrap(); + let tc_raw = ccsds_tc_packet.to_vec(); + cobs::encode_vec_including_sentinels(&tc_raw) +} diff --git a/embedded-examples/stm32f3-disco-rtic/.cargo/def_config.toml b/embedded-examples/stm32f3-disco-rtic/.cargo/config.toml.template similarity index 98% rename from embedded-examples/stm32f3-disco-rtic/.cargo/def_config.toml rename to embedded-examples/stm32f3-disco-rtic/.cargo/config.toml.template index 4598c09..8fc2bd4 100644 --- a/embedded-examples/stm32f3-disco-rtic/.cargo/def_config.toml +++ b/embedded-examples/stm32f3-disco-rtic/.cargo/config.toml.template @@ -34,4 +34,4 @@ rustflags = [ target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU) [env] -DEFMT_LOG = "info" \ No newline at end of file +DEFMT_LOG = "info" diff --git a/embedded-examples/stm32f3-disco-rtic/.gitignore b/embedded-examples/stm32f3-disco-rtic/.gitignore index 63b4a75..b2d79a6 100644 --- a/embedded-examples/stm32f3-disco-rtic/.gitignore +++ b/embedded-examples/stm32f3-disco-rtic/.gitignore @@ -1,4 +1,4 @@ /target /itm.txt -/.cargo/config* +/.cargo/config.toml /.vscode diff --git a/embedded-examples/stm32f3-disco-rtic/Cargo.lock b/embedded-examples/stm32f3-disco-rtic/Cargo.lock index be838d2..d2fcd55 100644 --- a/embedded-examples/stm32f3-disco-rtic/Cargo.lock +++ b/embedded-examples/stm32f3-disco-rtic/Cargo.lock @@ -3,19 +3,62 @@ version = 4 [[package]] -name = "accelerometer" -version = "0.12.0" +name = "aho-corasick" +version = "1.1.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1a4586d95cb0695e748760c9a751141eebb68265b1b20392a0f14db608679f7a" +checksum = "ddd31a130427c27518df266943a5308ed92d4b226cc639f5a8f1002816174301" dependencies = [ - "micromath", + "memchr", +] + +[[package]] +name = "aligned" +version = "0.4.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "377e4c0ba83e4431b10df45c1d4666f178ea9c552cac93e60c3a88bf32785923" +dependencies = [ + "as-slice", +] + +[[package]] +name = "arbitrary-int" +version = "1.3.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "825297538d77367557b912770ca3083f778a196054b3ee63b22673c4a3cae0a5" + +[[package]] +name = "arbitrary-int" +version = "2.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "c858caffa49edfc4ecc45a4bec37abd3e88041a2903816f10f990b7b41abc281" +dependencies = [ + "defmt 0.3.100", + "serde", +] + +[[package]] +name = "as-slice" +version = "0.2.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "516b6b4f0e40d50dcda9365d53964ec74560ad4284da2e7fc97122cd83174516" +dependencies = [ + "stable_deref_trait", +] + +[[package]] +name = "atomic-polyfill" +version = "1.0.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8cf2bce30dfe09ef0bfaef228b9d414faaf7e563035494d7fe092dba54b300f4" +dependencies = [ + "critical-section", ] [[package]] name = "autocfg" -version = "1.4.0" +version = "1.5.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ace50bade8e6234aa140d9a2f552bbee1db4d353f69b8217bc503490fc1a9f26" +checksum = "c08606f8c3cbf4ce6ec8e28fb0014a2c086708fe954eaa885384a6165172e7e8" [[package]] name = "bare-metal" @@ -32,6 +75,24 @@ version = "1.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "f8fe8f5a8a398345e52358e18ff07cc17a568fbca5c6f73873d3a62056309603" +[[package]] +name = "bit_field" +version = "0.10.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1e4b40c7323adcfc0a41c4b88143ed58346ff65a288fc144329c5c45e05d70c6" + +[[package]] +name = "bitbybit" +version = "1.4.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ec187a89ab07e209270175faf9e07ceb2755d984954e58a2296e325ddece2762" +dependencies = [ + "arbitrary-int 1.3.0", + "proc-macro2", + "quote", + "syn", +] + [[package]] name = "bitfield" version = "0.13.2" @@ -45,15 +106,18 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "bef38d45163c2f1dde094a7dfd33ccf595c92905c8f8f4fdc18d06fb1037718a" [[package]] -name = "bxcan" -version = "0.7.0" +name = "bitflags" +version = "2.10.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "40ac3d0c0a542d0ab5521211f873f62706a7136df415676f676d347e5a41dd80" +checksum = "812e12b5285cc515a9c72a5c1d3b6d46a19dac5acfef5265968c166106e31dd3" + +[[package]] +name = "block-device-driver" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "44c051592f59fe68053524b4c4935249b806f72c1f544cfb7abe4f57c3be258e" dependencies = [ - "bitflags", - "embedded-hal 0.2.7", - "nb 1.1.0", - "vcell", + "aligned", ] [[package]] @@ -63,35 +127,31 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "1fd0f2584146f6f2ef48085050886acf353beff7305ebd1ae69500e27c67f64b" [[package]] -name = "cast" -version = "0.2.7" +name = "cc" +version = "1.2.43" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4c24dab4283a142afa2fdca129b80ad2c6284e073930f964c3a1293c225ee39a" +checksum = "739eb0f94557554b3ca9a86d2d37bebd49c5e6d0c1d2bda35ba5bdac830befc2" dependencies = [ - "rustc_version 0.4.1", + "find-msvc-tools", + "shlex", ] [[package]] name = "cfg-if" -version = "1.0.0" +version = "1.0.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd" +checksum = "9330f8b2ff13f34540b44e946ef35111825727b38d33286ef986142615121801" [[package]] name = "chrono" -version = "0.4.39" +version = "0.4.42" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7e36cc9d416881d2e24f9a963be5fb1cd90966419ac844274161d10488b3e825" +checksum = "145052bdd345b87320e369255277e3fb5152762ad123a901ef5c262dd38fe8d2" dependencies = [ "num-traits", + "serde", ] -[[package]] -name = "cobs" -version = "0.2.3" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "67ba02a97a2bd10f4b59b25c7973101c79642302776489e030cd13cdab09ed15" - [[package]] name = "cobs" version = "0.3.0" @@ -101,6 +161,17 @@ dependencies = [ "thiserror", ] +[[package]] +name = "cobs" +version = "0.5.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b4ef0193218d365c251b5b9297f9911a908a8ddd2ebd3a36cc5d0ef0f63aee9e" +dependencies = [ + "defmt 1.0.1", + "heapless 0.9.1", + "thiserror", +] + [[package]] name = "cortex-m" version = "0.7.7" @@ -131,7 +202,7 @@ checksum = "e37549a379a9e0e6e576fd208ee60394ccb8be963889eebba3ffe0980364f472" dependencies = [ "proc-macro2", "quote", - "syn 2.0.96", + "syn", ] [[package]] @@ -145,9 +216,9 @@ dependencies = [ [[package]] name = "crc" -version = "3.2.1" +version = "3.3.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "69e6e4d7b33a94f0991c26729976b10ebde1d34c3ee82408fb536164fa10d636" +checksum = "9710d3b3739c2e349eb44fe848ad0b7c8cb1e42bd87ee49371df2f7acaf3e675" dependencies = [ "crc-catalog", ] @@ -166,9 +237,9 @@ checksum = "790eea4361631c5e7d22598ecd5723ff611904e3344ce8720784c93e3d83d40b" [[package]] name = "darling" -version = "0.20.10" +version = "0.21.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6f63b86c8a8826a49b8c21f08a2d07338eec8d900540f8630dc76284be802989" +checksum = "9cdf337090841a411e2a7f3deb9187445851f91b309c0c0a29e05f74a00a48c0" dependencies = [ "darling_core", "darling_macro", @@ -176,122 +247,284 @@ dependencies = [ [[package]] name = "darling_core" -version = "0.20.10" +version = "0.21.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "95133861a8032aaea082871032f5815eb9e98cef03fa916ab4500513994df9e5" +checksum = "1247195ecd7e3c85f83c8d2a366e4210d588e802133e1e355180a9870b517ea4" dependencies = [ "fnv", "ident_case", "proc-macro2", "quote", - "syn 2.0.96", + "syn", ] [[package]] name = "darling_macro" -version = "0.20.10" +version = "0.21.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d336a2a514f6ccccaa3e09b02d41d35330c07ddf03a62165fcec10bb561c7806" +checksum = "d38308df82d1080de0afee5d069fa14b0326a88c14f15c5ccda35b4a6c414c81" dependencies = [ "darling_core", "quote", - "syn 2.0.96", + "syn", ] [[package]] name = "defmt" -version = "0.3.10" +version = "0.3.100" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "86f6162c53f659f65d00619fe31f14556a6e9f8752ccc4a41bd177ffcf3d6130" +checksum = "f0963443817029b2024136fc4dd07a5107eb8f977eaf18fcd1fdeb11306b64ad" dependencies = [ - "bitflags", + "defmt 1.0.1", +] + +[[package]] +name = "defmt" +version = "1.0.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "548d977b6da32fa1d1fda2876453da1e7df63ad0304c8b3dae4dbe7b96f39b78" +dependencies = [ + "bitflags 1.3.2", "defmt-macros", ] -[[package]] -name = "defmt-brtt" -version = "0.1.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c2f0ac3635d0c89d12b8101fcb44a7625f5f030a1c0491124b74467eb5a58a78" -dependencies = [ - "critical-section", - "defmt", -] - [[package]] name = "defmt-macros" -version = "0.4.0" +version = "1.0.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "9d135dd939bad62d7490b0002602d35b358dce5fd9233a709d3c1ef467d4bde6" +checksum = "3d4fc12a85bcf441cfe44344c4b72d58493178ce635338a3f3b78943aceb258e" dependencies = [ "defmt-parser", "proc-macro-error2", "proc-macro2", "quote", - "syn 2.0.96", + "syn", ] [[package]] name = "defmt-parser" -version = "0.4.1" +version = "1.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3983b127f13995e68c1e29071e5d115cd96f215ccb5e6812e3728cd6f92653b3" +checksum = "10d60334b3b2e7c9d91ef8150abfb6fa4c1c39ebbcf4a81c2e346aad939fee3e" dependencies = [ "thiserror", ] [[package]] -name = "defmt-test" -version = "0.3.2" +name = "defmt-rtt" +version = "1.1.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "290966e8c38f94b11884877242de876280d0eab934900e9642d58868e77c5df1" +checksum = "93d5a25c99d89c40f5676bec8cefe0614f17f0f40e916f98e345dae941807f9e" +dependencies = [ + "critical-section", + "defmt 1.0.1", +] + +[[package]] +name = "defmt-test" +version = "0.4.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "24076cc7203c365e7febfcec15d6667a9ef780bd2c5fd3b2a197400df78f299b" dependencies = [ "cortex-m-rt", "cortex-m-semihosting", - "defmt", + "defmt 1.0.1", "defmt-test-macros", ] [[package]] name = "defmt-test-macros" -version = "0.3.1" +version = "0.3.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "984bc6eca246389726ac2826acc2488ca0fe5fcd6b8d9b48797021951d76a125" +checksum = "fe5520fd36862f281c026abeaab153ebbc001717c29a9b8e5ba9704d8f3a879d" dependencies = [ "proc-macro2", "quote", - "syn 2.0.96", + "syn", ] [[package]] name = "delegate" -version = "0.10.0" +version = "0.13.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0ee5df75c70b95bd3aacc8e2fd098797692fb1d54121019c4de481e42f04c8a1" +checksum = "6178a82cf56c836a3ba61a7935cdb1c49bfaa6fa4327cd5bf554a503087de26b" dependencies = [ "proc-macro2", "quote", - "syn 1.0.109", + "syn", ] [[package]] -name = "derive-new" -version = "0.6.0" +name = "document-features" +version = "0.2.12" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d150dea618e920167e5973d70ae6ece4385b7164e0d799fe7c122dd0a5d912ad" +checksum = "d4b8a88685455ed29a21542a33abd9cb6510b6b129abadabdcef0f4c55bc8f61" dependencies = [ - "proc-macro2", - "quote", - "syn 2.0.96", + "litrs", ] [[package]] -name = "embedded-dma" +name = "embassy-embedded-hal" +version = "0.5.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "554e3e840696f54b4c9afcf28a0f24da431c927f4151040020416e7393d6d0d8" +dependencies = [ + "defmt 1.0.1", + "embassy-futures", + "embassy-hal-internal", + "embassy-sync", + "embedded-hal 0.2.7", + "embedded-hal 1.0.0", + "embedded-hal-async", + "embedded-storage", + "embedded-storage-async", + "nb 1.1.0", +] + +[[package]] +name = "embassy-futures" +version = "0.1.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "dc2d050bdc5c21e0862a89256ed8029ae6c290a93aecefc73084b3002cdebb01" + +[[package]] +name = "embassy-hal-internal" +version = "0.3.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "95285007a91b619dc9f26ea8f55452aa6c60f7115a4edc05085cd2bd3127cd7a" +dependencies = [ + "cortex-m", + "critical-section", + "defmt 1.0.1", + "num-traits", +] + +[[package]] +name = "embassy-net-driver" version = "0.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "994f7e5b5cb23521c22304927195f236813053eb9c065dd2226a32ba64695446" +checksum = "524eb3c489760508f71360112bca70f6e53173e6fe48fc5f0efd0f5ab217751d" dependencies = [ - "stable_deref_trait", + "defmt 0.3.100", +] + +[[package]] +name = "embassy-stm32" +version = "0.4.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0d972eab325cc96afee98f80a91ca6b00249b6356dc0fdbff68b70c200df9fae" +dependencies = [ + "aligned", + "bit_field", + "bitflags 2.10.0", + "block-device-driver", + "cfg-if", + "cortex-m", + "cortex-m-rt", + "critical-section", + "defmt 1.0.1", + "document-features", + "embassy-embedded-hal", + "embassy-futures", + "embassy-hal-internal", + "embassy-net-driver", + "embassy-sync", + "embassy-time", + "embassy-usb-driver", + "embassy-usb-synopsys-otg", + "embedded-can", + "embedded-hal 0.2.7", + "embedded-hal 1.0.0", + "embedded-hal-async", + "embedded-hal-nb", + "embedded-io", + "embedded-io-async", + "embedded-storage", + "embedded-storage-async", + "futures-util", + "nb 1.1.0", + "proc-macro2", + "quote", + "rand_core 0.6.4", + "rand_core 0.9.3", + "sdio-host", + "static_assertions", + "stm32-fmc", + "stm32-metapac", + "vcell", + "volatile-register", +] + +[[package]] +name = "embassy-sync" +version = "0.7.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "73974a3edbd0bd286759b3d483540f0ebef705919a5f56f4fc7709066f71689b" +dependencies = [ + "cfg-if", + "critical-section", + "defmt 1.0.1", + "embedded-io-async", + "futures-core", + "futures-sink", + "heapless 0.8.0", +] + +[[package]] +name = "embassy-time" +version = "0.5.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f4fa65b9284d974dad7a23bb72835c4ec85c0b540d86af7fc4098c88cff51d65" +dependencies = [ + "cfg-if", + "critical-section", + "defmt 1.0.1", + "document-features", + "embassy-time-driver", + "embedded-hal 0.2.7", + "embedded-hal 1.0.0", + "embedded-hal-async", + "futures-core", +] + +[[package]] +name = "embassy-time-driver" +version = "0.2.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a0a244c7dc22c8d0289379c8d8830cae06bb93d8f990194d0de5efb3b5ae7ba6" +dependencies = [ + "document-features", +] + +[[package]] +name = "embassy-usb-driver" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "17119855ccc2d1f7470a39756b12068454ae27a3eabb037d940b5c03d9c77b7a" +dependencies = [ + "defmt 1.0.1", + "embedded-io-async", +] + +[[package]] +name = "embassy-usb-synopsys-otg" +version = "0.3.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "288751f8eaa44a5cf2613f13cee0ca8e06e6638cb96e897e6834702c79084b23" +dependencies = [ + "critical-section", + "defmt 1.0.1", + "embassy-sync", + "embassy-usb-driver", +] + +[[package]] +name = "embedded-can" +version = "0.4.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "e9d2e857f87ac832df68fa498d18ddc679175cf3d2e4aa893988e5601baf9438" +dependencies = [ + "nb 1.1.0", ] [[package]] @@ -320,40 +553,92 @@ dependencies = [ ] [[package]] -name = "embedded-time" -version = "0.12.1" +name = "embedded-hal-bus" +version = "0.3.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d7a4b4d10ac48d08bfe3db7688c402baadb244721f30a77ce360bd24c3dffe58" +checksum = "513e0b3a8fb7d3013a8ae17a834283f170deaf7d0eeab0a7c1a36ad4dd356d22" dependencies = [ - "num", + "critical-section", + "embedded-hal 1.0.0", + "embedded-hal-async", +] + +[[package]] +name = "embedded-hal-nb" +version = "1.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "fba4268c14288c828995299e59b12babdbe170f6c6d73731af1b4648142e8605" +dependencies = [ + "embedded-hal 1.0.0", + "nb 1.1.0", +] + +[[package]] +name = "embedded-io" +version = "0.6.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "edd0f118536f44f5ccd48bcb8b111bdc3de888b58c74639dfb034a357d0f206d" +dependencies = [ + "defmt 0.3.100", +] + +[[package]] +name = "embedded-io-async" +version = "0.6.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "3ff09972d4073aa8c299395be75161d582e7629cd663171d62af73c8d50dba3f" +dependencies = [ + "defmt 0.3.100", + "embedded-io", +] + +[[package]] +name = "embedded-storage" +version = "0.3.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a21dea9854beb860f3062d10228ce9b976da520a73474aed3171ec276bc0c032" + +[[package]] +name = "embedded-storage-async" +version = "0.4.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1763775e2323b7d5f0aa6090657f5e21cfa02ede71f5dc40eead06d64dcd15cc" +dependencies = [ + "embedded-storage", ] [[package]] name = "enumset" -version = "1.1.5" +version = "1.1.10" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d07a4b049558765cef5f0c1a273c3fc57084d768b44d2f98127aef4cceb17293" +checksum = "25b07a8dfbbbfc0064c0a6bdf9edcf966de6b1c33ce344bdeca3b41615452634" dependencies = [ "enumset_derive", ] [[package]] name = "enumset_derive" -version = "0.10.0" +version = "0.14.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "59c3b24c345d8c314966bdc1832f6c2635bfcce8e7cf363bd115987bba2ee242" +checksum = "f43e744e4ea338060faee68ed933e46e722fb7f3617e722a5772d7e856d8b3ce" dependencies = [ "darling", "proc-macro2", "quote", - "syn 2.0.96", + "syn", ] [[package]] name = "equivalent" -version = "1.0.1" +version = "1.0.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5443807d6dff69373d433ab9ef5378ad8df50ca6298caf15de6e52e24aaf54d5" +checksum = "877a4ace8713b0bcf2a4e7eec82529c029f1d0619886d18145fea96c3ffe5c0f" + +[[package]] +name = "find-msvc-tools" +version = "0.1.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "52051878f80a721bb68ebfbc930e07b65ba72f2da88968ea5c06fd6ca3d3a127" [[package]] name = "fnv" @@ -376,6 +661,12 @@ version = "0.3.31" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "05f29059c0c2090612e8d742178b0580d2dc940c837851ad723096f87af6663e" +[[package]] +name = "futures-sink" +version = "0.3.31" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "e575fab7d1e0dcb8d0c7bcf9a63ee213816ab51902e6d244a95819acacf1d4f7" + [[package]] name = "futures-task" version = "0.3.31" @@ -401,22 +692,26 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "1d758ba1b47b00caf47f24925c0074ecb20d6dfcffe7f6d53395c0465674841a" [[package]] -name = "generic-array" -version = "0.11.2" +name = "generator" +version = "0.8.7" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "667f6ea017b297ec65b8a108c6e9ad6879460721fb3b6b23abf690970147fc28" +checksum = "605183a538e3e2a9c1038635cc5c2d194e2ee8fd0d1b66b8349fad7dbacce5a2" dependencies = [ - "typenum", + "cc", + "cfg-if", + "libc", + "log", + "rustversion", + "windows", ] [[package]] -name = "generic-array" -version = "0.14.7" +name = "hash32" +version = "0.2.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "85649ca51fd72272d7821adaf274ad91c288277713d9c18820d8499a7ff69e9a" +checksum = "b0c35f58762feb77d74ebe43bdbc3210f09be9fe6742234d573bacc26ed92b67" dependencies = [ - "typenum", - "version_check", + "byteorder", ] [[package]] @@ -430,9 +725,23 @@ dependencies = [ [[package]] name = "hashbrown" -version = "0.15.2" +version = "0.16.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "bf151400ff0baff5465007dd2f3e717f3fe502074ca563069ce3a6629d07b289" +checksum = "5419bdc4f6a9207fbeba6d11b604d481addf78ecd10c11ad51e76c2f6482748d" + +[[package]] +name = "heapless" +version = "0.7.17" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "cdc6457c0eb62c71aac4bc17216026d8410337c4126773b9c5daba343f17964f" +dependencies = [ + "atomic-polyfill", + "hash32 0.2.1", + "rustc_version 0.4.1", + "serde", + "spin", + "stable_deref_trait", +] [[package]] name = "heapless" @@ -440,7 +749,17 @@ version = "0.8.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "0bfb9eb618601c89945a70e254898da93b13be0388091d42117462b265bb3fad" dependencies = [ - "hash32", + "hash32 0.3.1", + "stable_deref_trait", +] + +[[package]] +name = "heapless" +version = "0.9.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b1edcd5a338e64688fbdcb7531a846cfd3476a54784dcb918a0844682bc7ada5" +dependencies = [ + "hash32 0.3.1", "stable_deref_trait", ] @@ -452,34 +771,76 @@ checksum = "b9e0384b61958566e926dc50660321d12159025e767c18e043daf26b70104c39" [[package]] name = "indexmap" -version = "2.7.1" +version = "2.12.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8c9c992b02b5b4c94ea26e32fe5bccb7aa7d9f390ab5c1221ff895bc7ea8b652" +checksum = "6717a8d2a5a929a1a2eb43a12812498ed141a0bcfb7e8f7844fbdbe4303bba9f" dependencies = [ "equivalent", "hashbrown", ] [[package]] -name = "lsm303dlhc" -version = "0.2.0" +name = "lazy_static" +version = "1.5.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "9e5d1a5c290951321d1b0d4a40edd828537de9889134a0e67c5146542ae57706" +checksum = "bbd2bcb4c963f2ddae06a2efc7e9f3591312473c50c6685e1f298068316e66fe" + +[[package]] +name = "libc" +version = "0.2.177" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "2874a2af47a2325c2001a6e6fad9b16a53b802102b528163885171cf92b15976" + +[[package]] +name = "litrs" +version = "1.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "11d3d7f243d5c5a8b9bb5d6dd2b1602c0cb0b9db1621bafc7ed66e35ff9fe092" + +[[package]] +name = "lock_api" +version = "0.4.14" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "224399e74b87b5f3557511d98dff8b14089b3dadafcab6bb93eab67d3aace965" dependencies = [ - "cast", - "embedded-hal 0.2.7", - "generic-array 0.11.2", + "scopeguard", ] [[package]] -name = "micromath" -version = "1.1.1" +name = "log" +version = "0.4.28" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "bc4010833aea396656c2f91ee704d51a6f1329ec2ab56ffd00bfd56f7481ea94" +checksum = "34080505efa8e45a4b816c349525ebe327ceaa8559756f0356cba97ef3bf7432" + +[[package]] +name = "loom" +version = "0.7.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "419e0dc8046cb947daa77eb95ae174acfbddb7673b4151f56d1eed8e93fbfaca" dependencies = [ - "generic-array 0.14.7", + "cfg-if", + "generator", + "pin-utils", + "scoped-tls", + "tracing", + "tracing-subscriber", ] +[[package]] +name = "matchers" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d1525a2a28c7f4fa0fc98bb91ae755d1e2d1505079e05539e35bc876b5d65ae9" +dependencies = [ + "regex-automata", +] + +[[package]] +name = "memchr" +version = "2.7.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f52b00d39961fc5b2736ea853c9cc86238e165017a493d1d5c8eac6bdc4cc273" + [[package]] name = "nb" version = "0.1.3" @@ -496,56 +857,12 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "8d5439c4ad607c3c23abf66de8c8bf57ba8adcd1f129e699851a6e43935d339d" [[package]] -name = "num" -version = "0.3.1" +name = "nu-ansi-term" +version = "0.50.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8b7a8e9be5e039e2ff869df49155f1c06bd01ade2117ec783e56ab0932b67a8f" +checksum = "7957b9740744892f114936ab4a57b3f487491bbeafaf8083688b16841a4240e5" dependencies = [ - "num-complex", - "num-integer", - "num-iter", - "num-rational", - "num-traits", -] - -[[package]] -name = "num-complex" -version = "0.3.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "747d632c0c558b87dbabbe6a82f3b4ae03720d0646ac5b7b4dae89394be5f2c5" -dependencies = [ - "num-traits", -] - -[[package]] -name = "num-integer" -version = "0.1.46" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7969661fd2958a5cb096e56c8e1ad0444ac2bbcd0061bd28660485a44879858f" -dependencies = [ - "num-traits", -] - -[[package]] -name = "num-iter" -version = "0.1.45" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1429034a0490724d0075ebb2bc9e875d6503c3cf69e235a8941aa757d83ef5bf" -dependencies = [ - "autocfg", - "num-integer", - "num-traits", -] - -[[package]] -name = "num-rational" -version = "0.3.2" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "12ac428b1cb17fce6f731001d307d351ec70a6d202fc2e60f7d4c5e42d8f4f07" -dependencies = [ - "autocfg", - "num-integer", - "num-traits", + "windows-sys", ] [[package]] @@ -559,32 +876,39 @@ dependencies = [ [[package]] name = "num_enum" -version = "0.7.3" +version = "0.7.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4e613fc340b2220f734a8595782c551f1250e969d87d3be1ae0579e8d4065179" +checksum = "b1207a7e20ad57b847bbddc6776b968420d38292bbfe2089accff5e19e82454c" dependencies = [ "num_enum_derive", + "rustversion", ] [[package]] name = "num_enum_derive" -version = "0.7.3" +version = "0.7.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "af1844ef2428cc3e1cb900be36181049ef3d3193c63e43026cfe202983b27a56" +checksum = "ff32365de1b6743cb203b710788263c44a03de03802daf96092f2da4fe6ba4d7" dependencies = [ "proc-macro2", "quote", - "syn 2.0.96", + "syn", ] [[package]] -name = "panic-probe" -version = "0.3.2" +name = "once_cell" +version = "1.21.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4047d9235d1423d66cc97da7d07eddb54d4f154d6c13805c6d0793956f4f25b0" +checksum = "42f5e15c9953c5e4ccceeb2e7382a716482c34515315f7b03532b8b4e8393d2d" + +[[package]] +name = "panic-probe" +version = "1.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "fd402d00b0fb94c5aee000029204a46884b1262e0c443f166d86d2c0747e1a1a" dependencies = [ "cortex-m", - "defmt", + "defmt 1.0.1", ] [[package]] @@ -607,9 +931,20 @@ checksum = "8b870d8c151b6f2fb93e84a13146138f05d02ed11c7e7c54f8826aaaf7c9f184" [[package]] name = "portable-atomic" -version = "1.10.0" +version = "1.11.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "280dc24453071f1b63954171985a0b0d30058d287960968b9b2aca264c8d4ee6" +checksum = "f84267b20a16ea918e43c6a88433c2d54fa145c92a811b5b047ccbe153674483" + +[[package]] +name = "postcard" +version = "1.1.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "6764c3b5dd454e283a30e6dfe78e9b31096d9e32036b5d1eaac7a6119ccb9a24" +dependencies = [ + "cobs 0.3.0", + "heapless 0.7.17", + "serde", +] [[package]] name = "proc-macro-error-attr2" @@ -630,41 +965,61 @@ dependencies = [ "proc-macro-error-attr2", "proc-macro2", "quote", - "syn 2.0.96", + "syn", ] [[package]] name = "proc-macro2" -version = "1.0.93" +version = "1.0.103" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "60946a68e5f9d28b0dc1c21bb8a97ee7d018a8b322fa57838ba31cc878e22d99" +checksum = "5ee95bc4ef87b8d5ba32e8b7714ccc834865276eab0aed5c9958d00ec45f49e8" dependencies = [ "unicode-ident", ] [[package]] name = "quote" -version = "1.0.38" +version = "1.0.41" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0e4dccaaaf89514f546c693ddc140f729f958c247918a13380cccc6078391acc" +checksum = "ce25767e7b499d1b604768e7cde645d14cc8584231ea6b295e9c9eb22c02e1d1" dependencies = [ "proc-macro2", ] [[package]] -name = "rtcc" -version = "0.3.2" +name = "rand_core" +version = "0.6.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "95973c3a0274adc4f3c5b70d2b5b85618d6de9559a6737d3293ecae9a2fc0839" +checksum = "ec0be4795e2f6a28069bec0b5ff3e2ac9bafc99e6a9a7dc3547996c5c816922c" + +[[package]] +name = "rand_core" +version = "0.9.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "99d9a13982dcf210057a8a78572b2217b667c3beacbf3a0d8b454f6f82837d38" + +[[package]] +name = "regex-automata" +version = "0.4.13" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "5276caf25ac86c8d810222b3dbb938e512c55c6831a10f3e6ed1c93b84041f1c" dependencies = [ - "chrono", + "aho-corasick", + "memchr", + "regex-syntax", ] [[package]] -name = "rtic" -version = "2.1.2" +name = "regex-syntax" +version = "0.8.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "401961431a1e491124cdd216a313fada2d395aa2b5bee2867c872fc8af7c1bc1" +checksum = "7a2d987857b319362043e95f5353c0535c1f58eec5336fdfcf626430af7def58" + +[[package]] +name = "rtic" +version = "2.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "6bc68b1fa2eefbb7ad6747b299b79c8fca92163dfa46f0e279f39109cf272186" dependencies = [ "bare-metal 1.0.0", "cortex-m", @@ -676,11 +1031,12 @@ dependencies = [ [[package]] name = "rtic-common" -version = "1.0.0" +version = "1.1.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0786b50b81ef9d2a944a000f60405bb28bf30cd45da2d182f3fe636b2321f35c" +checksum = "67caeecca87cb20e1101eb104b0f05604633b7ab1035cce777417c6fb7c8f9a0" dependencies = [ "critical-section", + "portable-atomic", ] [[package]] @@ -691,22 +1047,22 @@ checksum = "d9369355b04d06a3780ec0f51ea2d225624db777acbc60abd8ca4832da5c1a42" [[package]] name = "rtic-macros" -version = "2.1.2" +version = "2.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ac22ab522d80079b48f46ac66ded4d349e1adf81b52430d6a74faa3a7790ed80" +checksum = "f387b12bd6c01d2c9d4776dddeefaf0ae51b9497c83c0186b1693f6821ff3c4a" dependencies = [ "indexmap", "proc-macro-error2", "proc-macro2", "quote", - "syn 2.0.96", + "syn", ] [[package]] name = "rtic-monotonics" -version = "2.0.3" +version = "2.1.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f1cb90bcfdbbacf3ca37340cdab52ec2de5611c744095ef7889e9c50c233b748" +checksum = "99f9923ce32637ee40c0cb28fbbc2fad880d8aebea2d545918c6971ae9be3d17" dependencies = [ "cfg-if", "cortex-m", @@ -716,10 +1072,26 @@ dependencies = [ ] [[package]] -name = "rtic-time" -version = "2.0.0" +name = "rtic-sync" +version = "1.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a7b1d853fa50dc125695414ce4510567a0d420221e455b1568cfa8c9aece9614" +checksum = "d378d811a8e25411a139f1428804e390fb2dc9b5bcf84e880a19c25feaa89a2a" +dependencies = [ + "critical-section", + "embedded-hal 1.0.0", + "embedded-hal-async", + "embedded-hal-bus", + "heapless 0.8.0", + "loom", + "portable-atomic", + "rtic-common", +] + +[[package]] +name = "rtic-time" +version = "2.0.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "61485474f5a23247ae1d4875f2bfe860be9b3030dbf87c232e50799e021429a1" dependencies = [ "critical-section", "embedded-hal 1.0.0", @@ -744,59 +1116,60 @@ version = "0.4.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "cfcb3a22ef46e85b45de6ee7e79d063319ebb6594faafcf1c225ea92ab6e9b92" dependencies = [ - "semver 1.0.25", + "semver 1.0.27", ] [[package]] -name = "satrs" -version = "0.2.1" +name = "rustversion" +version = "1.0.22" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "866fcae3b683ccc37b5ad77982483a0ee01d5dc408dea5aad2117ad404b60fe1" -dependencies = [ - "cobs 0.2.3", - "crc", - "defmt", - "delegate", - "derive-new", - "num-traits", - "num_enum", - "paste", - "satrs-shared", - "smallvec", - "spacepackets", -] - -[[package]] -name = "satrs-shared" -version = "0.1.4" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6042477018c2d43fffccaaa5099bc299a58485139b4d31c5b276889311e474f1" -dependencies = [ - "spacepackets", -] +checksum = "b39cdef0fa800fc44525c84ccb54a029961a8215f9619753635a9c0d2538d46d" [[package]] name = "satrs-stm32f3-disco-rtic" version = "0.1.0" dependencies = [ - "cobs 0.3.0", + "arbitrary-int 2.0.0", + "cobs 0.5.0", "cortex-m", "cortex-m-rt", "cortex-m-semihosting", - "defmt", - "defmt-brtt", + "defmt 1.0.1", + "defmt-rtt", "defmt-test", - "embedded-hal 0.2.7", + "embassy-stm32", + "embedded-hal 1.0.0", "enumset", - "heapless", + "heapless 0.9.1", "panic-probe", + "postcard", "rtic", "rtic-monotonics", - "satrs", - "stm32f3-discovery", - "stm32f3xx-hal", + "rtic-sync", + "serde", + "spacepackets", + "static_cell", + "thiserror", ] +[[package]] +name = "scoped-tls" +version = "1.0.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "e1cf6437eb19a8f4a6cc0f7dca544973b0b78843adbfeb3683d1a94a0024a294" + +[[package]] +name = "scopeguard" +version = "1.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "94143f37725109f92c262ed2cf5e59bce7498c01bcc1502d7b9afe439a4e9f49" + +[[package]] +name = "sdio-host" +version = "0.9.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b328e2cb950eeccd55b7f55c3a963691455dcd044cfb5354f0c5e68d2c2d6ee2" + [[package]] name = "semver" version = "0.9.0" @@ -808,9 +1181,9 @@ dependencies = [ [[package]] name = "semver" -version = "1.0.25" +version = "1.0.27" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f79dfe2d285b0488816f30e700a7438c5a73d816b5b7d3ac72fbc48b0d185e03" +checksum = "d767eb0aabc880b29956c35734170f26ed551a859dbd361d140cdbeca61ab1e2" [[package]] name = "semver-parser" @@ -819,122 +1192,130 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "388a1df253eca08550bef6c72392cfe7c30914bf41df5269b68cbd6ff8f570a3" [[package]] -name = "slice-group-by" -version = "0.3.1" +name = "serde" +version = "1.0.228" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "826167069c09b99d56f31e9ae5c99049e932a98c9dc2dac47645b08dbbf76ba7" +checksum = "9a8e94ea7f378bd32cbbd37198a4a91436180c5bb472411e48b5ec2e2124ae9e" +dependencies = [ + "serde_core", + "serde_derive", +] + +[[package]] +name = "serde_core" +version = "1.0.228" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "41d385c7d4ca58e59fc732af25c3983b67ac852c1a25000afe1175de458b67ad" +dependencies = [ + "serde_derive", +] + +[[package]] +name = "serde_derive" +version = "1.0.228" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d540f220d3187173da220f885ab66608367b6574e925011a9353e4badda91d79" +dependencies = [ + "proc-macro2", + "quote", + "syn", +] + +[[package]] +name = "sharded-slab" +version = "0.1.7" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f40ca3c46823713e0d4209592e8d6e826aa57e928f09752619fc696c499637f6" +dependencies = [ + "lazy_static", +] + +[[package]] +name = "shlex" +version = "1.3.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0fda2ff0d084019ba4d7c6f371c95d8fd75ce3524c3cb8fb653a3023f6323e64" [[package]] name = "smallvec" -version = "1.13.2" +version = "1.15.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3c5e1a9a646d36c3599cd173a41282daf47c44583ad367b8e6837255952e5c67" +checksum = "67b1b7a3b5fe4f1376887184045fcf45c69e92af734b7aaddc05fb777b6fbd03" [[package]] name = "spacepackets" -version = "0.11.2" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e85574d113a06312010c0ba51aadccd4ba2806231ebe9a49fc6473d0534d8696" +version = "0.17.0" +source = "git+https://egit.irs.uni-stuttgart.de/rust/spacepackets.git#8e2e0ce632693325bfb971b6b0286933297f34d9" dependencies = [ + "arbitrary-int 2.0.0", + "bitbybit", + "chrono", "crc", - "defmt", + "defmt 1.0.1", "delegate", "num-traits", "num_enum", + "paste", + "serde", + "thiserror", "zerocopy", ] +[[package]] +name = "spin" +version = "0.9.8" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "6980e8d7511241f8acf4aebddbb1ff938df5eebe98691418c4468d0b72a96a67" +dependencies = [ + "lock_api", +] + [[package]] name = "stable_deref_trait" -version = "1.2.0" +version = "1.2.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a8f112729512f8e442d81f95a8a7ddf2b7c6b8a1a6f509a95864142b30cab2d3" +checksum = "6ce2be8dc25455e1f91df71bfa12ad37d7af1092ae736f3a6cd0e37bc7810596" [[package]] -name = "stm32-usbd" -version = "0.6.0" +name = "static_assertions" +version = "1.1.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c6c94998f166d66b210a164648a0b7866428d8f1e0740bf8a4c5edd89d4750c1" +checksum = "a2eb9349b6444b326872e140eb1cf5e7c522154d69e7a0ffb0fb81c06b37543f" + +[[package]] +name = "static_cell" +version = "2.1.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0530892bb4fa575ee0da4b86f86c667132a94b74bb72160f58ee5a4afec74c23" dependencies = [ - "cortex-m", - "usb-device", - "vcell", + "portable-atomic", ] [[package]] -name = "stm32f3" -version = "0.15.1" +name = "stm32-fmc" +version = "0.3.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b28b37228ef3fa47956af38c6abd756e912f244c1657f14e66d42fc8d74ea96f" -dependencies = [ - "bare-metal 1.0.0", - "cortex-m", - "cortex-m-rt", - "vcell", -] - -[[package]] -name = "stm32f3-discovery" -version = "0.8.0-alpha.0" -source = "git+https://github.com/robamu/stm32f3-discovery?branch=complete-dma-update-hal#5ccacae07ceff02d7d3649df67a6a0ba2a144752" -dependencies = [ - "accelerometer", - "cortex-m", - "cortex-m-rt", - "lsm303dlhc", - "stm32f3xx-hal", - "switch-hal", -] - -[[package]] -name = "stm32f3xx-hal" -version = "0.11.0-alpha.0" -source = "git+https://github.com/robamu/stm32f3xx-hal?branch=complete-dma-update#04fc76b7912649c84b57bd0ab803ea3ccf2aadae" -dependencies = [ - "bxcan", - "cfg-if", - "cortex-m", - "cortex-m-rt", - "critical-section", - "embedded-dma", - "embedded-hal 0.2.7", - "embedded-time", - "enumset", - "nb 1.1.0", - "num-traits", - "paste", - "rtcc", - "slice-group-by", - "stm32-usbd", - "stm32f3", - "void", -] - -[[package]] -name = "switch-hal" -version = "0.4.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "90a4adc8cbd1726249b161898e48e0f3f1ce74d34dc784cbbc98fba4ed283fbf" +checksum = "c7f0639399e2307c2446c54d91d4f1596343a1e1d5cab605b9cce11d0ab3858c" dependencies = [ "embedded-hal 0.2.7", ] [[package]] -name = "syn" -version = "1.0.109" +name = "stm32-metapac" +version = "18.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "72b64191b275b66ffe2469e8af2c1cfe3bafa67b529ead792a6d0160888b4237" +checksum = "6fd8ec3a292a0d9fc4798416a61b21da5ae50341b2e7b8d12e662bf305366097" dependencies = [ - "proc-macro2", - "quote", - "unicode-ident", + "cortex-m", + "cortex-m-rt", + "defmt 0.3.100", ] [[package]] name = "syn" -version = "2.0.96" +version = "2.0.108" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d5d0adab1ae378d7f53bdebc67a39f1f151407ef230f0ce2883572f5d8985c80" +checksum = "da58917d35242480a05c2897064da0a80589a2a0476c9a3f2fdc83b53502e917" dependencies = [ "proc-macro2", "quote", @@ -943,41 +1324,93 @@ dependencies = [ [[package]] name = "thiserror" -version = "2.0.11" +version = "2.0.17" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d452f284b73e6d76dd36758a0c8684b1d5be31f92b89d07fd5822175732206fc" +checksum = "f63587ca0f12b72a0600bcba1d40081f830876000bb46dd2337a3051618f4fc8" dependencies = [ "thiserror-impl", ] [[package]] name = "thiserror-impl" -version = "2.0.11" +version = "2.0.17" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "26afc1baea8a989337eeb52b6e72a039780ce45c3edfcc9c5b9d112feeb173c2" +checksum = "3ff15c8ecd7de3849db632e14d18d2571fa09dfc5ed93479bc4485c7a517c913" dependencies = [ "proc-macro2", "quote", - "syn 2.0.96", + "syn", ] [[package]] -name = "typenum" -version = "1.17.0" +name = "thread_local" +version = "1.1.9" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "42ff0bf0c66b8238c6f3b578df37d0b7848e55df8577b3f74f92a69acceeb825" +checksum = "f60246a4944f24f6e018aa17cdeffb7818b76356965d03b07d6a9886e8962185" +dependencies = [ + "cfg-if", +] + +[[package]] +name = "tracing" +version = "0.1.41" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "784e0ac535deb450455cbfa28a6f0df145ea1bb7ae51b821cf5e7927fdcfbdd0" +dependencies = [ + "pin-project-lite", + "tracing-core", +] + +[[package]] +name = "tracing-core" +version = "0.1.34" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b9d12581f227e93f094d3af2ae690a574abb8a2b9b7a96e7cfe9647b2b617678" +dependencies = [ + "once_cell", + "valuable", +] + +[[package]] +name = "tracing-log" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ee855f1f400bd0e5c02d150ae5de3840039a3f54b025156404e34c23c03f47c3" +dependencies = [ + "log", + "once_cell", + "tracing-core", +] + +[[package]] +name = "tracing-subscriber" +version = "0.3.20" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "2054a14f5307d601f88daf0553e1cbf472acc4f2c51afab632431cdcd72124d5" +dependencies = [ + "matchers", + "nu-ansi-term", + "once_cell", + "regex-automata", + "sharded-slab", + "smallvec", + "thread_local", + "tracing", + "tracing-core", + "tracing-log", +] [[package]] name = "unicode-ident" -version = "1.0.16" +version = "1.0.20" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a210d160f08b701c8721ba1c726c11662f877ea6b7094007e1ca9a1041945034" +checksum = "462eeb75aeb73aea900253ce739c8e18a67423fadf006037cd3ff27e82748a06" [[package]] -name = "usb-device" -version = "0.2.9" +name = "valuable" +version = "0.1.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1f6cc3adc849b5292b4075fc0d5fdcf2f24866e88e336dd27a8943090a520508" +checksum = "ba73ea9cf16a25df0c8caa16c51acb937d5712a8429db78a3ee29d5dcacd3a65" [[package]] name = "vcell" @@ -985,12 +1418,6 @@ version = "0.1.3" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "77439c1b53d2303b20d9459b1ade71a83c716e3f9c34f3228c00e6f185d6c002" -[[package]] -name = "version_check" -version = "0.9.5" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0b928f33d975fc6ad9f86c8f283853ad26bdd5b10b7f1542aa2fa15e2289105a" - [[package]] name = "void" version = "1.0.2" @@ -1007,22 +1434,147 @@ dependencies = [ ] [[package]] -name = "zerocopy" -version = "0.7.35" +name = "windows" +version = "0.61.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1b9b4fd18abc82b8136838da5d50bae7bdea537c574d8dc1a34ed098d6c166f0" +checksum = "9babd3a767a4c1aef6900409f85f5d53ce2544ccdfaa86dad48c91782c6d6893" +dependencies = [ + "windows-collections", + "windows-core", + "windows-future", + "windows-link 0.1.3", + "windows-numerics", +] + +[[package]] +name = "windows-collections" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "3beeceb5e5cfd9eb1d76b381630e82c4241ccd0d27f1a39ed41b2760b255c5e8" +dependencies = [ + "windows-core", +] + +[[package]] +name = "windows-core" +version = "0.61.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "c0fdd3ddb90610c7638aa2b3a3ab2904fb9e5cdbecc643ddb3647212781c4ae3" +dependencies = [ + "windows-implement", + "windows-interface", + "windows-link 0.1.3", + "windows-result", + "windows-strings", +] + +[[package]] +name = "windows-future" +version = "0.2.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "fc6a41e98427b19fe4b73c550f060b59fa592d7d686537eebf9385621bfbad8e" +dependencies = [ + "windows-core", + "windows-link 0.1.3", + "windows-threading", +] + +[[package]] +name = "windows-implement" +version = "0.60.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "053e2e040ab57b9dc951b72c264860db7eb3b0200ba345b4e4c3b14f67855ddf" +dependencies = [ + "proc-macro2", + "quote", + "syn", +] + +[[package]] +name = "windows-interface" +version = "0.59.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "3f316c4a2570ba26bbec722032c4099d8c8bc095efccdc15688708623367e358" +dependencies = [ + "proc-macro2", + "quote", + "syn", +] + +[[package]] +name = "windows-link" +version = "0.1.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "5e6ad25900d524eaabdbbb96d20b4311e1e7ae1699af4fb28c17ae66c80d798a" + +[[package]] +name = "windows-link" +version = "0.2.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f0805222e57f7521d6a62e36fa9163bc891acd422f971defe97d64e70d0a4fe5" + +[[package]] +name = "windows-numerics" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "9150af68066c4c5c07ddc0ce30421554771e528bde427614c61038bc2c92c2b1" +dependencies = [ + "windows-core", + "windows-link 0.1.3", +] + +[[package]] +name = "windows-result" +version = "0.3.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "56f42bd332cc6c8eac5af113fc0c1fd6a8fd2aa08a0119358686e5160d0586c6" +dependencies = [ + "windows-link 0.1.3", +] + +[[package]] +name = "windows-strings" +version = "0.4.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "56e6c93f3a0c3b36176cb1327a4958a0353d5d166c2a35cb268ace15e91d3b57" +dependencies = [ + "windows-link 0.1.3", +] + +[[package]] +name = "windows-sys" +version = "0.61.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ae137229bcbd6cdf0f7b80a31df61766145077ddf49416a728b02cb3921ff3fc" +dependencies = [ + "windows-link 0.2.1", +] + +[[package]] +name = "windows-threading" +version = "0.1.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b66463ad2e0ea3bbf808b7f1d371311c80e115c0b71d60efc142cafbcfb057a6" +dependencies = [ + "windows-link 0.1.3", +] + +[[package]] +name = "zerocopy" +version = "0.8.27" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0894878a5fa3edfd6da3f88c4805f4c8558e2b996227a3d864f47fe11e38282c" dependencies = [ - "byteorder", "zerocopy-derive", ] [[package]] name = "zerocopy-derive" -version = "0.7.35" +version = "0.8.27" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "fa4f8080344d4671fb4e831a13ad1e68092748387dfc4f55e356242fae12ce3e" +checksum = "88d2b8d9c68ad2b9e4340d7832716a4d21a22a1154777ad56ea55c51a9cf3831" dependencies = [ "proc-macro2", "quote", - "syn 2.0.96", + "syn", ] diff --git a/embedded-examples/stm32f3-disco-rtic/Cargo.toml b/embedded-examples/stm32f3-disco-rtic/Cargo.toml index 2c46000..51f020c 100644 --- a/embedded-examples/stm32f3-disco-rtic/Cargo.toml +++ b/embedded-examples/stm32f3-disco-rtic/Cargo.toml @@ -9,49 +9,33 @@ default-run = "satrs-stm32f3-disco-rtic" [dependencies] cortex-m = { version = "0.7", features = ["critical-section-single-core"] } cortex-m-rt = "0.7" -defmt = "0.3" -defmt-brtt = { version = "0.1", default-features = false, features = ["rtt"] } -panic-probe = { version = "0.3", features = ["print-defmt"] } -embedded-hal = "0.2.7" +defmt = "1" +defmt-rtt = { version = "1" } +panic-probe = { version = "1", features = ["print-defmt"] } +embedded-hal = "1" cortex-m-semihosting = "0.5.0" +embassy-stm32 = { version = "0.4", features = ["defmt", "stm32f303vc", "unstable-pac"] } enumset = "1" -heapless = "0.8" +heapless = "0.9" +spacepackets = { version = "0.17", git = "https://egit.irs.uni-stuttgart.de/rust/spacepackets.git", default-features = false, features = ["defmt", "serde"] } +static_cell = "2" +cobs = { version = "0.5", default-features = false, features = ["defmt"] } +postcard = { version = "1" } +arbitrary-int = "2" +thiserror = { version = "2", default-features = false } +serde = { version = "1", default-features = false, features = ["derive"] } -[dependencies.rtic] -version = "2" -features = ["thumbv7-backend"] +rtic = { version = "2", features = ["thumbv7-backend"] } +rtic-sync = { version = "1" } +rtic-monotonics = { version = "2", features = ["cortex-m-systick"] } -[dependencies.rtic-monotonics] -version = "2" -features = ["cortex-m-systick"] - -[dependencies.cobs] -version = "0.3" -default-features = false - -[dependencies.stm32f3xx-hal] -git = "https://github.com/robamu/stm32f3xx-hal" -version = "0.11.0-alpha.0" -features = ["stm32f303xc", "rt", "enumset"] -branch = "complete-dma-update" -# Can be used in workspace to develop and update HAL -# path = "../stm32f3xx-hal" - -[dependencies.stm32f3-discovery] -git = "https://github.com/robamu/stm32f3-discovery" -version = "0.8.0-alpha.0" -branch = "complete-dma-update-hal" -# Can be used in workspace to develop and update BSP -# path = "../stm32f3-discovery" - -[dependencies.satrs] -# path = "satrs" -version = "0.2" -default-features = false -features = ["defmt"] +#[dependencies.satrs] +# path = "../../satrs" +#default-features = false +# features = ["defmt"] [dev-dependencies] -defmt-test = "0.3" +defmt-test = "0.4" # cargo test [profile.test] diff --git a/embedded-examples/stm32f3-disco-rtic/STM32F303.svd b/embedded-examples/stm32f3-disco-rtic/STM32F303.svd deleted file mode 100644 index 63fb761..0000000 --- a/embedded-examples/stm32f3-disco-rtic/STM32F303.svd +++ /dev/null @@ -1,38601 +0,0 @@ - - - - STM32F303 - 1.8 - STM32F303 - - CM4 - r1p0 - little - true - true - 3 - false - - 8 - 32 - 0x20 - 0x0 - 0xFFFFFFFF - - - GPIOA - General-purpose I/Os - GPIO - 0x48000000 - - 0x0 - 0x400 - registers - - - - MODER - MODER - GPIO port mode register - 0x0 - 0x20 - read-write - 0x28000000 - - - MODER15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - MODER14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - MODER13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - MODER12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - MODER11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - MODER10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - MODER9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - MODER8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - MODER7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - MODER6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - MODER5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - MODER4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - MODER3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - MODER2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - MODER1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - MODER0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - OTYPER - OTYPER - GPIO port output type register - 0x4 - 0x20 - read-write - 0x00000000 - - - OT15 - Port x configuration bits (y = - 0..15) - 15 - 1 - - - OT14 - Port x configuration bits (y = - 0..15) - 14 - 1 - - - OT13 - Port x configuration bits (y = - 0..15) - 13 - 1 - - - OT12 - Port x configuration bits (y = - 0..15) - 12 - 1 - - - OT11 - Port x configuration bits (y = - 0..15) - 11 - 1 - - - OT10 - Port x configuration bits (y = - 0..15) - 10 - 1 - - - OT9 - Port x configuration bits (y = - 0..15) - 9 - 1 - - - OT8 - Port x configuration bits (y = - 0..15) - 8 - 1 - - - OT7 - Port x configuration bits (y = - 0..15) - 7 - 1 - - - OT6 - Port x configuration bits (y = - 0..15) - 6 - 1 - - - OT5 - Port x configuration bits (y = - 0..15) - 5 - 1 - - - OT4 - Port x configuration bits (y = - 0..15) - 4 - 1 - - - OT3 - Port x configuration bits (y = - 0..15) - 3 - 1 - - - OT2 - Port x configuration bits (y = - 0..15) - 2 - 1 - - - OT1 - Port x configuration bits (y = - 0..15) - 1 - 1 - - - OT0 - Port x configuration bits (y = - 0..15) - 0 - 1 - - - - - OSPEEDR - OSPEEDR - GPIO port output speed - register - 0x8 - 0x20 - read-write - 0x00000000 - - - OSPEEDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - OSPEEDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - OSPEEDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - OSPEEDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - OSPEEDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - OSPEEDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - OSPEEDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - OSPEEDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - OSPEEDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - OSPEEDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - OSPEEDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - OSPEEDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - OSPEEDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - OSPEEDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - OSPEEDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - OSPEEDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - PUPDR - PUPDR - GPIO port pull-up/pull-down - register - 0xC - 0x20 - read-write - 0x24000000 - - - PUPDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - PUPDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - PUPDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - PUPDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - PUPDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - PUPDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - PUPDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - PUPDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - PUPDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - PUPDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - PUPDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - PUPDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - PUPDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - PUPDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - PUPDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - PUPDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - IDR - IDR - GPIO port input data register - 0x10 - 0x20 - read-only - 0x00000000 - - - IDR15 - Port input data (y = - 0..15) - 15 - 1 - - - IDR14 - Port input data (y = - 0..15) - 14 - 1 - - - IDR13 - Port input data (y = - 0..15) - 13 - 1 - - - IDR12 - Port input data (y = - 0..15) - 12 - 1 - - - IDR11 - Port input data (y = - 0..15) - 11 - 1 - - - IDR10 - Port input data (y = - 0..15) - 10 - 1 - - - IDR9 - Port input data (y = - 0..15) - 9 - 1 - - - IDR8 - Port input data (y = - 0..15) - 8 - 1 - - - IDR7 - Port input data (y = - 0..15) - 7 - 1 - - - IDR6 - Port input data (y = - 0..15) - 6 - 1 - - - IDR5 - Port input data (y = - 0..15) - 5 - 1 - - - IDR4 - Port input data (y = - 0..15) - 4 - 1 - - - IDR3 - Port input data (y = - 0..15) - 3 - 1 - - - IDR2 - Port input data (y = - 0..15) - 2 - 1 - - - IDR1 - Port input data (y = - 0..15) - 1 - 1 - - - IDR0 - Port input data (y = - 0..15) - 0 - 1 - - - - - ODR - ODR - GPIO port output data register - 0x14 - 0x20 - read-write - 0x00000000 - - - ODR15 - Port output data (y = - 0..15) - 15 - 1 - - - ODR14 - Port output data (y = - 0..15) - 14 - 1 - - - ODR13 - Port output data (y = - 0..15) - 13 - 1 - - - ODR12 - Port output data (y = - 0..15) - 12 - 1 - - - ODR11 - Port output data (y = - 0..15) - 11 - 1 - - - ODR10 - Port output data (y = - 0..15) - 10 - 1 - - - ODR9 - Port output data (y = - 0..15) - 9 - 1 - - - ODR8 - Port output data (y = - 0..15) - 8 - 1 - - - ODR7 - Port output data (y = - 0..15) - 7 - 1 - - - ODR6 - Port output data (y = - 0..15) - 6 - 1 - - - ODR5 - Port output data (y = - 0..15) - 5 - 1 - - - ODR4 - Port output data (y = - 0..15) - 4 - 1 - - - ODR3 - Port output data (y = - 0..15) - 3 - 1 - - - ODR2 - Port output data (y = - 0..15) - 2 - 1 - - - ODR1 - Port output data (y = - 0..15) - 1 - 1 - - - ODR0 - Port output data (y = - 0..15) - 0 - 1 - - - - - BSRR - BSRR - GPIO port bit set/reset - register - 0x18 - 0x20 - write-only - 0x00000000 - - - BR15 - Port x reset bit y (y = - 0..15) - 31 - 1 - - - BR14 - Port x reset bit y (y = - 0..15) - 30 - 1 - - - BR13 - Port x reset bit y (y = - 0..15) - 29 - 1 - - - BR12 - Port x reset bit y (y = - 0..15) - 28 - 1 - - - BR11 - Port x reset bit y (y = - 0..15) - 27 - 1 - - - BR10 - Port x reset bit y (y = - 0..15) - 26 - 1 - - - BR9 - Port x reset bit y (y = - 0..15) - 25 - 1 - - - BR8 - Port x reset bit y (y = - 0..15) - 24 - 1 - - - BR7 - Port x reset bit y (y = - 0..15) - 23 - 1 - - - BR6 - Port x reset bit y (y = - 0..15) - 22 - 1 - - - BR5 - Port x reset bit y (y = - 0..15) - 21 - 1 - - - BR4 - Port x reset bit y (y = - 0..15) - 20 - 1 - - - BR3 - Port x reset bit y (y = - 0..15) - 19 - 1 - - - BR2 - Port x reset bit y (y = - 0..15) - 18 - 1 - - - BR1 - Port x reset bit y (y = - 0..15) - 17 - 1 - - - BR0 - Port x set bit y (y= - 0..15) - 16 - 1 - - - BS15 - Port x set bit y (y= - 0..15) - 15 - 1 - - - BS14 - Port x set bit y (y= - 0..15) - 14 - 1 - - - BS13 - Port x set bit y (y= - 0..15) - 13 - 1 - - - BS12 - Port x set bit y (y= - 0..15) - 12 - 1 - - - BS11 - Port x set bit y (y= - 0..15) - 11 - 1 - - - BS10 - Port x set bit y (y= - 0..15) - 10 - 1 - - - BS9 - Port x set bit y (y= - 0..15) - 9 - 1 - - - BS8 - Port x set bit y (y= - 0..15) - 8 - 1 - - - BS7 - Port x set bit y (y= - 0..15) - 7 - 1 - - - BS6 - Port x set bit y (y= - 0..15) - 6 - 1 - - - BS5 - Port x set bit y (y= - 0..15) - 5 - 1 - - - BS4 - Port x set bit y (y= - 0..15) - 4 - 1 - - - BS3 - Port x set bit y (y= - 0..15) - 3 - 1 - - - BS2 - Port x set bit y (y= - 0..15) - 2 - 1 - - - BS1 - Port x set bit y (y= - 0..15) - 1 - 1 - - - BS0 - Port x set bit y (y= - 0..15) - 0 - 1 - - - - - LCKR - LCKR - GPIO port configuration lock - register - 0x1C - 0x20 - read-write - 0x00000000 - - - LCKK - Lok Key - 16 - 1 - - - LCK15 - Port x lock bit y (y= - 0..15) - 15 - 1 - - - LCK14 - Port x lock bit y (y= - 0..15) - 14 - 1 - - - LCK13 - Port x lock bit y (y= - 0..15) - 13 - 1 - - - LCK12 - Port x lock bit y (y= - 0..15) - 12 - 1 - - - LCK11 - Port x lock bit y (y= - 0..15) - 11 - 1 - - - LCK10 - Port x lock bit y (y= - 0..15) - 10 - 1 - - - LCK9 - Port x lock bit y (y= - 0..15) - 9 - 1 - - - LCK8 - Port x lock bit y (y= - 0..15) - 8 - 1 - - - LCK7 - Port x lock bit y (y= - 0..15) - 7 - 1 - - - LCK6 - Port x lock bit y (y= - 0..15) - 6 - 1 - - - LCK5 - Port x lock bit y (y= - 0..15) - 5 - 1 - - - LCK4 - Port x lock bit y (y= - 0..15) - 4 - 1 - - - LCK3 - Port x lock bit y (y= - 0..15) - 3 - 1 - - - LCK2 - Port x lock bit y (y= - 0..15) - 2 - 1 - - - LCK1 - Port x lock bit y (y= - 0..15) - 1 - 1 - - - LCK0 - Port x lock bit y (y= - 0..15) - 0 - 1 - - - - - AFRL - AFRL - GPIO alternate function low - register - 0x20 - 0x20 - read-write - 0x00000000 - - - AFRL7 - Alternate function selection for port x - bit y (y = 0..7) - 28 - 4 - - - AFRL6 - Alternate function selection for port x - bit y (y = 0..7) - 24 - 4 - - - AFRL5 - Alternate function selection for port x - bit y (y = 0..7) - 20 - 4 - - - AFRL4 - Alternate function selection for port x - bit y (y = 0..7) - 16 - 4 - - - AFRL3 - Alternate function selection for port x - bit y (y = 0..7) - 12 - 4 - - - AFRL2 - Alternate function selection for port x - bit y (y = 0..7) - 8 - 4 - - - AFRL1 - Alternate function selection for port x - bit y (y = 0..7) - 4 - 4 - - - AFRL0 - Alternate function selection for port x - bit y (y = 0..7) - 0 - 4 - - - - - AFRH - AFRH - GPIO alternate function high - register - 0x24 - 0x20 - read-write - 0x00000000 - - - AFRH15 - Alternate function selection for port x - bit y (y = 8..15) - 28 - 4 - - - AFRH14 - Alternate function selection for port x - bit y (y = 8..15) - 24 - 4 - - - AFRH13 - Alternate function selection for port x - bit y (y = 8..15) - 20 - 4 - - - AFRH12 - Alternate function selection for port x - bit y (y = 8..15) - 16 - 4 - - - AFRH11 - Alternate function selection for port x - bit y (y = 8..15) - 12 - 4 - - - AFRH10 - Alternate function selection for port x - bit y (y = 8..15) - 8 - 4 - - - AFRH9 - Alternate function selection for port x - bit y (y = 8..15) - 4 - 4 - - - AFRH8 - Alternate function selection for port x - bit y (y = 8..15) - 0 - 4 - - - - - BRR - BRR - Port bit reset register - 0x28 - 0x20 - write-only - 0x00000000 - - - BR0 - Port x Reset bit y - 0 - 1 - - - BR1 - Port x Reset bit y - 1 - 1 - - - BR2 - Port x Reset bit y - 2 - 1 - - - BR3 - Port x Reset bit y - 3 - 1 - - - BR4 - Port x Reset bit y - 4 - 1 - - - BR5 - Port x Reset bit y - 5 - 1 - - - BR6 - Port x Reset bit y - 6 - 1 - - - BR7 - Port x Reset bit y - 7 - 1 - - - BR8 - Port x Reset bit y - 8 - 1 - - - BR9 - Port x Reset bit y - 9 - 1 - - - BR10 - Port x Reset bit y - 10 - 1 - - - BR11 - Port x Reset bit y - 11 - 1 - - - BR12 - Port x Reset bit y - 12 - 1 - - - BR13 - Port x Reset bit y - 13 - 1 - - - BR14 - Port x Reset bit y - 14 - 1 - - - BR15 - Port x Reset bit y - 15 - 1 - - - - - - - GPIOB - General-purpose I/Os - GPIO - 0x48000400 - - 0x0 - 0x400 - registers - - - - MODER - MODER - GPIO port mode register - 0x0 - 0x20 - read-write - 0x00000000 - - - MODER15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - MODER14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - MODER13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - MODER12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - MODER11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - MODER10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - MODER9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - MODER8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - MODER7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - MODER6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - MODER5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - MODER4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - MODER3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - MODER2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - MODER1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - MODER0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - OTYPER - OTYPER - GPIO port output type register - 0x4 - 0x20 - read-write - 0x00000000 - - - OT15 - Port x configuration bit - 15 - 15 - 1 - - - OT14 - Port x configuration bit - 14 - 14 - 1 - - - OT13 - Port x configuration bit - 13 - 13 - 1 - - - OT12 - Port x configuration bit - 12 - 12 - 1 - - - OT11 - Port x configuration bit - 11 - 11 - 1 - - - OT10 - Port x configuration bit - 10 - 10 - 1 - - - OT9 - Port x configuration bit 9 - 9 - 1 - - - OT8 - Port x configuration bit 8 - 8 - 1 - - - OT7 - Port x configuration bit 7 - 7 - 1 - - - OT6 - Port x configuration bit 6 - 6 - 1 - - - OT5 - Port x configuration bit 5 - 5 - 1 - - - OT4 - Port x configuration bit 4 - 4 - 1 - - - OT3 - Port x configuration bit 3 - 3 - 1 - - - OT2 - Port x configuration bit 2 - 2 - 1 - - - OT1 - Port x configuration bit 1 - 1 - 1 - - - OT0 - Port x configuration bit 0 - 0 - 1 - - - - - OSPEEDR - OSPEEDR - GPIO port output speed - register - 0x8 - 0x20 - read-write - 0x00000000 - - - OSPEEDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - OSPEEDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - OSPEEDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - OSPEEDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - OSPEEDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - OSPEEDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - OSPEEDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - OSPEEDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - OSPEEDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - OSPEEDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - OSPEEDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - OSPEEDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - OSPEEDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - OSPEEDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - OSPEEDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - OSPEEDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - PUPDR - PUPDR - GPIO port pull-up/pull-down - register - 0xC - 0x20 - read-write - 0x00000000 - - - PUPDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - PUPDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - PUPDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - PUPDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - PUPDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - PUPDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - PUPDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - PUPDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - PUPDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - PUPDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - PUPDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - PUPDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - PUPDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - PUPDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - PUPDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - PUPDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - IDR - IDR - GPIO port input data register - 0x10 - 0x20 - read-only - 0x00000000 - - - IDR15 - Port input data (y = - 0..15) - 15 - 1 - - - IDR14 - Port input data (y = - 0..15) - 14 - 1 - - - IDR13 - Port input data (y = - 0..15) - 13 - 1 - - - IDR12 - Port input data (y = - 0..15) - 12 - 1 - - - IDR11 - Port input data (y = - 0..15) - 11 - 1 - - - IDR10 - Port input data (y = - 0..15) - 10 - 1 - - - IDR9 - Port input data (y = - 0..15) - 9 - 1 - - - IDR8 - Port input data (y = - 0..15) - 8 - 1 - - - IDR7 - Port input data (y = - 0..15) - 7 - 1 - - - IDR6 - Port input data (y = - 0..15) - 6 - 1 - - - IDR5 - Port input data (y = - 0..15) - 5 - 1 - - - IDR4 - Port input data (y = - 0..15) - 4 - 1 - - - IDR3 - Port input data (y = - 0..15) - 3 - 1 - - - IDR2 - Port input data (y = - 0..15) - 2 - 1 - - - IDR1 - Port input data (y = - 0..15) - 1 - 1 - - - IDR0 - Port input data (y = - 0..15) - 0 - 1 - - - - - ODR - ODR - GPIO port output data register - 0x14 - 0x20 - read-write - 0x00000000 - - - ODR15 - Port output data (y = - 0..15) - 15 - 1 - - - ODR14 - Port output data (y = - 0..15) - 14 - 1 - - - ODR13 - Port output data (y = - 0..15) - 13 - 1 - - - ODR12 - Port output data (y = - 0..15) - 12 - 1 - - - ODR11 - Port output data (y = - 0..15) - 11 - 1 - - - ODR10 - Port output data (y = - 0..15) - 10 - 1 - - - ODR9 - Port output data (y = - 0..15) - 9 - 1 - - - ODR8 - Port output data (y = - 0..15) - 8 - 1 - - - ODR7 - Port output data (y = - 0..15) - 7 - 1 - - - ODR6 - Port output data (y = - 0..15) - 6 - 1 - - - ODR5 - Port output data (y = - 0..15) - 5 - 1 - - - ODR4 - Port output data (y = - 0..15) - 4 - 1 - - - ODR3 - Port output data (y = - 0..15) - 3 - 1 - - - ODR2 - Port output data (y = - 0..15) - 2 - 1 - - - ODR1 - Port output data (y = - 0..15) - 1 - 1 - - - ODR0 - Port output data (y = - 0..15) - 0 - 1 - - - - - BSRR - BSRR - GPIO port bit set/reset - register - 0x18 - 0x20 - write-only - 0x00000000 - - - BR15 - Port x reset bit y (y = - 0..15) - 31 - 1 - - - BR14 - Port x reset bit y (y = - 0..15) - 30 - 1 - - - BR13 - Port x reset bit y (y = - 0..15) - 29 - 1 - - - BR12 - Port x reset bit y (y = - 0..15) - 28 - 1 - - - BR11 - Port x reset bit y (y = - 0..15) - 27 - 1 - - - BR10 - Port x reset bit y (y = - 0..15) - 26 - 1 - - - BR9 - Port x reset bit y (y = - 0..15) - 25 - 1 - - - BR8 - Port x reset bit y (y = - 0..15) - 24 - 1 - - - BR7 - Port x reset bit y (y = - 0..15) - 23 - 1 - - - BR6 - Port x reset bit y (y = - 0..15) - 22 - 1 - - - BR5 - Port x reset bit y (y = - 0..15) - 21 - 1 - - - BR4 - Port x reset bit y (y = - 0..15) - 20 - 1 - - - BR3 - Port x reset bit y (y = - 0..15) - 19 - 1 - - - BR2 - Port x reset bit y (y = - 0..15) - 18 - 1 - - - BR1 - Port x reset bit y (y = - 0..15) - 17 - 1 - - - BR0 - Port x set bit y (y= - 0..15) - 16 - 1 - - - BS15 - Port x set bit y (y= - 0..15) - 15 - 1 - - - BS14 - Port x set bit y (y= - 0..15) - 14 - 1 - - - BS13 - Port x set bit y (y= - 0..15) - 13 - 1 - - - BS12 - Port x set bit y (y= - 0..15) - 12 - 1 - - - BS11 - Port x set bit y (y= - 0..15) - 11 - 1 - - - BS10 - Port x set bit y (y= - 0..15) - 10 - 1 - - - BS9 - Port x set bit y (y= - 0..15) - 9 - 1 - - - BS8 - Port x set bit y (y= - 0..15) - 8 - 1 - - - BS7 - Port x set bit y (y= - 0..15) - 7 - 1 - - - BS6 - Port x set bit y (y= - 0..15) - 6 - 1 - - - BS5 - Port x set bit y (y= - 0..15) - 5 - 1 - - - BS4 - Port x set bit y (y= - 0..15) - 4 - 1 - - - BS3 - Port x set bit y (y= - 0..15) - 3 - 1 - - - BS2 - Port x set bit y (y= - 0..15) - 2 - 1 - - - BS1 - Port x set bit y (y= - 0..15) - 1 - 1 - - - BS0 - Port x set bit y (y= - 0..15) - 0 - 1 - - - - - LCKR - LCKR - GPIO port configuration lock - register - 0x1C - 0x20 - read-write - 0x00000000 - - - LCKK - Lok Key - 16 - 1 - - - LCK15 - Port x lock bit y (y= - 0..15) - 15 - 1 - - - LCK14 - Port x lock bit y (y= - 0..15) - 14 - 1 - - - LCK13 - Port x lock bit y (y= - 0..15) - 13 - 1 - - - LCK12 - Port x lock bit y (y= - 0..15) - 12 - 1 - - - LCK11 - Port x lock bit y (y= - 0..15) - 11 - 1 - - - LCK10 - Port x lock bit y (y= - 0..15) - 10 - 1 - - - LCK9 - Port x lock bit y (y= - 0..15) - 9 - 1 - - - LCK8 - Port x lock bit y (y= - 0..15) - 8 - 1 - - - LCK7 - Port x lock bit y (y= - 0..15) - 7 - 1 - - - LCK6 - Port x lock bit y (y= - 0..15) - 6 - 1 - - - LCK5 - Port x lock bit y (y= - 0..15) - 5 - 1 - - - LCK4 - Port x lock bit y (y= - 0..15) - 4 - 1 - - - LCK3 - Port x lock bit y (y= - 0..15) - 3 - 1 - - - LCK2 - Port x lock bit y (y= - 0..15) - 2 - 1 - - - LCK1 - Port x lock bit y (y= - 0..15) - 1 - 1 - - - LCK0 - Port x lock bit y (y= - 0..15) - 0 - 1 - - - - - AFRL - AFRL - GPIO alternate function low - register - 0x20 - 0x20 - read-write - 0x00000000 - - - AFRL7 - Alternate function selection for port x - bit y (y = 0..7) - 28 - 4 - - - AFRL6 - Alternate function selection for port x - bit y (y = 0..7) - 24 - 4 - - - AFRL5 - Alternate function selection for port x - bit y (y = 0..7) - 20 - 4 - - - AFRL4 - Alternate function selection for port x - bit y (y = 0..7) - 16 - 4 - - - AFRL3 - Alternate function selection for port x - bit y (y = 0..7) - 12 - 4 - - - AFRL2 - Alternate function selection for port x - bit y (y = 0..7) - 8 - 4 - - - AFRL1 - Alternate function selection for port x - bit y (y = 0..7) - 4 - 4 - - - AFRL0 - Alternate function selection for port x - bit y (y = 0..7) - 0 - 4 - - - - - AFRH - AFRH - GPIO alternate function high - register - 0x24 - 0x20 - read-write - 0x00000000 - - - AFRH15 - Alternate function selection for port x - bit y (y = 8..15) - 28 - 4 - - - AFRH14 - Alternate function selection for port x - bit y (y = 8..15) - 24 - 4 - - - AFRH13 - Alternate function selection for port x - bit y (y = 8..15) - 20 - 4 - - - AFRH12 - Alternate function selection for port x - bit y (y = 8..15) - 16 - 4 - - - AFRH11 - Alternate function selection for port x - bit y (y = 8..15) - 12 - 4 - - - AFRH10 - Alternate function selection for port x - bit y (y = 8..15) - 8 - 4 - - - AFRH9 - Alternate function selection for port x - bit y (y = 8..15) - 4 - 4 - - - AFRH8 - Alternate function selection for port x - bit y (y = 8..15) - 0 - 4 - - - - - BRR - BRR - Port bit reset register - 0x28 - 0x20 - write-only - 0x00000000 - - - BR0 - Port x Reset bit y - 0 - 1 - - - BR1 - Port x Reset bit y - 1 - 1 - - - BR2 - Port x Reset bit y - 2 - 1 - - - BR3 - Port x Reset bit y - 3 - 1 - - - BR4 - Port x Reset bit y - 4 - 1 - - - BR5 - Port x Reset bit y - 5 - 1 - - - BR6 - Port x Reset bit y - 6 - 1 - - - BR7 - Port x Reset bit y - 7 - 1 - - - BR8 - Port x Reset bit y - 8 - 1 - - - BR9 - Port x Reset bit y - 9 - 1 - - - BR10 - Port x Reset bit y - 10 - 1 - - - BR11 - Port x Reset bit y - 11 - 1 - - - BR12 - Port x Reset bit y - 12 - 1 - - - BR13 - Port x Reset bit y - 13 - 1 - - - BR14 - Port x Reset bit y - 14 - 1 - - - BR15 - Port x Reset bit y - 15 - 1 - - - - - - - GPIOC - 0x48000800 - - - GPIOD - 0x48000C00 - - - GPIOE - 0x48001000 - - - GPIOF - 0x48001400 - - - GPIOG - 0x48001800 - - - GPIOH - 0x48001C00 - - - TSC - Touch sensing controller - TSC - 0x40024000 - - 0x0 - 0x400 - registers - - - - CR - CR - control register - 0x0 - 0x20 - read-write - 0x00000000 - - - CTPH - Charge transfer pulse high - 28 - 4 - - - CTPL - Charge transfer pulse low - 24 - 4 - - - SSD - Spread spectrum deviation - 17 - 7 - - - SSE - Spread spectrum enable - 16 - 1 - - - SSPSC - Spread spectrum prescaler - 15 - 1 - - - PGPSC - pulse generator prescaler - 12 - 3 - - - MCV - Max count value - 5 - 3 - - - IODEF - I/O Default mode - 4 - 1 - - - SYNCPOL - Synchronization pin - polarity - 3 - 1 - - - AM - Acquisition mode - 2 - 1 - - - START - Start a new acquisition - 1 - 1 - - - TSCE - Touch sensing controller - enable - 0 - 1 - - - - - IER - IER - interrupt enable register - 0x4 - 0x20 - read-write - 0x00000000 - - - MCEIE - Max count error interrupt - enable - 1 - 1 - - - EOAIE - End of acquisition interrupt - enable - 0 - 1 - - - - - ICR - ICR - interrupt clear register - 0x8 - 0x20 - read-write - 0x00000000 - - - MCEIC - Max count error interrupt - clear - 1 - 1 - - - EOAIC - End of acquisition interrupt - clear - 0 - 1 - - - - - ISR - ISR - interrupt status register - 0xC - 0x20 - read-write - 0x00000000 - - - MCEF - Max count error flag - 1 - 1 - - - EOAF - End of acquisition flag - 0 - 1 - - - - - IOHCR - IOHCR - I/O hysteresis control - register - 0x10 - 0x20 - read-write - 0xFFFFFFFF - - - G1_IO1 - G1_IO1 Schmitt trigger hysteresis - mode - 0 - 1 - - - G1_IO2 - G1_IO2 Schmitt trigger hysteresis - mode - 1 - 1 - - - G1_IO3 - G1_IO3 Schmitt trigger hysteresis - mode - 2 - 1 - - - G1_IO4 - G1_IO4 Schmitt trigger hysteresis - mode - 3 - 1 - - - G2_IO1 - G2_IO1 Schmitt trigger hysteresis - mode - 4 - 1 - - - G2_IO2 - G2_IO2 Schmitt trigger hysteresis - mode - 5 - 1 - - - G2_IO3 - G2_IO3 Schmitt trigger hysteresis - mode - 6 - 1 - - - G2_IO4 - G2_IO4 Schmitt trigger hysteresis - mode - 7 - 1 - - - G3_IO1 - G3_IO1 Schmitt trigger hysteresis - mode - 8 - 1 - - - G3_IO2 - G3_IO2 Schmitt trigger hysteresis - mode - 9 - 1 - - - G3_IO3 - G3_IO3 Schmitt trigger hysteresis - mode - 10 - 1 - - - G3_IO4 - G3_IO4 Schmitt trigger hysteresis - mode - 11 - 1 - - - G4_IO1 - G4_IO1 Schmitt trigger hysteresis - mode - 12 - 1 - - - G4_IO2 - G4_IO2 Schmitt trigger hysteresis - mode - 13 - 1 - - - G4_IO3 - G4_IO3 Schmitt trigger hysteresis - mode - 14 - 1 - - - G4_IO4 - G4_IO4 Schmitt trigger hysteresis - mode - 15 - 1 - - - G5_IO1 - G5_IO1 Schmitt trigger hysteresis - mode - 16 - 1 - - - G5_IO2 - G5_IO2 Schmitt trigger hysteresis - mode - 17 - 1 - - - G5_IO3 - G5_IO3 Schmitt trigger hysteresis - mode - 18 - 1 - - - G5_IO4 - G5_IO4 Schmitt trigger hysteresis - mode - 19 - 1 - - - G6_IO1 - G6_IO1 Schmitt trigger hysteresis - mode - 20 - 1 - - - G6_IO2 - G6_IO2 Schmitt trigger hysteresis - mode - 21 - 1 - - - G6_IO3 - G6_IO3 Schmitt trigger hysteresis - mode - 22 - 1 - - - G6_IO4 - G6_IO4 Schmitt trigger hysteresis - mode - 23 - 1 - - - G7_IO1 - G7_IO1 Schmitt trigger hysteresis - mode - 24 - 1 - - - G7_IO2 - G7_IO2 Schmitt trigger hysteresis - mode - 25 - 1 - - - G7_IO3 - G7_IO3 Schmitt trigger hysteresis - mode - 26 - 1 - - - G7_IO4 - G7_IO4 Schmitt trigger hysteresis - mode - 27 - 1 - - - G8_IO1 - G8_IO1 Schmitt trigger hysteresis - mode - 28 - 1 - - - G8_IO2 - G8_IO2 Schmitt trigger hysteresis - mode - 29 - 1 - - - G8_IO3 - G8_IO3 Schmitt trigger hysteresis - mode - 30 - 1 - - - G8_IO4 - G8_IO4 Schmitt trigger hysteresis - mode - 31 - 1 - - - - - IOASCR - IOASCR - I/O analog switch control - register - 0x18 - 0x20 - read-write - 0x00000000 - - - G1_IO1 - G1_IO1 analog switch - enable - 0 - 1 - - - G1_IO2 - G1_IO2 analog switch - enable - 1 - 1 - - - G1_IO3 - G1_IO3 analog switch - enable - 2 - 1 - - - G1_IO4 - G1_IO4 analog switch - enable - 3 - 1 - - - G2_IO1 - G2_IO1 analog switch - enable - 4 - 1 - - - G2_IO2 - G2_IO2 analog switch - enable - 5 - 1 - - - G2_IO3 - G2_IO3 analog switch - enable - 6 - 1 - - - G2_IO4 - G2_IO4 analog switch - enable - 7 - 1 - - - G3_IO1 - G3_IO1 analog switch - enable - 8 - 1 - - - G3_IO2 - G3_IO2 analog switch - enable - 9 - 1 - - - G3_IO3 - G3_IO3 analog switch - enable - 10 - 1 - - - G3_IO4 - G3_IO4 analog switch - enable - 11 - 1 - - - G4_IO1 - G4_IO1 analog switch - enable - 12 - 1 - - - G4_IO2 - G4_IO2 analog switch - enable - 13 - 1 - - - G4_IO3 - G4_IO3 analog switch - enable - 14 - 1 - - - G4_IO4 - G4_IO4 analog switch - enable - 15 - 1 - - - G5_IO1 - G5_IO1 analog switch - enable - 16 - 1 - - - G5_IO2 - G5_IO2 analog switch - enable - 17 - 1 - - - G5_IO3 - G5_IO3 analog switch - enable - 18 - 1 - - - G5_IO4 - G5_IO4 analog switch - enable - 19 - 1 - - - G6_IO1 - G6_IO1 analog switch - enable - 20 - 1 - - - G6_IO2 - G6_IO2 analog switch - enable - 21 - 1 - - - G6_IO3 - G6_IO3 analog switch - enable - 22 - 1 - - - G6_IO4 - G6_IO4 analog switch - enable - 23 - 1 - - - G7_IO1 - G7_IO1 analog switch - enable - 24 - 1 - - - G7_IO2 - G7_IO2 analog switch - enable - 25 - 1 - - - G7_IO3 - G7_IO3 analog switch - enable - 26 - 1 - - - G7_IO4 - G7_IO4 analog switch - enable - 27 - 1 - - - G8_IO1 - G8_IO1 analog switch - enable - 28 - 1 - - - G8_IO2 - G8_IO2 analog switch - enable - 29 - 1 - - - G8_IO3 - G8_IO3 analog switch - enable - 30 - 1 - - - G8_IO4 - G8_IO4 analog switch - enable - 31 - 1 - - - - - IOSCR - IOSCR - I/O sampling control register - 0x20 - 0x20 - read-write - 0x00000000 - - - G1_IO1 - G1_IO1 sampling mode - 0 - 1 - - - G1_IO2 - G1_IO2 sampling mode - 1 - 1 - - - G1_IO3 - G1_IO3 sampling mode - 2 - 1 - - - G1_IO4 - G1_IO4 sampling mode - 3 - 1 - - - G2_IO1 - G2_IO1 sampling mode - 4 - 1 - - - G2_IO2 - G2_IO2 sampling mode - 5 - 1 - - - G2_IO3 - G2_IO3 sampling mode - 6 - 1 - - - G2_IO4 - G2_IO4 sampling mode - 7 - 1 - - - G3_IO1 - G3_IO1 sampling mode - 8 - 1 - - - G3_IO2 - G3_IO2 sampling mode - 9 - 1 - - - G3_IO3 - G3_IO3 sampling mode - 10 - 1 - - - G3_IO4 - G3_IO4 sampling mode - 11 - 1 - - - G4_IO1 - G4_IO1 sampling mode - 12 - 1 - - - G4_IO2 - G4_IO2 sampling mode - 13 - 1 - - - G4_IO3 - G4_IO3 sampling mode - 14 - 1 - - - G4_IO4 - G4_IO4 sampling mode - 15 - 1 - - - G5_IO1 - G5_IO1 sampling mode - 16 - 1 - - - G5_IO2 - G5_IO2 sampling mode - 17 - 1 - - - G5_IO3 - G5_IO3 sampling mode - 18 - 1 - - - G5_IO4 - G5_IO4 sampling mode - 19 - 1 - - - G6_IO1 - G6_IO1 sampling mode - 20 - 1 - - - G6_IO2 - G6_IO2 sampling mode - 21 - 1 - - - G6_IO3 - G6_IO3 sampling mode - 22 - 1 - - - G6_IO4 - G6_IO4 sampling mode - 23 - 1 - - - G7_IO1 - G7_IO1 sampling mode - 24 - 1 - - - G7_IO2 - G7_IO2 sampling mode - 25 - 1 - - - G7_IO3 - G7_IO3 sampling mode - 26 - 1 - - - G7_IO4 - G7_IO4 sampling mode - 27 - 1 - - - G8_IO1 - G8_IO1 sampling mode - 28 - 1 - - - G8_IO2 - G8_IO2 sampling mode - 29 - 1 - - - G8_IO3 - G8_IO3 sampling mode - 30 - 1 - - - G8_IO4 - G8_IO4 sampling mode - 31 - 1 - - - - - IOCCR - IOCCR - I/O channel control register - 0x28 - 0x20 - read-write - 0x00000000 - - - G1_IO1 - G1_IO1 channel mode - 0 - 1 - - - G1_IO2 - G1_IO2 channel mode - 1 - 1 - - - G1_IO3 - G1_IO3 channel mode - 2 - 1 - - - G1_IO4 - G1_IO4 channel mode - 3 - 1 - - - G2_IO1 - G2_IO1 channel mode - 4 - 1 - - - G2_IO2 - G2_IO2 channel mode - 5 - 1 - - - G2_IO3 - G2_IO3 channel mode - 6 - 1 - - - G2_IO4 - G2_IO4 channel mode - 7 - 1 - - - G3_IO1 - G3_IO1 channel mode - 8 - 1 - - - G3_IO2 - G3_IO2 channel mode - 9 - 1 - - - G3_IO3 - G3_IO3 channel mode - 10 - 1 - - - G3_IO4 - G3_IO4 channel mode - 11 - 1 - - - G4_IO1 - G4_IO1 channel mode - 12 - 1 - - - G4_IO2 - G4_IO2 channel mode - 13 - 1 - - - G4_IO3 - G4_IO3 channel mode - 14 - 1 - - - G4_IO4 - G4_IO4 channel mode - 15 - 1 - - - G5_IO1 - G5_IO1 channel mode - 16 - 1 - - - G5_IO2 - G5_IO2 channel mode - 17 - 1 - - - G5_IO3 - G5_IO3 channel mode - 18 - 1 - - - G5_IO4 - G5_IO4 channel mode - 19 - 1 - - - G6_IO1 - G6_IO1 channel mode - 20 - 1 - - - G6_IO2 - G6_IO2 channel mode - 21 - 1 - - - G6_IO3 - G6_IO3 channel mode - 22 - 1 - - - G6_IO4 - G6_IO4 channel mode - 23 - 1 - - - G7_IO1 - G7_IO1 channel mode - 24 - 1 - - - G7_IO2 - G7_IO2 channel mode - 25 - 1 - - - G7_IO3 - G7_IO3 channel mode - 26 - 1 - - - G7_IO4 - G7_IO4 channel mode - 27 - 1 - - - G8_IO1 - G8_IO1 channel mode - 28 - 1 - - - G8_IO2 - G8_IO2 channel mode - 29 - 1 - - - G8_IO3 - G8_IO3 channel mode - 30 - 1 - - - G8_IO4 - G8_IO4 channel mode - 31 - 1 - - - - - IOGCSR - IOGCSR - I/O group control status - register - 0x30 - 0x20 - 0x00000000 - - - G8S - Analog I/O group x status - 23 - 1 - read-write - - - G7S - Analog I/O group x status - 22 - 1 - read-write - - - G6S - Analog I/O group x status - 21 - 1 - read-only - - - G5S - Analog I/O group x status - 20 - 1 - read-only - - - G4S - Analog I/O group x status - 19 - 1 - read-only - - - G3S - Analog I/O group x status - 18 - 1 - read-only - - - G2S - Analog I/O group x status - 17 - 1 - read-only - - - G1S - Analog I/O group x status - 16 - 1 - read-only - - - G8E - Analog I/O group x enable - 7 - 1 - read-write - - - G7E - Analog I/O group x enable - 6 - 1 - read-write - - - G6E - Analog I/O group x enable - 5 - 1 - read-write - - - G5E - Analog I/O group x enable - 4 - 1 - read-write - - - G4E - Analog I/O group x enable - 3 - 1 - read-write - - - G3E - Analog I/O group x enable - 2 - 1 - read-write - - - G2E - Analog I/O group x enable - 1 - 1 - read-write - - - G1E - Analog I/O group x enable - 0 - 1 - read-write - - - - - IOG1CR - IOG1CR - I/O group x counter register - 0x34 - 0x20 - read-only - 0x00000000 - - - CNT - Counter value - 0 - 14 - - - - - IOG2CR - IOG2CR - I/O group x counter register - 0x38 - 0x20 - read-only - 0x00000000 - - - CNT - Counter value - 0 - 14 - - - - - IOG3CR - IOG3CR - I/O group x counter register - 0x3C - 0x20 - read-only - 0x00000000 - - - CNT - Counter value - 0 - 14 - - - - - IOG4CR - IOG4CR - I/O group x counter register - 0x40 - 0x20 - read-only - 0x00000000 - - - CNT - Counter value - 0 - 14 - - - - - IOG5CR - IOG5CR - I/O group x counter register - 0x44 - 0x20 - read-only - 0x00000000 - - - CNT - Counter value - 0 - 14 - - - - - IOG6CR - IOG6CR - I/O group x counter register - 0x48 - 0x20 - read-only - 0x00000000 - - - CNT - Counter value - 0 - 14 - - - - - IOG7CR - IOG7CR - I/O group x counter register - 0x4C - 0x20 - read-only - 0x00000000 - - - CNT - Counter value - 0 - 14 - - - - - IOG8CR - IOG8CR - I/O group x counter register - 0x50 - 0x20 - read-only - 0x00000000 - - - CNT - Counter value - 0 - 14 - - - - - - - CRC - cyclic redundancy check calculation - unit - CRC - 0x40023000 - - 0x0 - 0x400 - registers - - - - DR - DR - Data register - 0x0 - 0x20 - read-write - 0xFFFFFFFF - - - DR - Data register bits - 0 - 32 - - - - - IDR - IDR - Independent data register - 0x4 - 0x20 - read-write - 0x00000000 - - - IDR - General-purpose 8-bit data register - bits - 0 - 8 - - - - - CR - CR - Control register - 0x8 - 0x20 - read-write - 0x00000000 - - - RESET - reset bit - 0 - 1 - - - POLYSIZE - Polynomial size - 3 - 2 - - - REV_IN - Reverse input data - 5 - 2 - - - REV_OUT - Reverse output data - 7 - 1 - - - - - INIT - INIT - Initial CRC value - 0x10 - 0x20 - read-write - 0xFFFFFFFF - - - INIT - Programmable initial CRC - value - 0 - 32 - - - - - POL - POL - CRC polynomial - 0x14 - 0x20 - read-write - 0x04C11DB7 - - - POL - Programmable polynomial - 0 - 32 - - - - - - - Flash - Flash - Flash - 0x40022000 - - 0x0 - 0x400 - registers - - - FLASH - Flash global interrupt - 4 - - - - ACR - ACR - Flash access control register - 0x0 - 0x20 - 0x00000030 - - - LATENCY - LATENCY - 0 - 3 - read-write - - - PRFTBE - PRFTBE - 4 - 1 - read-write - - - PRFTBS - PRFTBS - 5 - 1 - read-only - - - - - KEYR - KEYR - Flash key register - 0x4 - 0x20 - write-only - 0x00000000 - - - FKEYR - Flash Key - 0 - 32 - - - - - OPTKEYR - OPTKEYR - Flash option key register - 0x8 - 0x20 - write-only - 0x00000000 - - - OPTKEYR - Option byte key - 0 - 32 - - - - - SR - SR - Flash status register - 0xC - 0x20 - 0x00000000 - - - EOP - End of operation - 5 - 1 - read-write - - - WRPRT - Write protection error - 4 - 1 - read-write - - - PGERR - Programming error - 2 - 1 - read-write - - - BSY - Busy - 0 - 1 - read-only - - - - - CR - CR - Flash control register - 0x10 - 0x20 - read-write - 0x00000080 - - - FORCE_OPTLOAD - Force option byte loading - 13 - 1 - - - EOPIE - End of operation interrupt - enable - 12 - 1 - - - ERRIE - Error interrupt enable - 10 - 1 - - - OPTWRE - Option bytes write enable - 9 - 1 - - - LOCK - Lock - 7 - 1 - - - STRT - Start - 6 - 1 - - - OPTER - Option byte erase - 5 - 1 - - - OPTPG - Option byte programming - 4 - 1 - - - MER - Mass erase - 2 - 1 - - - PER - Page erase - 1 - 1 - - - PG - Programming - 0 - 1 - - - - - AR - AR - Flash address register - 0x14 - 0x20 - write-only - 0x00000000 - - - FAR - Flash address - 0 - 32 - - - - - OBR - OBR - Option byte register - 0x1C - 0x20 - read-only - 0xFFFFFF02 - - - OPTERR - Option byte error - 0 - 1 - - - LEVEL1_PROT - Level 1 protection status - 1 - 1 - - - LEVEL2_PROT - Level 2 protection status - 2 - 1 - - - WDG_SW - WDG_SW - 8 - 1 - - - nRST_STOP - nRST_STOP - 9 - 1 - - - nRST_STDBY - nRST_STDBY - 10 - 1 - - - BOOT1 - BOOT1 - 12 - 1 - - - VDDA_MONITOR - VDDA_MONITOR - 13 - 1 - - - SRAM_PARITY_CHECK - SRAM_PARITY_CHECK - 14 - 1 - - - Data0 - Data0 - 16 - 8 - - - Data1 - Data1 - 24 - 8 - - - - - WRPR - WRPR - Write protection register - 0x20 - 0x20 - read-only - 0xFFFFFFFF - - - WRP - Write protect - 0 - 32 - - - - - - - RCC - Reset and clock control - RCC - 0x40021000 - - 0x0 - 0x400 - registers - - - RCC - RCC global interrupt - 5 - - - - CR - CR - Clock control register - 0x0 - 0x20 - 0x00000083 - - - HSION - Internal High Speed clock - enable - 0 - 1 - read-write - - - HSIRDY - Internal High Speed clock ready - flag - 1 - 1 - read-only - - - HSITRIM - Internal High Speed clock - trimming - 3 - 5 - read-write - - - HSICAL - Internal High Speed clock - Calibration - 8 - 8 - read-only - - - HSEON - External High Speed clock - enable - 16 - 1 - read-write - - - HSERDY - External High Speed clock ready - flag - 17 - 1 - read-only - - - HSEBYP - External High Speed clock - Bypass - 18 - 1 - read-write - - - CSSON - Clock Security System - enable - 19 - 1 - read-write - - - PLLON - PLL enable - 24 - 1 - read-write - - - PLLRDY - PLL clock ready flag - 25 - 1 - read-only - - - - - CFGR - CFGR - Clock configuration register - (RCC_CFGR) - 0x4 - 0x20 - 0x00000000 - - - SW - System clock Switch - 0 - 2 - read-write - - - SWS - System Clock Switch Status - 2 - 2 - read-only - - - HPRE - AHB prescaler - 4 - 4 - read-write - - - PPRE1 - APB Low speed prescaler - (APB1) - 8 - 3 - read-write - - - PPRE2 - APB high speed prescaler - (APB2) - 11 - 3 - read-write - - - PLLSRC - PLL entry clock source - 15 - 2 - read-write - - - PLLXTPRE - HSE divider for PLL entry - 17 - 1 - read-write - - - PLLMUL - PLL Multiplication Factor - 18 - 4 - read-write - - - USBPRES - USB prescaler - 22 - 1 - read-write - - - MCO - Microcontroller clock - output - 24 - 3 - read-write - - - MCOF - Microcontroller Clock Output - Flag - 28 - 1 - read-only - - - I2SSRC - I2S external clock source - selection - 23 - 1 - read-write - - - - - CIR - CIR - Clock interrupt register - (RCC_CIR) - 0x8 - 0x20 - 0x00000000 - - - LSIRDYF - LSI Ready Interrupt flag - 0 - 1 - read-only - - - LSERDYF - LSE Ready Interrupt flag - 1 - 1 - read-only - - - HSIRDYF - HSI Ready Interrupt flag - 2 - 1 - read-only - - - HSERDYF - HSE Ready Interrupt flag - 3 - 1 - read-only - - - PLLRDYF - PLL Ready Interrupt flag - 4 - 1 - read-only - - - CSSF - Clock Security System Interrupt - flag - 7 - 1 - read-only - - - LSIRDYIE - LSI Ready Interrupt Enable - 8 - 1 - read-write - - - LSERDYIE - LSE Ready Interrupt Enable - 9 - 1 - read-write - - - HSIRDYIE - HSI Ready Interrupt Enable - 10 - 1 - read-write - - - HSERDYIE - HSE Ready Interrupt Enable - 11 - 1 - read-write - - - PLLRDYIE - PLL Ready Interrupt Enable - 12 - 1 - read-write - - - LSIRDYC - LSI Ready Interrupt Clear - 16 - 1 - write-only - - - LSERDYC - LSE Ready Interrupt Clear - 17 - 1 - write-only - - - HSIRDYC - HSI Ready Interrupt Clear - 18 - 1 - write-only - - - HSERDYC - HSE Ready Interrupt Clear - 19 - 1 - write-only - - - PLLRDYC - PLL Ready Interrupt Clear - 20 - 1 - write-only - - - CSSC - Clock security system interrupt - clear - 23 - 1 - write-only - - - - - APB2RSTR - APB2RSTR - APB2 peripheral reset register - (RCC_APB2RSTR) - 0xC - 0x20 - read-write - 0x00000000 - - - SYSCFGRST - SYSCFG and COMP reset - 0 - 1 - - - TIM1RST - TIM1 timer reset - 11 - 1 - - - SPI1RST - SPI 1 reset - 12 - 1 - - - TIM8RST - TIM8 timer reset - 13 - 1 - - - USART1RST - USART1 reset - 14 - 1 - - - TIM15RST - TIM15 timer reset - 16 - 1 - - - TIM16RST - TIM16 timer reset - 17 - 1 - - - TIM17RST - TIM17 timer reset - 18 - 1 - - - - - APB1RSTR - APB1RSTR - APB1 peripheral reset register - (RCC_APB1RSTR) - 0x10 - 0x20 - read-write - 0x00000000 - - - TIM2RST - Timer 2 reset - 0 - 1 - - - TIM3RST - Timer 3 reset - 1 - 1 - - - TIM4RST - Timer 14 reset - 2 - 1 - - - TIM6RST - Timer 6 reset - 4 - 1 - - - TIM7RST - Timer 7 reset - 5 - 1 - - - WWDGRST - Window watchdog reset - 11 - 1 - - - SPI2RST - SPI2 reset - 14 - 1 - - - SPI3RST - SPI3 reset - 15 - 1 - - - USART2RST - USART 2 reset - 17 - 1 - - - USART3RST - USART3 reset - 18 - 1 - - - UART4RST - UART 4 reset - 19 - 1 - - - UART5RST - UART 5 reset - 20 - 1 - - - I2C1RST - I2C1 reset - 21 - 1 - - - I2C2RST - I2C2 reset - 22 - 1 - - - USBRST - USB reset - 23 - 1 - - - CANRST - CAN reset - 25 - 1 - - - PWRRST - Power interface reset - 28 - 1 - - - DACRST - DAC interface reset - 29 - 1 - - - I2C3RST - I2C3 reset - 30 - 1 - - - - - AHBENR - AHBENR - AHB Peripheral Clock enable register - (RCC_AHBENR) - 0x14 - 0x20 - read-write - 0x00000014 - - - DMAEN - DMA1 clock enable - 0 - 1 - - - DMA2EN - DMA2 clock enable - 1 - 1 - - - SRAMEN - SRAM interface clock - enable - 2 - 1 - - - FLITFEN - FLITF clock enable - 4 - 1 - - - FMCEN - FMC clock enable - 5 - 1 - - - CRCEN - CRC clock enable - 6 - 1 - - - IOPHEN - IO port H clock enable - 16 - 1 - - - IOPAEN - I/O port A clock enable - 17 - 1 - - - IOPBEN - I/O port B clock enable - 18 - 1 - - - IOPCEN - I/O port C clock enable - 19 - 1 - - - IOPDEN - I/O port D clock enable - 20 - 1 - - - IOPEEN - I/O port E clock enable - 21 - 1 - - - IOPFEN - I/O port F clock enable - 22 - 1 - - - IOPGEN - I/O port G clock enable - 23 - 1 - - - TSCEN - Touch sensing controller clock - enable - 24 - 1 - - - ADC12EN - ADC1 and ADC2 clock enable - 28 - 1 - - - ADC34EN - ADC3 and ADC4 clock enable - 29 - 1 - - - - - APB2ENR - APB2ENR - APB2 peripheral clock enable register - (RCC_APB2ENR) - 0x18 - 0x20 - read-write - 0x00000000 - - - SYSCFGEN - SYSCFG clock enable - 0 - 1 - - - TIM1EN - TIM1 Timer clock enable - 11 - 1 - - - SPI1EN - SPI 1 clock enable - 12 - 1 - - - TIM8EN - TIM8 Timer clock enable - 13 - 1 - - - USART1EN - USART1 clock enable - 14 - 1 - - - TIM15EN - TIM15 timer clock enable - 16 - 1 - - - TIM16EN - TIM16 timer clock enable - 17 - 1 - - - TIM17EN - TIM17 timer clock enable - 18 - 1 - - - - - APB1ENR - APB1ENR - APB1 peripheral clock enable register - (RCC_APB1ENR) - 0x1C - 0x20 - read-write - 0x00000000 - - - TIM2EN - Timer 2 clock enable - 0 - 1 - - - TIM3EN - Timer 3 clock enable - 1 - 1 - - - TIM4EN - Timer 4 clock enable - 2 - 1 - - - TIM6EN - Timer 6 clock enable - 4 - 1 - - - TIM7EN - Timer 7 clock enable - 5 - 1 - - - WWDGEN - Window watchdog clock - enable - 11 - 1 - - - SPI2EN - SPI 2 clock enable - 14 - 1 - - - SPI3EN - SPI 3 clock enable - 15 - 1 - - - USART2EN - USART 2 clock enable - 17 - 1 - - - USART3EN - USART 3 clock enable - 18 - 1 - - - USART4EN - USART 4 clock enable - 19 - 1 - - - USART5EN - USART 5 clock enable - 20 - 1 - - - I2C1EN - I2C 1 clock enable - 21 - 1 - - - I2C2EN - I2C 2 clock enable - 22 - 1 - - - USBEN - USB clock enable - 23 - 1 - - - CANEN - CAN clock enable - 25 - 1 - - - DAC2EN - DAC2 interface clock - enable - 26 - 1 - - - PWREN - Power interface clock - enable - 28 - 1 - - - DACEN - DAC interface clock enable - 29 - 1 - - - I2C3EN - I2C3 clock enable - 30 - 1 - - - - - BDCR - BDCR - Backup domain control register - (RCC_BDCR) - 0x20 - 0x20 - 0x00000000 - - - LSEON - External Low Speed oscillator - enable - 0 - 1 - read-write - - - LSERDY - External Low Speed oscillator - ready - 1 - 1 - read-only - - - LSEBYP - External Low Speed oscillator - bypass - 2 - 1 - read-write - - - LSEDRV - LSE oscillator drive - capability - 3 - 2 - read-write - - - RTCSEL - RTC clock source selection - 8 - 2 - read-write - - - RTCEN - RTC clock enable - 15 - 1 - read-write - - - BDRST - Backup domain software - reset - 16 - 1 - read-write - - - - - CSR - CSR - Control/status register - (RCC_CSR) - 0x24 - 0x20 - 0x0C000000 - - - LSION - Internal low speed oscillator - enable - 0 - 1 - read-write - - - LSIRDY - Internal low speed oscillator - ready - 1 - 1 - read-only - - - RMVF - Remove reset flag - 24 - 1 - read-write - - - OBLRSTF - Option byte loader reset - flag - 25 - 1 - read-write - - - PINRSTF - PIN reset flag - 26 - 1 - read-write - - - PORRSTF - POR/PDR reset flag - 27 - 1 - read-write - - - SFTRSTF - Software reset flag - 28 - 1 - read-write - - - IWDGRSTF - Independent watchdog reset - flag - 29 - 1 - read-write - - - WWDGRSTF - Window watchdog reset flag - 30 - 1 - read-write - - - LPWRRSTF - Low-power reset flag - 31 - 1 - read-write - - - - - AHBRSTR - AHBRSTR - AHB peripheral reset register - 0x28 - 0x20 - read-write - 0x00000000 - - - FMCRST - FMC reset - 5 - 1 - - - IOPHRST - I/O port H reset - 16 - 1 - - - IOPARST - I/O port A reset - 17 - 1 - - - IOPBRST - I/O port B reset - 18 - 1 - - - IOPCRST - I/O port C reset - 19 - 1 - - - IOPDRST - I/O port D reset - 20 - 1 - - - IOPERST - I/O port E reset - 21 - 1 - - - IOPFRST - I/O port F reset - 22 - 1 - - - IOPGRST - Touch sensing controller - reset - 23 - 1 - - - TSCRST - Touch sensing controller - reset - 24 - 1 - - - ADC12RST - ADC1 and ADC2 reset - 28 - 1 - - - ADC34RST - ADC3 and ADC4 reset - 29 - 1 - - - - - CFGR2 - CFGR2 - Clock configuration register 2 - 0x2C - 0x20 - read-write - 0x00000000 - - - PREDIV - PREDIV division factor - 0 - 4 - - - ADC12PRES - ADC1 and ADC2 prescaler - 4 - 5 - - - ADC34PRES - ADC3 and ADC4 prescaler - 9 - 5 - - - - - CFGR3 - CFGR3 - Clock configuration register 3 - 0x30 - 0x20 - read-write - 0x00000000 - - - USART1SW - USART1 clock source - selection - 0 - 2 - - - I2C1SW - I2C1 clock source - selection - 4 - 1 - - - I2C2SW - I2C2 clock source - selection - 5 - 1 - - - I2C3SW - I2C3 clock source - selection - 6 - 1 - - - USART2SW - USART2 clock source - selection - 16 - 2 - - - USART3SW - USART3 clock source - selection - 18 - 2 - - - TIM1SW - Timer1 clock source - selection - 8 - 1 - - - TIM8SW - Timer8 clock source - selection - 9 - 1 - - - UART4SW - UART4 clock source - selection - 20 - 2 - - - UART5SW - UART5 clock source - selection - 22 - 2 - - - - - - - DMA1 - DMA controller 1 - DMA - 0x40020000 - - 0x0 - 0x400 - registers - - - DMA1_CH1 - DMA1 channel 1 interrupt - 11 - - - DMA1_CH2 - DMA1 channel 2 interrupt - 12 - - - DMA1_CH3 - DMA1 channel 3 interrupt - 13 - - - DMA1_CH4 - DMA1 channel 4 interrupt - 14 - - - DMA1_CH5 - DMA1 channel 5 interrupt - 15 - - - DMA1_CH6 - DMA1 channel 6 interrupt - 16 - - - DMA1_CH7 - DMA1 channel 7interrupt - 17 - - - - ISR - ISR - DMA interrupt status register - (DMA_ISR) - 0x0 - 0x20 - read-only - 0x00000000 - - - GIF1 - Channel 1 Global interrupt - flag - 0 - 1 - - - TCIF1 - Channel 1 Transfer Complete - flag - 1 - 1 - - - HTIF1 - Channel 1 Half Transfer Complete - flag - 2 - 1 - - - TEIF1 - Channel 1 Transfer Error - flag - 3 - 1 - - - GIF2 - Channel 2 Global interrupt - flag - 4 - 1 - - - TCIF2 - Channel 2 Transfer Complete - flag - 5 - 1 - - - HTIF2 - Channel 2 Half Transfer Complete - flag - 6 - 1 - - - TEIF2 - Channel 2 Transfer Error - flag - 7 - 1 - - - GIF3 - Channel 3 Global interrupt - flag - 8 - 1 - - - TCIF3 - Channel 3 Transfer Complete - flag - 9 - 1 - - - HTIF3 - Channel 3 Half Transfer Complete - flag - 10 - 1 - - - TEIF3 - Channel 3 Transfer Error - flag - 11 - 1 - - - GIF4 - Channel 4 Global interrupt - flag - 12 - 1 - - - TCIF4 - Channel 4 Transfer Complete - flag - 13 - 1 - - - HTIF4 - Channel 4 Half Transfer Complete - flag - 14 - 1 - - - TEIF4 - Channel 4 Transfer Error - flag - 15 - 1 - - - GIF5 - Channel 5 Global interrupt - flag - 16 - 1 - - - TCIF5 - Channel 5 Transfer Complete - flag - 17 - 1 - - - HTIF5 - Channel 5 Half Transfer Complete - flag - 18 - 1 - - - TEIF5 - Channel 5 Transfer Error - flag - 19 - 1 - - - GIF6 - Channel 6 Global interrupt - flag - 20 - 1 - - - TCIF6 - Channel 6 Transfer Complete - flag - 21 - 1 - - - HTIF6 - Channel 6 Half Transfer Complete - flag - 22 - 1 - - - TEIF6 - Channel 6 Transfer Error - flag - 23 - 1 - - - GIF7 - Channel 7 Global interrupt - flag - 24 - 1 - - - TCIF7 - Channel 7 Transfer Complete - flag - 25 - 1 - - - HTIF7 - Channel 7 Half Transfer Complete - flag - 26 - 1 - - - TEIF7 - Channel 7 Transfer Error - flag - 27 - 1 - - - - - IFCR - IFCR - DMA interrupt flag clear register - (DMA_IFCR) - 0x4 - 0x20 - write-only - 0x00000000 - - - CGIF1 - Channel 1 Global interrupt - clear - 0 - 1 - - - CTCIF1 - Channel 1 Transfer Complete - clear - 1 - 1 - - - CHTIF1 - Channel 1 Half Transfer - clear - 2 - 1 - - - CTEIF1 - Channel 1 Transfer Error - clear - 3 - 1 - - - CGIF2 - Channel 2 Global interrupt - clear - 4 - 1 - - - CTCIF2 - Channel 2 Transfer Complete - clear - 5 - 1 - - - CHTIF2 - Channel 2 Half Transfer - clear - 6 - 1 - - - CTEIF2 - Channel 2 Transfer Error - clear - 7 - 1 - - - CGIF3 - Channel 3 Global interrupt - clear - 8 - 1 - - - CTCIF3 - Channel 3 Transfer Complete - clear - 9 - 1 - - - CHTIF3 - Channel 3 Half Transfer - clear - 10 - 1 - - - CTEIF3 - Channel 3 Transfer Error - clear - 11 - 1 - - - CGIF4 - Channel 4 Global interrupt - clear - 12 - 1 - - - CTCIF4 - Channel 4 Transfer Complete - clear - 13 - 1 - - - CHTIF4 - Channel 4 Half Transfer - clear - 14 - 1 - - - CTEIF4 - Channel 4 Transfer Error - clear - 15 - 1 - - - CGIF5 - Channel 5 Global interrupt - clear - 16 - 1 - - - CTCIF5 - Channel 5 Transfer Complete - clear - 17 - 1 - - - CHTIF5 - Channel 5 Half Transfer - clear - 18 - 1 - - - CTEIF5 - Channel 5 Transfer Error - clear - 19 - 1 - - - CGIF6 - Channel 6 Global interrupt - clear - 20 - 1 - - - CTCIF6 - Channel 6 Transfer Complete - clear - 21 - 1 - - - CHTIF6 - Channel 6 Half Transfer - clear - 22 - 1 - - - CTEIF6 - Channel 6 Transfer Error - clear - 23 - 1 - - - CGIF7 - Channel 7 Global interrupt - clear - 24 - 1 - - - CTCIF7 - Channel 7 Transfer Complete - clear - 25 - 1 - - - CHTIF7 - Channel 7 Half Transfer - clear - 26 - 1 - - - CTEIF7 - Channel 7 Transfer Error - clear - 27 - 1 - - - - - CCR1 - CCR1 - DMA channel configuration register - (DMA_CCR) - 0x8 - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR1 - CNDTR1 - DMA channel 1 number of data - register - 0xC - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR1 - CPAR1 - DMA channel 1 peripheral address - register - 0x10 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR1 - CMAR1 - DMA channel 1 memory address - register - 0x14 - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR2 - CCR2 - DMA channel configuration register - (DMA_CCR) - 0x1C - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR2 - CNDTR2 - DMA channel 2 number of data - register - 0x20 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR2 - CPAR2 - DMA channel 2 peripheral address - register - 0x24 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR2 - CMAR2 - DMA channel 2 memory address - register - 0x28 - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR3 - CCR3 - DMA channel configuration register - (DMA_CCR) - 0x30 - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR3 - CNDTR3 - DMA channel 3 number of data - register - 0x34 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR3 - CPAR3 - DMA channel 3 peripheral address - register - 0x38 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR3 - CMAR3 - DMA channel 3 memory address - register - 0x3C - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR4 - CCR4 - DMA channel configuration register - (DMA_CCR) - 0x44 - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR4 - CNDTR4 - DMA channel 4 number of data - register - 0x48 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR4 - CPAR4 - DMA channel 4 peripheral address - register - 0x4C - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR4 - CMAR4 - DMA channel 4 memory address - register - 0x50 - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR5 - CCR5 - DMA channel configuration register - (DMA_CCR) - 0x58 - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR5 - CNDTR5 - DMA channel 5 number of data - register - 0x5C - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR5 - CPAR5 - DMA channel 5 peripheral address - register - 0x60 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR5 - CMAR5 - DMA channel 5 memory address - register - 0x64 - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR6 - CCR6 - DMA channel configuration register - (DMA_CCR) - 0x6C - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR6 - CNDTR6 - DMA channel 6 number of data - register - 0x70 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR6 - CPAR6 - DMA channel 6 peripheral address - register - 0x74 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR6 - CMAR6 - DMA channel 6 memory address - register - 0x78 - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - CCR7 - CCR7 - DMA channel configuration register - (DMA_CCR) - 0x80 - 0x20 - read-write - 0x00000000 - - - EN - Channel enable - 0 - 1 - - - TCIE - Transfer complete interrupt - enable - 1 - 1 - - - HTIE - Half Transfer interrupt - enable - 2 - 1 - - - TEIE - Transfer error interrupt - enable - 3 - 1 - - - DIR - Data transfer direction - 4 - 1 - - - CIRC - Circular mode - 5 - 1 - - - PINC - Peripheral increment mode - 6 - 1 - - - MINC - Memory increment mode - 7 - 1 - - - PSIZE - Peripheral size - 8 - 2 - - - MSIZE - Memory size - 10 - 2 - - - PL - Channel Priority level - 12 - 2 - - - MEM2MEM - Memory to memory mode - 14 - 1 - - - - - CNDTR7 - CNDTR7 - DMA channel 7 number of data - register - 0x84 - 0x20 - read-write - 0x00000000 - - - NDT - Number of data to transfer - 0 - 16 - - - - - CPAR7 - CPAR7 - DMA channel 7 peripheral address - register - 0x88 - 0x20 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - CMAR7 - CMAR7 - DMA channel 7 memory address - register - 0x8C - 0x20 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - - - DMA2 - 0x40020400 - - DMA2_CH1 - DMA2 channel1 global interrupt - 56 - - - DMA2_CH2 - DMA2 channel2 global interrupt - 57 - - - DMA2_CH3 - DMA2 channel3 global interrupt - 58 - - - DMA2_CH4 - DMA2 channel4 global interrupt - 59 - - - DMA2_CH5 - DMA2 channel5 global interrupt - 60 - - - - TIM2 - General purpose timer - TIMs - 0x40000000 - - 0x0 - 0x400 - registers - - - TIM2 - TIM2 global interrupt - 28 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CEN - Counter enable - 0 - 1 - - - UDIS - Update disable - 1 - 1 - - - URS - Update request source - 2 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - DIR - Direction - 4 - 1 - - - CMS - Center-aligned mode - selection - 5 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - CKD - Clock division - 8 - 2 - - - UIFREMAP - UIF status bit remapping - 11 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - TI1S - TI1 selection - 7 - 1 - - - MMS - Master mode selection - 4 - 3 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - - - SMCR - SMCR - slave mode control register - 0x8 - 0x20 - read-write - 0x0000 - - - SMS - Slave mode selection - 0 - 3 - - - OCCS - OCREF clear selection - 3 - 1 - - - TS - Trigger selection - 4 - 3 - - - MSM - Master/Slave mode - 7 - 1 - - - ETF - External trigger filter - 8 - 4 - - - ETPS - External trigger prescaler - 12 - 2 - - - ECE - External clock enable - 14 - 1 - - - ETP - External trigger polarity - 15 - 1 - - - SMS_3 - Slave mode selection bit3 - 16 - 1 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - TDE - Trigger DMA request enable - 14 - 1 - - - CC4DE - Capture/Compare 4 DMA request - enable - 12 - 1 - - - CC3DE - Capture/Compare 3 DMA request - enable - 11 - 1 - - - CC2DE - Capture/Compare 2 DMA request - enable - 10 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - CC4IE - Capture/Compare 4 interrupt - enable - 4 - 1 - - - CC3IE - Capture/Compare 3 interrupt - enable - 3 - 1 - - - CC2IE - Capture/Compare 2 interrupt - enable - 2 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC4OF - Capture/Compare 4 overcapture - flag - 12 - 1 - - - CC3OF - Capture/Compare 3 overcapture - flag - 11 - 1 - - - CC2OF - Capture/compare 2 overcapture - flag - 10 - 1 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - CC4IF - Capture/Compare 4 interrupt - flag - 4 - 1 - - - CC3IF - Capture/Compare 3 interrupt - flag - 3 - 1 - - - CC2IF - Capture/Compare 2 interrupt - flag - 2 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - TG - Trigger generation - 6 - 1 - - - CC4G - Capture/compare 4 - generation - 4 - 1 - - - CC3G - Capture/compare 3 - generation - 3 - 1 - - - CC2G - Capture/compare 2 - generation - 2 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register 1 (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - OC1FE - Output compare 1 fast - enable - 2 - 1 - - - OC1PE - Output compare 1 preload - enable - 3 - 1 - - - OC1M - Output compare 1 mode - 4 - 3 - - - OC1CE - Output compare 1 clear - enable - 7 - 1 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - OC2FE - Output compare 2 fast - enable - 10 - 1 - - - OC2PE - Output compare 2 preload - enable - 11 - 1 - - - OC2M - Output compare 2 mode - 12 - 3 - - - OC2CE - Output compare 2 clear - enable - 15 - 1 - - - OC1M_3 - Output compare 1 mode bit - 3 - 16 - 1 - - - OC2M_3 - Output compare 2 mode bit - 3 - 24 - 1 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC2F - Input capture 2 filter - 12 - 4 - - - IC2PSC - Input capture 2 prescaler - 10 - 2 - - - CC2S - Capture/compare 2 - selection - 8 - 2 - - - IC1F - Input capture 1 filter - 4 - 4 - - - IC1PSC - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR2_Output - CCMR2_Output - capture/compare mode register 2 (output - mode) - 0x1C - 0x20 - read-write - 0x00000000 - - - CC3S - Capture/Compare 3 - selection - 0 - 2 - - - OC3FE - Output compare 3 fast - enable - 2 - 1 - - - OC3PE - Output compare 3 preload - enable - 3 - 1 - - - OC3M - Output compare 3 mode - 4 - 3 - - - OC3CE - Output compare 3 clear - enable - 7 - 1 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - OC4FE - Output compare 4 fast - enable - 10 - 1 - - - OC4PE - Output compare 4 preload - enable - 11 - 1 - - - OC4M - Output compare 4 mode - 12 - 3 - - - O24CE - Output compare 4 clear - enable - 15 - 1 - - - OC3M_3 - Output compare 3 mode bit3 - 16 - 1 - - - OC4M_3 - Output compare 4 mode bit3 - 24 - 1 - - - - - CCMR2_Input - CCMR2_Input - capture/compare mode register 2 (input - mode) - CCMR2_Output - 0x1C - 0x20 - read-write - 0x00000000 - - - IC4F - Input capture 4 filter - 12 - 4 - - - IC4PSC - Input capture 4 prescaler - 10 - 2 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - IC3F - Input capture 3 filter - 4 - 4 - - - IC3PSC - Input capture 3 prescaler - 2 - 2 - - - CC3S - Capture/Compare 3 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC2E - Capture/Compare 2 output - enable - 4 - 1 - - - CC2P - Capture/Compare 2 output - Polarity - 5 - 1 - - - CC2NP - Capture/Compare 2 output - Polarity - 7 - 1 - - - CC3E - Capture/Compare 3 output - enable - 8 - 1 - - - CC3P - Capture/Compare 3 output - Polarity - 9 - 1 - - - CC3NP - Capture/Compare 3 output - Polarity - 11 - 1 - - - CC4E - Capture/Compare 4 output - enable - 12 - 1 - - - CC4P - Capture/Compare 3 output - Polarity - 13 - 1 - - - CC4NP - Capture/Compare 3 output - Polarity - 15 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - read-write - 0x00000000 - - - CNTL - Low counter value - 0 - 16 - - - CNTH - High counter value - 16 - 15 - - - CNT_or_UIFCPY - if IUFREMAP=0 than CNT with read write - access else UIFCPY with read only - access - 31 - 1 - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARRL - Low Auto-reload value - 0 - 16 - - - ARRH - High Auto-reload value - 16 - 16 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1L - Low Capture/Compare 1 - value - 0 - 16 - - - CCR1H - High Capture/Compare 1 value (on - TIM2) - 16 - 16 - - - - - CCR2 - CCR2 - capture/compare register 2 - 0x38 - 0x20 - read-write - 0x00000000 - - - CCR2L - Low Capture/Compare 2 - value - 0 - 16 - - - CCR2H - High Capture/Compare 2 value (on - TIM2) - 16 - 16 - - - - - CCR3 - CCR3 - capture/compare register 3 - 0x3C - 0x20 - read-write - 0x00000000 - - - CCR3L - Low Capture/Compare value - 0 - 16 - - - CCR3H - High Capture/Compare value (on - TIM2) - 16 - 16 - - - - - CCR4 - CCR4 - capture/compare register 4 - 0x40 - 0x20 - read-write - 0x00000000 - - - CCR4L - Low Capture/Compare value - 0 - 16 - - - CCR4H - High Capture/Compare value (on - TIM2) - 16 - 16 - - - - - DCR - DCR - DMA control register - 0x48 - 0x20 - read-write - 0x0000 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - DMAR - DMA address for full transfer - 0x4C - 0x20 - read-write - 0x0000 - - - DMAB - DMA register for burst - accesses - 0 - 16 - - - - - - - TIM3 - 0x40000400 - - TIM3 - TIM3 global interrupt - 29 - - - - TIM4 - 0x40000800 - - TIM4 - TIM4 global interrupt - 30 - - - - TIM15 - General purpose timers - TIMs - 0x40014000 - - 0x0 - 0x400 - registers - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CEN - Counter enable - 0 - 1 - - - UDIS - Update disable - 1 - 1 - - - URS - Update request source - 2 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - CKD - Clock division - 8 - 2 - - - UIFREMAP - UIF status bit remapping - 11 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - CCPC - Capture/compare preloaded - control - 0 - 1 - - - CCUS - Capture/compare control update - selection - 2 - 1 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - MMS - Master mode selection - 4 - 3 - - - TI1S - TI1 selection - 7 - 1 - - - OIS1 - Output Idle state 1 - 8 - 1 - - - OIS1N - Output Idle state 1 - 9 - 1 - - - OIS2 - Output Idle state 2 - 10 - 1 - - - - - SMCR - SMCR - slave mode control register - 0x8 - 0x20 - read-write - 0x0000 - - - SMS - Slave mode selection - 0 - 3 - - - TS - Trigger selection - 4 - 3 - - - MSM - Master/Slave mode - 7 - 1 - - - SMS_3 - Slave mode selection bit 3 - 16 - 1 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - UIE - Update interrupt enable - 0 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - CC2IE - Capture/Compare 2 interrupt - enable - 2 - 1 - - - COMIE - COM interrupt enable - 5 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - BIE - Break interrupt enable - 7 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - CC2DE - Capture/Compare 2 DMA request - enable - 10 - 1 - - - COMDE - COM DMA request enable - 13 - 1 - - - TDE - Trigger DMA request enable - 14 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC2OF - Capture/compare 2 overcapture - flag - 10 - 1 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - BIF - Break interrupt flag - 7 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - COMIF - COM interrupt flag - 5 - 1 - - - CC2IF - Capture/Compare 2 interrupt - flag - 2 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - BG - Break generation - 7 - 1 - - - TG - Trigger generation - 6 - 1 - - - COMG - Capture/Compare control update - generation - 5 - 1 - - - CC2G - Capture/compare 2 - generation - 2 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - OC1FE - Output Compare 1 fast - enable - 2 - 1 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - OC2FE - Output Compare 2 fast - enable - 10 - 1 - - - OC2PE - Output Compare 2 preload - enable - 11 - 1 - - - OC2M - Output Compare 2 mode - 12 - 3 - - - OC1M_3 - Output Compare 1 mode bit - 3 - 16 - 1 - - - OC2M_3 - Output Compare 2 mode bit - 3 - 24 - 1 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC2F - Input capture 2 filter - 12 - 4 - - - IC2PSC - Input capture 2 prescaler - 10 - 2 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - IC1F - Input capture 1 filter - 4 - 4 - - - IC1PSC - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC2NP - Capture/Compare 2 output - Polarity - 7 - 1 - - - CC2P - Capture/Compare 2 output - Polarity - 5 - 1 - - - CC2E - Capture/Compare 2 output - enable - 4 - 1 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1NE - Capture/Compare 1 complementary output - enable - 2 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - 0x00000000 - - - CNT - counter value - 0 - 16 - read-write - - - UIFCPY - UIF copy - 31 - 1 - read-only - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - RCR - RCR - repetition counter register - 0x30 - 0x20 - read-write - 0x0000 - - - REP - Repetition counter value - 0 - 8 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - CCR2 - CCR2 - capture/compare register 2 - 0x38 - 0x20 - read-write - 0x00000000 - - - CCR2 - Capture/Compare 2 value - 0 - 16 - - - - - BDTR - BDTR - break and dead-time register - 0x44 - 0x20 - read-write - 0x0000 - - - MOE - Main output enable - 15 - 1 - - - AOE - Automatic output enable - 14 - 1 - - - BKP - Break polarity - 13 - 1 - - - BKE - Break enable - 12 - 1 - - - OSSR - Off-state selection for Run - mode - 11 - 1 - - - OSSI - Off-state selection for Idle - mode - 10 - 1 - - - LOCK - Lock configuration - 8 - 2 - - - DTG - Dead-time generator setup - 0 - 8 - - - BKF - Break filter - 16 - 4 - - - - - DCR - DCR - DMA control register - 0x48 - 0x20 - read-write - 0x0000 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - DMAR - DMA address for full transfer - 0x4C - 0x20 - read-write - 0x0000 - - - DMAB - DMA register for burst - accesses - 0 - 16 - - - - - - - TIM16 - General-purpose-timers - TIMs - 0x40014400 - - 0x0 - 0x400 - registers - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CEN - Counter enable - 0 - 1 - - - UDIS - Update disable - 1 - 1 - - - URS - Update request source - 2 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - CKD - Clock division - 8 - 2 - - - UIFREMAP - UIF status bit remapping - 11 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - OIS1N - Output Idle state 1 - 9 - 1 - - - OIS1 - Output Idle state 1 - 8 - 1 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - CCUS - Capture/compare control update - selection - 2 - 1 - - - CCPC - Capture/compare preloaded - control - 0 - 1 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - UIE - Update interrupt enable - 0 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - COMIE - COM interrupt enable - 5 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - BIE - Break interrupt enable - 7 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - COMDE - COM DMA request enable - 13 - 1 - - - TDE - Trigger DMA request enable - 14 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - BIF - Break interrupt flag - 7 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - COMIF - COM interrupt flag - 5 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - BG - Break generation - 7 - 1 - - - TG - Trigger generation - 6 - 1 - - - COMG - Capture/Compare control update - generation - 5 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - OC1FE - Output Compare 1 fast - enable - 2 - 1 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - OC1M_3 - Output Compare 1 mode - 16 - 1 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC1F - Input capture 1 filter - 4 - 4 - - - IC1PSC - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1NE - Capture/Compare 1 complementary output - enable - 2 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - 0x00000000 - - - CNT - counter value - 0 - 16 - read-write - - - UIFCPY - UIF Copy - 31 - 1 - read-only - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - RCR - RCR - repetition counter register - 0x30 - 0x20 - read-write - 0x0000 - - - REP - Repetition counter value - 0 - 8 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - BDTR - BDTR - break and dead-time register - 0x44 - 0x20 - read-write - 0x0000 - - - DTG - Dead-time generator setup - 0 - 8 - - - LOCK - Lock configuration - 8 - 2 - - - OSSI - Off-state selection for Idle - mode - 10 - 1 - - - OSSR - Off-state selection for Run - mode - 11 - 1 - - - BKE - Break enable - 12 - 1 - - - BKP - Break polarity - 13 - 1 - - - AOE - Automatic output enable - 14 - 1 - - - MOE - Main output enable - 15 - 1 - - - BKF - Break filter - 16 - 4 - - - - - DCR - DCR - DMA control register - 0x48 - 0x20 - read-write - 0x0000 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - DMAR - DMA address for full transfer - 0x4C - 0x20 - read-write - 0x0000 - - - DMAB - DMA register for burst - accesses - 0 - 16 - - - - - OR - OR - option register - 0x50 - 0x20 - read-write - 0x0000 - - - - - TIM17 - General purpose timer - TIMs - 0x40014800 - - 0x0 - 0x400 - registers - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CEN - Counter enable - 0 - 1 - - - UDIS - Update disable - 1 - 1 - - - URS - Update request source - 2 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - CKD - Clock division - 8 - 2 - - - UIFREMAP - UIF status bit remapping - 11 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - OIS1N - Output Idle state 1 - 9 - 1 - - - OIS1 - Output Idle state 1 - 8 - 1 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - CCUS - Capture/compare control update - selection - 2 - 1 - - - CCPC - Capture/compare preloaded - control - 0 - 1 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - UIE - Update interrupt enable - 0 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - COMIE - COM interrupt enable - 5 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - BIE - Break interrupt enable - 7 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - COMDE - COM DMA request enable - 13 - 1 - - - TDE - Trigger DMA request enable - 14 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - BIF - Break interrupt flag - 7 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - COMIF - COM interrupt flag - 5 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - BG - Break generation - 7 - 1 - - - TG - Trigger generation - 6 - 1 - - - COMG - Capture/Compare control update - generation - 5 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - OC1FE - Output Compare 1 fast - enable - 2 - 1 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - OC1M_3 - Output Compare 1 mode - 16 - 1 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC1F - Input capture 1 filter - 4 - 4 - - - IC1PSC - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1NE - Capture/Compare 1 complementary output - enable - 2 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - 0x00000000 - - - CNT - counter value - 0 - 16 - read-write - - - UIFCPY - UIF Copy - 31 - 1 - read-only - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - RCR - RCR - repetition counter register - 0x30 - 0x20 - read-write - 0x0000 - - - REP - Repetition counter value - 0 - 8 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - BDTR - BDTR - break and dead-time register - 0x44 - 0x20 - read-write - 0x0000 - - - DTG - Dead-time generator setup - 0 - 8 - - - LOCK - Lock configuration - 8 - 2 - - - OSSI - Off-state selection for Idle - mode - 10 - 1 - - - OSSR - Off-state selection for Run - mode - 11 - 1 - - - BKE - Break enable - 12 - 1 - - - BKP - Break polarity - 13 - 1 - - - AOE - Automatic output enable - 14 - 1 - - - MOE - Main output enable - 15 - 1 - - - BKF - Break filter - 16 - 4 - - - - - DCR - DCR - DMA control register - 0x48 - 0x20 - read-write - 0x0000 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - DMAR - DMA address for full transfer - 0x4C - 0x20 - read-write - 0x0000 - - - DMAB - DMA register for burst - accesses - 0 - 16 - - - - - - - USART1 - Universal synchronous asynchronous receiver - transmitter - USART - 0x40013800 - - 0x0 - 0x400 - registers - - - USART1_EXTI25 - USART1 global interrupt and EXTI Line 25 - interrupt - 37 - - - - CR1 - CR1 - Control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - EOBIE - End of Block interrupt - enable - 27 - 1 - - - RTOIE - Receiver timeout interrupt - enable - 26 - 1 - - - DEAT - Driver Enable assertion - time - 21 - 5 - - - DEDT - Driver Enable deassertion - time - 16 - 5 - - - OVER8 - Oversampling mode - 15 - 1 - - - CMIE - Character match interrupt - enable - 14 - 1 - - - MME - Mute mode enable - 13 - 1 - - - M - Word length - 12 - 1 - - - WAKE - Receiver wakeup method - 11 - 1 - - - PCE - Parity control enable - 10 - 1 - - - PS - Parity selection - 9 - 1 - - - PEIE - PE interrupt enable - 8 - 1 - - - TXEIE - interrupt enable - 7 - 1 - - - TCIE - Transmission complete interrupt - enable - 6 - 1 - - - RXNEIE - RXNE interrupt enable - 5 - 1 - - - IDLEIE - IDLE interrupt enable - 4 - 1 - - - TE - Transmitter enable - 3 - 1 - - - RE - Receiver enable - 2 - 1 - - - UESM - USART enable in Stop mode - 1 - 1 - - - UE - USART enable - 0 - 1 - - - - - CR2 - CR2 - Control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - ADD4 - Address of the USART node - 28 - 4 - - - ADD0 - Address of the USART node - 24 - 4 - - - RTOEN - Receiver timeout enable - 23 - 1 - - - ABRMOD - Auto baud rate mode - 21 - 2 - - - ABREN - Auto baud rate enable - 20 - 1 - - - MSBFIRST - Most significant bit first - 19 - 1 - - - DATAINV - Binary data inversion - 18 - 1 - - - TXINV - TX pin active level - inversion - 17 - 1 - - - RXINV - RX pin active level - inversion - 16 - 1 - - - SWAP - Swap TX/RX pins - 15 - 1 - - - LINEN - LIN mode enable - 14 - 1 - - - STOP - STOP bits - 12 - 2 - - - CLKEN - Clock enable - 11 - 1 - - - CPOL - Clock polarity - 10 - 1 - - - CPHA - Clock phase - 9 - 1 - - - LBCL - Last bit clock pulse - 8 - 1 - - - LBDIE - LIN break detection interrupt - enable - 6 - 1 - - - LBDL - LIN break detection length - 5 - 1 - - - ADDM7 - 7-bit Address Detection/4-bit Address - Detection - 4 - 1 - - - - - CR3 - CR3 - Control register 3 - 0x8 - 0x20 - read-write - 0x0000 - - - WUFIE - Wakeup from Stop mode interrupt - enable - 22 - 1 - - - WUS - Wakeup from Stop mode interrupt flag - selection - 20 - 2 - - - SCARCNT - Smartcard auto-retry count - 17 - 3 - - - DEP - Driver enable polarity - selection - 15 - 1 - - - DEM - Driver enable mode - 14 - 1 - - - DDRE - DMA Disable on Reception - Error - 13 - 1 - - - OVRDIS - Overrun Disable - 12 - 1 - - - ONEBIT - One sample bit method - enable - 11 - 1 - - - CTSIE - CTS interrupt enable - 10 - 1 - - - CTSE - CTS enable - 9 - 1 - - - RTSE - RTS enable - 8 - 1 - - - DMAT - DMA enable transmitter - 7 - 1 - - - DMAR - DMA enable receiver - 6 - 1 - - - SCEN - Smartcard mode enable - 5 - 1 - - - NACK - Smartcard NACK enable - 4 - 1 - - - HDSEL - Half-duplex selection - 3 - 1 - - - IRLP - IrDA low-power - 2 - 1 - - - IREN - IrDA mode enable - 1 - 1 - - - EIE - Error interrupt enable - 0 - 1 - - - - - BRR - BRR - Baud rate register - 0xC - 0x20 - read-write - 0x0000 - - - DIV_Mantissa - mantissa of USARTDIV - 4 - 12 - - - DIV_Fraction - fraction of USARTDIV - 0 - 4 - - - - - GTPR - GTPR - Guard time and prescaler - register - 0x10 - 0x20 - read-write - 0x0000 - - - GT - Guard time value - 8 - 8 - - - PSC - Prescaler value - 0 - 8 - - - - - RTOR - RTOR - Receiver timeout register - 0x14 - 0x20 - read-write - 0x0000 - - - BLEN - Block Length - 24 - 8 - - - RTO - Receiver timeout value - 0 - 24 - - - - - RQR - RQR - Request register - 0x18 - 0x20 - read-write - 0x0000 - - - TXFRQ - Transmit data flush - request - 4 - 1 - - - RXFRQ - Receive data flush request - 3 - 1 - - - MMRQ - Mute mode request - 2 - 1 - - - SBKRQ - Send break request - 1 - 1 - - - ABRRQ - Auto baud rate request - 0 - 1 - - - - - ISR - ISR - Interrupt & status - register - 0x1C - 0x20 - read-only - 0x00C0 - - - REACK - Receive enable acknowledge - flag - 22 - 1 - - - TEACK - Transmit enable acknowledge - flag - 21 - 1 - - - WUF - Wakeup from Stop mode flag - 20 - 1 - - - RWU - Receiver wakeup from Mute - mode - 19 - 1 - - - SBKF - Send break flag - 18 - 1 - - - CMF - character match flag - 17 - 1 - - - BUSY - Busy flag - 16 - 1 - - - ABRF - Auto baud rate flag - 15 - 1 - - - ABRE - Auto baud rate error - 14 - 1 - - - EOBF - End of block flag - 12 - 1 - - - RTOF - Receiver timeout - 11 - 1 - - - CTS - CTS flag - 10 - 1 - - - CTSIF - CTS interrupt flag - 9 - 1 - - - LBDF - LIN break detection flag - 8 - 1 - - - TXE - Transmit data register - empty - 7 - 1 - - - TC - Transmission complete - 6 - 1 - - - RXNE - Read data register not - empty - 5 - 1 - - - IDLE - Idle line detected - 4 - 1 - - - ORE - Overrun error - 3 - 1 - - - NF - Noise detected flag - 2 - 1 - - - FE - Framing error - 1 - 1 - - - PE - Parity error - 0 - 1 - - - - - ICR - ICR - Interrupt flag clear register - 0x20 - 0x20 - read-write - 0x0000 - - - WUCF - Wakeup from Stop mode clear - flag - 20 - 1 - - - CMCF - Character match clear flag - 17 - 1 - - - EOBCF - End of timeout clear flag - 12 - 1 - - - RTOCF - Receiver timeout clear - flag - 11 - 1 - - - CTSCF - CTS clear flag - 9 - 1 - - - LBDCF - LIN break detection clear - flag - 8 - 1 - - - TCCF - Transmission complete clear - flag - 6 - 1 - - - IDLECF - Idle line detected clear - flag - 4 - 1 - - - ORECF - Overrun error clear flag - 3 - 1 - - - NCF - Noise detected clear flag - 2 - 1 - - - FECF - Framing error clear flag - 1 - 1 - - - PECF - Parity error clear flag - 0 - 1 - - - - - RDR - RDR - Receive data register - 0x24 - 0x20 - read-only - 0x0000 - - - RDR - Receive data value - 0 - 9 - - - - - TDR - TDR - Transmit data register - 0x28 - 0x20 - read-write - 0x0000 - - - TDR - Transmit data value - 0 - 9 - - - - - - - USART2 - 0x40004400 - - USART2_EXTI26 - USART2 global interrupt and EXTI Line 26 - interrupt - 38 - - - - USART3 - 0x40004800 - - USART3_EXTI28 - USART3 global interrupt and EXTI Line 28 - interrupt - 39 - - - - UART4 - 0x40004C00 - - UART4_EXTI34 - UART4 global and EXTI Line 34 - interrupts - 52 - - - - UART5 - 0x40005000 - - UART5_EXTI35 - UART5 global and EXTI Line 35 - interrupts - 53 - - - - SPI1 - Serial peripheral interface/Inter-IC - sound - SPI - 0x40013000 - - 0x0 - 0x400 - registers - - - SPI1 - SPI1 global interrupt - 35 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x00000000 - - - BIDIMODE - Bidirectional data mode - enable - 15 - 1 - - - BIDIOE - Output enable in bidirectional - mode - 14 - 1 - - - CRCEN - Hardware CRC calculation - enable - 13 - 1 - - - CRCNEXT - CRC transfer next - 12 - 1 - - - CRCL - CRC length - 11 - 1 - - - RXONLY - Receive only - 10 - 1 - - - SSM - Software slave management - 9 - 1 - - - SSI - Internal slave select - 8 - 1 - - - LSBFIRST - Frame format - 7 - 1 - - - SPE - SPI enable - 6 - 1 - - - BR - Baud rate control - 3 - 3 - - - MSTR - Master selection - 2 - 1 - - - CPOL - Clock polarity - 1 - 1 - - - CPHA - Clock phase - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x00000700 - - - RXDMAEN - Rx buffer DMA enable - 0 - 1 - - - TXDMAEN - Tx buffer DMA enable - 1 - 1 - - - SSOE - SS output enable - 2 - 1 - - - NSSP - NSS pulse management - 3 - 1 - - - FRF - Frame format - 4 - 1 - - - ERRIE - Error interrupt enable - 5 - 1 - - - RXNEIE - RX buffer not empty interrupt - enable - 6 - 1 - - - TXEIE - Tx buffer empty interrupt - enable - 7 - 1 - - - DS - Data size - 8 - 4 - - - FRXTH - FIFO reception threshold - 12 - 1 - - - LDMA_RX - Last DMA transfer for - reception - 13 - 1 - - - LDMA_TX - Last DMA transfer for - transmission - 14 - 1 - - - - - SR - SR - status register - 0x8 - 0x20 - 0x00000002 - - - RXNE - Receive buffer not empty - 0 - 1 - read-only - - - TXE - Transmit buffer empty - 1 - 1 - read-only - - - CHSIDE - Channel side - 2 - 1 - read-only - - - UDR - Underrun flag - 3 - 1 - read-only - - - CRCERR - CRC error flag - 4 - 1 - read-write - - - MODF - Mode fault - 5 - 1 - read-only - - - OVR - Overrun flag - 6 - 1 - read-only - - - BSY - Busy flag - 7 - 1 - read-only - - - TIFRFE - TI frame format error - 8 - 1 - read-only - - - FRLVL - FIFO reception level - 9 - 2 - read-only - - - FTLVL - FIFO transmission level - 11 - 2 - read-only - - - - - DR - DR - data register - 0xC - 0x20 - read-write - 0x00000000 - - - DR - Data register - 0 - 16 - - - - - CRCPR - CRCPR - CRC polynomial register - 0x10 - 0x20 - read-write - 0x00000007 - - - CRCPOLY - CRC polynomial register - 0 - 16 - - - - - RXCRCR - RXCRCR - RX CRC register - 0x14 - 0x20 - read-only - 0x00000000 - - - RxCRC - Rx CRC register - 0 - 16 - - - - - TXCRCR - TXCRCR - TX CRC register - 0x18 - 0x20 - read-only - 0x00000000 - - - TxCRC - Tx CRC register - 0 - 16 - - - - - I2SCFGR - I2SCFGR - I2S configuration register - 0x1C - 0x20 - read-write - 0x00000000 - - - I2SMOD - I2S mode selection - 11 - 1 - - - I2SE - I2S Enable - 10 - 1 - - - I2SCFG - I2S configuration mode - 8 - 2 - - - PCMSYNC - PCM frame synchronization - 7 - 1 - - - I2SSTD - I2S standard selection - 4 - 2 - - - CKPOL - Steady state clock - polarity - 3 - 1 - - - DATLEN - Data length to be - transferred - 1 - 2 - - - CHLEN - Channel length (number of bits per audio - channel) - 0 - 1 - - - - - I2SPR - I2SPR - I2S prescaler register - 0x20 - 0x20 - read-write - 0x00000010 - - - MCKOE - Master clock output enable - 9 - 1 - - - ODD - Odd factor for the - prescaler - 8 - 1 - - - I2SDIV - I2S Linear prescaler - 0 - 8 - - - - - - - SPI2 - 0x40003800 - - SPI2 - SPI2 global interrupt - 36 - - - - SPI3 - 0x40003C00 - - SPI3 - SPI3 global interrupt - 51 - - - - SPI4 - 0x40013C00 - - SPI4 - SPI4 Global interrupt - 84 - - - - I2S2ext - Serial peripheral interface/Inter-IC - sound - SPI - 0x40003400 - - 0x0 - 0x400 - registers - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x00000000 - - - BIDIMODE - Bidirectional data mode - enable - 15 - 1 - - - BIDIOE - Output enable in bidirectional - mode - 14 - 1 - - - CRCEN - Hardware CRC calculation - enable - 13 - 1 - - - CRCNEXT - CRC transfer next - 12 - 1 - - - CRCL - CRC length - 11 - 1 - - - RXONLY - Receive only - 10 - 1 - - - SSM - Software slave management - 9 - 1 - - - SSI - Internal slave select - 8 - 1 - - - LSBFIRST - Frame format - 7 - 1 - - - SPE - SPI enable - 6 - 1 - - - BR - Baud rate control - 3 - 3 - - - MSTR - Master selection - 2 - 1 - - - CPOL - Clock polarity - 1 - 1 - - - CPHA - Clock phase - 0 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x00000700 - - - RXDMAEN - Rx buffer DMA enable - 0 - 1 - - - TXDMAEN - Tx buffer DMA enable - 1 - 1 - - - SSOE - SS output enable - 2 - 1 - - - NSSP - NSS pulse management - 3 - 1 - - - FRF - Frame format - 4 - 1 - - - ERRIE - Error interrupt enable - 5 - 1 - - - RXNEIE - RX buffer not empty interrupt - enable - 6 - 1 - - - TXEIE - Tx buffer empty interrupt - enable - 7 - 1 - - - DS - Data size - 8 - 4 - - - FRXTH - FIFO reception threshold - 12 - 1 - - - LDMA_RX - Last DMA transfer for - reception - 13 - 1 - - - LDMA_TX - Last DMA transfer for - transmission - 14 - 1 - - - - - SR - SR - status register - 0x8 - 0x20 - 0x00000002 - - - RXNE - Receive buffer not empty - 0 - 1 - read-only - - - TXE - Transmit buffer empty - 1 - 1 - read-only - - - CHSIDE - Channel side - 2 - 1 - read-only - - - UDR - Underrun flag - 3 - 1 - read-only - - - CRCERR - CRC error flag - 4 - 1 - read-write - - - MODF - Mode fault - 5 - 1 - read-only - - - OVR - Overrun flag - 6 - 1 - read-only - - - BSY - Busy flag - 7 - 1 - read-only - - - TIFRFE - TI frame format error - 8 - 1 - read-only - - - FRLVL - FIFO reception level - 9 - 2 - read-only - - - FTLVL - FIFO transmission level - 11 - 2 - read-only - - - - - DR - DR - data register - 0xC - 0x20 - read-write - 0x00000000 - - - DR - Data register - 0 - 16 - - - - - CRCPR - CRCPR - CRC polynomial register - 0x10 - 0x20 - read-write - 0x00000007 - - - CRCPOLY - CRC polynomial register - 0 - 16 - - - - - RXCRCR - RXCRCR - RX CRC register - 0x14 - 0x20 - read-only - 0x00000000 - - - RxCRC - Rx CRC register - 0 - 16 - - - - - TXCRCR - TXCRCR - TX CRC register - 0x18 - 0x20 - read-only - 0x00000000 - - - TxCRC - Tx CRC register - 0 - 16 - - - - - I2SCFGR - I2SCFGR - I2S configuration register - 0x1C - 0x20 - read-write - 0x00000000 - - - I2SMOD - I2S mode selection - 11 - 1 - - - I2SE - I2S Enable - 10 - 1 - - - I2SCFG - I2S configuration mode - 8 - 2 - - - PCMSYNC - PCM frame synchronization - 7 - 1 - - - I2SSTD - I2S standard selection - 4 - 2 - - - CKPOL - Steady state clock - polarity - 3 - 1 - - - DATLEN - Data length to be - transferred - 1 - 2 - - - CHLEN - Channel length (number of bits per audio - channel) - 0 - 1 - - - - - I2SPR - I2SPR - I2S prescaler register - 0x20 - 0x20 - read-write - 0x00000002 - - - MCKOE - Master clock output enable - 9 - 1 - - - ODD - Odd factor for the - prescaler - 8 - 1 - - - I2SDIV - I2S Linear prescaler - 0 - 8 - - - - - - - I2S3ext - 0x40004000 - - - EXTI - External interrupt/event - controller - EXTI - 0x40010400 - - 0x0 - 0x400 - registers - - - TAMP_STAMP - Tamper and TimeStamp interrupts - 2 - - - EXTI0 - EXTI Line0 interrupt - 6 - - - EXTI1 - EXTI Line3 interrupt - 7 - - - EXTI2_TSC - EXTI Line2 and Touch sensing - interrupts - 8 - - - EXTI3 - EXTI Line3 interrupt - 9 - - - EXTI4 - EXTI Line4 interrupt - 10 - - - EXTI9_5 - EXTI Line5 to Line9 interrupts - 23 - - - EXTI15_10 - EXTI Line15 to Line10 interrupts - 40 - - - USB_WKUP_EXTI - USB wakeup from Suspend and EXTI Line - 18 - 76 - - - - IMR1 - IMR1 - Interrupt mask register - 0x0 - 0x20 - read-write - 0x1F800000 - - - MR0 - Interrupt Mask on line 0 - 0 - 1 - - - MR1 - Interrupt Mask on line 1 - 1 - 1 - - - MR2 - Interrupt Mask on line 2 - 2 - 1 - - - MR3 - Interrupt Mask on line 3 - 3 - 1 - - - MR4 - Interrupt Mask on line 4 - 4 - 1 - - - MR5 - Interrupt Mask on line 5 - 5 - 1 - - - MR6 - Interrupt Mask on line 6 - 6 - 1 - - - MR7 - Interrupt Mask on line 7 - 7 - 1 - - - MR8 - Interrupt Mask on line 8 - 8 - 1 - - - MR9 - Interrupt Mask on line 9 - 9 - 1 - - - MR10 - Interrupt Mask on line 10 - 10 - 1 - - - MR11 - Interrupt Mask on line 11 - 11 - 1 - - - MR12 - Interrupt Mask on line 12 - 12 - 1 - - - MR13 - Interrupt Mask on line 13 - 13 - 1 - - - MR14 - Interrupt Mask on line 14 - 14 - 1 - - - MR15 - Interrupt Mask on line 15 - 15 - 1 - - - MR16 - Interrupt Mask on line 16 - 16 - 1 - - - MR17 - Interrupt Mask on line 17 - 17 - 1 - - - MR18 - Interrupt Mask on line 18 - 18 - 1 - - - MR19 - Interrupt Mask on line 19 - 19 - 1 - - - MR20 - Interrupt Mask on line 20 - 20 - 1 - - - MR21 - Interrupt Mask on line 21 - 21 - 1 - - - MR22 - Interrupt Mask on line 22 - 22 - 1 - - - MR23 - Interrupt Mask on line 23 - 23 - 1 - - - MR24 - Interrupt Mask on line 24 - 24 - 1 - - - MR25 - Interrupt Mask on line 25 - 25 - 1 - - - MR26 - Interrupt Mask on line 26 - 26 - 1 - - - MR27 - Interrupt Mask on line 27 - 27 - 1 - - - MR28 - Interrupt Mask on line 28 - 28 - 1 - - - MR29 - Interrupt Mask on line 29 - 29 - 1 - - - MR30 - Interrupt Mask on line 30 - 30 - 1 - - - MR31 - Interrupt Mask on line 31 - 31 - 1 - - - - - EMR1 - EMR1 - Event mask register - 0x4 - 0x20 - read-write - 0x00000000 - - - MR0 - Event Mask on line 0 - 0 - 1 - - - MR1 - Event Mask on line 1 - 1 - 1 - - - MR2 - Event Mask on line 2 - 2 - 1 - - - MR3 - Event Mask on line 3 - 3 - 1 - - - MR4 - Event Mask on line 4 - 4 - 1 - - - MR5 - Event Mask on line 5 - 5 - 1 - - - MR6 - Event Mask on line 6 - 6 - 1 - - - MR7 - Event Mask on line 7 - 7 - 1 - - - MR8 - Event Mask on line 8 - 8 - 1 - - - MR9 - Event Mask on line 9 - 9 - 1 - - - MR10 - Event Mask on line 10 - 10 - 1 - - - MR11 - Event Mask on line 11 - 11 - 1 - - - MR12 - Event Mask on line 12 - 12 - 1 - - - MR13 - Event Mask on line 13 - 13 - 1 - - - MR14 - Event Mask on line 14 - 14 - 1 - - - MR15 - Event Mask on line 15 - 15 - 1 - - - MR16 - Event Mask on line 16 - 16 - 1 - - - MR17 - Event Mask on line 17 - 17 - 1 - - - MR18 - Event Mask on line 18 - 18 - 1 - - - MR19 - Event Mask on line 19 - 19 - 1 - - - MR20 - Event Mask on line 20 - 20 - 1 - - - MR21 - Event Mask on line 21 - 21 - 1 - - - MR22 - Event Mask on line 22 - 22 - 1 - - - MR23 - Event Mask on line 23 - 23 - 1 - - - MR24 - Event Mask on line 24 - 24 - 1 - - - MR25 - Event Mask on line 25 - 25 - 1 - - - MR26 - Event Mask on line 26 - 26 - 1 - - - MR27 - Event Mask on line 27 - 27 - 1 - - - MR28 - Event Mask on line 28 - 28 - 1 - - - MR29 - Event Mask on line 29 - 29 - 1 - - - MR30 - Event Mask on line 30 - 30 - 1 - - - MR31 - Event Mask on line 31 - 31 - 1 - - - - - RTSR1 - RTSR1 - Rising Trigger selection - register - 0x8 - 0x20 - read-write - 0x00000000 - - - TR0 - Rising trigger event configuration of - line 0 - 0 - 1 - - - TR1 - Rising trigger event configuration of - line 1 - 1 - 1 - - - TR2 - Rising trigger event configuration of - line 2 - 2 - 1 - - - TR3 - Rising trigger event configuration of - line 3 - 3 - 1 - - - TR4 - Rising trigger event configuration of - line 4 - 4 - 1 - - - TR5 - Rising trigger event configuration of - line 5 - 5 - 1 - - - TR6 - Rising trigger event configuration of - line 6 - 6 - 1 - - - TR7 - Rising trigger event configuration of - line 7 - 7 - 1 - - - TR8 - Rising trigger event configuration of - line 8 - 8 - 1 - - - TR9 - Rising trigger event configuration of - line 9 - 9 - 1 - - - TR10 - Rising trigger event configuration of - line 10 - 10 - 1 - - - TR11 - Rising trigger event configuration of - line 11 - 11 - 1 - - - TR12 - Rising trigger event configuration of - line 12 - 12 - 1 - - - TR13 - Rising trigger event configuration of - line 13 - 13 - 1 - - - TR14 - Rising trigger event configuration of - line 14 - 14 - 1 - - - TR15 - Rising trigger event configuration of - line 15 - 15 - 1 - - - TR16 - Rising trigger event configuration of - line 16 - 16 - 1 - - - TR17 - Rising trigger event configuration of - line 17 - 17 - 1 - - - TR18 - Rising trigger event configuration of - line 18 - 18 - 1 - - - TR19 - Rising trigger event configuration of - line 19 - 19 - 1 - - - TR20 - Rising trigger event configuration of - line 20 - 20 - 1 - - - TR21 - Rising trigger event configuration of - line 21 - 21 - 1 - - - TR22 - Rising trigger event configuration of - line 22 - 22 - 1 - - - TR29 - Rising trigger event configuration of - line 29 - 29 - 1 - - - TR30 - Rising trigger event configuration of - line 30 - 30 - 1 - - - TR31 - Rising trigger event configuration of - line 31 - 31 - 1 - - - - - FTSR1 - FTSR1 - Falling Trigger selection - register - 0xC - 0x20 - read-write - 0x00000000 - - - TR0 - Falling trigger event configuration of - line 0 - 0 - 1 - - - TR1 - Falling trigger event configuration of - line 1 - 1 - 1 - - - TR2 - Falling trigger event configuration of - line 2 - 2 - 1 - - - TR3 - Falling trigger event configuration of - line 3 - 3 - 1 - - - TR4 - Falling trigger event configuration of - line 4 - 4 - 1 - - - TR5 - Falling trigger event configuration of - line 5 - 5 - 1 - - - TR6 - Falling trigger event configuration of - line 6 - 6 - 1 - - - TR7 - Falling trigger event configuration of - line 7 - 7 - 1 - - - TR8 - Falling trigger event configuration of - line 8 - 8 - 1 - - - TR9 - Falling trigger event configuration of - line 9 - 9 - 1 - - - TR10 - Falling trigger event configuration of - line 10 - 10 - 1 - - - TR11 - Falling trigger event configuration of - line 11 - 11 - 1 - - - TR12 - Falling trigger event configuration of - line 12 - 12 - 1 - - - TR13 - Falling trigger event configuration of - line 13 - 13 - 1 - - - TR14 - Falling trigger event configuration of - line 14 - 14 - 1 - - - TR15 - Falling trigger event configuration of - line 15 - 15 - 1 - - - TR16 - Falling trigger event configuration of - line 16 - 16 - 1 - - - TR17 - Falling trigger event configuration of - line 17 - 17 - 1 - - - TR18 - Falling trigger event configuration of - line 18 - 18 - 1 - - - TR19 - Falling trigger event configuration of - line 19 - 19 - 1 - - - TR20 - Falling trigger event configuration of - line 20 - 20 - 1 - - - TR21 - Falling trigger event configuration of - line 21 - 21 - 1 - - - TR22 - Falling trigger event configuration of - line 22 - 22 - 1 - - - TR29 - Falling trigger event configuration of - line 29 - 29 - 1 - - - TR30 - Falling trigger event configuration of - line 30. - 30 - 1 - - - TR31 - Falling trigger event configuration of - line 31 - 31 - 1 - - - - - SWIER1 - SWIER1 - Software interrupt event - register - 0x10 - 0x20 - read-write - 0x00000000 - - - SWIER0 - Software Interrupt on line - 0 - 0 - 1 - - - SWIER1 - Software Interrupt on line - 1 - 1 - 1 - - - SWIER2 - Software Interrupt on line - 2 - 2 - 1 - - - SWIER3 - Software Interrupt on line - 3 - 3 - 1 - - - SWIER4 - Software Interrupt on line - 4 - 4 - 1 - - - SWIER5 - Software Interrupt on line - 5 - 5 - 1 - - - SWIER6 - Software Interrupt on line - 6 - 6 - 1 - - - SWIER7 - Software Interrupt on line - 7 - 7 - 1 - - - SWIER8 - Software Interrupt on line - 8 - 8 - 1 - - - SWIER9 - Software Interrupt on line - 9 - 9 - 1 - - - SWIER10 - Software Interrupt on line - 10 - 10 - 1 - - - SWIER11 - Software Interrupt on line - 11 - 11 - 1 - - - SWIER12 - Software Interrupt on line - 12 - 12 - 1 - - - SWIER13 - Software Interrupt on line - 13 - 13 - 1 - - - SWIER14 - Software Interrupt on line - 14 - 14 - 1 - - - SWIER15 - Software Interrupt on line - 15 - 15 - 1 - - - SWIER16 - Software Interrupt on line - 16 - 16 - 1 - - - SWIER17 - Software Interrupt on line - 17 - 17 - 1 - - - SWIER18 - Software Interrupt on line - 18 - 18 - 1 - - - SWIER19 - Software Interrupt on line - 19 - 19 - 1 - - - SWIER20 - Software Interrupt on line - 20 - 20 - 1 - - - SWIER21 - Software Interrupt on line - 21 - 21 - 1 - - - SWIER22 - Software Interrupt on line - 22 - 22 - 1 - - - SWIER29 - Software Interrupt on line - 29 - 29 - 1 - - - SWIER30 - Software Interrupt on line - 309 - 30 - 1 - - - SWIER31 - Software Interrupt on line - 319 - 31 - 1 - - - - - PR1 - PR1 - Pending register - 0x14 - 0x20 - read-write - 0x00000000 - - - PR0 - Pending bit 0 - 0 - 1 - - - PR1 - Pending bit 1 - 1 - 1 - - - PR2 - Pending bit 2 - 2 - 1 - - - PR3 - Pending bit 3 - 3 - 1 - - - PR4 - Pending bit 4 - 4 - 1 - - - PR5 - Pending bit 5 - 5 - 1 - - - PR6 - Pending bit 6 - 6 - 1 - - - PR7 - Pending bit 7 - 7 - 1 - - - PR8 - Pending bit 8 - 8 - 1 - - - PR9 - Pending bit 9 - 9 - 1 - - - PR10 - Pending bit 10 - 10 - 1 - - - PR11 - Pending bit 11 - 11 - 1 - - - PR12 - Pending bit 12 - 12 - 1 - - - PR13 - Pending bit 13 - 13 - 1 - - - PR14 - Pending bit 14 - 14 - 1 - - - PR15 - Pending bit 15 - 15 - 1 - - - PR16 - Pending bit 16 - 16 - 1 - - - PR17 - Pending bit 17 - 17 - 1 - - - PR18 - Pending bit 18 - 18 - 1 - - - PR19 - Pending bit 19 - 19 - 1 - - - PR20 - Pending bit 20 - 20 - 1 - - - PR21 - Pending bit 21 - 21 - 1 - - - PR22 - Pending bit 22 - 22 - 1 - - - PR29 - Pending bit 29 - 29 - 1 - - - PR30 - Pending bit 30 - 30 - 1 - - - PR31 - Pending bit 31 - 31 - 1 - - - - - IMR2 - IMR2 - Interrupt mask register - 0x18 - 0x20 - read-write - 0xFFFFFFFC - - - MR32 - Interrupt Mask on external/internal line - 32 - 0 - 1 - - - MR33 - Interrupt Mask on external/internal line - 33 - 1 - 1 - - - MR34 - Interrupt Mask on external/internal line - 34 - 2 - 1 - - - MR35 - Interrupt Mask on external/internal line - 35 - 3 - 1 - - - - - EMR2 - EMR2 - Event mask register - 0x1C - 0x20 - read-write - 0x00000000 - - - MR32 - Event mask on external/internal line - 32 - 0 - 1 - - - MR33 - Event mask on external/internal line - 33 - 1 - 1 - - - MR34 - Event mask on external/internal line - 34 - 2 - 1 - - - MR35 - Event mask on external/internal line - 35 - 3 - 1 - - - - - RTSR2 - RTSR2 - Rising Trigger selection - register - 0x20 - 0x20 - read-write - 0x00000000 - - - TR32 - Rising trigger event configuration bit - of line 32 - 0 - 1 - - - TR33 - Rising trigger event configuration bit - of line 33 - 1 - 1 - - - - - FTSR2 - FTSR2 - Falling Trigger selection - register - 0x24 - 0x20 - read-write - 0x00000000 - - - TR32 - Falling trigger event configuration bit - of line 32 - 0 - 1 - - - TR33 - Falling trigger event configuration bit - of line 33 - 1 - 1 - - - - - SWIER2 - SWIER2 - Software interrupt event - register - 0x28 - 0x20 - read-write - 0x00000000 - - - SWIER32 - Software interrupt on line - 32 - 0 - 1 - - - SWIER33 - Software interrupt on line - 33 - 1 - 1 - - - - - PR2 - PR2 - Pending register - 0x2C - 0x20 - read-write - 0x00000000 - - - PR32 - Pending bit on line 32 - 0 - 1 - - - PR33 - Pending bit on line 33 - 1 - 1 - - - - - - - PWR - Power control - PWR - 0x40007000 - - 0x0 - 0x400 - registers - - - PVD - PVD through EXTI line detection - interrupt - 1 - - - - CR - CR - power control register - 0x0 - 0x20 - read-write - 0x00000000 - - - LPDS - Low-power deep sleep - 0 - 1 - - - PDDS - Power down deepsleep - 1 - 1 - - - CWUF - Clear wakeup flag - 2 - 1 - - - CSBF - Clear standby flag - 3 - 1 - - - PVDE - Power voltage detector - enable - 4 - 1 - - - PLS - PVD level selection - 5 - 3 - - - DBP - Disable backup domain write - protection - 8 - 1 - - - - - CSR - CSR - power control/status register - 0x4 - 0x20 - 0x00000000 - - - WUF - Wakeup flag - 0 - 1 - read-only - - - SBF - Standby flag - 1 - 1 - read-only - - - PVDO - PVD output - 2 - 1 - read-only - - - EWUP1 - Enable WKUP1 pin - 8 - 1 - read-write - - - EWUP2 - Enable WKUP2 pin - 9 - 1 - read-write - - - - - - - CAN - Controller area network - CAN - 0x40006400 - - 0x0 - 0x400 - registers - - - USB_HP_CAN_TX - USB High Priority/CAN_TX - interrupts - 19 - - - USB_LP_CAN_RX0 - USB Low Priority/CAN_RX0 - interrupts - 20 - - - CAN_RX1 - CAN_RX1 interrupt - 21 - - - CAN_SCE - CAN_SCE interrupt - 22 - - - - MCR - MCR - master control register - 0x0 - 0x20 - read-write - 0x00010002 - - - DBF - DBF - 16 - 1 - - - RESET - RESET - 15 - 1 - - - TTCM - TTCM - 7 - 1 - - - ABOM - ABOM - 6 - 1 - - - AWUM - AWUM - 5 - 1 - - - NART - NART - 4 - 1 - - - RFLM - RFLM - 3 - 1 - - - TXFP - TXFP - 2 - 1 - - - SLEEP - SLEEP - 1 - 1 - - - INRQ - INRQ - 0 - 1 - - - - - MSR - MSR - master status register - 0x4 - 0x20 - 0x00000C02 - - - RX - RX - 11 - 1 - read-only - - - SAMP - SAMP - 10 - 1 - read-only - - - RXM - RXM - 9 - 1 - read-only - - - TXM - TXM - 8 - 1 - read-only - - - SLAKI - SLAKI - 4 - 1 - read-write - - - WKUI - WKUI - 3 - 1 - read-write - - - ERRI - ERRI - 2 - 1 - read-write - - - SLAK - SLAK - 1 - 1 - read-only - - - INAK - INAK - 0 - 1 - read-only - - - - - TSR - TSR - transmit status register - 0x8 - 0x20 - 0x1C000000 - - - LOW2 - Lowest priority flag for mailbox - 2 - 31 - 1 - read-only - - - LOW1 - Lowest priority flag for mailbox - 1 - 30 - 1 - read-only - - - LOW0 - Lowest priority flag for mailbox - 0 - 29 - 1 - read-only - - - TME2 - Lowest priority flag for mailbox - 2 - 28 - 1 - read-only - - - TME1 - Lowest priority flag for mailbox - 1 - 27 - 1 - read-only - - - TME0 - Lowest priority flag for mailbox - 0 - 26 - 1 - read-only - - - CODE - CODE - 24 - 2 - read-only - - - ABRQ2 - ABRQ2 - 23 - 1 - read-write - - - TERR2 - TERR2 - 19 - 1 - read-write - - - ALST2 - ALST2 - 18 - 1 - read-write - - - TXOK2 - TXOK2 - 17 - 1 - read-write - - - RQCP2 - RQCP2 - 16 - 1 - read-write - - - ABRQ1 - ABRQ1 - 15 - 1 - read-write - - - TERR1 - TERR1 - 11 - 1 - read-write - - - ALST1 - ALST1 - 10 - 1 - read-write - - - TXOK1 - TXOK1 - 9 - 1 - read-write - - - RQCP1 - RQCP1 - 8 - 1 - read-write - - - ABRQ0 - ABRQ0 - 7 - 1 - read-write - - - TERR0 - TERR0 - 3 - 1 - read-write - - - ALST0 - ALST0 - 2 - 1 - read-write - - - TXOK0 - TXOK0 - 1 - 1 - read-write - - - RQCP0 - RQCP0 - 0 - 1 - read-write - - - - - RF0R - RF0R - receive FIFO 0 register - 0xC - 0x20 - 0x00000000 - - - RFOM0 - RFOM0 - 5 - 1 - read-write - - - FOVR0 - FOVR0 - 4 - 1 - read-write - - - FULL0 - FULL0 - 3 - 1 - read-write - - - FMP0 - FMP0 - 0 - 2 - read-only - - - - - RF1R - RF1R - receive FIFO 1 register - 0x10 - 0x20 - 0x00000000 - - - RFOM1 - RFOM1 - 5 - 1 - read-write - - - FOVR1 - FOVR1 - 4 - 1 - read-write - - - FULL1 - FULL1 - 3 - 1 - read-write - - - FMP1 - FMP1 - 0 - 2 - read-only - - - - - IER - IER - interrupt enable register - 0x14 - 0x20 - read-write - 0x00000000 - - - SLKIE - SLKIE - 17 - 1 - - - WKUIE - WKUIE - 16 - 1 - - - ERRIE - ERRIE - 15 - 1 - - - LECIE - LECIE - 11 - 1 - - - BOFIE - BOFIE - 10 - 1 - - - EPVIE - EPVIE - 9 - 1 - - - EWGIE - EWGIE - 8 - 1 - - - FOVIE1 - FOVIE1 - 6 - 1 - - - FFIE1 - FFIE1 - 5 - 1 - - - FMPIE1 - FMPIE1 - 4 - 1 - - - FOVIE0 - FOVIE0 - 3 - 1 - - - FFIE0 - FFIE0 - 2 - 1 - - - FMPIE0 - FMPIE0 - 1 - 1 - - - TMEIE - TMEIE - 0 - 1 - - - - - ESR - ESR - error status register - 0x18 - 0x20 - 0x00000000 - - - REC - REC - 24 - 8 - read-only - - - TEC - TEC - 16 - 8 - read-only - - - LEC - LEC - 4 - 3 - read-write - - - BOFF - BOFF - 2 - 1 - read-only - - - EPVF - EPVF - 1 - 1 - read-only - - - EWGF - EWGF - 0 - 1 - read-only - - - - - BTR - BTR - bit timing register - 0x1C - 0x20 - read-write - 0x01230000 - - - SILM - SILM - 31 - 1 - - - LBKM - LBKM - 30 - 1 - - - SJW - SJW - 24 - 2 - - - TS2 - TS2 - 20 - 3 - - - TS1 - TS1 - 16 - 4 - - - BRP - BRP - 0 - 10 - - - - - TI0R - TI0R - TX mailbox identifier register - 0x180 - 0x20 - read-write - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - TXRQ - TXRQ - 0 - 1 - - - - - TDT0R - TDT0R - mailbox data length control and time stamp - register - 0x184 - 0x20 - read-write - 0x00000000 - - - TIME - TIME - 16 - 16 - - - TGT - TGT - 8 - 1 - - - DLC - DLC - 0 - 4 - - - - - TDL0R - TDL0R - mailbox data low register - 0x188 - 0x20 - read-write - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - TDH0R - TDH0R - mailbox data high register - 0x18C - 0x20 - read-write - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - TI1R - TI1R - TX mailbox identifier register - 0x190 - 0x20 - read-write - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - TXRQ - TXRQ - 0 - 1 - - - - - TDT1R - TDT1R - mailbox data length control and time stamp - register - 0x194 - 0x20 - read-write - 0x00000000 - - - TIME - TIME - 16 - 16 - - - TGT - TGT - 8 - 1 - - - DLC - DLC - 0 - 4 - - - - - TDL1R - TDL1R - mailbox data low register - 0x198 - 0x20 - read-write - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - TDH1R - TDH1R - mailbox data high register - 0x19C - 0x20 - read-write - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - TI2R - TI2R - TX mailbox identifier register - 0x1A0 - 0x20 - read-write - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - TXRQ - TXRQ - 0 - 1 - - - - - TDT2R - TDT2R - mailbox data length control and time stamp - register - 0x1A4 - 0x20 - read-write - 0x00000000 - - - TIME - TIME - 16 - 16 - - - TGT - TGT - 8 - 1 - - - DLC - DLC - 0 - 4 - - - - - TDL2R - TDL2R - mailbox data low register - 0x1A8 - 0x20 - read-write - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - TDH2R - TDH2R - mailbox data high register - 0x1AC - 0x20 - read-write - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - RI0R - RI0R - receive FIFO mailbox identifier - register - 0x1B0 - 0x20 - read-only - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - - - RDT0R - RDT0R - receive FIFO mailbox data length control and - time stamp register - 0x1B4 - 0x20 - read-only - 0x00000000 - - - TIME - TIME - 16 - 16 - - - FMI - FMI - 8 - 8 - - - DLC - DLC - 0 - 4 - - - - - RDL0R - RDL0R - receive FIFO mailbox data low - register - 0x1B8 - 0x20 - read-only - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - RDH0R - RDH0R - receive FIFO mailbox data high - register - 0x1BC - 0x20 - read-only - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - RI1R - RI1R - receive FIFO mailbox identifier - register - 0x1C0 - 0x20 - read-only - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - - - RDT1R - RDT1R - receive FIFO mailbox data length control and - time stamp register - 0x1C4 - 0x20 - read-only - 0x00000000 - - - TIME - TIME - 16 - 16 - - - FMI - FMI - 8 - 8 - - - DLC - DLC - 0 - 4 - - - - - RDL1R - RDL1R - receive FIFO mailbox data low - register - 0x1C8 - 0x20 - read-only - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - RDH1R - RDH1R - receive FIFO mailbox data high - register - 0x1CC - 0x20 - read-only - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - FMR - FMR - filter master register - 0x200 - 0x20 - read-write - 0x2A1C0E01 - - - CAN2SB - CAN2 start bank - 8 - 6 - - - FINIT - Filter init mode - 0 - 1 - - - - - FM1R - FM1R - filter mode register - 0x204 - 0x20 - read-write - 0x00000000 - - - FBM0 - Filter mode - 0 - 1 - - - FBM1 - Filter mode - 1 - 1 - - - FBM2 - Filter mode - 2 - 1 - - - FBM3 - Filter mode - 3 - 1 - - - FBM4 - Filter mode - 4 - 1 - - - FBM5 - Filter mode - 5 - 1 - - - FBM6 - Filter mode - 6 - 1 - - - FBM7 - Filter mode - 7 - 1 - - - FBM8 - Filter mode - 8 - 1 - - - FBM9 - Filter mode - 9 - 1 - - - FBM10 - Filter mode - 10 - 1 - - - FBM11 - Filter mode - 11 - 1 - - - FBM12 - Filter mode - 12 - 1 - - - FBM13 - Filter mode - 13 - 1 - - - FBM14 - Filter mode - 14 - 1 - - - FBM15 - Filter mode - 15 - 1 - - - FBM16 - Filter mode - 16 - 1 - - - FBM17 - Filter mode - 17 - 1 - - - FBM18 - Filter mode - 18 - 1 - - - FBM19 - Filter mode - 19 - 1 - - - FBM20 - Filter mode - 20 - 1 - - - FBM21 - Filter mode - 21 - 1 - - - FBM22 - Filter mode - 22 - 1 - - - FBM23 - Filter mode - 23 - 1 - - - FBM24 - Filter mode - 24 - 1 - - - FBM25 - Filter mode - 25 - 1 - - - FBM26 - Filter mode - 26 - 1 - - - FBM27 - Filter mode - 27 - 1 - - - - - FS1R - FS1R - filter scale register - 0x20C - 0x20 - read-write - 0x00000000 - - - FSC0 - Filter scale configuration - 0 - 1 - - - FSC1 - Filter scale configuration - 1 - 1 - - - FSC2 - Filter scale configuration - 2 - 1 - - - FSC3 - Filter scale configuration - 3 - 1 - - - FSC4 - Filter scale configuration - 4 - 1 - - - FSC5 - Filter scale configuration - 5 - 1 - - - FSC6 - Filter scale configuration - 6 - 1 - - - FSC7 - Filter scale configuration - 7 - 1 - - - FSC8 - Filter scale configuration - 8 - 1 - - - FSC9 - Filter scale configuration - 9 - 1 - - - FSC10 - Filter scale configuration - 10 - 1 - - - FSC11 - Filter scale configuration - 11 - 1 - - - FSC12 - Filter scale configuration - 12 - 1 - - - FSC13 - Filter scale configuration - 13 - 1 - - - FSC14 - Filter scale configuration - 14 - 1 - - - FSC15 - Filter scale configuration - 15 - 1 - - - FSC16 - Filter scale configuration - 16 - 1 - - - FSC17 - Filter scale configuration - 17 - 1 - - - FSC18 - Filter scale configuration - 18 - 1 - - - FSC19 - Filter scale configuration - 19 - 1 - - - FSC20 - Filter scale configuration - 20 - 1 - - - FSC21 - Filter scale configuration - 21 - 1 - - - FSC22 - Filter scale configuration - 22 - 1 - - - FSC23 - Filter scale configuration - 23 - 1 - - - FSC24 - Filter scale configuration - 24 - 1 - - - FSC25 - Filter scale configuration - 25 - 1 - - - FSC26 - Filter scale configuration - 26 - 1 - - - FSC27 - Filter scale configuration - 27 - 1 - - - - - FFA1R - FFA1R - filter FIFO assignment - register - 0x214 - 0x20 - read-write - 0x00000000 - - - FFA0 - Filter FIFO assignment for filter - 0 - 0 - 1 - - - FFA1 - Filter FIFO assignment for filter - 1 - 1 - 1 - - - FFA2 - Filter FIFO assignment for filter - 2 - 2 - 1 - - - FFA3 - Filter FIFO assignment for filter - 3 - 3 - 1 - - - FFA4 - Filter FIFO assignment for filter - 4 - 4 - 1 - - - FFA5 - Filter FIFO assignment for filter - 5 - 5 - 1 - - - FFA6 - Filter FIFO assignment for filter - 6 - 6 - 1 - - - FFA7 - Filter FIFO assignment for filter - 7 - 7 - 1 - - - FFA8 - Filter FIFO assignment for filter - 8 - 8 - 1 - - - FFA9 - Filter FIFO assignment for filter - 9 - 9 - 1 - - - FFA10 - Filter FIFO assignment for filter - 10 - 10 - 1 - - - FFA11 - Filter FIFO assignment for filter - 11 - 11 - 1 - - - FFA12 - Filter FIFO assignment for filter - 12 - 12 - 1 - - - FFA13 - Filter FIFO assignment for filter - 13 - 13 - 1 - - - FFA14 - Filter FIFO assignment for filter - 14 - 14 - 1 - - - FFA15 - Filter FIFO assignment for filter - 15 - 15 - 1 - - - FFA16 - Filter FIFO assignment for filter - 16 - 16 - 1 - - - FFA17 - Filter FIFO assignment for filter - 17 - 17 - 1 - - - FFA18 - Filter FIFO assignment for filter - 18 - 18 - 1 - - - FFA19 - Filter FIFO assignment for filter - 19 - 19 - 1 - - - FFA20 - Filter FIFO assignment for filter - 20 - 20 - 1 - - - FFA21 - Filter FIFO assignment for filter - 21 - 21 - 1 - - - FFA22 - Filter FIFO assignment for filter - 22 - 22 - 1 - - - FFA23 - Filter FIFO assignment for filter - 23 - 23 - 1 - - - FFA24 - Filter FIFO assignment for filter - 24 - 24 - 1 - - - FFA25 - Filter FIFO assignment for filter - 25 - 25 - 1 - - - FFA26 - Filter FIFO assignment for filter - 26 - 26 - 1 - - - FFA27 - Filter FIFO assignment for filter - 27 - 27 - 1 - - - - - FA1R - FA1R - CAN filter activation register - 0x21C - 0x20 - read-write - 0x00000000 - - - FACT0 - Filter active - 0 - 1 - - - FACT1 - Filter active - 1 - 1 - - - FACT2 - Filter active - 2 - 1 - - - FACT3 - Filter active - 3 - 1 - - - FACT4 - Filter active - 4 - 1 - - - FACT5 - Filter active - 5 - 1 - - - FACT6 - Filter active - 6 - 1 - - - FACT7 - Filter active - 7 - 1 - - - FACT8 - Filter active - 8 - 1 - - - FACT9 - Filter active - 9 - 1 - - - FACT10 - Filter active - 10 - 1 - - - FACT11 - Filter active - 11 - 1 - - - FACT12 - Filter active - 12 - 1 - - - FACT13 - Filter active - 13 - 1 - - - FACT14 - Filter active - 14 - 1 - - - FACT15 - Filter active - 15 - 1 - - - FACT16 - Filter active - 16 - 1 - - - FACT17 - Filter active - 17 - 1 - - - FACT18 - Filter active - 18 - 1 - - - FACT19 - Filter active - 19 - 1 - - - FACT20 - Filter active - 20 - 1 - - - FACT21 - Filter active - 21 - 1 - - - FACT22 - Filter active - 22 - 1 - - - FACT23 - Filter active - 23 - 1 - - - FACT24 - Filter active - 24 - 1 - - - FACT25 - Filter active - 25 - 1 - - - FACT26 - Filter active - 26 - 1 - - - FACT27 - Filter active - 27 - 1 - - - - - F0R1 - F0R1 - Filter bank 0 register 1 - 0x240 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F0R2 - F0R2 - Filter bank 0 register 2 - 0x244 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F1R1 - F1R1 - Filter bank 1 register 1 - 0x248 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F1R2 - F1R2 - Filter bank 1 register 2 - 0x24C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F2R1 - F2R1 - Filter bank 2 register 1 - 0x250 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F2R2 - F2R2 - Filter bank 2 register 2 - 0x254 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F3R1 - F3R1 - Filter bank 3 register 1 - 0x258 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F3R2 - F3R2 - Filter bank 3 register 2 - 0x25C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F4R1 - F4R1 - Filter bank 4 register 1 - 0x260 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F4R2 - F4R2 - Filter bank 4 register 2 - 0x264 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F5R1 - F5R1 - Filter bank 5 register 1 - 0x268 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F5R2 - F5R2 - Filter bank 5 register 2 - 0x26C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F6R1 - F6R1 - Filter bank 6 register 1 - 0x270 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F6R2 - F6R2 - Filter bank 6 register 2 - 0x274 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F7R1 - F7R1 - Filter bank 7 register 1 - 0x278 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F7R2 - F7R2 - Filter bank 7 register 2 - 0x27C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F8R1 - F8R1 - Filter bank 8 register 1 - 0x280 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F8R2 - F8R2 - Filter bank 8 register 2 - 0x284 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F9R1 - F9R1 - Filter bank 9 register 1 - 0x288 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F9R2 - F9R2 - Filter bank 9 register 2 - 0x28C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F10R1 - F10R1 - Filter bank 10 register 1 - 0x290 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F10R2 - F10R2 - Filter bank 10 register 2 - 0x294 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F11R1 - F11R1 - Filter bank 11 register 1 - 0x298 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F11R2 - F11R2 - Filter bank 11 register 2 - 0x29C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F12R1 - F12R1 - Filter bank 4 register 1 - 0x2A0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F12R2 - F12R2 - Filter bank 12 register 2 - 0x2A4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F13R1 - F13R1 - Filter bank 13 register 1 - 0x2A8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F13R2 - F13R2 - Filter bank 13 register 2 - 0x2AC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F14R1 - F14R1 - Filter bank 14 register 1 - 0x2B0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F14R2 - F14R2 - Filter bank 14 register 2 - 0x2B4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F15R1 - F15R1 - Filter bank 15 register 1 - 0x2B8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F15R2 - F15R2 - Filter bank 15 register 2 - 0x2BC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F16R1 - F16R1 - Filter bank 16 register 1 - 0x2C0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F16R2 - F16R2 - Filter bank 16 register 2 - 0x2C4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F17R1 - F17R1 - Filter bank 17 register 1 - 0x2C8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F17R2 - F17R2 - Filter bank 17 register 2 - 0x2CC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F18R1 - F18R1 - Filter bank 18 register 1 - 0x2D0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F18R2 - F18R2 - Filter bank 18 register 2 - 0x2D4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F19R1 - F19R1 - Filter bank 19 register 1 - 0x2D8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F19R2 - F19R2 - Filter bank 19 register 2 - 0x2DC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F20R1 - F20R1 - Filter bank 20 register 1 - 0x2E0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F20R2 - F20R2 - Filter bank 20 register 2 - 0x2E4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F21R1 - F21R1 - Filter bank 21 register 1 - 0x2E8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F21R2 - F21R2 - Filter bank 21 register 2 - 0x2EC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F22R1 - F22R1 - Filter bank 22 register 1 - 0x2F0 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F22R2 - F22R2 - Filter bank 22 register 2 - 0x2F4 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F23R1 - F23R1 - Filter bank 23 register 1 - 0x2F8 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F23R2 - F23R2 - Filter bank 23 register 2 - 0x2FC - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F24R1 - F24R1 - Filter bank 24 register 1 - 0x300 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F24R2 - F24R2 - Filter bank 24 register 2 - 0x304 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F25R1 - F25R1 - Filter bank 25 register 1 - 0x308 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F25R2 - F25R2 - Filter bank 25 register 2 - 0x30C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F26R1 - F26R1 - Filter bank 26 register 1 - 0x310 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F26R2 - F26R2 - Filter bank 26 register 2 - 0x314 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F27R1 - F27R1 - Filter bank 27 register 1 - 0x318 - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F27R2 - F27R2 - Filter bank 27 register 2 - 0x31C - 0x20 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - - - USB_FS - Universal serial bus full-speed device - interface - USB_FS - 0x40005C00 - - 0x0 - 0x400 - registers - - - USB_WKUP - USB wakeup from Suspend - 42 - - - USB_HP - USB High priority interrupt - 74 - - - USB_LP - USB Low priority interrupt - 75 - - - - USB_EP0R - USB_EP0R - endpoint 0 register - 0x0 - 0x20 - 0x00000000 - - - EA - Endpoint address - 0 - 4 - read-write - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - read-write - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - read-write - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - read-write - - - EP_KIND - Endpoint kind - 8 - 1 - read-write - - - EP_TYPE - Endpoint type - 9 - 2 - read-write - - - SETUP - Setup transaction - completed - 11 - 1 - read-only - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - read-write - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - read-write - - - CTR_RX - Correct transfer for - reception - 15 - 1 - read-write - - - - - USB_EP1R - USB_EP1R - endpoint 1 register - 0x4 - 0x20 - 0x00000000 - - - EA - Endpoint address - 0 - 4 - read-write - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - read-write - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - read-write - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - read-write - - - EP_KIND - Endpoint kind - 8 - 1 - read-write - - - EP_TYPE - Endpoint type - 9 - 2 - read-write - - - SETUP - Setup transaction - completed - 11 - 1 - read-only - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - read-write - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - read-write - - - CTR_RX - Correct transfer for - reception - 15 - 1 - read-write - - - - - USB_EP2R - USB_EP2R - endpoint 2 register - 0x8 - 0x20 - 0x00000000 - - - EA - Endpoint address - 0 - 4 - read-write - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - read-write - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - read-write - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - read-write - - - EP_KIND - Endpoint kind - 8 - 1 - read-write - - - EP_TYPE - Endpoint type - 9 - 2 - read-write - - - SETUP - Setup transaction - completed - 11 - 1 - read-only - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - read-write - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - read-write - - - CTR_RX - Correct transfer for - reception - 15 - 1 - read-write - - - - - USB_EP3R - USB_EP3R - endpoint 3 register - 0xC - 0x20 - 0x00000000 - - - EA - Endpoint address - 0 - 4 - read-write - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - read-write - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - read-write - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - read-write - - - EP_KIND - Endpoint kind - 8 - 1 - read-write - - - EP_TYPE - Endpoint type - 9 - 2 - read-write - - - SETUP - Setup transaction - completed - 11 - 1 - read-only - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - read-write - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - read-write - - - CTR_RX - Correct transfer for - reception - 15 - 1 - read-write - - - - - USB_EP4R - USB_EP4R - endpoint 4 register - 0x10 - 0x20 - 0x00000000 - - - EA - Endpoint address - 0 - 4 - read-write - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - read-write - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - read-write - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - read-write - - - EP_KIND - Endpoint kind - 8 - 1 - read-write - - - EP_TYPE - Endpoint type - 9 - 2 - read-write - - - SETUP - Setup transaction - completed - 11 - 1 - read-only - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - read-write - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - read-write - - - CTR_RX - Correct transfer for - reception - 15 - 1 - read-write - - - - - USB_EP5R - USB_EP5R - endpoint 5 register - 0x14 - 0x20 - 0x00000000 - - - EA - Endpoint address - 0 - 4 - read-write - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - read-write - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - read-write - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - read-write - - - EP_KIND - Endpoint kind - 8 - 1 - read-write - - - EP_TYPE - Endpoint type - 9 - 2 - read-write - - - SETUP - Setup transaction - completed - 11 - 1 - read-only - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - read-write - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - read-write - - - CTR_RX - Correct transfer for - reception - 15 - 1 - read-write - - - - - USB_EP6R - USB_EP6R - endpoint 6 register - 0x18 - 0x20 - 0x00000000 - - - EA - Endpoint address - 0 - 4 - read-write - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - read-write - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - read-write - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - read-write - - - EP_KIND - Endpoint kind - 8 - 1 - read-write - - - EP_TYPE - Endpoint type - 9 - 2 - read-write - - - SETUP - Setup transaction - completed - 11 - 1 - read-only - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - read-write - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - read-write - - - CTR_RX - Correct transfer for - reception - 15 - 1 - read-write - - - - - USB_EP7R - USB_EP7R - endpoint 7 register - 0x1C - 0x20 - 0x00000000 - - - EA - Endpoint address - 0 - 4 - read-write - - - STAT_TX - Status bits, for transmission - transfers - 4 - 2 - read-write - - - DTOG_TX - Data Toggle, for transmission - transfers - 6 - 1 - read-write - - - CTR_TX - Correct Transfer for - transmission - 7 - 1 - read-write - - - EP_KIND - Endpoint kind - 8 - 1 - read-write - - - EP_TYPE - Endpoint type - 9 - 2 - read-write - - - SETUP - Setup transaction - completed - 11 - 1 - read-only - - - STAT_RX - Status bits, for reception - transfers - 12 - 2 - read-write - - - DTOG_RX - Data Toggle, for reception - transfers - 14 - 1 - read-write - - - CTR_RX - Correct transfer for - reception - 15 - 1 - read-write - - - - - USB_CNTR - USB_CNTR - control register - 0x40 - 0x20 - read-write - 0x00000003 - - - FRES - Force USB Reset - 0 - 1 - - - PDWN - Power down - 1 - 1 - - - LPMODE - Low-power mode - 2 - 1 - - - FSUSP - Force suspend - 3 - 1 - - - RESUME - Resume request - 4 - 1 - - - ESOFM - Expected start of frame interrupt - mask - 8 - 1 - - - SOFM - Start of frame interrupt - mask - 9 - 1 - - - RESETM - USB reset interrupt mask - 10 - 1 - - - SUSPM - Suspend mode interrupt - mask - 11 - 1 - - - WKUPM - Wakeup interrupt mask - 12 - 1 - - - ERRM - Error interrupt mask - 13 - 1 - - - PMAOVRM - Packet memory area over / underrun - interrupt mask - 14 - 1 - - - CTRM - Correct transfer interrupt - mask - 15 - 1 - - - - - ISTR - ISTR - interrupt status register - 0x44 - 0x20 - 0x00000000 - - - EP_ID - Endpoint Identifier - 0 - 4 - read-only - - - DIR - Direction of transaction - 4 - 1 - read-only - - - ESOF - Expected start frame - 8 - 1 - read-write - - - SOF - start of frame - 9 - 1 - read-write - - - RESET - reset request - 10 - 1 - read-write - - - SUSP - Suspend mode request - 11 - 1 - read-write - - - WKUP - Wakeup - 12 - 1 - read-write - - - ERR - Error - 13 - 1 - read-write - - - PMAOVR - Packet memory area over / - underrun - 14 - 1 - read-write - - - CTR - Correct transfer - 15 - 1 - read-only - - - - - FNR - FNR - frame number register - 0x48 - 0x20 - read-only - 0x0000 - - - FN - Frame number - 0 - 11 - - - LSOF - Lost SOF - 11 - 2 - - - LCK - Locked - 13 - 1 - - - RXDM - Receive data - line status - 14 - 1 - - - RXDP - Receive data + line status - 15 - 1 - - - - - DADDR - DADDR - device address - 0x4C - 0x20 - read-write - 0x0000 - - - ADD - Device address - 0 - 1 - - - ADD1 - Device address - 1 - 1 - - - ADD2 - Device address - 2 - 1 - - - ADD3 - Device address - 3 - 1 - - - ADD4 - Device address - 4 - 1 - - - ADD5 - Device address - 5 - 1 - - - ADD6 - Device address - 6 - 1 - - - EF - Enable function - 7 - 1 - - - - - BTABLE - BTABLE - Buffer table address - 0x50 - 0x20 - read-write - 0x0000 - - - BTABLE - Buffer table - 3 - 13 - - - - - - - I2C1 - Inter-integrated circuit - I2C - 0x40005400 - - 0x0 - 0x400 - registers - - - I2C1_EV_EXTI23 - I2C1 event interrupt and EXTI Line23 - interrupt - 31 - - - I2C1_EV_EXTI23 - I2C1 event interrupt and EXTI Line23 - interrupt - 31 - - - I2C1_ER - I2C1 error interrupt - 32 - - - - CR1 - CR1 - Control register 1 - 0x0 - 0x20 - 0x00000000 - - - PE - Peripheral enable - 0 - 1 - read-write - - - TXIE - TX Interrupt enable - 1 - 1 - read-write - - - RXIE - RX Interrupt enable - 2 - 1 - read-write - - - ADDRIE - Address match interrupt enable (slave - only) - 3 - 1 - read-write - - - NACKIE - Not acknowledge received interrupt - enable - 4 - 1 - read-write - - - STOPIE - STOP detection Interrupt - enable - 5 - 1 - read-write - - - TCIE - Transfer Complete interrupt - enable - 6 - 1 - read-write - - - ERRIE - Error interrupts enable - 7 - 1 - read-write - - - DNF - Digital noise filter - 8 - 4 - read-write - - - ANFOFF - Analog noise filter OFF - 12 - 1 - read-write - - - SWRST - Software reset - 13 - 1 - write-only - - - TXDMAEN - DMA transmission requests - enable - 14 - 1 - read-write - - - RXDMAEN - DMA reception requests - enable - 15 - 1 - read-write - - - SBC - Slave byte control - 16 - 1 - read-write - - - NOSTRETCH - Clock stretching disable - 17 - 1 - read-write - - - WUPEN - Wakeup from STOP enable - 18 - 1 - read-write - - - GCEN - General call enable - 19 - 1 - read-write - - - SMBHEN - SMBus Host address enable - 20 - 1 - read-write - - - SMBDEN - SMBus Device Default address - enable - 21 - 1 - read-write - - - ALERTEN - SMBUS alert enable - 22 - 1 - read-write - - - PECEN - PEC enable - 23 - 1 - read-write - - - - - CR2 - CR2 - Control register 2 - 0x4 - 0x20 - read-write - 0x00000000 - - - PECBYTE - Packet error checking byte - 26 - 1 - - - AUTOEND - Automatic end mode (master - mode) - 25 - 1 - - - RELOAD - NBYTES reload mode - 24 - 1 - - - NBYTES - Number of bytes - 16 - 8 - - - NACK - NACK generation (slave - mode) - 15 - 1 - - - STOP - Stop generation (master - mode) - 14 - 1 - - - START - Start generation - 13 - 1 - - - HEAD10R - 10-bit address header only read - direction (master receiver mode) - 12 - 1 - - - ADD10 - 10-bit addressing mode (master - mode) - 11 - 1 - - - RD_WRN - Transfer direction (master - mode) - 10 - 1 - - - SADD8 - Slave address bit 9:8 (master - mode) - 8 - 2 - - - SADD1 - Slave address bit 7:1 (master - mode) - 1 - 7 - - - SADD0 - Slave address bit 0 (master - mode) - 0 - 1 - - - - - OAR1 - OAR1 - Own address register 1 - 0x8 - 0x20 - read-write - 0x00000000 - - - OA1_0 - Interface address - 0 - 1 - - - OA1_1 - Interface address - 1 - 7 - - - OA1_8 - Interface address - 8 - 2 - - - OA1MODE - Own Address 1 10-bit mode - 10 - 1 - - - OA1EN - Own Address 1 enable - 15 - 1 - - - - - OAR2 - OAR2 - Own address register 2 - 0xC - 0x20 - read-write - 0x00000000 - - - OA2 - Interface address - 1 - 7 - - - OA2MSK - Own Address 2 masks - 8 - 3 - - - OA2EN - Own Address 2 enable - 15 - 1 - - - - - TIMINGR - TIMINGR - Timing register - 0x10 - 0x20 - read-write - 0x00000000 - - - SCLL - SCL low period (master - mode) - 0 - 8 - - - SCLH - SCL high period (master - mode) - 8 - 8 - - - SDADEL - Data hold time - 16 - 4 - - - SCLDEL - Data setup time - 20 - 4 - - - PRESC - Timing prescaler - 28 - 4 - - - - - TIMEOUTR - TIMEOUTR - Status register 1 - 0x14 - 0x20 - read-write - 0x00000000 - - - TIMEOUTA - Bus timeout A - 0 - 12 - - - TIDLE - Idle clock timeout - detection - 12 - 1 - - - TIMOUTEN - Clock timeout enable - 15 - 1 - - - TIMEOUTB - Bus timeout B - 16 - 12 - - - TEXTEN - Extended clock timeout - enable - 31 - 1 - - - - - ISR - ISR - Interrupt and Status register - 0x18 - 0x20 - 0x00000001 - - - ADDCODE - Address match code (Slave - mode) - 17 - 7 - read-only - - - DIR - Transfer direction (Slave - mode) - 16 - 1 - read-only - - - BUSY - Bus busy - 15 - 1 - read-only - - - ALERT - SMBus alert - 13 - 1 - read-only - - - TIMEOUT - Timeout or t_low detection - flag - 12 - 1 - read-only - - - PECERR - PEC Error in reception - 11 - 1 - read-only - - - OVR - Overrun/Underrun (slave - mode) - 10 - 1 - read-only - - - ARLO - Arbitration lost - 9 - 1 - read-only - - - BERR - Bus error - 8 - 1 - read-only - - - TCR - Transfer Complete Reload - 7 - 1 - read-only - - - TC - Transfer Complete (master - mode) - 6 - 1 - read-only - - - STOPF - Stop detection flag - 5 - 1 - read-only - - - NACKF - Not acknowledge received - flag - 4 - 1 - read-only - - - ADDR - Address matched (slave - mode) - 3 - 1 - read-only - - - RXNE - Receive data register not empty - (receivers) - 2 - 1 - read-only - - - TXIS - Transmit interrupt status - (transmitters) - 1 - 1 - read-write - - - TXE - Transmit data register empty - (transmitters) - 0 - 1 - read-write - - - - - ICR - ICR - Interrupt clear register - 0x1C - 0x20 - write-only - 0x00000000 - - - ALERTCF - Alert flag clear - 13 - 1 - - - TIMOUTCF - Timeout detection flag - clear - 12 - 1 - - - PECCF - PEC Error flag clear - 11 - 1 - - - OVRCF - Overrun/Underrun flag - clear - 10 - 1 - - - ARLOCF - Arbitration lost flag - clear - 9 - 1 - - - BERRCF - Bus error flag clear - 8 - 1 - - - STOPCF - Stop detection flag clear - 5 - 1 - - - NACKCF - Not Acknowledge flag clear - 4 - 1 - - - ADDRCF - Address Matched flag clear - 3 - 1 - - - - - PECR - PECR - PEC register - 0x20 - 0x20 - read-only - 0x00000000 - - - PEC - Packet error checking - register - 0 - 8 - - - - - RXDR - RXDR - Receive data register - 0x24 - 0x20 - read-only - 0x00000000 - - - RXDATA - 8-bit receive data - 0 - 8 - - - - - TXDR - TXDR - Transmit data register - 0x28 - 0x20 - read-write - 0x00000000 - - - TXDATA - 8-bit transmit data - 0 - 8 - - - - - - - I2C2 - 0x40005800 - - I2C2_EV_EXTI24 - I2C2 event interrupt & EXTI Line24 - interrupt - 33 - - - I2C2_ER - I2C2 error interrupt - 34 - - - - I2C3 - 0x40007800 - - I2C3_EV - I2C3 Event interrupt - 72 - - - I2C3_ER - I2C3 Error interrupt - 73 - - - - IWDG - Independent watchdog - IWDG - 0x40003000 - - 0x0 - 0x400 - registers - - - - KR - KR - Key register - 0x0 - 0x20 - write-only - 0x00000000 - - - KEY - Key value - 0 - 16 - - - - - PR - PR - Prescaler register - 0x4 - 0x20 - read-write - 0x00000000 - - - PR - Prescaler divider - 0 - 3 - - - - - RLR - RLR - Reload register - 0x8 - 0x20 - read-write - 0x00000FFF - - - RL - Watchdog counter reload - value - 0 - 12 - - - - - SR - SR - Status register - 0xC - 0x20 - read-only - 0x00000000 - - - PVU - Watchdog prescaler value - update - 0 - 1 - - - RVU - Watchdog counter reload value - update - 1 - 1 - - - WVU - Watchdog counter window value - update - 2 - 1 - - - - - WINR - WINR - Window register - 0x10 - 0x20 - read-write - 0x00000FFF - - - WIN - Watchdog counter window - value - 0 - 12 - - - - - - - WWDG - Window watchdog - WWDG - 0x40002C00 - - 0x0 - 0x400 - registers - - - WWDG - Window Watchdog interrupt - 0 - - - - CR - CR - Control register - 0x0 - 0x20 - read-write - 0x0000007F - - - T - 7-bit counter - 0 - 7 - - - WDGA - Activation bit - 7 - 1 - - - - - CFR - CFR - Configuration register - 0x4 - 0x20 - read-write - 0x0000007F - - - EWI - Early wakeup interrupt - 9 - 1 - - - WDGTB - Timer base - 7 - 2 - - - W - 7-bit window value - 0 - 7 - - - - - SR - SR - Status register - 0x8 - 0x20 - read-write - 0x00000000 - - - EWIF - Early wakeup interrupt - flag - 0 - 1 - - - - - - - RTC - Real-time clock - RTC - 0x40002800 - - 0x0 - 0x400 - registers - - - RTC_WKUP - RTC Wakeup interrupt through the EXTI - line - 3 - - - RTCAlarm - RTC alarm interrupt - 41 - - - - TR - TR - time register - 0x0 - 0x20 - read-write - 0x00000000 - - - PM - AM/PM notation - 22 - 1 - - - HT - Hour tens in BCD format - 20 - 2 - - - HU - Hour units in BCD format - 16 - 4 - - - MNT - Minute tens in BCD format - 12 - 3 - - - MNU - Minute units in BCD format - 8 - 4 - - - ST - Second tens in BCD format - 4 - 3 - - - SU - Second units in BCD format - 0 - 4 - - - - - DR - DR - date register - 0x4 - 0x20 - read-write - 0x00002101 - - - YT - Year tens in BCD format - 20 - 4 - - - YU - Year units in BCD format - 16 - 4 - - - WDU - Week day units - 13 - 3 - - - MT - Month tens in BCD format - 12 - 1 - - - MU - Month units in BCD format - 8 - 4 - - - DT - Date tens in BCD format - 4 - 2 - - - DU - Date units in BCD format - 0 - 4 - - - - - CR - CR - control register - 0x8 - 0x20 - read-write - 0x00000000 - - - WCKSEL - Wakeup clock selection - 0 - 3 - - - TSEDGE - Time-stamp event active - edge - 3 - 1 - - - REFCKON - Reference clock detection enable (50 or - 60 Hz) - 4 - 1 - - - BYPSHAD - Bypass the shadow - registers - 5 - 1 - - - FMT - Hour format - 6 - 1 - - - ALRAE - Alarm A enable - 8 - 1 - - - ALRBE - Alarm B enable - 9 - 1 - - - WUTE - Wakeup timer enable - 10 - 1 - - - TSE - Time stamp enable - 11 - 1 - - - ALRAIE - Alarm A interrupt enable - 12 - 1 - - - ALRBIE - Alarm B interrupt enable - 13 - 1 - - - WUTIE - Wakeup timer interrupt - enable - 14 - 1 - - - TSIE - Time-stamp interrupt - enable - 15 - 1 - - - ADD1H - Add 1 hour (summer time - change) - 16 - 1 - - - SUB1H - Subtract 1 hour (winter time - change) - 17 - 1 - - - BKP - Backup - 18 - 1 - - - COSEL - Calibration output - selection - 19 - 1 - - - POL - Output polarity - 20 - 1 - - - OSEL - Output selection - 21 - 2 - - - COE - Calibration output enable - 23 - 1 - - - - - ISR - ISR - initialization and status - register - 0xC - 0x20 - 0x00000007 - - - ALRAWF - Alarm A write flag - 0 - 1 - read-only - - - ALRBWF - Alarm B write flag - 1 - 1 - read-only - - - WUTWF - Wakeup timer write flag - 2 - 1 - read-only - - - SHPF - Shift operation pending - 3 - 1 - read-write - - - INITS - Initialization status flag - 4 - 1 - read-only - - - RSF - Registers synchronization - flag - 5 - 1 - read-write - - - INITF - Initialization flag - 6 - 1 - read-only - - - INIT - Initialization mode - 7 - 1 - read-write - - - ALRAF - Alarm A flag - 8 - 1 - read-write - - - ALRBF - Alarm B flag - 9 - 1 - read-write - - - WUTF - Wakeup timer flag - 10 - 1 - read-write - - - TSF - Time-stamp flag - 11 - 1 - read-write - - - TSOVF - Time-stamp overflow flag - 12 - 1 - read-write - - - TAMP1F - Tamper detection flag - 13 - 1 - read-write - - - TAMP2F - RTC_TAMP2 detection flag - 14 - 1 - read-write - - - TAMP3F - RTC_TAMP3 detection flag - 15 - 1 - read-write - - - RECALPF - Recalibration pending Flag - 16 - 1 - read-only - - - - - PRER - PRER - prescaler register - 0x10 - 0x20 - read-write - 0x007F00FF - - - PREDIV_A - Asynchronous prescaler - factor - 16 - 7 - - - PREDIV_S - Synchronous prescaler - factor - 0 - 15 - - - - - WUTR - WUTR - wakeup timer register - 0x14 - 0x20 - read-write - 0x0000FFFF - - - WUT - Wakeup auto-reload value - bits - 0 - 16 - - - - - ALRMAR - ALRMAR - alarm A register - 0x1C - 0x20 - read-write - 0x00000000 - - - MSK4 - Alarm A date mask - 31 - 1 - - - WDSEL - Week day selection - 30 - 1 - - - DT - Date tens in BCD format - 28 - 2 - - - DU - Date units or day in BCD - format - 24 - 4 - - - MSK3 - Alarm A hours mask - 23 - 1 - - - PM - AM/PM notation - 22 - 1 - - - HT - Hour tens in BCD format - 20 - 2 - - - HU - Hour units in BCD format - 16 - 4 - - - MSK2 - Alarm A minutes mask - 15 - 1 - - - MNT - Minute tens in BCD format - 12 - 3 - - - MNU - Minute units in BCD format - 8 - 4 - - - MSK1 - Alarm A seconds mask - 7 - 1 - - - ST - Second tens in BCD format - 4 - 3 - - - SU - Second units in BCD format - 0 - 4 - - - - - ALRMBR - ALRMBR - alarm B register - 0x20 - 0x20 - read-write - 0x00000000 - - - MSK4 - Alarm B date mask - 31 - 1 - - - WDSEL - Week day selection - 30 - 1 - - - DT - Date tens in BCD format - 28 - 2 - - - DU - Date units or day in BCD - format - 24 - 4 - - - MSK3 - Alarm B hours mask - 23 - 1 - - - PM - AM/PM notation - 22 - 1 - - - HT - Hour tens in BCD format - 20 - 2 - - - HU - Hour units in BCD format - 16 - 4 - - - MSK2 - Alarm B minutes mask - 15 - 1 - - - MNT - Minute tens in BCD format - 12 - 3 - - - MNU - Minute units in BCD format - 8 - 4 - - - MSK1 - Alarm B seconds mask - 7 - 1 - - - ST - Second tens in BCD format - 4 - 3 - - - SU - Second units in BCD format - 0 - 4 - - - - - WPR - WPR - write protection register - 0x24 - 0x20 - write-only - 0x00000000 - - - KEY - Write protection key - 0 - 8 - - - - - SSR - SSR - sub second register - 0x28 - 0x20 - read-only - 0x00000000 - - - SS - Sub second value - 0 - 16 - - - - - SHIFTR - SHIFTR - shift control register - 0x2C - 0x20 - write-only - 0x00000000 - - - ADD1S - Add one second - 31 - 1 - - - SUBFS - Subtract a fraction of a - second - 0 - 15 - - - - - TSTR - TSTR - time stamp time register - 0x30 - 0x20 - read-only - 0x00000000 - - - SU - Second units in BCD format - 0 - 4 - - - ST - Second tens in BCD format - 4 - 3 - - - MNU - Minute units in BCD format - 8 - 4 - - - MNT - Minute tens in BCD format - 12 - 3 - - - HU - Hour units in BCD format - 16 - 4 - - - HT - Hour tens in BCD format - 20 - 2 - - - PM - AM/PM notation - 22 - 1 - - - - - TSDR - TSDR - time stamp date register - 0x34 - 0x20 - read-only - 0x00000000 - - - WDU - Week day units - 13 - 3 - - - MT - Month tens in BCD format - 12 - 1 - - - MU - Month units in BCD format - 8 - 4 - - - DT - Date tens in BCD format - 4 - 2 - - - DU - Date units in BCD format - 0 - 4 - - - - - TSSSR - TSSSR - timestamp sub second register - 0x38 - 0x20 - read-only - 0x00000000 - - - SS - Sub second value - 0 - 16 - - - - - CALR - CALR - calibration register - 0x3C - 0x20 - read-write - 0x00000000 - - - CALP - Increase frequency of RTC by 488.5 - ppm - 15 - 1 - - - CALW8 - Use an 8-second calibration cycle - period - 14 - 1 - - - CALW16 - Use a 16-second calibration cycle - period - 13 - 1 - - - CALM - Calibration minus - 0 - 9 - - - - - TAFCR - TAFCR - tamper and alternate function configuration - register - 0x40 - 0x20 - read-write - 0x00000000 - - - TAMP1E - Tamper 1 detection enable - 0 - 1 - - - TAMP1TRG - Active level for tamper 1 - 1 - 1 - - - TAMPIE - Tamper interrupt enable - 2 - 1 - - - TAMP2E - Tamper 2 detection enable - 3 - 1 - - - TAMP2TRG - Active level for tamper 2 - 4 - 1 - - - TAMP3E - Tamper 3 detection enable - 5 - 1 - - - TAMP3TRG - Active level for tamper 3 - 6 - 1 - - - TAMPTS - Activate timestamp on tamper detection - event - 7 - 1 - - - TAMPFREQ - Tamper sampling frequency - 8 - 3 - - - TAMPFLT - Tamper filter count - 11 - 2 - - - TAMPPRCH - Tamper precharge duration - 13 - 2 - - - TAMPPUDIS - TAMPER pull-up disable - 15 - 1 - - - PC13VALUE - PC13 value - 18 - 1 - - - PC13MODE - PC13 mode - 19 - 1 - - - PC14VALUE - PC14 value - 20 - 1 - - - PC14MODE - PC 14 mode - 21 - 1 - - - PC15VALUE - PC15 value - 22 - 1 - - - PC15MODE - PC15 mode - 23 - 1 - - - - - ALRMASSR - ALRMASSR - alarm A sub second register - 0x44 - 0x20 - read-write - 0x00000000 - - - MASKSS - Mask the most-significant bits starting - at this bit - 24 - 4 - - - SS - Sub seconds value - 0 - 15 - - - - - ALRMBSSR - ALRMBSSR - alarm B sub second register - 0x48 - 0x20 - read-write - 0x00000000 - - - MASKSS - Mask the most-significant bits starting - at this bit - 24 - 4 - - - SS - Sub seconds value - 0 - 15 - - - - - BKP0R - BKP0R - backup register - 0x50 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP1R - BKP1R - backup register - 0x54 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP2R - BKP2R - backup register - 0x58 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP3R - BKP3R - backup register - 0x5C - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP4R - BKP4R - backup register - 0x60 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP5R - BKP5R - backup register - 0x64 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP6R - BKP6R - backup register - 0x68 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP7R - BKP7R - backup register - 0x6C - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP8R - BKP8R - backup register - 0x70 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP9R - BKP9R - backup register - 0x74 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP10R - BKP10R - backup register - 0x78 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP11R - BKP11R - backup register - 0x7C - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP12R - BKP12R - backup register - 0x80 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP13R - BKP13R - backup register - 0x84 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP14R - BKP14R - backup register - 0x88 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP15R - BKP15R - backup register - 0x8C - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP16R - BKP16R - backup register - 0x90 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP17R - BKP17R - backup register - 0x94 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP18R - BKP18R - backup register - 0x98 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP19R - BKP19R - backup register - 0x9C - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP20R - BKP20R - backup register - 0xA0 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP21R - BKP21R - backup register - 0xA4 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP22R - BKP22R - backup register - 0xA8 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP23R - BKP23R - backup register - 0xAC - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP24R - BKP24R - backup register - 0xB0 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP25R - BKP25R - backup register - 0xB4 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP26R - BKP26R - backup register - 0xB8 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP27R - BKP27R - backup register - 0xBC - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP28R - BKP28R - backup register - 0xC0 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP29R - BKP29R - backup register - 0xC4 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP30R - BKP30R - backup register - 0xC8 - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP31R - BKP31R - backup register - 0xCC - 0x20 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - - - TIM6 - Basic timers - TIMs - 0x40001000 - - 0x0 - 0x400 - registers - - - TIM6_DACUNDER - TIM6 global and DAC12 underrun - interrupts - 54 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CEN - Counter enable - 0 - 1 - - - UDIS - Update disable - 1 - 1 - - - URS - Update request source - 2 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - UIFREMAP - UIF status bit remapping - 11 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - MMS - Master mode selection - 4 - 3 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - UDE - Update DMA request enable - 8 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - UG - Update generation - 0 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - 0x00000000 - - - CNT - Low counter value - 0 - 16 - read-write - - - UIFCPY - UIF Copy - 31 - 1 - read-only - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Low Auto-reload value - 0 - 16 - - - - - - - TIM7 - 0x40001400 - - TIM7 - TIM7 global interrupt - 55 - - - - DAC - Digital-to-analog converter - DAC - 0x40007400 - - 0x0 - 0x400 - registers - - - - CR - CR - control register - 0x0 - 0x20 - read-write - 0x00000000 - - - DMAUDRIE2 - DAC channel2 DMA underrun interrupt - enable - 29 - 1 - - - DMAEN2 - DAC channel2 DMA enable - 28 - 1 - - - MAMP2 - DAC channel2 mask/amplitude - selector - 24 - 4 - - - WAVE2 - DAC channel2 noise/triangle wave - generation enable - 22 - 2 - - - TSEL2 - DAC channel2 trigger - selection - 19 - 3 - - - TEN2 - DAC channel2 trigger - enable - 18 - 1 - - - BOFF2 - DAC channel2 output buffer - disable - 17 - 1 - - - EN2 - DAC channel2 enable - 16 - 1 - - - DMAUDRIE1 - DAC channel1 DMA Underrun Interrupt - enable - 13 - 1 - - - DMAEN1 - DAC channel1 DMA enable - 12 - 1 - - - MAMP1 - DAC channel1 mask/amplitude - selector - 8 - 4 - - - WAVE1 - DAC channel1 noise/triangle wave - generation enable - 6 - 2 - - - TSEL1 - DAC channel1 trigger - selection - 3 - 3 - - - TEN1 - DAC channel1 trigger - enable - 2 - 1 - - - BOFF1 - DAC channel1 output buffer - disable - 1 - 1 - - - EN1 - DAC channel1 enable - 0 - 1 - - - - - SWTRIGR - SWTRIGR - software trigger register - 0x4 - 0x20 - write-only - 0x00000000 - - - SWTRIG2 - DAC channel2 software - trigger - 1 - 1 - - - SWTRIG1 - DAC channel1 software - trigger - 0 - 1 - - - - - DHR12R1 - DHR12R1 - channel1 12-bit right-aligned data holding - register - 0x8 - 0x20 - read-write - 0x00000000 - - - DACC1DHR - DAC channel1 12-bit right-aligned - data - 0 - 12 - - - - - DHR12L1 - DHR12L1 - channel1 12-bit left aligned data holding - register - 0xC - 0x20 - read-write - 0x00000000 - - - DACC1DHR - DAC channel1 12-bit left-aligned - data - 4 - 12 - - - - - DHR8R1 - DHR8R1 - channel1 8-bit right aligned data holding - register - 0x10 - 0x20 - read-write - 0x00000000 - - - DACC1DHR - DAC channel1 8-bit right-aligned - data - 0 - 8 - - - - - DHR12R2 - DHR12R2 - channel2 12-bit right aligned data holding - register - 0x14 - 0x20 - read-write - 0x00000000 - - - DACC2DHR - DAC channel2 12-bit right-aligned - data - 0 - 12 - - - - - DHR12L2 - DHR12L2 - channel2 12-bit left aligned data holding - register - 0x18 - 0x20 - read-write - 0x00000000 - - - DACC2DHR - DAC channel2 12-bit left-aligned - data - 4 - 12 - - - - - DHR8R2 - DHR8R2 - channel2 8-bit right-aligned data holding - register - 0x1C - 0x20 - read-write - 0x00000000 - - - DACC2DHR - DAC channel2 8-bit right-aligned - data - 0 - 8 - - - - - DHR12RD - DHR12RD - Dual DAC 12-bit right-aligned data holding - register - 0x20 - 0x20 - read-write - 0x00000000 - - - DACC2DHR - DAC channel2 12-bit right-aligned - data - 16 - 12 - - - DACC1DHR - DAC channel1 12-bit right-aligned - data - 0 - 12 - - - - - DHR12LD - DHR12LD - DUAL DAC 12-bit left aligned data holding - register - 0x24 - 0x20 - read-write - 0x00000000 - - - DACC2DHR - DAC channel2 12-bit left-aligned - data - 20 - 12 - - - DACC1DHR - DAC channel1 12-bit left-aligned - data - 4 - 12 - - - - - DHR8RD - DHR8RD - DUAL DAC 8-bit right aligned data holding - register - 0x28 - 0x20 - read-write - 0x00000000 - - - DACC2DHR - DAC channel2 8-bit right-aligned - data - 8 - 8 - - - DACC1DHR - DAC channel1 8-bit right-aligned - data - 0 - 8 - - - - - DOR1 - DOR1 - channel1 data output register - 0x2C - 0x20 - read-only - 0x00000000 - - - DACC1DOR - DAC channel1 data output - 0 - 12 - - - - - DOR2 - DOR2 - channel2 data output register - 0x30 - 0x20 - read-only - 0x00000000 - - - DACC2DOR - DAC channel2 data output - 0 - 12 - - - - - SR - SR - status register - 0x34 - 0x20 - read-write - 0x00000000 - - - DMAUDR2 - DAC channel2 DMA underrun - flag - 29 - 1 - - - DMAUDR1 - DAC channel1 DMA underrun - flag - 13 - 1 - - - - - - - DBGMCU - Debug support - DBGMCU - 0xE0042000 - - 0x0 - 0x400 - registers - - - - IDCODE - IDCODE - MCU Device ID Code Register - 0x0 - 0x20 - read-only - 0x0 - - - DEV_ID - Device Identifier - 0 - 12 - - - REV_ID - Revision Identifier - 16 - 16 - - - - - CR - CR - Debug MCU Configuration - Register - 0x4 - 0x20 - read-write - 0x0 - - - DBG_SLEEP - Debug Sleep mode - 0 - 1 - - - DBG_STOP - Debug Stop Mode - 1 - 1 - - - DBG_STANDBY - Debug Standby Mode - 2 - 1 - - - TRACE_IOEN - Trace pin assignment - control - 5 - 1 - - - TRACE_MODE - Trace pin assignment - control - 6 - 2 - - - - - APB1FZ - APB1FZ - APB Low Freeze Register - 0x8 - 0x20 - read-write - 0x0 - - - DBG_TIM2_STOP - Debug Timer 2 stopped when Core is - halted - 0 - 1 - - - DBG_TIM3_STOP - Debug Timer 3 stopped when Core is - halted - 1 - 1 - - - DBG_TIM4_STOP - Debug Timer 4 stopped when Core is - halted - 2 - 1 - - - DBG_TIM5_STOP - Debug Timer 5 stopped when Core is - halted - 3 - 1 - - - DBG_TIM6_STOP - Debug Timer 6 stopped when Core is - halted - 4 - 1 - - - DBG_TIM7_STOP - Debug Timer 7 stopped when Core is - halted - 5 - 1 - - - DBG_TIM12_STOP - Debug Timer 12 stopped when Core is - halted - 6 - 1 - - - DBG_TIM13_STOP - Debug Timer 13 stopped when Core is - halted - 7 - 1 - - - DBG_TIMER14_STOP - Debug Timer 14 stopped when Core is - halted - 8 - 1 - - - DBG_TIM18_STOP - Debug Timer 18 stopped when Core is - halted - 9 - 1 - - - DBG_RTC_STOP - Debug RTC stopped when Core is - halted - 10 - 1 - - - DBG_WWDG_STOP - Debug Window Wachdog stopped when Core - is halted - 11 - 1 - - - DBG_IWDG_STOP - Debug Independent Wachdog stopped when - Core is halted - 12 - 1 - - - I2C1_SMBUS_TIMEOUT - SMBUS timeout mode stopped when Core is - halted - 21 - 1 - - - I2C2_SMBUS_TIMEOUT - SMBUS timeout mode stopped when Core is - halted - 22 - 1 - - - DBG_CAN_STOP - Debug CAN stopped when core is - halted - 25 - 1 - - - - - APB2FZ - APB2FZ - APB High Freeze Register - 0xC - 0x20 - read-write - 0x0 - - - DBG_TIM15_STOP - Debug Timer 15 stopped when Core is - halted - 2 - 1 - - - DBG_TIM16_STOP - Debug Timer 16 stopped when Core is - halted - 3 - 1 - - - DBG_TIM17_STO - Debug Timer 17 stopped when Core is - halted - 4 - 1 - - - DBG_TIM19_STOP - Debug Timer 19 stopped when Core is - halted - 5 - 1 - - - - - - - TIM1 - Advanced timer - TIMs - 0x40012C00 - - 0x0 - 0x400 - registers - - - TIM1_BRK_TIM15 - TIM1 Break/TIM15 global - interruts - 24 - - - TIM1_UP_TIM16 - TIM1 Update/TIM16 global - interrupts - 25 - - - TIM1_TRG_COM_TIM17 - TIM1 trigger and commutation/TIM17 - interrupts - 26 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CEN - Counter enable - 0 - 1 - - - UDIS - Update disable - 1 - 1 - - - URS - Update request source - 2 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - DIR - Direction - 4 - 1 - - - CMS - Center-aligned mode - selection - 5 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - CKD - Clock division - 8 - 2 - - - UIFREMAP - UIF status bit remapping - 11 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - CCPC - Capture/compare preloaded - control - 0 - 1 - - - CCUS - Capture/compare control update - selection - 2 - 1 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - MMS - Master mode selection - 4 - 3 - - - TI1S - TI1 selection - 7 - 1 - - - OIS1 - Output Idle state 1 - 8 - 1 - - - OIS1N - Output Idle state 1 - 9 - 1 - - - OIS2 - Output Idle state 2 - 10 - 1 - - - OIS2N - Output Idle state 2 - 11 - 1 - - - OIS3 - Output Idle state 3 - 12 - 1 - - - OIS3N - Output Idle state 3 - 13 - 1 - - - OIS4 - Output Idle state 4 - 14 - 1 - - - OIS5 - Output Idle state 5 - 16 - 1 - - - OIS6 - Output Idle state 6 - 18 - 1 - - - MMS2 - Master mode selection 2 - 20 - 4 - - - - - SMCR - SMCR - slave mode control register - 0x8 - 0x20 - read-write - 0x0000 - - - SMS - Slave mode selection - 0 - 3 - - - OCCS - OCREF clear selection - 3 - 1 - - - TS - Trigger selection - 4 - 3 - - - MSM - Master/Slave mode - 7 - 1 - - - ETF - External trigger filter - 8 - 4 - - - ETPS - External trigger prescaler - 12 - 2 - - - ECE - External clock enable - 14 - 1 - - - ETP - External trigger polarity - 15 - 1 - - - SMS3 - Slave mode selection bit 3 - 16 - 1 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - TDE - Trigger DMA request enable - 14 - 1 - - - COMDE - COM DMA request enable - 13 - 1 - - - CC4DE - Capture/Compare 4 DMA request - enable - 12 - 1 - - - CC3DE - Capture/Compare 3 DMA request - enable - 11 - 1 - - - CC2DE - Capture/Compare 2 DMA request - enable - 10 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - BIE - Break interrupt enable - 7 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - COMIE - COM interrupt enable - 5 - 1 - - - CC4IE - Capture/Compare 4 interrupt - enable - 4 - 1 - - - CC3IE - Capture/Compare 3 interrupt - enable - 3 - 1 - - - CC2IE - Capture/Compare 2 interrupt - enable - 2 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - UIF - Update interrupt flag - 0 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - CC2IF - Capture/Compare 2 interrupt - flag - 2 - 1 - - - CC3IF - Capture/Compare 3 interrupt - flag - 3 - 1 - - - CC4IF - Capture/Compare 4 interrupt - flag - 4 - 1 - - - COMIF - COM interrupt flag - 5 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - BIF - Break interrupt flag - 7 - 1 - - - B2IF - Break 2 interrupt flag - 8 - 1 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - CC2OF - Capture/compare 2 overcapture - flag - 10 - 1 - - - CC3OF - Capture/Compare 3 overcapture - flag - 11 - 1 - - - CC4OF - Capture/Compare 4 overcapture - flag - 12 - 1 - - - C5IF - Capture/Compare 5 interrupt - flag - 16 - 1 - - - C6IF - Capture/Compare 6 interrupt - flag - 17 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - UG - Update generation - 0 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - CC2G - Capture/compare 2 - generation - 2 - 1 - - - CC3G - Capture/compare 3 - generation - 3 - 1 - - - CC4G - Capture/compare 4 - generation - 4 - 1 - - - COMG - Capture/Compare control update - generation - 5 - 1 - - - TG - Trigger generation - 6 - 1 - - - BG - Break generation - 7 - 1 - - - B2G - Break 2 generation - 8 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - OC2CE - Output Compare 2 clear - enable - 15 - 1 - - - OC2M - Output Compare 2 mode - 12 - 3 - - - OC2PE - Output Compare 2 preload - enable - 11 - 1 - - - OC2FE - Output Compare 2 fast - enable - 10 - 1 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - OC1CE - Output Compare 1 clear - enable - 7 - 1 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - OC1FE - Output Compare 1 fast - enable - 2 - 1 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - OC1M_3 - Output Compare 1 mode bit - 3 - 16 - 1 - - - OC2M_3 - Output Compare 2 mode bit - 3 - 24 - 1 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC2F - Input capture 2 filter - 12 - 4 - - - IC2PCS - Input capture 2 prescaler - 10 - 2 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - IC1F - Input capture 1 filter - 4 - 4 - - - IC1PCS - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR2_Output - CCMR2_Output - capture/compare mode register (output - mode) - 0x1C - 0x20 - read-write - 0x00000000 - - - OC4CE - Output compare 4 clear - enable - 15 - 1 - - - OC4M - Output compare 4 mode - 12 - 3 - - - OC4PE - Output compare 4 preload - enable - 11 - 1 - - - OC4FE - Output compare 4 fast - enable - 10 - 1 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - OC3CE - Output compare 3 clear - enable - 7 - 1 - - - OC3M - Output compare 3 mode - 4 - 3 - - - OC3PE - Output compare 3 preload - enable - 3 - 1 - - - OC3FE - Output compare 3 fast - enable - 2 - 1 - - - CC3S - Capture/Compare 3 - selection - 0 - 2 - - - OC3M_3 - Output Compare 3 mode bit - 3 - 16 - 1 - - - OC4M_3 - Output Compare 4 mode bit - 3 - 24 - 1 - - - - - CCMR2_Input - CCMR2_Input - capture/compare mode register 2 (input - mode) - CCMR2_Output - 0x1C - 0x20 - read-write - 0x00000000 - - - IC4F - Input capture 4 filter - 12 - 4 - - - IC4PSC - Input capture 4 prescaler - 10 - 2 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - IC3F - Input capture 3 filter - 4 - 4 - - - IC3PSC - Input capture 3 prescaler - 2 - 2 - - - CC3S - Capture/compare 3 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1NE - Capture/Compare 1 complementary output - enable - 2 - 1 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC2E - Capture/Compare 2 output - enable - 4 - 1 - - - CC2P - Capture/Compare 2 output - Polarity - 5 - 1 - - - CC2NE - Capture/Compare 2 complementary output - enable - 6 - 1 - - - CC2NP - Capture/Compare 2 output - Polarity - 7 - 1 - - - CC3E - Capture/Compare 3 output - enable - 8 - 1 - - - CC3P - Capture/Compare 3 output - Polarity - 9 - 1 - - - CC3NE - Capture/Compare 3 complementary output - enable - 10 - 1 - - - CC3NP - Capture/Compare 3 output - Polarity - 11 - 1 - - - CC4E - Capture/Compare 4 output - enable - 12 - 1 - - - CC4P - Capture/Compare 3 output - Polarity - 13 - 1 - - - CC4NP - Capture/Compare 4 output - Polarity - 15 - 1 - - - CC5E - Capture/Compare 5 output - enable - 16 - 1 - - - CC5P - Capture/Compare 5 output - Polarity - 17 - 1 - - - CC6E - Capture/Compare 6 output - enable - 20 - 1 - - - CC6P - Capture/Compare 6 output - Polarity - 21 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - 0x00000000 - - - CNT - counter value - 0 - 16 - read-write - - - UIFCPY - UIF copy - 31 - 1 - read-only - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - RCR - RCR - repetition counter register - 0x30 - 0x20 - read-write - 0x0000 - - - REP - Repetition counter value - 0 - 16 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - CCR2 - CCR2 - capture/compare register 2 - 0x38 - 0x20 - read-write - 0x00000000 - - - CCR2 - Capture/Compare 2 value - 0 - 16 - - - - - CCR3 - CCR3 - capture/compare register 3 - 0x3C - 0x20 - read-write - 0x00000000 - - - CCR3 - Capture/Compare 3 value - 0 - 16 - - - - - CCR4 - CCR4 - capture/compare register 4 - 0x40 - 0x20 - read-write - 0x00000000 - - - CCR4 - Capture/Compare 3 value - 0 - 16 - - - - - BDTR - BDTR - break and dead-time register - 0x44 - 0x20 - read-write - 0x00000000 - - - DTG - Dead-time generator setup - 0 - 8 - - - LOCK - Lock configuration - 8 - 2 - - - OSSI - Off-state selection for Idle - mode - 10 - 1 - - - OSSR - Off-state selection for Run - mode - 11 - 1 - - - BKE - Break enable - 12 - 1 - - - BKP - Break polarity - 13 - 1 - - - AOE - Automatic output enable - 14 - 1 - - - MOE - Main output enable - 15 - 1 - - - BKF - Break filter - 16 - 4 - - - BK2F - Break 2 filter - 20 - 4 - - - BK2E - Break 2 enable - 24 - 1 - - - BK2P - Break 2 polarity - 25 - 1 - - - - - DCR - DCR - DMA control register - 0x48 - 0x20 - read-write - 0x00000000 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - DMAR - DMA address for full transfer - 0x4C - 0x20 - read-write - 0x00000000 - - - DMAB - DMA register for burst - accesses - 0 - 16 - - - - - CCMR3_Output - CCMR3_Output - capture/compare mode register 3 (output - mode) - 0x54 - 0x20 - read-write - 0x00000000 - - - OC5FE - Output compare 5 fast - enable - 2 - 1 - - - OC5PE - Output compare 5 preload - enable - 3 - 1 - - - OC5M - Output compare 5 mode - 4 - 3 - - - OC5CE - Output compare 5 clear - enable - 7 - 1 - - - OC6FE - Output compare 6 fast - enable - 10 - 1 - - - OC6PE - Output compare 6 preload - enable - 11 - 1 - - - OC6M - Output compare 6 mode - 12 - 3 - - - OC6CE - Output compare 6 clear - enable - 15 - 1 - - - OC5M_3 - Outout Compare 5 mode bit - 3 - 16 - 1 - - - OC6M_3 - Outout Compare 6 mode bit - 3 - 24 - 1 - - - - - CCR5 - CCR5 - capture/compare register 5 - 0x58 - 0x20 - read-write - 0x00000000 - - - CCR5 - Capture/Compare 5 value - 0 - 16 - - - GC5C1 - Group Channel 5 and Channel - 1 - 29 - 1 - - - GC5C2 - Group Channel 5 and Channel - 2 - 30 - 1 - - - GC5C3 - Group Channel 5 and Channel - 3 - 31 - 1 - - - - - CCR6 - CCR6 - capture/compare register 6 - 0x5C - 0x20 - read-write - 0x00000000 - - - CCR6 - Capture/Compare 6 value - 0 - 16 - - - - - OR - OR - option registers - 0x60 - 0x20 - read-write - 0x00000000 - - - TIM1_ETR_ADC1_RMP - TIM1_ETR_ADC1 remapping - capability - 0 - 2 - - - TIM1_ETR_ADC4_RMP - TIM1_ETR_ADC4 remapping - capability - 2 - 2 - - - - - - - TIM20 - 0x40015000 - - TIM1_CC - TIM1 capture compare interrupt - 27 - - - TIM20_BRK - TIM20 Break interrupt - 77 - - - TIM20_UP - TIM20 Upgrade interrupt - 78 - - - TIM20_TRG_COM - TIM20 Trigger and Commutation - interrupt - 79 - - - TIM20_CC - TIM20 Capture Compare interrupt - 80 - - - - TIM8 - Advanced-timers - TIMs - 0x40013400 - - 0x0 - 0x400 - registers - - - TIM8_BRK - TIM8 break interrupt - 43 - - - TIM8_UP - TIM8 update interrupt - 44 - - - TIM8_TRG_COM - TIM8 Trigger and commutation - interrupts - 45 - - - TIM8_CC - TIM8 capture compare interrupt - 46 - - - - CR1 - CR1 - control register 1 - 0x0 - 0x20 - read-write - 0x0000 - - - CEN - Counter enable - 0 - 1 - - - UDIS - Update disable - 1 - 1 - - - URS - Update request source - 2 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - DIR - Direction - 4 - 1 - - - CMS - Center-aligned mode - selection - 5 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - CKD - Clock division - 8 - 2 - - - UIFREMAP - UIF status bit remapping - 11 - 1 - - - - - CR2 - CR2 - control register 2 - 0x4 - 0x20 - read-write - 0x0000 - - - CCPC - Capture/compare preloaded - control - 0 - 1 - - - CCUS - Capture/compare control update - selection - 2 - 1 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - MMS - Master mode selection - 4 - 3 - - - TI1S - TI1 selection - 7 - 1 - - - OIS1 - Output Idle state 1 - 8 - 1 - - - OIS1N - Output Idle state 1 - 9 - 1 - - - OIS2 - Output Idle state 2 - 10 - 1 - - - OIS2N - Output Idle state 2 - 11 - 1 - - - OIS3 - Output Idle state 3 - 12 - 1 - - - OIS3N - Output Idle state 3 - 13 - 1 - - - OIS4 - Output Idle state 4 - 14 - 1 - - - OIS5 - Output Idle state 5 - 16 - 1 - - - OIS6 - Output Idle state 6 - 18 - 1 - - - MMS2 - Master mode selection 2 - 20 - 4 - - - - - SMCR - SMCR - slave mode control register - 0x8 - 0x20 - read-write - 0x0000 - - - SMS - Slave mode selection - 0 - 3 - - - OCCS - OCREF clear selection - 3 - 1 - - - TS - Trigger selection - 4 - 3 - - - MSM - Master/Slave mode - 7 - 1 - - - ETF - External trigger filter - 8 - 4 - - - ETPS - External trigger prescaler - 12 - 2 - - - ECE - External clock enable - 14 - 1 - - - ETP - External trigger polarity - 15 - 1 - - - SMS3 - Slave mode selection bit 3 - 16 - 1 - - - - - DIER - DIER - DMA/Interrupt enable register - 0xC - 0x20 - read-write - 0x0000 - - - TDE - Trigger DMA request enable - 14 - 1 - - - COMDE - COM DMA request enable - 13 - 1 - - - CC4DE - Capture/Compare 4 DMA request - enable - 12 - 1 - - - CC3DE - Capture/Compare 3 DMA request - enable - 11 - 1 - - - CC2DE - Capture/Compare 2 DMA request - enable - 10 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - BIE - Break interrupt enable - 7 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - COMIE - COM interrupt enable - 5 - 1 - - - CC4IE - Capture/Compare 4 interrupt - enable - 4 - 1 - - - CC3IE - Capture/Compare 3 interrupt - enable - 3 - 1 - - - CC2IE - Capture/Compare 2 interrupt - enable - 2 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - SR - status register - 0x10 - 0x20 - read-write - 0x0000 - - - UIF - Update interrupt flag - 0 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - CC2IF - Capture/Compare 2 interrupt - flag - 2 - 1 - - - CC3IF - Capture/Compare 3 interrupt - flag - 3 - 1 - - - CC4IF - Capture/Compare 4 interrupt - flag - 4 - 1 - - - COMIF - COM interrupt flag - 5 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - BIF - Break interrupt flag - 7 - 1 - - - B2IF - Break 2 interrupt flag - 8 - 1 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - CC2OF - Capture/compare 2 overcapture - flag - 10 - 1 - - - CC3OF - Capture/Compare 3 overcapture - flag - 11 - 1 - - - CC4OF - Capture/Compare 4 overcapture - flag - 12 - 1 - - - C5IF - Capture/Compare 5 interrupt - flag - 16 - 1 - - - C6IF - Capture/Compare 6 interrupt - flag - 17 - 1 - - - - - EGR - EGR - event generation register - 0x14 - 0x20 - write-only - 0x0000 - - - UG - Update generation - 0 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - CC2G - Capture/compare 2 - generation - 2 - 1 - - - CC3G - Capture/compare 3 - generation - 3 - 1 - - - CC4G - Capture/compare 4 - generation - 4 - 1 - - - COMG - Capture/Compare control update - generation - 5 - 1 - - - TG - Trigger generation - 6 - 1 - - - BG - Break generation - 7 - 1 - - - B2G - Break 2 generation - 8 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register (output - mode) - 0x18 - 0x20 - read-write - 0x00000000 - - - OC2CE - Output Compare 2 clear - enable - 15 - 1 - - - OC2M - Output Compare 2 mode - 12 - 3 - - - OC2PE - Output Compare 2 preload - enable - 11 - 1 - - - OC2FE - Output Compare 2 fast - enable - 10 - 1 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - OC1CE - Output Compare 1 clear - enable - 7 - 1 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - OC1FE - Output Compare 1 fast - enable - 2 - 1 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - OC1M_3 - Output Compare 1 mode bit - 3 - 16 - 1 - - - OC2M_3 - Output Compare 2 mode bit - 3 - 24 - 1 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 0x20 - read-write - 0x00000000 - - - IC2F - Input capture 2 filter - 12 - 4 - - - IC2PCS - Input capture 2 prescaler - 10 - 2 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - IC1F - Input capture 1 filter - 4 - 4 - - - IC1PCS - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR2_Output - CCMR2_Output - capture/compare mode register (output - mode) - 0x1C - 0x20 - read-write - 0x00000000 - - - OC4CE - Output compare 4 clear - enable - 15 - 1 - - - OC4M - Output compare 4 mode - 12 - 3 - - - OC4PE - Output compare 4 preload - enable - 11 - 1 - - - OC4FE - Output compare 4 fast - enable - 10 - 1 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - OC3CE - Output compare 3 clear - enable - 7 - 1 - - - OC3M - Output compare 3 mode - 4 - 3 - - - OC3PE - Output compare 3 preload - enable - 3 - 1 - - - OC3FE - Output compare 3 fast - enable - 2 - 1 - - - CC3S - Capture/Compare 3 - selection - 0 - 2 - - - OC3M_3 - Output Compare 3 mode bit - 3 - 16 - 1 - - - OC4M_3 - Output Compare 4 mode bit - 3 - 24 - 1 - - - - - CCMR2_Input - CCMR2_Input - capture/compare mode register 2 (input - mode) - CCMR2_Output - 0x1C - 0x20 - read-write - 0x00000000 - - - IC4F - Input capture 4 filter - 12 - 4 - - - IC4PSC - Input capture 4 prescaler - 10 - 2 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - IC3F - Input capture 3 filter - 4 - 4 - - - IC3PSC - Input capture 3 prescaler - 2 - 2 - - - CC3S - Capture/compare 3 - selection - 0 - 2 - - - - - CCER - CCER - capture/compare enable - register - 0x20 - 0x20 - read-write - 0x0000 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1NE - Capture/Compare 1 complementary output - enable - 2 - 1 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC2E - Capture/Compare 2 output - enable - 4 - 1 - - - CC2P - Capture/Compare 2 output - Polarity - 5 - 1 - - - CC2NE - Capture/Compare 2 complementary output - enable - 6 - 1 - - - CC2NP - Capture/Compare 2 output - Polarity - 7 - 1 - - - CC3E - Capture/Compare 3 output - enable - 8 - 1 - - - CC3P - Capture/Compare 3 output - Polarity - 9 - 1 - - - CC3NE - Capture/Compare 3 complementary output - enable - 10 - 1 - - - CC3NP - Capture/Compare 3 output - Polarity - 11 - 1 - - - CC4E - Capture/Compare 4 output - enable - 12 - 1 - - - CC4P - Capture/Compare 3 output - Polarity - 13 - 1 - - - CC4NP - Capture/Compare 4 output - Polarity - 15 - 1 - - - CC5E - Capture/Compare 5 output - enable - 16 - 1 - - - CC5P - Capture/Compare 5 output - Polarity - 17 - 1 - - - CC6E - Capture/Compare 6 output - enable - 20 - 1 - - - CC6P - Capture/Compare 6 output - Polarity - 21 - 1 - - - - - CNT - CNT - counter - 0x24 - 0x20 - 0x00000000 - - - CNT - counter value - 0 - 16 - read-write - - - UIFCPY - UIF copy - 31 - 1 - read-only - - - - - PSC - PSC - prescaler - 0x28 - 0x20 - read-write - 0x0000 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - ARR - auto-reload register - 0x2C - 0x20 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - RCR - RCR - repetition counter register - 0x30 - 0x20 - read-write - 0x0000 - - - REP - Repetition counter value - 0 - 16 - - - - - CCR1 - CCR1 - capture/compare register 1 - 0x34 - 0x20 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - CCR2 - CCR2 - capture/compare register 2 - 0x38 - 0x20 - read-write - 0x00000000 - - - CCR2 - Capture/Compare 2 value - 0 - 16 - - - - - CCR3 - CCR3 - capture/compare register 3 - 0x3C - 0x20 - read-write - 0x00000000 - - - CCR3 - Capture/Compare 3 value - 0 - 16 - - - - - CCR4 - CCR4 - capture/compare register 4 - 0x40 - 0x20 - read-write - 0x00000000 - - - CCR4 - Capture/Compare 3 value - 0 - 16 - - - - - BDTR - BDTR - break and dead-time register - 0x44 - 0x20 - read-write - 0x00000000 - - - DTG - Dead-time generator setup - 0 - 8 - - - LOCK - Lock configuration - 8 - 2 - - - OSSI - Off-state selection for Idle - mode - 10 - 1 - - - OSSR - Off-state selection for Run - mode - 11 - 1 - - - BKE - Break enable - 12 - 1 - - - BKP - Break polarity - 13 - 1 - - - AOE - Automatic output enable - 14 - 1 - - - MOE - Main output enable - 15 - 1 - - - BKF - Break filter - 16 - 4 - - - BK2F - Break 2 filter - 20 - 4 - - - BK2E - Break 2 enable - 24 - 1 - - - BK2P - Break 2 polarity - 25 - 1 - - - - - DCR - DCR - DMA control register - 0x48 - 0x20 - read-write - 0x00000000 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - DMAR - DMA address for full transfer - 0x4C - 0x20 - read-write - 0x00000000 - - - DMAB - DMA register for burst - accesses - 0 - 16 - - - - - CCMR3_Output - CCMR3_Output - capture/compare mode register 3 (output - mode) - 0x54 - 0x20 - read-write - 0x00000000 - - - OC5FE - Output compare 5 fast - enable - 2 - 1 - - - OC5PE - Output compare 5 preload - enable - 3 - 1 - - - OC5M - Output compare 5 mode - 4 - 3 - - - OC5CE - Output compare 5 clear - enable - 7 - 1 - - - OC6FE - Output compare 6 fast - enable - 10 - 1 - - - OC6PE - Output compare 6 preload - enable - 11 - 1 - - - OC6M - Output compare 6 mode - 12 - 3 - - - OC6CE - Output compare 6 clear - enable - 15 - 1 - - - OC5M_3 - Outout Compare 5 mode bit - 3 - 16 - 1 - - - OC6M_3 - Outout Compare 6 mode bit - 3 - 24 - 1 - - - - - CCR5 - CCR5 - capture/compare register 5 - 0x58 - 0x20 - read-write - 0x00000000 - - - CCR5 - Capture/Compare 5 value - 0 - 16 - - - GC5C1 - Group Channel 5 and Channel - 1 - 29 - 1 - - - GC5C2 - Group Channel 5 and Channel - 2 - 30 - 1 - - - GC5C3 - Group Channel 5 and Channel - 3 - 31 - 1 - - - - - CCR6 - CCR6 - capture/compare register 6 - 0x5C - 0x20 - read-write - 0x00000000 - - - CCR6 - Capture/Compare 6 value - 0 - 16 - - - - - OR - OR - option registers - 0x60 - 0x20 - read-write - 0x00000000 - - - TIM8_ETR_ADC2_RMP - TIM8_ETR_ADC2 remapping - capability - 0 - 2 - - - TIM8_ETR_ADC3_RMP - TIM8_ETR_ADC3 remapping - capability - 2 - 2 - - - - - - - ADC1 - Analog-to-Digital Converter - ADC - 0x50000000 - - 0x0 - 0x100 - registers - - - - ISR - ISR - interrupt and status register - 0x0 - 0x20 - read-write - 0x00000000 - - - JQOVF - JQOVF - 10 - 1 - - - AWD3 - AWD3 - 9 - 1 - - - AWD2 - AWD2 - 8 - 1 - - - AWD1 - AWD1 - 7 - 1 - - - JEOS - JEOS - 6 - 1 - - - JEOC - JEOC - 5 - 1 - - - OVR - OVR - 4 - 1 - - - EOS - EOS - 3 - 1 - - - EOC - EOC - 2 - 1 - - - EOSMP - EOSMP - 1 - 1 - - - ADRDY - ADRDY - 0 - 1 - - - - - IER - IER - interrupt enable register - 0x4 - 0x20 - read-write - 0x00000000 - - - JQOVFIE - JQOVFIE - 10 - 1 - - - AWD3IE - AWD3IE - 9 - 1 - - - AWD2IE - AWD2IE - 8 - 1 - - - AWD1IE - AWD1IE - 7 - 1 - - - JEOSIE - JEOSIE - 6 - 1 - - - JEOCIE - JEOCIE - 5 - 1 - - - OVRIE - OVRIE - 4 - 1 - - - EOSIE - EOSIE - 3 - 1 - - - EOCIE - EOCIE - 2 - 1 - - - EOSMPIE - EOSMPIE - 1 - 1 - - - ADRDYIE - ADRDYIE - 0 - 1 - - - - - CR - CR - control register - 0x8 - 0x20 - read-write - 0x00000000 - - - ADCAL - ADCAL - 31 - 1 - - - ADCALDIF - ADCALDIF - 30 - 1 - - - ADVREGEN - ADVREGEN - 28 - 2 - - - JADSTP - JADSTP - 5 - 1 - - - ADSTP - ADSTP - 4 - 1 - - - JADSTART - JADSTART - 3 - 1 - - - ADSTART - ADSTART - 2 - 1 - - - ADDIS - ADDIS - 1 - 1 - - - ADEN - ADEN - 0 - 1 - - - - - CFGR - CFGR - configuration register - 0xC - 0x20 - read-write - 0x00000000 - - - AWDCH1CH - AWDCH1CH - 26 - 5 - - - JAUTO - JAUTO - 25 - 1 - - - JAWD1EN - JAWD1EN - 24 - 1 - - - AWD1EN - AWD1EN - 23 - 1 - - - AWD1SGL - AWD1SGL - 22 - 1 - - - JQM - JQM - 21 - 1 - - - JDISCEN - JDISCEN - 20 - 1 - - - DISCNUM - DISCNUM - 17 - 3 - - - DISCEN - DISCEN - 16 - 1 - - - AUTDLY - AUTDLY - 14 - 1 - - - CONT - CONT - 13 - 1 - - - OVRMOD - OVRMOD - 12 - 1 - - - EXTEN - EXTEN - 10 - 2 - - - EXTSEL - EXTSEL - 6 - 4 - - - ALIGN - ALIGN - 5 - 1 - - - RES - RES - 3 - 2 - - - DMACFG - DMACFG - 1 - 1 - - - DMAEN - DMAEN - 0 - 1 - - - - - SMPR1 - SMPR1 - sample time register 1 - 0x14 - 0x20 - read-write - 0x00000000 - - - SMP9 - SMP9 - 27 - 3 - - - SMP8 - SMP8 - 24 - 3 - - - SMP7 - SMP7 - 21 - 3 - - - SMP6 - SMP6 - 18 - 3 - - - SMP5 - SMP5 - 15 - 3 - - - SMP4 - SMP4 - 12 - 3 - - - SMP3 - SMP3 - 9 - 3 - - - SMP2 - SMP2 - 6 - 3 - - - SMP1 - SMP1 - 3 - 3 - - - - - SMPR2 - SMPR2 - sample time register 2 - 0x18 - 0x20 - read-write - 0x00000000 - - - SMP18 - SMP18 - 24 - 3 - - - SMP17 - SMP17 - 21 - 3 - - - SMP16 - SMP16 - 18 - 3 - - - SMP15 - SMP15 - 15 - 3 - - - SMP14 - SMP14 - 12 - 3 - - - SMP13 - SMP13 - 9 - 3 - - - SMP12 - SMP12 - 6 - 3 - - - SMP11 - SMP11 - 3 - 3 - - - SMP10 - SMP10 - 0 - 3 - - - - - TR1 - TR1 - watchdog threshold register 1 - 0x20 - 0x20 - read-write - 0x0FFF0000 - - - HT1 - HT1 - 16 - 12 - - - LT1 - LT1 - 0 - 12 - - - - - TR2 - TR2 - watchdog threshold register - 0x24 - 0x20 - read-write - 0x0FFF0000 - - - HT2 - HT2 - 16 - 8 - - - LT2 - LT2 - 0 - 8 - - - - - TR3 - TR3 - watchdog threshold register 3 - 0x28 - 0x20 - read-write - 0x0FFF0000 - - - HT3 - HT3 - 16 - 8 - - - LT3 - LT3 - 0 - 8 - - - - - SQR1 - SQR1 - regular sequence register 1 - 0x30 - 0x20 - read-write - 0x00000000 - - - SQ4 - SQ4 - 24 - 5 - - - SQ3 - SQ3 - 18 - 5 - - - SQ2 - SQ2 - 12 - 5 - - - SQ1 - SQ1 - 6 - 5 - - - L3 - L3 - 0 - 4 - - - - - SQR2 - SQR2 - regular sequence register 2 - 0x34 - 0x20 - read-write - 0x00000000 - - - SQ9 - SQ9 - 24 - 5 - - - SQ8 - SQ8 - 18 - 5 - - - SQ7 - SQ7 - 12 - 5 - - - SQ6 - SQ6 - 6 - 5 - - - SQ5 - SQ5 - 0 - 5 - - - - - SQR3 - SQR3 - regular sequence register 3 - 0x38 - 0x20 - read-write - 0x00000000 - - - SQ14 - SQ14 - 24 - 5 - - - SQ13 - SQ13 - 18 - 5 - - - SQ12 - SQ12 - 12 - 5 - - - SQ11 - SQ11 - 6 - 5 - - - SQ10 - SQ10 - 0 - 5 - - - - - SQR4 - SQR4 - regular sequence register 4 - 0x3C - 0x20 - read-write - 0x00000000 - - - SQ16 - SQ16 - 6 - 5 - - - SQ15 - SQ15 - 0 - 5 - - - - - DR - DR - regular Data Register - 0x40 - 0x20 - read-only - 0x00000000 - - - regularDATA - regularDATA - 0 - 16 - - - - - JSQR - JSQR - injected sequence register - 0x4C - 0x20 - read-write - 0x00000000 - - - JSQ4 - JSQ4 - 26 - 5 - - - JSQ3 - JSQ3 - 20 - 5 - - - JSQ2 - JSQ2 - 14 - 5 - - - JSQ1 - JSQ1 - 8 - 5 - - - JEXTEN - JEXTEN - 6 - 2 - - - JEXTSEL - JEXTSEL - 2 - 4 - - - JL - JL - 0 - 2 - - - - - OFR1 - OFR1 - offset register 1 - 0x60 - 0x20 - read-write - 0x00000000 - - - OFFSET1_EN - OFFSET1_EN - 31 - 1 - - - OFFSET1_CH - OFFSET1_CH - 26 - 5 - - - OFFSET1 - OFFSET1 - 0 - 12 - - - - - OFR2 - OFR2 - offset register 2 - 0x64 - 0x20 - read-write - 0x00000000 - - - OFFSET2_EN - OFFSET2_EN - 31 - 1 - - - OFFSET2_CH - OFFSET2_CH - 26 - 5 - - - OFFSET2 - OFFSET2 - 0 - 12 - - - - - OFR3 - OFR3 - offset register 3 - 0x68 - 0x20 - read-write - 0x00000000 - - - OFFSET3_EN - OFFSET3_EN - 31 - 1 - - - OFFSET3_CH - OFFSET3_CH - 26 - 5 - - - OFFSET3 - OFFSET3 - 0 - 12 - - - - - OFR4 - OFR4 - offset register 4 - 0x6C - 0x20 - read-write - 0x00000000 - - - OFFSET4_EN - OFFSET4_EN - 31 - 1 - - - OFFSET4_CH - OFFSET4_CH - 26 - 5 - - - OFFSET4 - OFFSET4 - 0 - 12 - - - - - JDR1 - JDR1 - injected data register 1 - 0x80 - 0x20 - read-only - 0x00000000 - - - JDATA1 - JDATA1 - 0 - 16 - - - - - JDR2 - JDR2 - injected data register 2 - 0x84 - 0x20 - read-only - 0x00000000 - - - JDATA2 - JDATA2 - 0 - 16 - - - - - JDR3 - JDR3 - injected data register 3 - 0x88 - 0x20 - read-only - 0x00000000 - - - JDATA3 - JDATA3 - 0 - 16 - - - - - JDR4 - JDR4 - injected data register 4 - 0x8C - 0x20 - read-only - 0x00000000 - - - JDATA4 - JDATA4 - 0 - 16 - - - - - AWD2CR - AWD2CR - Analog Watchdog 2 Configuration - Register - 0xA0 - 0x20 - read-write - 0x00000000 - - - AWD2CH - AWD2CH - 1 - 18 - - - - - AWD3CR - AWD3CR - Analog Watchdog 3 Configuration - Register - 0xA4 - 0x20 - read-write - 0x00000000 - - - AWD3CH - AWD3CH - 1 - 18 - - - - - DIFSEL - DIFSEL - Differential Mode Selection Register - 2 - 0xB0 - 0x20 - 0x00000000 - - - DIFSEL_1_15 - Differential mode for channels 15 to - 1 - 1 - 15 - read-write - - - DIFSEL_16_18 - Differential mode for channels 18 to - 16 - 16 - 3 - read-only - - - - - CALFACT - CALFACT - Calibration Factors - 0xB4 - 0x20 - read-write - 0x00000000 - - - CALFACT_D - CALFACT_D - 16 - 7 - - - CALFACT_S - CALFACT_S - 0 - 7 - - - - - - - ADC2 - 0x50000100 - - - ADC3 - 0x50000400 - - ADC3 - ADC3 global interrupt - 47 - - - - ADC4 - 0x50000500 - - ADC4 - ADC4 global interrupt - 61 - - - - ADC1_2 - Analog-to-Digital Converter - ADC - 0x50000300 - - 0x0 - 0x10 - registers - - - ADC1_2 - ADC1 and ADC2 global interrupt - 18 - - - - CSR - CSR - ADC Common status register - 0x0 - 0x20 - read-only - 0x00000000 - - - ADDRDY_MST - ADDRDY_MST - 0 - 1 - - - EOSMP_MST - EOSMP_MST - 1 - 1 - - - EOC_MST - EOC_MST - 2 - 1 - - - EOS_MST - EOS_MST - 3 - 1 - - - OVR_MST - OVR_MST - 4 - 1 - - - JEOC_MST - JEOC_MST - 5 - 1 - - - JEOS_MST - JEOS_MST - 6 - 1 - - - AWD1_MST - AWD1_MST - 7 - 1 - - - AWD2_MST - AWD2_MST - 8 - 1 - - - AWD3_MST - AWD3_MST - 9 - 1 - - - JQOVF_MST - JQOVF_MST - 10 - 1 - - - ADRDY_SLV - ADRDY_SLV - 16 - 1 - - - EOSMP_SLV - EOSMP_SLV - 17 - 1 - - - EOC_SLV - End of regular conversion of the slave - ADC - 18 - 1 - - - EOS_SLV - End of regular sequence flag of the - slave ADC - 19 - 1 - - - OVR_SLV - Overrun flag of the slave - ADC - 20 - 1 - - - JEOC_SLV - End of injected conversion flag of the - slave ADC - 21 - 1 - - - JEOS_SLV - End of injected sequence flag of the - slave ADC - 22 - 1 - - - AWD1_SLV - Analog watchdog 1 flag of the slave - ADC - 23 - 1 - - - AWD2_SLV - Analog watchdog 2 flag of the slave - ADC - 24 - 1 - - - AWD3_SLV - Analog watchdog 3 flag of the slave - ADC - 25 - 1 - - - JQOVF_SLV - Injected Context Queue Overflow flag of - the slave ADC - 26 - 1 - - - - - CCR - CCR - ADC common control register - 0x8 - 0x20 - read-write - 0x00000000 - - - MULT - Multi ADC mode selection - 0 - 5 - - - DELAY - Delay between 2 sampling - phases - 8 - 4 - - - DMACFG - DMA configuration (for multi-ADC - mode) - 13 - 1 - - - MDMA - Direct memory access mode for multi ADC - mode - 14 - 2 - - - CKMODE - ADC clock mode - 16 - 2 - - - VREFEN - VREFINT enable - 22 - 1 - - - TSEN - Temperature sensor enable - 23 - 1 - - - VBATEN - VBAT enable - 24 - 1 - - - - - CDR - CDR - ADC common regular data register for dual - and triple modes - 0xC - 0x20 - read-only - 0x00000000 - - - RDATA_SLV - Regular data of the slave - ADC - 16 - 16 - - - RDATA_MST - Regular data of the master - ADC - 0 - 16 - - - - - - - ADC3_4 - 0x50000700 - - - SYSCFG_COMP_OPAMP - System configuration controller _Comparator and - Operational amplifier - SYSCFG_COMP_OPAMP - 0x40010000 - - 0x0 - 0x400 - registers - - - COMP123 - COMP1 & COMP2 & COMP3 interrupts - combined with EXTI Lines 21, 22 and 29 - interrupts - 64 - - - COMP456 - COMP4 & COMP5 & COMP6 interrupts - combined with EXTI Lines 30, 31 and 32 - interrupts - 65 - - - COMP7 - COMP7 interrupt combined with EXTI Line 33 - interrupt - 66 - - - - SYSCFG_CFGR1 - SYSCFG_CFGR1 - configuration register 1 - 0x0 - 0x20 - read-write - 0x00000000 - - - MEM_MODE - Memory mapping selection - bits - 0 - 2 - - - USB_IT_RMP - USB interrupt remap - 5 - 1 - - - TIM1_ITR_RMP - Timer 1 ITR3 selection - 6 - 1 - - - DAC_TRIG_RMP - DAC trigger remap (when TSEL = - 001) - 7 - 1 - - - ADC24_DMA_RMP - ADC24 DMA remapping bit - 8 - 1 - - - TIM16_DMA_RMP - TIM16 DMA request remapping - bit - 11 - 1 - - - TIM17_DMA_RMP - TIM17 DMA request remapping - bit - 12 - 1 - - - TIM6_DAC1_DMA_RMP - TIM6 and DAC1 DMA request remapping - bit - 13 - 1 - - - TIM7_DAC2_DMA_RMP - TIM7 and DAC2 DMA request remapping - bit - 14 - 1 - - - I2C_PB6_FM - Fast Mode Plus (FM+) driving capability - activation bits. - 16 - 1 - - - I2C_PB7_FM - Fast Mode Plus (FM+) driving capability - activation bits. - 17 - 1 - - - I2C_PB8_FM - Fast Mode Plus (FM+) driving capability - activation bits. - 18 - 1 - - - I2C_PB9_FM - Fast Mode Plus (FM+) driving capability - activation bits. - 19 - 1 - - - I2C1_FM - I2C1 Fast Mode Plus - 20 - 1 - - - I2C2_FM - I2C2 Fast Mode Plus - 21 - 1 - - - ENCODER_MODE - Encoder mode - 22 - 2 - - - FPU_IT - Interrupt enable bits from - FPU - 26 - 6 - - - - - SYSCFG_EXTICR1 - SYSCFG_EXTICR1 - external interrupt configuration register - 1 - 0x8 - 0x20 - read-write - 0x0000 - - - EXTI3 - EXTI 3 configuration bits - 12 - 4 - - - EXTI2 - EXTI 2 configuration bits - 8 - 4 - - - EXTI1 - EXTI 1 configuration bits - 4 - 4 - - - EXTI0 - EXTI 0 configuration bits - 0 - 4 - - - - - SYSCFG_EXTICR2 - SYSCFG_EXTICR2 - external interrupt configuration register - 2 - 0xC - 0x20 - read-write - 0x0000 - - - EXTI7 - EXTI 7 configuration bits - 12 - 4 - - - EXTI6 - EXTI 6 configuration bits - 8 - 4 - - - EXTI5 - EXTI 5 configuration bits - 4 - 4 - - - EXTI4 - EXTI 4 configuration bits - 0 - 4 - - - - - SYSCFG_EXTICR3 - SYSCFG_EXTICR3 - external interrupt configuration register - 3 - 0x10 - 0x20 - read-write - 0x0000 - - - EXTI11 - EXTI 11 configuration bits - 12 - 4 - - - EXTI10 - EXTI 10 configuration bits - 8 - 4 - - - EXTI9 - EXTI 9 configuration bits - 4 - 4 - - - EXTI8 - EXTI 8 configuration bits - 0 - 4 - - - - - SYSCFG_EXTICR4 - SYSCFG_EXTICR4 - external interrupt configuration register - 4 - 0x14 - 0x20 - read-write - 0x0000 - - - EXTI15 - EXTI 15 configuration bits - 12 - 4 - - - EXTI14 - EXTI 14 configuration bits - 8 - 4 - - - EXTI13 - EXTI 13 configuration bits - 4 - 4 - - - EXTI12 - EXTI 12 configuration bits - 0 - 4 - - - - - SYSCFG_CFGR2 - SYSCFG_CFGR2 - configuration register 2 - 0x18 - 0x20 - read-write - 0x0000 - - - LOCUP_LOCK - Cortex-M0 LOCKUP bit enable - bit - 0 - 1 - - - SRAM_PARITY_LOCK - SRAM parity lock bit - 1 - 1 - - - PVD_LOCK - PVD lock enable bit - 2 - 1 - - - BYP_ADD_PAR - Bypass address bit 29 in parity - calculation - 4 - 1 - - - SRAM_PEF - SRAM parity flag - 8 - 1 - - - - - SYSCFG_RCR - SYSCFG_RCR - CCM SRAM protection register - 0x4 - 0x20 - read-write - 0x0000 - - - PAGE0_WP - CCM SRAM page write protection - bit - 0 - 1 - - - PAGE1_WP - CCM SRAM page write protection - bit - 1 - 1 - - - PAGE2_WP - CCM SRAM page write protection - bit - 2 - 1 - - - PAGE3_WP - CCM SRAM page write protection - bit - 3 - 1 - - - PAGE4_WP - CCM SRAM page write protection - bit - 4 - 1 - - - PAGE5_WP - CCM SRAM page write protection - bit - 5 - 1 - - - PAGE6_WP - CCM SRAM page write protection - bit - 6 - 1 - - - PAGE7_WP - CCM SRAM page write protection - bit - 7 - 1 - - - - - COMP1_CSR - COMP1_CSR - control and status register - 0x1C - 0x20 - 0x0000 - - - COMP1EN - Comparator 1 enable - 0 - 1 - read-write - - - COMP1_INP_DAC - COMP1_INP_DAC - 1 - 1 - read-write - - - COMP1MODE - Comparator 1 mode - 2 - 2 - read-write - - - COMP1INSEL - Comparator 1 inverting input - selection - 4 - 3 - read-write - - - COMP1_OUT_SEL - Comparator 1 output - selection - 10 - 4 - read-write - - - COMP1POL - Comparator 1 output - polarity - 15 - 1 - read-write - - - COMP1HYST - Comparator 1 hysteresis - 16 - 2 - read-write - - - COMP1_BLANKING - Comparator 1 blanking - source - 18 - 3 - read-write - - - COMP1OUT - Comparator 1 output - 30 - 1 - read-only - - - COMP1LOCK - Comparator 1 lock - 31 - 1 - read-write - - - - - COMP2_CSR - COMP2_CSR - control and status register - 0x20 - 0x20 - read-write - 0x0000 - - - COMP2EN - Comparator 2 enable - 0 - 1 - - - COMP2MODE - Comparator 2 mode - 2 - 2 - - - COMP2INSEL - Comparator 2 inverting input - selection - 4 - 3 - - - COMP2INPSEL - Comparator 2 non inverted input - selection - 7 - 1 - - - COMP2INMSEL - Comparator 1inverting input - selection - 9 - 1 - - - COMP2_OUT_SEL - Comparator 2 output - selection - 10 - 4 - - - COMP2POL - Comparator 2 output - polarity - 15 - 1 - - - COMP2HYST - Comparator 2 hysteresis - 16 - 2 - - - COMP2_BLANKING - Comparator 2 blanking - source - 18 - 3 - - - COMP2LOCK - Comparator 2 lock - 31 - 1 - - - COMP2OUT - Comparator 2 output - 30 - 1 - - - - - COMP3_CSR - COMP3_CSR - control and status register - 0x24 - 0x20 - 0x0000 - - - COMP3EN - Comparator 3 enable - 0 - 1 - read-write - - - COMP3MODE - Comparator 3 mode - 2 - 2 - read-write - - - COMP3INSEL - Comparator 3 inverting input - selection - 4 - 3 - read-write - - - COMP3INPSEL - Comparator 3 non inverted input - selection - 7 - 1 - read-write - - - COMP3_OUT_SEL - Comparator 3 output - selection - 10 - 4 - read-write - - - COMP3POL - Comparator 3 output - polarity - 15 - 1 - read-write - - - COMP3HYST - Comparator 3 hysteresis - 16 - 2 - read-write - - - COMP3_BLANKING - Comparator 3 blanking - source - 18 - 3 - read-write - - - COMP3OUT - Comparator 3 output - 30 - 1 - read-only - - - COMP3LOCK - Comparator 3 lock - 31 - 1 - read-write - - - - - COMP4_CSR - COMP4_CSR - control and status register - 0x28 - 0x20 - 0x0000 - - - COMP4EN - Comparator 4 enable - 0 - 1 - read-write - - - COMP4MODE - Comparator 4 mode - 2 - 2 - read-write - - - COMP4INSEL - Comparator 4 inverting input - selection - 4 - 3 - read-write - - - COMP4INPSEL - Comparator 4 non inverted input - selection - 7 - 1 - read-write - - - COM4WINMODE - Comparator 4 window mode - 9 - 1 - read-write - - - COMP4_OUT_SEL - Comparator 4 output - selection - 10 - 4 - read-write - - - COMP4POL - Comparator 4 output - polarity - 15 - 1 - read-write - - - COMP4HYST - Comparator 4 hysteresis - 16 - 2 - read-write - - - COMP4_BLANKING - Comparator 4 blanking - source - 18 - 3 - read-write - - - COMP4OUT - Comparator 4 output - 30 - 1 - read-only - - - COMP4LOCK - Comparator 4 lock - 31 - 1 - read-write - - - - - COMP5_CSR - COMP5_CSR - control and status register - 0x2C - 0x20 - 0x0000 - - - COMP5EN - Comparator 5 enable - 0 - 1 - read-write - - - COMP5MODE - Comparator 5 mode - 2 - 2 - read-write - - - COMP5INSEL - Comparator 5 inverting input - selection - 4 - 3 - read-write - - - COMP5INPSEL - Comparator 5 non inverted input - selection - 7 - 1 - read-write - - - COMP5_OUT_SEL - Comparator 5 output - selection - 10 - 4 - read-write - - - COMP5POL - Comparator 5 output - polarity - 15 - 1 - read-write - - - COMP5HYST - Comparator 5 hysteresis - 16 - 2 - read-write - - - COMP5_BLANKING - Comparator 5 blanking - source - 18 - 3 - read-write - - - COMP5OUT - Comparator51 output - 30 - 1 - read-only - - - COMP5LOCK - Comparator 5 lock - 31 - 1 - read-write - - - - - COMP6_CSR - COMP6_CSR - control and status register - 0x30 - 0x20 - 0x0000 - - - COMP6EN - Comparator 6 enable - 0 - 1 - read-write - - - COMP6MODE - Comparator 6 mode - 2 - 2 - read-write - - - COMP6INSEL - Comparator 6 inverting input - selection - 4 - 3 - read-write - - - COMP6INPSEL - Comparator 6 non inverted input - selection - 7 - 1 - read-write - - - COM6WINMODE - Comparator 6 window mode - 9 - 1 - read-write - - - COMP6_OUT_SEL - Comparator 6 output - selection - 10 - 4 - read-write - - - COMP6POL - Comparator 6 output - polarity - 15 - 1 - read-write - - - COMP6HYST - Comparator 6 hysteresis - 16 - 2 - read-write - - - COMP6_BLANKING - Comparator 6 blanking - source - 18 - 3 - read-write - - - COMP6OUT - Comparator 6 output - 30 - 1 - read-only - - - COMP6LOCK - Comparator 6 lock - 31 - 1 - read-write - - - - - COMP7_CSR - COMP7_CSR - control and status register - 0x34 - 0x20 - 0x0000 - - - COMP7EN - Comparator 7 enable - 0 - 1 - read-write - - - COMP7MODE - Comparator 7 mode - 2 - 2 - read-write - - - COMP7INSEL - Comparator 7 inverting input - selection - 4 - 3 - read-write - - - COMP7INPSEL - Comparator 7 non inverted input - selection - 7 - 1 - read-write - - - COMP7_OUT_SEL - Comparator 7 output - selection - 10 - 4 - read-write - - - COMP7POL - Comparator 7 output - polarity - 15 - 1 - read-write - - - COMP7HYST - Comparator 7 hysteresis - 16 - 2 - read-write - - - COMP7_BLANKING - Comparator 7 blanking - source - 18 - 3 - read-write - - - COMP7OUT - Comparator 7 output - 30 - 1 - read-only - - - COMP7LOCK - Comparator 7 lock - 31 - 1 - read-write - - - - - OPAMP1_CSR - OPAMP1_CSR - control register - 0x38 - 0x20 - 0x0000 - - - OPAMP1_EN - OPAMP1 enable - 0 - 1 - read-write - - - FORCE_VP - FORCE_VP - 1 - 1 - read-write - - - VP_SEL - OPAMP1 Non inverting input - selection - 2 - 2 - read-write - - - VM_SEL - OPAMP1 inverting input - selection - 5 - 2 - read-write - - - TCM_EN - Timer controlled Mux mode - enable - 7 - 1 - read-write - - - VMS_SEL - OPAMP1 inverting input secondary - selection - 8 - 1 - read-write - - - VPS_SEL - OPAMP1 Non inverting input secondary - selection - 9 - 2 - read-write - - - CALON - Calibration mode enable - 11 - 1 - read-write - - - CALSEL - Calibration selection - 12 - 2 - read-write - - - PGA_GAIN - Gain in PGA mode - 14 - 4 - read-write - - - USER_TRIM - User trimming enable - 18 - 1 - read-write - - - TRIMOFFSETP - Offset trimming value - (PMOS) - 19 - 5 - read-write - - - TRIMOFFSETN - Offset trimming value - (NMOS) - 24 - 5 - read-write - - - TSTREF - TSTREF - 29 - 1 - read-write - - - OUTCAL - OPAMP 1 ouput status flag - 30 - 1 - read-only - - - LOCK - OPAMP 1 lock - 31 - 1 - read-write - - - - - OPAMP2_CSR - OPAMP2_CSR - control register - 0x3C - 0x20 - 0x0000 - - - OPAMP2EN - OPAMP2 enable - 0 - 1 - read-write - - - FORCE_VP - FORCE_VP - 1 - 1 - read-write - - - VP_SEL - OPAMP2 Non inverting input - selection - 2 - 2 - read-write - - - VM_SEL - OPAMP2 inverting input - selection - 5 - 2 - read-write - - - TCM_EN - Timer controlled Mux mode - enable - 7 - 1 - read-write - - - VMS_SEL - OPAMP2 inverting input secondary - selection - 8 - 1 - read-write - - - VPS_SEL - OPAMP2 Non inverting input secondary - selection - 9 - 2 - read-write - - - CALON - Calibration mode enable - 11 - 1 - read-write - - - CALSEL - Calibration selection - 12 - 2 - read-write - - - PGA_GAIN - Gain in PGA mode - 14 - 4 - read-write - - - USER_TRIM - User trimming enable - 18 - 1 - read-write - - - TRIMOFFSETP - Offset trimming value - (PMOS) - 19 - 5 - read-write - - - TRIMOFFSETN - Offset trimming value - (NMOS) - 24 - 5 - read-write - - - TSTREF - TSTREF - 29 - 1 - read-write - - - OUTCAL - OPAMP 2 ouput status flag - 30 - 1 - read-only - - - LOCK - OPAMP 2 lock - 31 - 1 - read-write - - - - - OPAMP3_CSR - OPAMP3_CSR - control register - 0x40 - 0x20 - 0x0000 - - - OPAMP3EN - OPAMP3 enable - 0 - 1 - read-write - - - FORCE_VP - FORCE_VP - 1 - 1 - read-write - - - VP_SEL - OPAMP3 Non inverting input - selection - 2 - 2 - read-write - - - VM_SEL - OPAMP3 inverting input - selection - 5 - 2 - read-write - - - TCM_EN - Timer controlled Mux mode - enable - 7 - 1 - read-write - - - VMS_SEL - OPAMP3 inverting input secondary - selection - 8 - 1 - read-write - - - VPS_SEL - OPAMP3 Non inverting input secondary - selection - 9 - 2 - read-write - - - CALON - Calibration mode enable - 11 - 1 - read-write - - - CALSEL - Calibration selection - 12 - 2 - read-write - - - PGA_GAIN - Gain in PGA mode - 14 - 4 - read-write - - - USER_TRIM - User trimming enable - 18 - 1 - read-write - - - TRIMOFFSETP - Offset trimming value - (PMOS) - 19 - 5 - read-write - - - TRIMOFFSETN - Offset trimming value - (NMOS) - 24 - 5 - read-write - - - TSTREF - TSTREF - 29 - 1 - read-write - - - OUTCAL - OPAMP 3 ouput status flag - 30 - 1 - read-only - - - LOCK - OPAMP 3 lock - 31 - 1 - read-write - - - - - OPAMP4_CSR - OPAMP4_CSR - control register - 0x44 - 0x20 - 0x0000 - - - OPAMP4EN - OPAMP4 enable - 0 - 1 - read-write - - - FORCE_VP - FORCE_VP - 1 - 1 - read-write - - - VP_SEL - OPAMP4 Non inverting input - selection - 2 - 2 - read-write - - - VM_SEL - OPAMP4 inverting input - selection - 5 - 2 - read-write - - - TCM_EN - Timer controlled Mux mode - enable - 7 - 1 - read-write - - - VMS_SEL - OPAMP4 inverting input secondary - selection - 8 - 1 - read-write - - - VPS_SEL - OPAMP4 Non inverting input secondary - selection - 9 - 2 - read-write - - - CALON - Calibration mode enable - 11 - 1 - read-write - - - CALSEL - Calibration selection - 12 - 2 - read-write - - - PGA_GAIN - Gain in PGA mode - 14 - 4 - read-write - - - USER_TRIM - User trimming enable - 18 - 1 - read-write - - - TRIMOFFSETP - Offset trimming value - (PMOS) - 19 - 5 - read-write - - - TRIMOFFSETN - Offset trimming value - (NMOS) - 24 - 5 - read-write - - - TSTREF - TSTREF - 29 - 1 - read-write - - - OUTCAL - OPAMP 4 ouput status flag - 30 - 1 - read-only - - - LOCK - OPAMP 4 lock - 31 - 1 - read-write - - - - - SYSCFG_CFGR3 - SYSCFG_CFGR3 - SYSCFG configuration register - 3 - 0x50 - 0x20 - read-write - 0x0000 - - - SPI1_RX_DMA_RMP - SPI1_RX DMA remapping bit - 0 - 2 - - - SPI1_TX_DMA_RMP - SPI1_TX DMA remapping bit - 2 - 2 - - - I2C1_RX_DMA_RMP - I2C1_RX DMA remapping bit - 4 - 2 - - - I2C1_TX_DMA_RMP - I2C1_TX DMA remapping bit - 6 - 2 - - - ADC2_DMA_RMP - ADC2 DMA channel remapping - bit - 8 - 2 - - - - - SYSCFG_CFGR4 - SYSCFG_CFGR4 - SYSCFG configuration register - 4 - 0x48 - 0x20 - read-write - 0x0000 - - - ADC12_EXT2_RMP - Controls the Input trigger of ADC12 - regular channel EXT2 - 0 - 1 - - - ADC12_EXT3_RMP - Controls the Input trigger of ADC12 - regular channel EXT3 - 1 - 1 - - - ADC12_EXT5_RMP - Controls the Input trigger of ADC12 - regular channel EXT5 - 2 - 1 - - - ADC12_EXT13_RMP - Controls the Input trigger of ADC12 - regular channel EXT13 - 3 - 1 - - - ADC12_EXT15_RMP - Controls the Input trigger of ADC12 - regular channel EXT15 - 4 - 1 - - - ADC12_JEXT3_RMP - Controls the Input trigger of ADC12 - injected channel EXTI3 - 5 - 1 - - - ADC12_JEXT6_RMP - Controls the Input trigger of ADC12 - injected channel EXTI6 - 6 - 1 - - - ADC12_JEXT13_RMP - Controls the Input trigger of ADC12 - injected channel EXTI13 - 7 - 1 - - - ADC34_EXT5_RMP - Controls the Input trigger of ADC34 - regular channel EXT5 - 8 - 1 - - - ADC34_EXT6_RMP - Controls the Input trigger of ADC34 - regular channel EXT6 - 9 - 1 - - - ADC34_EXT15_RMP - Controls the Input trigger of ADC34 - regular channel EXT15 - 10 - 1 - - - ADC34_JEXT5_RMP - Controls the Input trigger of ADC34 - injected channel JEXT5 - 11 - 1 - - - ADC34_JEXT11_RMP - Controls the Input trigger of ADC34 - injected channel JEXT11 - 12 - 1 - - - ADC34_JEXT14_RMP - Controls the Input trigger of ADC34 - injected channel JEXT14 - 13 - 1 - - - - - - - FMC - Flexible memory controller - FMC - 0xA0000400 - - 0x0 - 0xC00 - registers - - - FMC - FSMC global interrupt - 48 - - - - BCR1 - BCR1 - SRAM/NOR-Flash chip-select control register - 1 - 0x0 - 0x20 - read-write - 0x000030D0 - - - CCLKEN - CCLKEN - 20 - 1 - - - CBURSTRW - CBURSTRW - 19 - 1 - - - ASYNCWAIT - ASYNCWAIT - 15 - 1 - - - EXTMOD - EXTMOD - 14 - 1 - - - WAITEN - WAITEN - 13 - 1 - - - WREN - WREN - 12 - 1 - - - WAITCFG - WAITCFG - 11 - 1 - - - WAITPOL - WAITPOL - 9 - 1 - - - BURSTEN - BURSTEN - 8 - 1 - - - FACCEN - FACCEN - 6 - 1 - - - MWID - MWID - 4 - 2 - - - MTYP - MTYP - 2 - 2 - - - MUXEN - MUXEN - 1 - 1 - - - MBKEN - MBKEN - 0 - 1 - - - - - BTR1 - BTR1 - SRAM/NOR-Flash chip-select timing register - 1 - 0x4 - 0x20 - read-write - 0xFFFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - BUSTURN - BUSTURN - 16 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BCR2 - BCR2 - SRAM/NOR-Flash chip-select control register - 2 - 0x8 - 0x20 - read-write - 0x000030D0 - - - CBURSTRW - CBURSTRW - 19 - 1 - - - ASYNCWAIT - ASYNCWAIT - 15 - 1 - - - EXTMOD - EXTMOD - 14 - 1 - - - WAITEN - WAITEN - 13 - 1 - - - WREN - WREN - 12 - 1 - - - WAITCFG - WAITCFG - 11 - 1 - - - WRAPMOD - WRAPMOD - 10 - 1 - - - WAITPOL - WAITPOL - 9 - 1 - - - BURSTEN - BURSTEN - 8 - 1 - - - FACCEN - FACCEN - 6 - 1 - - - MWID - MWID - 4 - 2 - - - MTYP - MTYP - 2 - 2 - - - MUXEN - MUXEN - 1 - 1 - - - MBKEN - MBKEN - 0 - 1 - - - - - BTR2 - BTR2 - SRAM/NOR-Flash chip-select timing register - 2 - 0xC - 0x20 - read-write - 0xFFFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - BUSTURN - BUSTURN - 16 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BCR3 - BCR3 - SRAM/NOR-Flash chip-select control register - 3 - 0x10 - 0x20 - read-write - 0x000030D0 - - - CBURSTRW - CBURSTRW - 19 - 1 - - - ASYNCWAIT - ASYNCWAIT - 15 - 1 - - - EXTMOD - EXTMOD - 14 - 1 - - - WAITEN - WAITEN - 13 - 1 - - - WREN - WREN - 12 - 1 - - - WAITCFG - WAITCFG - 11 - 1 - - - WRAPMOD - WRAPMOD - 10 - 1 - - - WAITPOL - WAITPOL - 9 - 1 - - - BURSTEN - BURSTEN - 8 - 1 - - - FACCEN - FACCEN - 6 - 1 - - - MWID - MWID - 4 - 2 - - - MTYP - MTYP - 2 - 2 - - - MUXEN - MUXEN - 1 - 1 - - - MBKEN - MBKEN - 0 - 1 - - - - - BTR3 - BTR3 - SRAM/NOR-Flash chip-select timing register - 3 - 0x14 - 0x20 - read-write - 0xFFFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - BUSTURN - BUSTURN - 16 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BCR4 - BCR4 - SRAM/NOR-Flash chip-select control register - 4 - 0x18 - 0x20 - read-write - 0x000030D0 - - - CBURSTRW - CBURSTRW - 19 - 1 - - - ASYNCWAIT - ASYNCWAIT - 15 - 1 - - - EXTMOD - EXTMOD - 14 - 1 - - - WAITEN - WAITEN - 13 - 1 - - - WREN - WREN - 12 - 1 - - - WAITCFG - WAITCFG - 11 - 1 - - - WRAPMOD - WRAPMOD - 10 - 1 - - - WAITPOL - WAITPOL - 9 - 1 - - - BURSTEN - BURSTEN - 8 - 1 - - - FACCEN - FACCEN - 6 - 1 - - - MWID - MWID - 4 - 2 - - - MTYP - MTYP - 2 - 2 - - - MUXEN - MUXEN - 1 - 1 - - - MBKEN - MBKEN - 0 - 1 - - - - - BTR4 - BTR4 - SRAM/NOR-Flash chip-select timing register - 4 - 0x1C - 0x20 - read-write - 0xFFFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - BUSTURN - BUSTURN - 16 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - PCR2 - PCR2 - PC Card/NAND Flash control register - 2 - 0x60 - 0x20 - read-write - 0x00000018 - - - ECCPS - ECCPS - 17 - 3 - - - TAR - TAR - 13 - 4 - - - TCLR - TCLR - 9 - 4 - - - ECCEN - ECCEN - 6 - 1 - - - PWID - PWID - 4 - 2 - - - PTYP - PTYP - 3 - 1 - - - PBKEN - PBKEN - 2 - 1 - - - PWAITEN - PWAITEN - 1 - 1 - - - - - SR2 - SR2 - FIFO status and interrupt register - 2 - 0x64 - 0x20 - 0x00000040 - - - FEMPT - FEMPT - 6 - 1 - read-only - - - IFEN - IFEN - 5 - 1 - read-write - - - ILEN - ILEN - 4 - 1 - read-write - - - IREN - IREN - 3 - 1 - read-write - - - IFS - IFS - 2 - 1 - read-write - - - ILS - ILS - 1 - 1 - read-write - - - IRS - IRS - 0 - 1 - read-write - - - - - PMEM2 - PMEM2 - Common memory space timing register - 2 - 0x68 - 0x20 - read-write - 0xFCFCFCFC - - - MEMHIZx - MEMHIZx - 24 - 8 - - - MEMHOLDx - MEMHOLDx - 16 - 8 - - - MEMWAITx - MEMWAITx - 8 - 8 - - - MEMSETx - MEMSETx - 0 - 8 - - - - - PATT2 - PATT2 - Attribute memory space timing register - 2 - 0x6C - 0x20 - read-write - 0xFCFCFCFC - - - ATTHIZx - ATTHIZx - 24 - 8 - - - ATTHOLDx - ATTHOLDx - 16 - 8 - - - ATTWAITx - ATTWAITx - 8 - 8 - - - ATTSETx - ATTSETx - 0 - 8 - - - - - ECCR2 - ECCR2 - ECC result register 2 - 0x74 - 0x20 - read-only - 0x00000000 - - - ECCx - ECCx - 0 - 32 - - - - - PCR3 - PCR3 - PC Card/NAND Flash control register - 3 - 0x80 - 0x20 - read-write - 0x00000018 - - - ECCPS - ECCPS - 17 - 3 - - - TAR - TAR - 13 - 4 - - - TCLR - TCLR - 9 - 4 - - - ECCEN - ECCEN - 6 - 1 - - - PWID - PWID - 4 - 2 - - - PTYP - PTYP - 3 - 1 - - - PBKEN - PBKEN - 2 - 1 - - - PWAITEN - PWAITEN - 1 - 1 - - - - - SR3 - SR3 - FIFO status and interrupt register - 3 - 0x84 - 0x20 - 0x00000040 - - - FEMPT - FEMPT - 6 - 1 - read-only - - - IFEN - IFEN - 5 - 1 - read-write - - - ILEN - ILEN - 4 - 1 - read-write - - - IREN - IREN - 3 - 1 - read-write - - - IFS - IFS - 2 - 1 - read-write - - - ILS - ILS - 1 - 1 - read-write - - - IRS - IRS - 0 - 1 - read-write - - - - - PMEM3 - PMEM3 - Common memory space timing register - 3 - 0x88 - 0x20 - read-write - 0xFCFCFCFC - - - MEMHIZx - MEMHIZx - 24 - 8 - - - MEMHOLDx - MEMHOLDx - 16 - 8 - - - MEMWAITx - MEMWAITx - 8 - 8 - - - MEMSETx - MEMSETx - 0 - 8 - - - - - PATT3 - PATT3 - Attribute memory space timing register - 3 - 0x8C - 0x20 - read-write - 0xFCFCFCFC - - - ATTHIZx - ATTHIZx - 24 - 8 - - - ATTHOLDx - ATTHOLDx - 16 - 8 - - - ATTWAITx - ATTWAITx - 8 - 8 - - - ATTSETx - ATTSETx - 0 - 8 - - - - - ECCR3 - ECCR3 - ECC result register 3 - 0x94 - 0x20 - read-only - 0x00000000 - - - ECCx - ECCx - 0 - 32 - - - - - PCR4 - PCR4 - PC Card/NAND Flash control register - 4 - 0xA0 - 0x20 - read-write - 0x00000018 - - - ECCPS - ECCPS - 17 - 3 - - - TAR - TAR - 13 - 4 - - - TCLR - TCLR - 9 - 4 - - - ECCEN - ECCEN - 6 - 1 - - - PWID - PWID - 4 - 2 - - - PTYP - PTYP - 3 - 1 - - - PBKEN - PBKEN - 2 - 1 - - - PWAITEN - PWAITEN - 1 - 1 - - - - - SR4 - SR4 - FIFO status and interrupt register - 4 - 0xA4 - 0x20 - 0x00000040 - - - FEMPT - FEMPT - 6 - 1 - read-only - - - IFEN - IFEN - 5 - 1 - read-write - - - ILEN - ILEN - 4 - 1 - read-write - - - IREN - IREN - 3 - 1 - read-write - - - IFS - IFS - 2 - 1 - read-write - - - ILS - ILS - 1 - 1 - read-write - - - IRS - IRS - 0 - 1 - read-write - - - - - PMEM4 - PMEM4 - Common memory space timing register - 4 - 0xA8 - 0x20 - read-write - 0xFCFCFCFC - - - MEMHIZx - MEMHIZx - 24 - 8 - - - MEMHOLDx - MEMHOLDx - 16 - 8 - - - MEMWAITx - MEMWAITx - 8 - 8 - - - MEMSETx - MEMSETx - 0 - 8 - - - - - PATT4 - PATT4 - Attribute memory space timing register - 4 - 0xAC - 0x20 - read-write - 0xFCFCFCFC - - - ATTHIZx - ATTHIZx - 24 - 8 - - - ATTHOLDx - ATTHOLDx - 16 - 8 - - - ATTWAITx - ATTWAITx - 8 - 8 - - - ATTSETx - ATTSETx - 0 - 8 - - - - - PIO4 - PIO4 - I/O space timing register 4 - 0xB0 - 0x20 - read-write - 0xFCFCFCFC - - - IOHIZx - IOHIZx - 24 - 8 - - - IOHOLDx - IOHOLDx - 16 - 8 - - - IOWAITx - IOWAITx - 8 - 8 - - - IOSETx - IOSETx - 0 - 8 - - - - - BWTR1 - BWTR1 - SRAM/NOR-Flash write timing registers - 1 - 0x104 - 0x20 - read-write - 0x0FFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - BUSTURN - Bus turnaround phase - duration - 16 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BWTR2 - BWTR2 - SRAM/NOR-Flash write timing registers - 2 - 0x10C - 0x20 - read-write - 0x0FFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - BUSTURN - Bus turnaround phase - duration - 16 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BWTR3 - BWTR3 - SRAM/NOR-Flash write timing registers - 3 - 0x114 - 0x20 - read-write - 0x0FFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - BUSTURN - Bus turnaround phase - duration - 16 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BWTR4 - BWTR4 - SRAM/NOR-Flash write timing registers - 4 - 0x11C - 0x20 - read-write - 0x0FFFFFFF - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - BUSTURN - Bus turnaround phase - duration - 16 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - - - diff --git a/embedded-examples/stm32f3-disco-rtic/legacy/jlink.gdb b/embedded-examples/stm32f3-disco-rtic/legacy/jlink.gdb deleted file mode 100644 index 8eeed7c..0000000 --- a/embedded-examples/stm32f3-disco-rtic/legacy/jlink.gdb +++ /dev/null @@ -1,10 +0,0 @@ -target extended-remote localhost:2331 - -monitor reset - -# *try* to stop at the user entry point (it might be gone due to inlining) -break main - -load - -continue diff --git a/embedded-examples/stm32f3-disco-rtic/legacy/openocd.cfg b/embedded-examples/stm32f3-disco-rtic/legacy/openocd.cfg deleted file mode 100644 index 466c033..0000000 --- a/embedded-examples/stm32f3-disco-rtic/legacy/openocd.cfg +++ /dev/null @@ -1,12 +0,0 @@ -# Sample OpenOCD configuration for the STM32F3DISCOVERY development board - -# Depending on the hardware revision you got you'll have to pick ONE of these -# interfaces. At any time only one interface should be commented out. - -# Revision C (newer revision) -source [find interface/stlink.cfg] - -# Revision A and B (older revisions) -# source [find interface/stlink-v2.cfg] - -source [find target/stm32f3x.cfg] diff --git a/embedded-examples/stm32f3-disco-rtic/legacy/openocd.gdb b/embedded-examples/stm32f3-disco-rtic/legacy/openocd.gdb deleted file mode 100644 index 2453de8..0000000 --- a/embedded-examples/stm32f3-disco-rtic/legacy/openocd.gdb +++ /dev/null @@ -1,42 +0,0 @@ -target extended-remote :3333 - -# print demangled symbols -set print asm-demangle on - -# set backtrace limit to not have infinite backtrace loops -set backtrace limit 32 - -# detect unhandled exceptions, hard faults and panics -break DefaultHandler -break HardFault -break rust_begin_unwind -# # run the next few lines so the panic message is printed immediately -# # the number needs to be adjusted for your panic handler -# commands $bpnum -# next 4 -# end - -# *try* to stop at the user entry point (it might be gone due to inlining) -break main - -# monitor arm semihosting enable - -# # send captured ITM to the file itm.fifo -# # (the microcontroller SWO pin must be connected to the programmer SWO pin) -# # 8000000 must match the core clock frequency -# # 2000000 is the frequency of the SWO pin. This was added for newer -# openocd versions like v0.12.0. -# monitor tpiu config internal itm.txt uart off 8000000 2000000 - -# # OR: make the microcontroller SWO pin output compatible with UART (8N1) -# # 8000000 must match the core clock frequency -# # 2000000 is the frequency of the SWO pin -# monitor tpiu config external uart off 8000000 2000000 - -# # enable ITM port 0 -# monitor itm port 0 on - -load - -# start the process but immediately halt the processor -stepi diff --git a/embedded-examples/stm32f3-disco-rtic/pyclient/.gitignore b/embedded-examples/stm32f3-disco-rtic/pyclient/.gitignore deleted file mode 100644 index da26576..0000000 --- a/embedded-examples/stm32f3-disco-rtic/pyclient/.gitignore +++ /dev/null @@ -1,8 +0,0 @@ -/venv -/.tmtc-history.txt -/log -/.idea/* -!/.idea/runConfigurations - -/seqcnt.txt -/tmtc_conf.json diff --git a/embedded-examples/stm32f3-disco-rtic/pyclient/def_tmtc_conf.json b/embedded-examples/stm32f3-disco-rtic/pyclient/def_tmtc_conf.json deleted file mode 100644 index 76db442..0000000 --- a/embedded-examples/stm32f3-disco-rtic/pyclient/def_tmtc_conf.json +++ /dev/null @@ -1,4 +0,0 @@ -{ - "com_if": "serial_cobs", - "serial_baudrate": 115200 -} diff --git a/embedded-examples/stm32f3-disco-rtic/pyclient/main.py b/embedded-examples/stm32f3-disco-rtic/pyclient/main.py deleted file mode 100755 index f6f3972..0000000 --- a/embedded-examples/stm32f3-disco-rtic/pyclient/main.py +++ /dev/null @@ -1,305 +0,0 @@ -#!/usr/bin/env python3 -"""Example client for the sat-rs example application""" -import struct -import logging -import sys -import time -from typing import Any, Optional, cast -from prompt_toolkit.history import FileHistory, History -from spacepackets.ecss.tm import CdsShortTimestamp - -import tmtccmd -from spacepackets.ecss import PusTelemetry, PusTelecommand, PusTm, PusVerificator -from spacepackets.ecss.pus_17_test import Service17Tm -from spacepackets.ecss.pus_1_verification import UnpackParams, Service1Tm - -from tmtccmd import TcHandlerBase, ProcedureParamsWrapper -from tmtccmd.core.base import BackendRequest -from tmtccmd.core.ccsds_backend import QueueWrapper -from tmtccmd.logging import add_colorlog_console_logger -from tmtccmd.pus import VerificationWrapper -from tmtccmd.tmtc import CcsdsTmHandler, SpecificApidHandlerBase -from tmtccmd.com import ComInterface -from tmtccmd.config import ( - CmdTreeNode, - default_json_path, - SetupParams, - HookBase, - params_to_procedure_conversion, -) -from tmtccmd.config.com import SerialCfgWrapper -from tmtccmd.config import PreArgsParsingWrapper, SetupWrapper -from tmtccmd.logging.pus import ( - RegularTmtcLogWrapper, - RawTmtcTimedLogWrapper, - TimedLogWhen, -) -from tmtccmd.tmtc import ( - TcQueueEntryType, - ProcedureWrapper, - TcProcedureType, - FeedWrapper, - SendCbParams, - DefaultPusQueueHelper, -) -from tmtccmd.pus.s5_fsfw_event import Service5Tm -from spacepackets.seqcount import FileSeqCountProvider, PusFileSeqCountProvider -from tmtccmd.util.obj_id import ObjectIdDictT - -_LOGGER = logging.getLogger() - -EXAMPLE_PUS_APID = 0x02 - - -class SatRsConfigHook(HookBase): - def __init__(self, json_cfg_path: str): - super().__init__(json_cfg_path) - - def get_communication_interface(self, com_if_key: str) -> Optional[ComInterface]: - from tmtccmd.config.com import ( - create_com_interface_default, - create_com_interface_cfg_default, - ) - - assert self.cfg_path is not None - cfg = create_com_interface_cfg_default( - com_if_key=com_if_key, - json_cfg_path=self.cfg_path, - space_packet_ids=None, - ) - if cfg is None: - raise ValueError( - f"No valid configuration could be retrieved for the COM IF with key {com_if_key}" - ) - if cfg.com_if_key == "serial_cobs": - cfg = cast(SerialCfgWrapper, cfg) - cfg.serial_cfg.serial_timeout = 0.5 - return create_com_interface_default(cfg) - - def get_command_definitions(self) -> CmdTreeNode: - """This function should return the root node of the command definition tree.""" - return create_cmd_definition_tree() - - def get_cmd_history(self) -> Optional[History]: - """Optionlly return a history class for the past command paths which will be used - when prompting a command path from the user in CLI mode.""" - return FileHistory(".tmtc-history.txt") - - def get_object_ids(self) -> ObjectIdDictT: - from tmtccmd.config.objects import get_core_object_ids - - return get_core_object_ids() - - -def create_cmd_definition_tree() -> CmdTreeNode: - root_node = CmdTreeNode.root_node() - root_node.add_child(CmdTreeNode("ping", "Send PUS ping TC")) - root_node.add_child(CmdTreeNode("change_blink_freq", "Change blink frequency")) - return root_node - - -class PusHandler(SpecificApidHandlerBase): - def __init__( - self, - file_logger: logging.Logger, - verif_wrapper: VerificationWrapper, - raw_logger: RawTmtcTimedLogWrapper, - ): - super().__init__(EXAMPLE_PUS_APID, None) - self.file_logger = file_logger - self.raw_logger = raw_logger - self.verif_wrapper = verif_wrapper - - def handle_tm(self, packet: bytes, _user_args: Any): - try: - pus_tm = PusTm.unpack( - packet, timestamp_len=CdsShortTimestamp.TIMESTAMP_SIZE - ) - except ValueError as e: - _LOGGER.warning("Could not generate PUS TM object from raw data") - _LOGGER.warning(f"Raw Packet: [{packet.hex(sep=',')}], REPR: {packet!r}") - raise e - service = pus_tm.service - tm_packet = None - if service == 1: - tm_packet = Service1Tm.unpack( - data=packet, params=UnpackParams(CdsShortTimestamp.TIMESTAMP_SIZE, 1, 2) - ) - res = self.verif_wrapper.add_tm(tm_packet) - if res is None: - _LOGGER.info( - f"Received Verification TM[{tm_packet.service}, {tm_packet.subservice}] " - f"with Request ID {tm_packet.tc_req_id.as_u32():#08x}" - ) - _LOGGER.warning( - f"No matching telecommand found for {tm_packet.tc_req_id}" - ) - else: - self.verif_wrapper.log_to_console(tm_packet, res) - self.verif_wrapper.log_to_file(tm_packet, res) - if service == 3: - _LOGGER.info("No handling for HK packets implemented") - _LOGGER.info(f"Raw packet: 0x[{packet.hex(sep=',')}]") - pus_tm = PusTelemetry.unpack(packet, CdsShortTimestamp.TIMESTAMP_SIZE) - if pus_tm.subservice == 25: - if len(pus_tm.source_data) < 8: - raise ValueError("No addressable ID in HK packet") - json_str = pus_tm.source_data[8:] - _LOGGER.info("received JSON string: " + json_str.decode("utf-8")) - if service == 5: - tm_packet = Service5Tm.unpack(packet, CdsShortTimestamp.TIMESTAMP_SIZE) - if service == 17: - tm_packet = Service17Tm.unpack(packet, CdsShortTimestamp.TIMESTAMP_SIZE) - if tm_packet.subservice == 2: - _LOGGER.info("Received Ping Reply TM[17,2]") - else: - _LOGGER.info( - f"Received Test Packet with unknown subservice {tm_packet.subservice}" - ) - if tm_packet is None: - _LOGGER.info( - f"The service {service} is not implemented in Telemetry Factory" - ) - tm_packet = PusTelemetry.unpack(packet, CdsShortTimestamp.TIMESTAMP_SIZE) - self.raw_logger.log_tm(pus_tm) - - -def make_addressable_id(target_id: int, unique_id: int) -> bytes: - byte_string = bytearray(struct.pack("!I", target_id)) - byte_string.extend(struct.pack("!I", unique_id)) - return byte_string - - -class TcHandler(TcHandlerBase): - def __init__( - self, - seq_count_provider: FileSeqCountProvider, - verif_wrapper: VerificationWrapper, - ): - super(TcHandler, self).__init__() - self.seq_count_provider = seq_count_provider - self.verif_wrapper = verif_wrapper - self.queue_helper = DefaultPusQueueHelper( - queue_wrapper=QueueWrapper.empty(), - tc_sched_timestamp_len=7, - seq_cnt_provider=seq_count_provider, - pus_verificator=verif_wrapper.pus_verificator, - default_pus_apid=EXAMPLE_PUS_APID, - ) - - def send_cb(self, send_params: SendCbParams): - entry_helper = send_params.entry - if entry_helper.is_tc: - if entry_helper.entry_type == TcQueueEntryType.PUS_TC: - pus_tc_wrapper = entry_helper.to_pus_tc_entry() - pus_tc_wrapper.pus_tc.seq_count = ( - self.seq_count_provider.get_and_increment() - ) - self.verif_wrapper.add_tc(pus_tc_wrapper.pus_tc) - raw_tc = pus_tc_wrapper.pus_tc.pack() - _LOGGER.info(f"Sending {pus_tc_wrapper.pus_tc}") - send_params.com_if.send(raw_tc) - elif entry_helper.entry_type == TcQueueEntryType.LOG: - log_entry = entry_helper.to_log_entry() - _LOGGER.info(log_entry.log_str) - - def queue_finished_cb(self, info: ProcedureWrapper): - if info.proc_type == TcProcedureType.TREE_COMMANDING: - def_proc = info.to_tree_commanding_procedure() - _LOGGER.info(f"Queue handling finished for command {def_proc.cmd_path}") - - def feed_cb(self, info: ProcedureWrapper, wrapper: FeedWrapper): - q = self.queue_helper - q.queue_wrapper = wrapper.queue_wrapper - if info.proc_type == TcProcedureType.TREE_COMMANDING: - def_proc = info.to_tree_commanding_procedure() - cmd_path = def_proc.cmd_path - if cmd_path == "/ping": - q.add_log_cmd("Sending PUS ping telecommand") - q.add_pus_tc(PusTelecommand(service=17, subservice=1)) - if cmd_path == "/change_blink_freq": - self.create_change_blink_freq_command(q) - - def create_change_blink_freq_command(self, q: DefaultPusQueueHelper): - q.add_log_cmd("Changing blink frequency") - while True: - blink_freq = int( - input( - "Please specify new blink frequency in ms. Valid Range [2..10000]: " - ) - ) - if blink_freq < 2 or blink_freq > 10000: - print( - "Invalid blink frequency. Please specify a value between 2 and 10000." - ) - continue - break - app_data = struct.pack("!I", blink_freq) - q.add_pus_tc(PusTelecommand(service=8, subservice=1, app_data=app_data)) - - -def main(): - add_colorlog_console_logger(_LOGGER) - tmtccmd.init_printout(False) - hook_obj = SatRsConfigHook(json_cfg_path=default_json_path()) - parser_wrapper = PreArgsParsingWrapper() - parser_wrapper.create_default_parent_parser() - parser_wrapper.create_default_parser() - parser_wrapper.add_def_proc_args() - params = SetupParams() - post_args_wrapper = parser_wrapper.parse(hook_obj, params) - proc_wrapper = ProcedureParamsWrapper() - if post_args_wrapper.use_gui: - post_args_wrapper.set_params_without_prompts(proc_wrapper) - else: - post_args_wrapper.set_params_with_prompts(proc_wrapper) - params.apid = EXAMPLE_PUS_APID - setup_args = SetupWrapper( - hook_obj=hook_obj, setup_params=params, proc_param_wrapper=proc_wrapper - ) - # Create console logger helper and file loggers - tmtc_logger = RegularTmtcLogWrapper() - file_logger = tmtc_logger.logger - raw_logger = RawTmtcTimedLogWrapper(when=TimedLogWhen.PER_HOUR, interval=1) - verificator = PusVerificator() - verification_wrapper = VerificationWrapper(verificator, _LOGGER, file_logger) - # Create primary TM handler and add it to the CCSDS Packet Handler - tm_handler = PusHandler(file_logger, verification_wrapper, raw_logger) - ccsds_handler = CcsdsTmHandler(generic_handler=None) - ccsds_handler.add_apid_handler(tm_handler) - - # Create TC handler - seq_count_provider = PusFileSeqCountProvider() - tc_handler = TcHandler(seq_count_provider, verification_wrapper) - tmtccmd.setup(setup_args=setup_args) - init_proc = params_to_procedure_conversion(setup_args.proc_param_wrapper) - tmtc_backend = tmtccmd.create_default_tmtc_backend( - setup_wrapper=setup_args, - tm_handler=ccsds_handler, - tc_handler=tc_handler, - init_procedure=init_proc, - ) - tmtccmd.start(tmtc_backend=tmtc_backend, hook_obj=hook_obj) - try: - while True: - state = tmtc_backend.periodic_op(None) - if state.request == BackendRequest.TERMINATION_NO_ERROR: - sys.exit(0) - elif state.request == BackendRequest.DELAY_IDLE: - _LOGGER.info("TMTC Client in IDLE mode") - time.sleep(3.0) - elif state.request == BackendRequest.DELAY_LISTENER: - time.sleep(0.8) - elif state.request == BackendRequest.DELAY_CUSTOM: - if state.next_delay.total_seconds() <= 0.4: - time.sleep(state.next_delay.total_seconds()) - else: - time.sleep(0.4) - elif state.request == BackendRequest.CALL_NEXT: - pass - except KeyboardInterrupt: - sys.exit(0) - - -if __name__ == "__main__": - main() diff --git a/embedded-examples/stm32f3-disco-rtic/pyclient/requirements.txt b/embedded-examples/stm32f3-disco-rtic/pyclient/requirements.txt deleted file mode 100644 index 637dc98..0000000 --- a/embedded-examples/stm32f3-disco-rtic/pyclient/requirements.txt +++ /dev/null @@ -1,2 +0,0 @@ -tmtccmd == 8.0.1 -# -e git+https://github.com/robamu-org/tmtccmd.git@main#egg=tmtccmd diff --git a/embedded-examples/stm32f3-disco-rtic/src/bin/blinky.rs b/embedded-examples/stm32f3-disco-rtic/src/bin/blinky.rs index ea09455..372d7b3 100644 --- a/embedded-examples/stm32f3-disco-rtic/src/bin/blinky.rs +++ b/embedded-examples/stm32f3-disco-rtic/src/bin/blinky.rs @@ -1,76 +1,61 @@ -#![no_std] #![no_main] -use satrs_stm32f3_disco_rtic as _; +#![no_std] -use stm32f3_discovery::leds::Leds; -use stm32f3_discovery::stm32f3xx_hal::delay::Delay; -use stm32f3_discovery::stm32f3xx_hal::{pac, prelude::*}; -use stm32f3_discovery::switch_hal::{OutputSwitch, ToggleableOutputSwitch}; +use panic_probe as _; +use rtic::app; -#[cortex_m_rt::entry] -fn main() -> ! { - defmt::println!("STM32F3 Discovery Blinky"); - let dp = pac::Peripherals::take().unwrap(); - let mut rcc = dp.RCC.constrain(); - let cp = cortex_m::Peripherals::take().unwrap(); - let mut flash = dp.FLASH.constrain(); - let clocks = rcc.cfgr.freeze(&mut flash.acr); - let mut delay = Delay::new(cp.SYST, clocks); +#[app(device = embassy_stm32)] +mod app { + use rtic_monotonics::fugit::ExtU32; + use rtic_monotonics::Monotonic as _; + use satrs_stm32f3_disco_rtic::{Direction, LedPinSet, Leds}; - let mut gpioe = dp.GPIOE.split(&mut rcc.ahb); - let mut leds = Leds::new( - gpioe.pe8, - gpioe.pe9, - gpioe.pe10, - gpioe.pe11, - gpioe.pe12, - gpioe.pe13, - gpioe.pe14, - gpioe.pe15, - &mut gpioe.moder, - &mut gpioe.otyper, - ); - let delay_ms = 200u16; - loop { - leds.ld3_n.toggle().ok(); - delay.delay_ms(delay_ms); - leds.ld3_n.toggle().ok(); - delay.delay_ms(delay_ms); + rtic_monotonics::systick_monotonic!(Mono, 1000); - //explicit on/off - leds.ld4_nw.on().ok(); - delay.delay_ms(delay_ms); - leds.ld4_nw.off().ok(); - delay.delay_ms(delay_ms); + #[shared] + struct Shared {} - leds.ld5_ne.on().ok(); - delay.delay_ms(delay_ms); - leds.ld5_ne.off().ok(); - delay.delay_ms(delay_ms); + #[local] + struct Local { + leds: Leds, + current_dir: Direction, + } - leds.ld6_w.on().ok(); - delay.delay_ms(delay_ms); - leds.ld6_w.off().ok(); - delay.delay_ms(delay_ms); + #[init] + fn init(cx: init::Context) -> (Shared, Local) { + let p = embassy_stm32::init(Default::default()); - leds.ld7_e.on().ok(); - delay.delay_ms(delay_ms); - leds.ld7_e.off().ok(); - delay.delay_ms(delay_ms); + defmt::info!("Starting sat-rs demo application for the STM32F3-Discovery using RTICv2"); - leds.ld8_sw.on().ok(); - delay.delay_ms(delay_ms); - leds.ld8_sw.off().ok(); - delay.delay_ms(delay_ms); + let led_pin_set = LedPinSet { + pin_n: p.PE8, + pin_ne: p.PE9, + pin_e: p.PE10, + pin_se: p.PE11, + pin_s: p.PE12, + pin_sw: p.PE13, + pin_w: p.PE14, + pin_nw: p.PE15, + }; + let leds = Leds::new(led_pin_set); - leds.ld9_se.on().ok(); - delay.delay_ms(delay_ms); - leds.ld9_se.off().ok(); - delay.delay_ms(delay_ms); + // Initialize the systick interrupt & obtain the token to prove that we did + Mono::start(cx.core.SYST, 8_000_000); + blinky::spawn().expect("failed to spawn blinky task"); + ( + Shared {}, + Local { + leds, + current_dir: Direction::North, + }, + ) + } - leds.ld10_s.on().ok(); - delay.delay_ms(delay_ms); - leds.ld10_s.off().ok(); - delay.delay_ms(delay_ms); + #[task(local = [leds, current_dir])] + async fn blinky(cx: blinky::Context) { + loop { + cx.local.leds.blink_next(cx.local.current_dir); + Mono::delay(200.millis()).await; + } } } diff --git a/embedded-examples/stm32f3-disco-rtic/src/lib.rs b/embedded-examples/stm32f3-disco-rtic/src/lib.rs index 284660c..b71890f 100644 --- a/embedded-examples/stm32f3-disco-rtic/src/lib.rs +++ b/embedded-examples/stm32f3-disco-rtic/src/lib.rs @@ -1,51 +1,196 @@ #![no_main] #![no_std] -use cortex_m_semihosting::debug; +use core::time::Duration; +use arbitrary_int::u11; +use embassy_stm32::gpio::Output; +use spacepackets::{ + ccsds_packet_len_for_user_data_len_with_checksum, CcsdsPacketCreationError, + CcsdsPacketCreatorWithReservedData, PacketId, PacketSequenceControl, SpacePacketHeader, +}; -use defmt_brtt as _; // global logger +pub const APID: u11 = u11::new(0x02); -use stm32f3xx_hal as _; // memory layout - -use panic_probe as _; - -// same panicking *behavior* as `panic-probe` but doesn't print a panic message -// this prevents the panic message being printed *twice* when `defmt::panic` is invoked -#[defmt::panic_handler] -fn panic() -> ! { - cortex_m::asm::udf() +#[derive(defmt::Format, serde::Serialize, serde::Deserialize, PartialEq, Eq, Clone, Copy)] +pub enum Direction { + North, + NorthEast, + East, + SouthEast, + South, + SouthWest, + West, + NorthWest, } -/// Terminates the application and makes a semihosting-capable debug tool exit -/// with status code 0. -pub fn exit() -> ! { - loop { - debug::exit(debug::EXIT_SUCCESS); +impl Direction { + pub fn switch_to_next(&mut self) -> (Self, Self) { + let curr = *self; + *self = match self { + Direction::North => Direction::NorthEast, + Direction::NorthEast => Direction::East, + Direction::East => Direction::SouthEast, + Direction::SouthEast => Direction::South, + Direction::South => Direction::SouthWest, + Direction::SouthWest => Direction::West, + Direction::West => Direction::NorthWest, + Direction::NorthWest => Direction::North, + }; + (curr, *self) } } -/// Hardfault handler. -/// -/// Terminates the application and makes a semihosting-capable debug tool exit -/// with an error. This seems better than the default, which is to spin in a -/// loop. -#[cortex_m_rt::exception] -unsafe fn HardFault(_frame: &cortex_m_rt::ExceptionFrame) -> ! { - loop { - debug::exit(debug::EXIT_FAILURE); +#[derive(Copy, Clone, Debug, defmt::Format, serde::Serialize, serde::Deserialize)] +pub enum Request { + Ping, + ChangeBlinkFrequency(Duration), +} + +#[derive(Debug, defmt::Format, serde::Serialize, serde::Deserialize)] +pub struct CcsdsPacketId { + pub packet_id: PacketId, + pub psc: PacketSequenceControl, +} + +#[derive(Debug, defmt::Format, serde::Serialize, serde::Deserialize)] +pub struct TmHeader { + pub tc_packet_id: Option, + pub uptime_millis: u32, +} + +#[derive(Debug, defmt::Format, serde::Serialize, serde::Deserialize)] +pub enum Response { + CommandDone, +} + +pub fn tm_size(tm_header: &TmHeader, response: &Response) -> usize { + ccsds_packet_len_for_user_data_len_with_checksum( + postcard::experimental::serialized_size(tm_header).unwrap() + + postcard::experimental::serialized_size(response).unwrap(), + ) + .unwrap() +} + +pub fn create_tm_packet( + buf: &mut [u8], + sp_header: SpacePacketHeader, + tm_header: TmHeader, + response: Response, +) -> Result { + let packet_data_size = postcard::experimental::serialized_size(&tm_header).unwrap() + + postcard::experimental::serialized_size(&response).unwrap(); + let mut creator = + CcsdsPacketCreatorWithReservedData::new_tm_with_checksum(sp_header, packet_data_size, buf)?; + + let current_index = postcard::to_slice(&tm_header, creator.packet_data_mut()) + .unwrap() + .len(); + postcard::to_slice(&response, &mut creator.packet_data_mut()[current_index..]).unwrap(); + Ok(creator.finish()) +} + +pub struct Leds { + pub north: Output<'static>, + pub north_east: Output<'static>, + pub east: Output<'static>, + pub south_east: Output<'static>, + pub south: Output<'static>, + pub south_west: Output<'static>, + pub west: Output<'static>, + pub north_west: Output<'static>, +} + +impl Leds { + pub fn blink_next(&mut self, current_dir: &mut Direction) { + let (prev, curr) = current_dir.switch_to_next(); + self.set_dir_low(prev); + self.set_dir_high(curr); + } + + pub fn set_dir(&mut self, dir: Direction, level: embassy_stm32::gpio::Level) { + match dir { + Direction::North => self.north.set_level(level), + Direction::NorthEast => self.north_east.set_level(level), + Direction::East => self.east.set_level(level), + Direction::SouthEast => self.south_east.set_level(level), + Direction::South => self.south.set_level(level), + Direction::SouthWest => self.south_west.set_level(level), + Direction::West => self.west.set_level(level), + Direction::NorthWest => self.north_west.set_level(level), + } + } + + pub fn set_dir_low(&mut self, dir: Direction) { + self.set_dir(dir, embassy_stm32::gpio::Level::Low); + } + + pub fn set_dir_high(&mut self, dir: Direction) { + self.set_dir(dir, embassy_stm32::gpio::Level::High); } } -// defmt-test 0.3.0 has the limitation that this `#[tests]` attribute can only be used -// once within a crate. the module can be in any file but there can only be at most -// one `#[tests]` module in this library crate -#[cfg(test)] -#[defmt_test::tests] -mod unit_tests { - use defmt::assert; +pub struct LedPinSet { + pub pin_n: embassy_stm32::Peri<'static, embassy_stm32::peripherals::PE8>, + pub pin_ne: embassy_stm32::Peri<'static, embassy_stm32::peripherals::PE9>, + pub pin_e: embassy_stm32::Peri<'static, embassy_stm32::peripherals::PE10>, + pub pin_se: embassy_stm32::Peri<'static, embassy_stm32::peripherals::PE11>, + pub pin_s: embassy_stm32::Peri<'static, embassy_stm32::peripherals::PE12>, + pub pin_sw: embassy_stm32::Peri<'static, embassy_stm32::peripherals::PE13>, + pub pin_w: embassy_stm32::Peri<'static, embassy_stm32::peripherals::PE14>, + pub pin_nw: embassy_stm32::Peri<'static, embassy_stm32::peripherals::PE15>, +} - #[test] - fn it_works() { - assert!(true) +impl Leds { + pub fn new(pin_set: LedPinSet) -> Self { + let led_n = Output::new( + pin_set.pin_n, + embassy_stm32::gpio::Level::Low, + embassy_stm32::gpio::Speed::Medium, + ); + let led_ne = Output::new( + pin_set.pin_ne, + embassy_stm32::gpio::Level::Low, + embassy_stm32::gpio::Speed::Medium, + ); + let led_e = Output::new( + pin_set.pin_e, + embassy_stm32::gpio::Level::Low, + embassy_stm32::gpio::Speed::Medium, + ); + let led_se = Output::new( + pin_set.pin_se, + embassy_stm32::gpio::Level::Low, + embassy_stm32::gpio::Speed::Medium, + ); + let led_s = Output::new( + pin_set.pin_s, + embassy_stm32::gpio::Level::Low, + embassy_stm32::gpio::Speed::Medium, + ); + let led_sw = Output::new( + pin_set.pin_sw, + embassy_stm32::gpio::Level::Low, + embassy_stm32::gpio::Speed::Medium, + ); + let led_w = Output::new( + pin_set.pin_w, + embassy_stm32::gpio::Level::Low, + embassy_stm32::gpio::Speed::Medium, + ); + let led_nw = Output::new( + pin_set.pin_nw, + embassy_stm32::gpio::Level::Low, + embassy_stm32::gpio::Speed::Medium, + ); + Self { + north: led_n, + north_east: led_ne, + east: led_e, + south_east: led_se, + south: led_s, + south_west: led_sw, + west: led_w, + north_west: led_nw, + } } } diff --git a/embedded-examples/stm32f3-disco-rtic/src/main.rs b/embedded-examples/stm32f3-disco-rtic/src/main.rs index 6944542..01c2054 100644 --- a/embedded-examples/stm32f3-disco-rtic/src/main.rs +++ b/embedded-examples/stm32f3-disco-rtic/src/main.rs @@ -1,682 +1,349 @@ #![no_std] #![no_main] -use satrs::pus::verification::{ - FailParams, TcStateAccepted, VerificationReportCreator, VerificationToken, -}; -use satrs::spacepackets::ecss::tc::PusTcReader; -use satrs::spacepackets::ecss::tm::{PusTmCreator, PusTmSecondaryHeader}; -use satrs::spacepackets::ecss::EcssEnumU16; -use satrs::spacepackets::CcsdsPacket; -use satrs::spacepackets::{ByteConversionError, SpHeader}; -// global logger + panicking-behavior + memory layout -use satrs_stm32f3_disco_rtic as _; +use arbitrary_int::{u11, u14}; +use cortex_m_semihosting::debug::{self, EXIT_FAILURE, EXIT_SUCCESS}; +use satrs_stm32f3_disco_rtic::{create_tm_packet, tm_size, CcsdsPacketId, Request, Response}; +use spacepackets::{CcsdsPacketCreationError, SpHeader}; + +use defmt_rtt as _; // global logger + +use panic_probe as _; use rtic::app; -use heapless::{mpmc::Q8, Vec}; #[allow(unused_imports)] use rtic_monotonics::fugit::{MillisDurationU32, TimerInstantU32}; use rtic_monotonics::systick::prelude::*; -use satrs::seq_count::SequenceCountProviderCore; -use satrs::spacepackets::{ecss::PusPacket, ecss::WritablePusPacket}; -use stm32f3xx_hal::dma::dma1; -use stm32f3xx_hal::gpio::{PushPull, AF7, PA2, PA3}; -use stm32f3xx_hal::pac::USART2; -use stm32f3xx_hal::serial::{Rx, RxEvent, Serial, SerialDmaRx, SerialDmaTx, Tx, TxEvent}; + +use crate::app::Mono; const UART_BAUD: u32 = 115200; const DEFAULT_BLINK_FREQ_MS: u32 = 1000; const TX_HANDLER_FREQ_MS: u32 = 20; -const MIN_DELAY_BETWEEN_TX_PACKETS_MS: u32 = 5; const MAX_TC_LEN: usize = 128; const MAX_TM_LEN: usize = 128; -pub const PUS_APID: u16 = 0x02; -type TxType = Tx>>; -type RxType = Rx>>; -type InstantFugit = TimerInstantU32<1000>; -type TxDmaTransferType = SerialDmaTx<&'static [u8], dma1::C7, TxType>; -type RxDmaTransferType = SerialDmaRx<&'static mut [u8], dma1::C6, RxType>; +pub const PUS_APID: u11 = u11::new(0x02); // This is the predictable maximum overhead of the COBS encoding scheme. // It is simply the maximum packet lenght dividied by 254 rounded up. -const COBS_TC_OVERHEAD: usize = (MAX_TC_LEN + 254 - 1) / 254; -const COBS_TM_OVERHEAD: usize = (MAX_TM_LEN + 254 - 1) / 254; +const COBS_TM_OVERHEAD: usize = cobs::max_encoding_overhead(MAX_TM_LEN); -const TC_BUF_LEN: usize = MAX_TC_LEN + COBS_TC_OVERHEAD; const TM_BUF_LEN: usize = MAX_TC_LEN + COBS_TM_OVERHEAD; -// This is a static buffer which should ONLY (!) be used as the TX DMA -// transfer buffer. -static mut DMA_TX_BUF: [u8; TM_BUF_LEN] = [0; TM_BUF_LEN]; -// This is a static buffer which should ONLY (!) be used as the RX DMA -// transfer buffer. -static mut DMA_RX_BUF: [u8; TC_BUF_LEN] = [0; TC_BUF_LEN]; +const TC_DMA_BUF_LEN: usize = 512; -type TmPacket = Vec; -type TcPacket = Vec; +type TmPacket = heapless::Vec; -static TM_REQUESTS: Q8 = Q8::new(); +static TM_QUEUE: heapless::mpmc::Queue = heapless::mpmc::Queue::new(); -use core::sync::atomic::{AtomicU16, Ordering}; - -pub struct SeqCountProviderAtomicRef { - atomic: AtomicU16, - ordering: Ordering, -} - -impl SeqCountProviderAtomicRef { - pub const fn new(ordering: Ordering) -> Self { - Self { - atomic: AtomicU16::new(0), - ordering, - } - } -} - -impl SequenceCountProviderCore for SeqCountProviderAtomicRef { - fn get(&self) -> u16 { - self.atomic.load(self.ordering) - } - - fn increment(&self) { - self.atomic.fetch_add(1, self.ordering); - } - - fn get_and_increment(&self) -> u16 { - self.atomic.fetch_add(1, self.ordering) - } -} - -static SEQ_COUNT_PROVIDER: SeqCountProviderAtomicRef = - SeqCountProviderAtomicRef::new(Ordering::Relaxed); - -pub struct TxIdle { - tx: TxType, - dma_channel: dma1::C7, -} - -#[derive(Debug, defmt::Format)] +#[derive(Debug, defmt::Format, thiserror::Error)] pub enum TmSendError { - ByteConversion(ByteConversionError), + #[error("packet creation error: {0}")] + PacketCreation(#[from] CcsdsPacketCreationError), + #[error("queue error")] Queue, } -impl From for TmSendError { - fn from(value: ByteConversionError) -> Self { - Self::ByteConversion(value) - } -} - -fn send_tm(tm_creator: PusTmCreator) -> Result<(), TmSendError> { - if tm_creator.len_written() > MAX_TM_LEN { - return Err(ByteConversionError::ToSliceTooSmall { - expected: tm_creator.len_written(), - found: MAX_TM_LEN, - } - .into()); - } - let mut tm_vec = TmPacket::new(); - tm_vec - .resize(tm_creator.len_written(), 0) - .expect("vec resize failed"); - tm_creator.write_to_bytes(tm_vec.as_mut_slice())?; - defmt::info!( - "Sending TM[{},{}] with size {}", - tm_creator.service(), - tm_creator.subservice(), - tm_creator.len_written() - ); - TM_REQUESTS - .enqueue(tm_vec) - .map_err(|_| TmSendError::Queue)?; - Ok(()) -} - -fn handle_tm_send_error(error: TmSendError) { - defmt::warn!("sending tm failed with error {}", error); -} - -pub enum UartTxState { - // Wrapped in an option because we need an owned type later. - Idle(Option), - // Same as above - Transmitting(Option), -} - -pub struct UartTxShared { - last_completed: Option, - state: UartTxState, -} - -pub struct RequestWithToken { - token: VerificationToken, - request: Request, -} - #[derive(Debug, defmt::Format)] -pub enum Request { - Ping, - ChangeBlinkFrequency(u32), +pub struct RequestWithTcId { + pub request: Request, + pub tc_id: CcsdsPacketId, } -#[derive(Debug, defmt::Format)] -pub enum RequestError { - InvalidApid = 1, - InvalidService = 2, - InvalidSubservice = 3, - NotEnoughAppData = 4, -} - -pub fn convert_pus_tc_to_request( - tc: &PusTcReader, - verif_reporter: &mut VerificationReportCreator, - src_data_buf: &mut [u8], - timestamp: &[u8], -) -> Result { - defmt::info!( - "Found PUS TC [{},{}] with length {}", - tc.service(), - tc.subservice(), - tc.len_packed() - ); - - let token = verif_reporter.add_tc(tc); - if tc.apid() != PUS_APID { - defmt::warn!("Received tc with unknown APID {}", tc.apid()); - let result = send_tm( - verif_reporter - .acceptance_failure( - src_data_buf, - token, - SEQ_COUNT_PROVIDER.get_and_increment(), - 0, - FailParams::new(timestamp, &EcssEnumU16::new(0), &[]), - ) - .unwrap(), - ); - if let Err(e) = result { - handle_tm_send_error(e); - } - return Err(RequestError::InvalidApid); - } - let (tm_creator, accepted_token) = verif_reporter - .acceptance_success( - src_data_buf, - token, - SEQ_COUNT_PROVIDER.get_and_increment(), - 0, - timestamp, - ) - .unwrap(); - - if let Err(e) = send_tm(tm_creator) { - handle_tm_send_error(e); - } - - if tc.service() == 17 && tc.subservice() == 1 { - if tc.subservice() == 1 { - return Ok(RequestWithToken { - request: Request::Ping, - token: accepted_token, - }); - } else { - return Err(RequestError::InvalidSubservice); - } - } else if tc.service() == 8 { - if tc.subservice() == 1 { - if tc.user_data().len() < 4 { - return Err(RequestError::NotEnoughAppData); - } - let new_freq_ms = u32::from_be_bytes(tc.user_data()[0..4].try_into().unwrap()); - return Ok(RequestWithToken { - request: Request::ChangeBlinkFrequency(new_freq_ms), - token: accepted_token, - }); - } else { - return Err(RequestError::InvalidSubservice); - } - } else { - return Err(RequestError::InvalidService); - } -} - -#[app(device = stm32f3xx_hal::pac, peripherals = true)] +#[app(device = embassy_stm32)] mod app { - use super::*; - use core::slice::Iter; - use satrs::pus::verification::{TcStateStarted, VerificationReportCreator}; - use satrs::spacepackets::{ecss::tc::PusTcReader, time::cds::P_FIELD_BASE}; - #[allow(unused_imports)] - use stm32f3_discovery::leds::Direction; - use stm32f3_discovery::leds::Leds; - use stm32f3xx_hal::prelude::*; + use core::time::Duration; - use stm32f3_discovery::switch_hal::OutputSwitch; - use stm32f3xx_hal::Switch; - #[allow(dead_code)] - type SerialType = Serial>, PA3>)>; + use super::*; + use arbitrary_int::u14; + use rtic::Mutex; + use rtic_sync::{ + channel::{Receiver, Sender}, + make_channel, + }; + use satrs_stm32f3_disco_rtic::{CcsdsPacketId, LedPinSet, Request, Response}; + use spacepackets::CcsdsPacketReader; systick_monotonic!(Mono, 1000); + embassy_stm32::bind_interrupts!(struct Irqs { + USART2 => embassy_stm32::usart::InterruptHandler; + }); + #[shared] struct Shared { - blink_freq: MillisDurationU32, - tx_shared: UartTxShared, - rx_transfer: Option, + blink_freq: Duration, } #[local] struct Local { - verif_reporter: VerificationReportCreator, - leds: Leds, - last_dir: Direction, - curr_dir: Iter<'static, Direction>, + leds: satrs_stm32f3_disco_rtic::Leds, + current_dir: satrs_stm32f3_disco_rtic::Direction, + seq_count: u14, + tx: embassy_stm32::usart::UartTx<'static, embassy_stm32::mode::Async>, + rx: embassy_stm32::usart::RingBufferedUartRx<'static>, } #[init] fn init(cx: init::Context) -> (Shared, Local) { - let mut rcc = cx.device.RCC.constrain(); + static DMA_BUF: static_cell::ConstStaticCell<[u8; TC_DMA_BUF_LEN]> = + static_cell::ConstStaticCell::new([0; TC_DMA_BUF_LEN]); + let p = embassy_stm32::init(Default::default()); + + let (req_sender, req_receiver) = make_channel!(RequestWithTcId, 16); // Initialize the systick interrupt & obtain the token to prove that we did Mono::start(cx.core.SYST, 8_000_000); - let mut flash = cx.device.FLASH.constrain(); - let clocks = rcc - .cfgr - .use_hse(8.MHz()) - .sysclk(8.MHz()) - .pclk1(8.MHz()) - .freeze(&mut flash.acr); + defmt::info!("sat-rs demo application for the STM32F3-Discovery with RTICv2"); + let led_pin_set = LedPinSet { + pin_n: p.PE8, + pin_ne: p.PE9, + pin_e: p.PE10, + pin_se: p.PE11, + pin_s: p.PE12, + pin_sw: p.PE13, + pin_w: p.PE14, + pin_nw: p.PE15, + }; + let leds = satrs_stm32f3_disco_rtic::Leds::new(led_pin_set); - // Set up monotonic timer. - //let mono_timer = MonoTimer::new(cx.core.DWT, clocks, &mut cx.core.DCB); + let mut config = embassy_stm32::usart::Config::default(); + config.baudrate = UART_BAUD; + let uart = embassy_stm32::usart::Uart::new( + p.USART2, p.PA3, p.PA2, Irqs, p.DMA1_CH7, p.DMA1_CH6, config, + ) + .unwrap(); - defmt::info!("Starting sat-rs demo application for the STM32F3-Discovery"); - let mut gpioe = cx.device.GPIOE.split(&mut rcc.ahb); - - let leds = Leds::new( - gpioe.pe8, - gpioe.pe9, - gpioe.pe10, - gpioe.pe11, - gpioe.pe12, - gpioe.pe13, - gpioe.pe14, - gpioe.pe15, - &mut gpioe.moder, - &mut gpioe.otyper, - ); - let mut gpioa = cx.device.GPIOA.split(&mut rcc.ahb); - // USART2 pins - let mut pins = ( - // TX pin: PA2 - gpioa - .pa2 - .into_af_push_pull(&mut gpioa.moder, &mut gpioa.otyper, &mut gpioa.afrl), - // RX pin: PA3 - gpioa - .pa3 - .into_af_push_pull(&mut gpioa.moder, &mut gpioa.otyper, &mut gpioa.afrl), - ); - pins.1.internal_pull_up(&mut gpioa.pupdr, true); - let mut usart2 = Serial::new( - cx.device.USART2, - pins, - UART_BAUD.Bd(), - clocks, - &mut rcc.apb1, - ); - usart2.configure_rx_interrupt(RxEvent::Idle, Switch::On); - // This interrupt is enabled to re-schedule new transfers in the interrupt handler immediately. - usart2.configure_tx_interrupt(TxEvent::TransmissionComplete, Switch::On); - - let dma1 = cx.device.DMA1.split(&mut rcc.ahb); - let (mut tx_serial, mut rx_serial) = usart2.split(); - - // This interrupt is immediately triggered, clear it. It will only be reset - // by the hardware when data is received on RX (RXNE event) - rx_serial.clear_event(RxEvent::Idle); - // For some reason, this is also immediately triggered.. - tx_serial.clear_event(TxEvent::TransmissionComplete); - let rx_transfer = rx_serial.read_exact(unsafe { DMA_RX_BUF.as_mut_slice() }, dma1.ch6); + let (tx, rx) = uart.split(); defmt::info!("Spawning tasks"); - blink::spawn().unwrap(); + blinky::spawn().unwrap(); serial_tx_handler::spawn().unwrap(); - - let verif_reporter = VerificationReportCreator::new(PUS_APID).unwrap(); + serial_rx_handler::spawn(req_sender).unwrap(); + req_handler::spawn(req_receiver).unwrap(); ( Shared { - blink_freq: MillisDurationU32::from_ticks(DEFAULT_BLINK_FREQ_MS), - tx_shared: UartTxShared { - last_completed: None, - state: UartTxState::Idle(Some(TxIdle { - tx: tx_serial, - dma_channel: dma1.ch7, - })), - }, - rx_transfer: Some(rx_transfer), + blink_freq: Duration::from_millis(DEFAULT_BLINK_FREQ_MS as u64), }, Local { - verif_reporter, leds, - last_dir: Direction::North, - curr_dir: Direction::iter(), + tx, + seq_count: u14::new(0), + rx: rx.into_ring_buffered(DMA_BUF.take()), + current_dir: satrs_stm32f3_disco_rtic::Direction::North, }, ) } - #[task(local = [leds, curr_dir, last_dir], shared=[blink_freq])] - async fn blink(mut cx: blink::Context) { - let blink::LocalResources { - leds, - curr_dir, - last_dir, - .. - } = cx.local; - let mut toggle_leds = |dir: &Direction| { - let last_led = leds.for_direction(*last_dir); - last_led.off().ok(); - let led = leds.for_direction(*dir); - led.on().ok(); - *last_dir = *dir; - }; + #[task(local = [leds, current_dir], shared=[blink_freq])] + async fn blinky(mut cx: blinky::Context) { loop { - match curr_dir.next() { - Some(dir) => { - toggle_leds(dir); - } - None => { - *curr_dir = Direction::iter(); - toggle_leds(curr_dir.next().unwrap()); - } - } + cx.local.leds.blink_next(cx.local.current_dir); let current_blink_freq = cx.shared.blink_freq.lock(|current| *current); - Mono::delay(current_blink_freq).await; + Mono::delay(MillisDurationU32::from_ticks( + current_blink_freq.as_millis() as u32, + )) + .await; } } #[task( - shared = [tx_shared], + local = [ + tx, + encoded_buf: [u8; TM_BUF_LEN] = [0; TM_BUF_LEN] + ], + shared = [], )] - async fn serial_tx_handler(mut cx: serial_tx_handler::Context) { + async fn serial_tx_handler(cx: serial_tx_handler::Context) { loop { - let is_idle = cx.shared.tx_shared.lock(|tx_shared| { - if let UartTxState::Idle(_) = tx_shared.state { - return true; - } - false - }); - if is_idle { - let last_completed = cx.shared.tx_shared.lock(|shared| shared.last_completed); - if let Some(last_completed) = last_completed { - let elapsed_ms = (Mono::now() - last_completed).to_millis(); - if elapsed_ms < MIN_DELAY_BETWEEN_TX_PACKETS_MS { - Mono::delay((MIN_DELAY_BETWEEN_TX_PACKETS_MS - elapsed_ms).millis()).await; - } - } - } else { - // Check for completion after 1 ms - Mono::delay(1.millis()).await; + while let Some(vec) = TM_QUEUE.dequeue() { + let encoded_len = + cobs::encode_including_sentinels(&vec[0..vec.len()], cx.local.encoded_buf); + defmt::debug!("sending {} bytes over UART", encoded_len); + cx.local + .tx + .write(&cx.local.encoded_buf[0..encoded_len]) + .await + .unwrap(); continue; } - if let Some(vec) = TM_REQUESTS.dequeue() { - cx.shared - .tx_shared - .lock(|tx_shared| match &mut tx_shared.state { - UartTxState::Idle(tx) => { - let encoded_len; - //debug!(target: "serial_tx_handler", "bytes: {:x?}", &buf[0..len]); - // Safety: We only copy the data into the TX DMA buffer in this task. - // If the DMA is active, another branch will be taken. - unsafe { - // 0 sentinel value as start marker - DMA_TX_BUF[0] = 0; - encoded_len = - cobs::encode(&vec[0..vec.len()], &mut DMA_TX_BUF[1..]); - // Should never panic, we accounted for the overhead. - // Write into transfer buffer directly, no need for intermediate - // encoding buffer. - // 0 end marker - DMA_TX_BUF[encoded_len + 1] = 0; - } - //debug!(target: "serial_tx_handler", "Sending {} bytes", encoded_len + 2); - //debug!("sent: {:x?}", &mut_tx_dma_buf[0..encoded_len + 2]); - let tx_idle = tx.take().unwrap(); - // Transfer completion and re-scheduling of new TX transfers will be done - // by the IRQ handler. - // SAFETY: The DMA is the exclusive writer to the DMA buffer now. - let transfer = tx_idle.tx.write_all( - unsafe { &DMA_TX_BUF[0..encoded_len + 2] }, - tx_idle.dma_channel, - ); - tx_shared.state = UartTxState::Transmitting(Some(transfer)); - // The memory block is automatically returned to the pool when it is dropped. - } - UartTxState::Transmitting(_) => (), - }); - // Check for completion after 1 ms - Mono::delay(1.millis()).await; - continue; - } - // Nothing to do, and we are idle. Mono::delay(TX_HANDLER_FREQ_MS.millis()).await; } } #[task( local = [ - verif_reporter, + rx, + read_buf: [u8; 128] = [0; 128], decode_buf: [u8; MAX_TC_LEN] = [0; MAX_TC_LEN], - src_data_buf: [u8; MAX_TM_LEN] = [0; MAX_TM_LEN], - timestamp: [u8; 7] = [0; 7], ], shared = [blink_freq] )] async fn serial_rx_handler( - mut cx: serial_rx_handler::Context, - received_packet: Vec, + cx: serial_rx_handler::Context, + mut sender: Sender<'static, RequestWithTcId, 16>, ) { - cx.local.timestamp[0] = P_FIELD_BASE; - defmt::info!("Received packet with {} bytes", received_packet.len()); - let decode_buf = cx.local.decode_buf; - let packet = received_packet.as_slice(); - let mut start_idx = None; - for (idx, byte) in packet.iter().enumerate() { - if *byte != 0 { - start_idx = Some(idx); - break; - } - } - if start_idx.is_none() { - defmt::warn!("decoding error, can only process cobs encoded frames, data is all 0"); - return; - } - let start_idx = start_idx.unwrap(); - match cobs::decode(&received_packet.as_slice()[start_idx..], decode_buf) { - Ok(len) => { - defmt::info!("Decoded packet length: {}", len); - let pus_tc = PusTcReader::new(decode_buf); - match pus_tc { - Ok((tc, _tc_len)) => { - match convert_pus_tc_to_request( - &tc, - cx.local.verif_reporter, - cx.local.src_data_buf, - cx.local.timestamp, - ) { - Ok(request_with_token) => { - let started_token = handle_start_verification( - request_with_token.token, - cx.local.verif_reporter, - cx.local.src_data_buf, - cx.local.timestamp, - ); - - match request_with_token.request { - Request::Ping => { - handle_ping_request(cx.local.timestamp); + let mut decoder = cobs::CobsDecoder::new(cx.local.decode_buf); + loop { + match cx.local.rx.read(cx.local.read_buf).await { + Ok(bytes) => { + defmt::debug!("received {} bytes over UART", bytes); + for byte in cx.local.read_buf[0..bytes].iter() { + match decoder.feed(*byte) { + Ok(None) => (), + Ok(Some(packet_size)) => { + match CcsdsPacketReader::new_with_checksum( + &decoder.dest()[0..packet_size], + ) { + Ok(packet) => { + let packet_id = packet.packet_id(); + let psc = packet.psc(); + let tc_packet_id = CcsdsPacketId { packet_id, psc }; + if let Ok(request) = + postcard::from_bytes::(packet.packet_data()) + { + sender + .send(RequestWithTcId { + request, + tc_id: tc_packet_id, + }) + .await + .unwrap(); + } } - Request::ChangeBlinkFrequency(new_freq_ms) => { - defmt::info!("Received blink frequency change request with new frequncy {}", new_freq_ms); - cx.shared.blink_freq.lock(|blink_freq| { - *blink_freq = - MillisDurationU32::from_ticks(new_freq_ms); - }); + Err(e) => { + defmt::error!("error unpacking ccsds packet: {}", e); } } - handle_completion_verification( - started_token, - cx.local.verif_reporter, - cx.local.src_data_buf, - cx.local.timestamp, - ); } Err(e) => { - // TODO: Error handling: Send verification failure based on request error. - defmt::warn!("request error {}", e); + defmt::error!("cobs decoding error: {}", e); } } } - Err(e) => { - defmt::warn!("Error unpacking PUS TC: {}", e); - } + } + Err(e) => { + defmt::error!("uart read error: {}", e); } } - Err(_) => { - defmt::warn!("decoding error, can only process cobs encoded frames") - } } } - fn handle_ping_request(timestamp: &[u8]) { - defmt::info!("Received PUS ping telecommand, sending ping reply TM[17,2]"); - let sp_header = - SpHeader::new_for_unseg_tc(PUS_APID, SEQ_COUNT_PROVIDER.get_and_increment(), 0); - let sec_header = PusTmSecondaryHeader::new_simple(17, 2, timestamp); - let ping_reply = PusTmCreator::new(sp_header, sec_header, &[], true); - let mut tm_packet = TmPacket::new(); - tm_packet - .resize(ping_reply.len_written(), 0) - .expect("vec resize failed"); - ping_reply.write_to_bytes(&mut tm_packet).unwrap(); - if TM_REQUESTS.enqueue(tm_packet).is_err() { - defmt::warn!("TC queue full"); - return; - } - } - - fn handle_start_verification( - accepted_token: VerificationToken, - verif_reporter: &mut VerificationReportCreator, - src_data_buf: &mut [u8], - timestamp: &[u8], - ) -> VerificationToken { - let (tm_creator, started_token) = verif_reporter - .start_success( - src_data_buf, - accepted_token, - SEQ_COUNT_PROVIDER.get(), - 0, - ×tamp, - ) - .unwrap(); - let result = send_tm(tm_creator); - if let Err(e) = result { - handle_tm_send_error(e); - } - started_token - } - - fn handle_completion_verification( - started_token: VerificationToken, - verif_reporter: &mut VerificationReportCreator, - src_data_buf: &mut [u8], - timestamp: &[u8], + #[task(shared = [blink_freq], local = [seq_count])] + async fn req_handler( + mut cx: req_handler::Context, + mut receiver: Receiver<'static, RequestWithTcId, 16>, ) { - let result = send_tm( - verif_reporter - .completion_success( - src_data_buf, - started_token, - SEQ_COUNT_PROVIDER.get(), - 0, - timestamp, - ) - .unwrap(), - ); - if let Err(e) = result { - handle_tm_send_error(e); + loop { + match receiver.recv().await { + Ok(request_with_tc_id) => { + let tm_send_result = match request_with_tc_id.request { + Request::Ping => handle_ping_request(&mut cx, request_with_tc_id.tc_id), + Request::ChangeBlinkFrequency(duration) => { + handle_change_blink_frequency_request( + &mut cx, + request_with_tc_id.tc_id, + duration, + ) + } + }; + if let Err(e) = tm_send_result { + defmt::error!("error sending TM response: {}", e); + } + } + Err(_e) => defmt::error!("request receive error"), + } } } - #[task(binds = DMA1_CH6, shared = [rx_transfer])] - fn rx_dma_isr(mut cx: rx_dma_isr::Context) { - let mut tc_packet = TcPacket::new(); - cx.shared.rx_transfer.lock(|rx_transfer| { - let rx_ref = rx_transfer.as_ref().unwrap(); - if rx_ref.is_complete() { - let uart_rx_owned = rx_transfer.take().unwrap(); - let (buf, c, rx) = uart_rx_owned.stop(); - // The received data is transferred to another task now to avoid any processing overhead - // during the interrupt. There are multiple ways to do this, we use a stack allocaed vector here - // to do this. - tc_packet.resize(buf.len(), 0).expect("vec resize failed"); - tc_packet.copy_from_slice(buf); - - // Start the next transfer as soon as possible. - *rx_transfer = Some(rx.read_exact(buf, c)); - - // Send the vector to a regular task. - serial_rx_handler::spawn(tc_packet).expect("spawning rx handler task failed"); - // If this happens, there is a high chance that the maximum packet length was - // exceeded. Circular mode is not used here, so data might be missed. - defmt::warn!( - "rx transfer with maximum length {}, might miss data", - TC_BUF_LEN - ); - } - }); + fn handle_ping_request( + cx: &mut req_handler::Context, + tc_packet_id: CcsdsPacketId, + ) -> Result<(), TmSendError> { + defmt::info!("Received PUS ping telecommand, sending ping reply"); + send_tm(tc_packet_id, Response::CommandDone, *cx.local.seq_count)?; + *cx.local.seq_count = cx.local.seq_count.wrapping_add(u14::new(1)); + Ok(()) } - #[task(binds = USART2_EXTI26, shared = [rx_transfer, tx_shared])] - fn serial_isr(mut cx: serial_isr::Context) { + fn handle_change_blink_frequency_request( + cx: &mut req_handler::Context, + tc_packet_id: CcsdsPacketId, + duration: Duration, + ) -> Result<(), TmSendError> { + defmt::info!( + "Received ChangeBlinkFrequency request, new frequency: {} ms", + duration.as_millis() + ); cx.shared - .tx_shared - .lock(|tx_shared| match &mut tx_shared.state { - UartTxState::Idle(_) => (), - UartTxState::Transmitting(transfer) => { - let transfer_ref = transfer.as_ref().unwrap(); - if transfer_ref.is_complete() { - let transfer = transfer.take().unwrap(); - let (_, dma_channel, mut tx) = transfer.stop(); - tx.clear_event(TxEvent::TransmissionComplete); - tx_shared.state = UartTxState::Idle(Some(TxIdle { tx, dma_channel })); - // We cache the last completed time to ensure that there is a minimum delay between consecutive - // transferred packets. - tx_shared.last_completed = Some(Mono::now()); - } - } - }); - let mut tc_packet = TcPacket::new(); - cx.shared.rx_transfer.lock(|rx_transfer| { - let rx_transfer_ref = rx_transfer.as_ref().unwrap(); - // Received a partial packet. - if rx_transfer_ref.is_event_triggered(RxEvent::Idle) { - let rx_transfer_owned = rx_transfer.take().unwrap(); - let (buf, ch, mut rx, rx_len) = rx_transfer_owned.stop_and_return_received_bytes(); - // The received data is transferred to another task now to avoid any processing overhead - // during the interrupt. There are multiple ways to do this, we use a stack - // allocated vector to do this. - tc_packet - .resize(rx_len as usize, 0) - .expect("vec resize failed"); - tc_packet[0..rx_len as usize].copy_from_slice(&buf[0..rx_len as usize]); - rx.clear_event(RxEvent::Idle); - serial_rx_handler::spawn(tc_packet).expect("spawning rx handler failed"); - *rx_transfer = Some(rx.read_exact(buf, ch)); - } - }); + .blink_freq + .lock(|blink_freq| *blink_freq = duration); + send_tm(tc_packet_id, Response::CommandDone, *cx.local.seq_count)?; + *cx.local.seq_count = cx.local.seq_count.wrapping_add(u14::new(1)); + Ok(()) + } +} + +fn send_tm( + tc_packet_id: CcsdsPacketId, + response: Response, + current_seq_count: u14, +) -> Result<(), TmSendError> { + let sp_header = SpHeader::new_for_unseg_tc(PUS_APID, current_seq_count, 0); + let tm_header = satrs_stm32f3_disco_rtic::TmHeader { + tc_packet_id: Some(tc_packet_id), + uptime_millis: Mono::now().duration_since_epoch().to_millis(), + }; + let mut tm_packet = TmPacket::new(); + let tm_size = tm_size(&tm_header, &response); + tm_packet.resize(tm_size, 0).expect("vec resize failed"); + create_tm_packet(&mut tm_packet, sp_header, tm_header, response)?; + if TM_QUEUE.enqueue(tm_packet).is_err() { + defmt::warn!("TC queue full"); + return Err(TmSendError::Queue); + } + Ok(()) +} + +// same panicking *behavior* as `panic-probe` but doesn't print a panic message +// this prevents the panic message being printed *twice* when `defmt::panic` is invoked +#[defmt::panic_handler] +fn panic() -> ! { + cortex_m::asm::udf() +} + +/// Terminates the application and makes a semihosting-capable debug tool exit +/// with status code 0. +pub fn exit() -> ! { + loop { + debug::exit(EXIT_SUCCESS); + } +} + +/// Hardfault handler. +/// +/// Terminates the application and makes a semihosting-capable debug tool exit +/// with an error. This seems better than the default, which is to spin in a +/// loop. +#[cortex_m_rt::exception] +unsafe fn HardFault(_frame: &cortex_m_rt::ExceptionFrame) -> ! { + loop { + debug::exit(EXIT_FAILURE); + } +} + +// defmt-test 0.3.0 has the limitation that this `#[tests]` attribute can only be used +// once within a crate. the module can be in any file but there can only be at most +// one `#[tests]` module in this library crate +#[cfg(test)] +#[defmt_test::tests] +mod unit_tests { + use defmt::assert; + + #[test] + fn it_works() { + assert!(true) } } diff --git a/embedded-examples/stm32h7-nucleo-rtic/Cargo.lock b/embedded-examples/stm32h7-nucleo-rtic/Cargo.lock index aa4b9fb..6e4df86 100644 --- a/embedded-examples/stm32h7-nucleo-rtic/Cargo.lock +++ b/embedded-examples/stm32h7-nucleo-rtic/Cargo.lock @@ -3,10 +3,19 @@ version = 4 [[package]] -name = "autocfg" -version = "1.4.0" +name = "aho-corasick" +version = "1.1.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ace50bade8e6234aa140d9a2f552bbee1db4d353f69b8217bc503490fc1a9f26" +checksum = "8e60d3430d3a69478ad0993f19238d2df97c507009a52b3c10addcd7f6bcb916" +dependencies = [ + "memchr", +] + +[[package]] +name = "autocfg" +version = "1.5.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "c08606f8c3cbf4ce6ec8e28fb0014a2c086708fe954eaa885384a6165172e7e8" [[package]] name = "bare-metal" @@ -54,16 +63,26 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "37b2a672a2cb129a2e41c10b1224bb368f9f37a2b16b612598138befd7b37eb5" [[package]] -name = "cfg-if" -version = "1.0.0" +name = "cc" +version = "1.2.36" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd" +checksum = "5252b3d2648e5eedbc1a6f501e3c795e07025c1e93bbf8bbdd6eef7f447a6d54" +dependencies = [ + "find-msvc-tools", + "shlex", +] + +[[package]] +name = "cfg-if" +version = "1.0.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "2fd1289c04a9ea8cb22300a459a72a385d7c73d3259e2ed7dcb2af674838cfa9" [[package]] name = "cobs" -version = "0.3.0" +version = "0.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0fa961b519f0b462e3a3b4a34b64d119eeaca1d59af726fe450bbba07a9fc0a1" +checksum = "fea6d1b751c55bd9c0dda7d4ff752074e98f4765ae969664648bd193bb326d15" dependencies = [ "thiserror", ] @@ -104,7 +123,7 @@ checksum = "e37549a379a9e0e6e576fd208ee60394ccb8be963889eebba3ffe0980364f472" dependencies = [ "proc-macro2", "quote", - "syn 2.0.96", + "syn 2.0.106", ] [[package]] @@ -118,9 +137,9 @@ dependencies = [ [[package]] name = "crc" -version = "3.2.1" +version = "3.3.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "69e6e4d7b33a94f0991c26729976b10ebde1d34c3ee82408fb536164fa10d636" +checksum = "9710d3b3739c2e349eb44fe848ad0b7c8cb1e42bd87ee49371df2f7acaf3e675" dependencies = [ "crc-catalog", ] @@ -139,9 +158,18 @@ checksum = "790eea4361631c5e7d22598ecd5723ff611904e3344ce8720784c93e3d83d40b" [[package]] name = "defmt" -version = "0.3.10" +version = "0.3.100" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "86f6162c53f659f65d00619fe31f14556a6e9f8752ccc4a41bd177ffcf3d6130" +checksum = "f0963443817029b2024136fc4dd07a5107eb8f977eaf18fcd1fdeb11306b64ad" +dependencies = [ + "defmt 1.0.1", +] + +[[package]] +name = "defmt" +version = "1.0.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "548d977b6da32fa1d1fda2876453da1e7df63ad0304c8b3dae4dbe7b96f39b78" dependencies = [ "bitflags", "defmt-macros", @@ -154,63 +182,63 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "c2f0ac3635d0c89d12b8101fcb44a7625f5f030a1c0491124b74467eb5a58a78" dependencies = [ "critical-section", - "defmt", + "defmt 0.3.100", ] [[package]] name = "defmt-macros" -version = "0.4.0" +version = "1.0.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "9d135dd939bad62d7490b0002602d35b358dce5fd9233a709d3c1ef467d4bde6" +checksum = "3d4fc12a85bcf441cfe44344c4b72d58493178ce635338a3f3b78943aceb258e" dependencies = [ "defmt-parser", "proc-macro-error2", "proc-macro2", "quote", - "syn 2.0.96", + "syn 2.0.106", ] [[package]] name = "defmt-parser" -version = "0.4.1" +version = "1.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3983b127f13995e68c1e29071e5d115cd96f215ccb5e6812e3728cd6f92653b3" +checksum = "10d60334b3b2e7c9d91ef8150abfb6fa4c1c39ebbcf4a81c2e346aad939fee3e" dependencies = [ "thiserror", ] [[package]] name = "defmt-test" -version = "0.3.2" +version = "0.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "290966e8c38f94b11884877242de876280d0eab934900e9642d58868e77c5df1" +checksum = "24076cc7203c365e7febfcec15d6667a9ef780bd2c5fd3b2a197400df78f299b" dependencies = [ "cortex-m-rt", "cortex-m-semihosting", - "defmt", + "defmt 1.0.1", "defmt-test-macros", ] [[package]] name = "defmt-test-macros" -version = "0.3.1" +version = "0.3.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "984bc6eca246389726ac2826acc2488ca0fe5fcd6b8d9b48797021951d76a125" +checksum = "fe5520fd36862f281c026abeaab153ebbc001717c29a9b8e5ba9704d8f3a879d" dependencies = [ "proc-macro2", "quote", - "syn 2.0.96", + "syn 2.0.106", ] [[package]] name = "delegate" -version = "0.13.2" +version = "0.13.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "297806318ef30ad066b15792a8372858020ae3ca2e414ee6c2133b1eb9e9e945" +checksum = "6178a82cf56c836a3ba61a7935cdb1c49bfaa6fa4327cd5bf554a503087de26b" dependencies = [ "proc-macro2", "quote", - "syn 2.0.96", + "syn 2.0.106", ] [[package]] @@ -221,7 +249,7 @@ checksum = "2cdc8d50f426189eef89dac62fabfa0abb27d5cc008f25bf4156a0203325becc" dependencies = [ "proc-macro2", "quote", - "syn 2.0.96", + "syn 2.0.106", ] [[package]] @@ -261,7 +289,7 @@ version = "1.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "361a90feb7004eca4019fb28352a9465666b24f840f5c3cddf0ff13920590b89" dependencies = [ - "defmt", + "defmt 0.3.100", ] [[package]] @@ -270,18 +298,18 @@ version = "1.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "0c4c685bbef7fe13c3c6dd4da26841ed3980ef33e841cddfa15ce8a8fb3f1884" dependencies = [ - "defmt", + "defmt 0.3.100", "embedded-hal 1.0.0", ] [[package]] name = "embedded-hal-bus" -version = "0.1.0" +version = "0.3.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "57b4e6ede84339ebdb418cd986e6320a34b017cdf99b5cc3efceec6450b06886" +checksum = "513e0b3a8fb7d3013a8ae17a834283f170deaf7d0eeab0a7c1a36ad4dd356d22" dependencies = [ "critical-section", - "defmt", + "defmt 0.3.100", "embedded-hal 1.0.0", "embedded-hal-async", ] @@ -294,9 +322,15 @@ checksum = "a21dea9854beb860f3062d10228ce9b976da520a73474aed3171ec276bc0c032" [[package]] name = "equivalent" -version = "1.0.1" +version = "1.0.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5443807d6dff69373d433ab9ef5378ad8df50ca6298caf15de6e52e24aaf54d5" +checksum = "877a4ace8713b0bcf2a4e7eec82529c029f1d0619886d18145fea96c3ffe5c0f" + +[[package]] +name = "find-msvc-tools" +version = "0.1.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "7fd99930f64d146689264c637b5af2f0233a933bef0d8570e2526bf9e083192d" [[package]] name = "fugit" @@ -337,6 +371,20 @@ version = "2.3.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "1d758ba1b47b00caf47f24925c0074ecb20d6dfcffe7f6d53395c0465674841a" +[[package]] +name = "generator" +version = "0.8.7" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "605183a538e3e2a9c1038635cc5c2d194e2ee8fd0d1b66b8349fad7dbacce5a2" +dependencies = [ + "cc", + "cfg-if", + "libc", + "log", + "rustversion", + "windows", +] + [[package]] name = "hash32" version = "0.3.1" @@ -348,9 +396,9 @@ dependencies = [ [[package]] name = "hashbrown" -version = "0.15.2" +version = "0.15.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "bf151400ff0baff5465007dd2f3e717f3fe502074ca563069ce3a6629d07b289" +checksum = "9229cfe53dfd69f0609a49f65461bd93001ea1ef889cd5529dd176593f5338a1" [[package]] name = "heapless" @@ -358,26 +406,42 @@ version = "0.8.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "0bfb9eb618601c89945a70e254898da93b13be0388091d42117462b265bb3fad" dependencies = [ - "defmt", + "defmt 0.3.100", + "hash32", + "stable_deref_trait", +] + +[[package]] +name = "heapless" +version = "0.9.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b1edcd5a338e64688fbdcb7531a846cfd3476a54784dcb918a0844682bc7ada5" +dependencies = [ "hash32", "stable_deref_trait", ] [[package]] name = "indexmap" -version = "2.7.1" +version = "2.11.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8c9c992b02b5b4c94ea26e32fe5bccb7aa7d9f390ab5c1221ff895bc7ea8b652" +checksum = "f2481980430f9f78649238835720ddccc57e52df14ffce1c6f37391d61b563e9" dependencies = [ "equivalent", "hashbrown", ] [[package]] -name = "libc" -version = "0.2.169" +name = "lazy_static" +version = "1.5.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b5aba8db14291edd000dfcc4d620c7ebfb122c613afb886ca8803fa4e128a20a" +checksum = "bbd2bcb4c963f2ddae06a2efc7e9f3591312473c50c6685e1f298068316e66fe" + +[[package]] +name = "libc" +version = "0.2.175" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "6a82ae493e598baaea5209805c49bbf2ea7de956d50d7da0da1164f9c6d28543" [[package]] name = "linked_list_allocator" @@ -385,12 +449,47 @@ version = "0.10.5" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "9afa463f5405ee81cdb9cc2baf37e08ec7e4c8209442b5d72c04cfb2cd6e6286" +[[package]] +name = "log" +version = "0.4.28" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "34080505efa8e45a4b816c349525ebe327ceaa8559756f0356cba97ef3bf7432" + +[[package]] +name = "loom" +version = "0.7.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "419e0dc8046cb947daa77eb95ae174acfbddb7673b4151f56d1eed8e93fbfaca" +dependencies = [ + "cfg-if", + "generator", + "pin-utils", + "scoped-tls", + "tracing", + "tracing-subscriber", +] + [[package]] name = "managed" version = "0.8.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "0ca88d725a0a943b096803bd34e73a4437208b6077654cc4ecb2947a5f91618d" +[[package]] +name = "matchers" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d1525a2a28c7f4fa0fc98bb91ae755d1e2d1505079e05539e35bc876b5d65ae9" +dependencies = [ + "regex-automata", +] + +[[package]] +name = "memchr" +version = "2.7.5" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "32a282da65faaf38286cf3be983213fcf1d2e2a58700e808f83f4ea9a4804bc0" + [[package]] name = "nb" version = "0.1.3" @@ -406,6 +505,15 @@ version = "1.1.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "8d5439c4ad607c3c23abf66de8c8bf57ba8adcd1f129e699851a6e43935d339d" +[[package]] +name = "nu-ansi-term" +version = "0.50.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d4a28e057d01f97e61255210fcff094d74ed0466038633e95017f5beb68e4399" +dependencies = [ + "windows-sys", +] + [[package]] name = "num-traits" version = "0.2.19" @@ -417,32 +525,39 @@ dependencies = [ [[package]] name = "num_enum" -version = "0.7.3" +version = "0.7.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4e613fc340b2220f734a8595782c551f1250e969d87d3be1ae0579e8d4065179" +checksum = "a973b4e44ce6cad84ce69d797acf9a044532e4184c4f267913d1b546a0727b7a" dependencies = [ "num_enum_derive", + "rustversion", ] [[package]] name = "num_enum_derive" -version = "0.7.3" +version = "0.7.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "af1844ef2428cc3e1cb900be36181049ef3d3193c63e43026cfe202983b27a56" +checksum = "77e878c846a8abae00dd069496dbe8751b16ac1c3d6bd2a7283a938e8228f90d" dependencies = [ "proc-macro2", "quote", - "syn 2.0.96", + "syn 2.0.106", ] [[package]] -name = "panic-probe" -version = "0.3.2" +name = "once_cell" +version = "1.21.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4047d9235d1423d66cc97da7d07eddb54d4f154d6c13805c6d0793956f4f25b0" +checksum = "42f5e15c9953c5e4ccceeb2e7382a716482c34515315f7b03532b8b4e8393d2d" + +[[package]] +name = "panic-probe" +version = "1.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "fd402d00b0fb94c5aee000029204a46884b1262e0c443f166d86d2c0747e1a1a" dependencies = [ "cortex-m", - "defmt", + "defmt 1.0.1", ] [[package]] @@ -465,9 +580,9 @@ checksum = "8b870d8c151b6f2fb93e84a13146138f05d02ed11c7e7c54f8826aaaf7c9f184" [[package]] name = "portable-atomic" -version = "1.10.0" +version = "1.11.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "280dc24453071f1b63954171985a0b0d30058d287960968b9b2aca264c8d4ee6" +checksum = "f84267b20a16ea918e43c6a88433c2d54fa145c92a811b5b047ccbe153674483" [[package]] name = "proc-macro-error-attr2" @@ -488,27 +603,44 @@ dependencies = [ "proc-macro-error-attr2", "proc-macro2", "quote", - "syn 2.0.96", + "syn 2.0.106", ] [[package]] name = "proc-macro2" -version = "1.0.93" +version = "1.0.101" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "60946a68e5f9d28b0dc1c21bb8a97ee7d018a8b322fa57838ba31cc878e22d99" +checksum = "89ae43fd86e4158d6db51ad8e2b80f313af9cc74f5c0e03ccb87de09998732de" dependencies = [ "unicode-ident", ] [[package]] name = "quote" -version = "1.0.38" +version = "1.0.40" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0e4dccaaaf89514f546c693ddc140f729f958c247918a13380cccc6078391acc" +checksum = "1885c039570dc00dcb4ff087a89e185fd56bae234ddc7f056a945bf36467248d" dependencies = [ "proc-macro2", ] +[[package]] +name = "regex-automata" +version = "0.4.10" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "6b9458fa0bfeeac22b5ca447c63aaf45f28439a709ccd244698632f9aa6394d6" +dependencies = [ + "aho-corasick", + "memchr", + "regex-syntax", +] + +[[package]] +name = "regex-syntax" +version = "0.8.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "caf4aa5b0f434c91fe5c7f1ecb6a5ece2130b02ad2a590589dda5146df959001" + [[package]] name = "rlsf" version = "0.2.1" @@ -523,9 +655,9 @@ dependencies = [ [[package]] name = "rtic" -version = "2.1.2" +version = "2.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "401961431a1e491124cdd216a313fada2d395aa2b5bee2867c872fc8af7c1bc1" +checksum = "6bc68b1fa2eefbb7ad6747b299b79c8fca92163dfa46f0e279f39109cf272186" dependencies = [ "bare-metal 1.0.0", "cortex-m", @@ -537,11 +669,12 @@ dependencies = [ [[package]] name = "rtic-common" -version = "1.0.0" +version = "1.1.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0786b50b81ef9d2a944a000f60405bb28bf30cd45da2d182f3fe636b2321f35c" +checksum = "67caeecca87cb20e1101eb104b0f05604633b7ab1035cce777417c6fb7c8f9a0" dependencies = [ "critical-section", + "portable-atomic", ] [[package]] @@ -552,22 +685,22 @@ checksum = "d9369355b04d06a3780ec0f51ea2d225624db777acbc60abd8ca4832da5c1a42" [[package]] name = "rtic-macros" -version = "2.1.2" +version = "2.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ac22ab522d80079b48f46ac66ded4d349e1adf81b52430d6a74faa3a7790ed80" +checksum = "f387b12bd6c01d2c9d4776dddeefaf0ae51b9497c83c0186b1693f6821ff3c4a" dependencies = [ "indexmap", "proc-macro-error2", "proc-macro2", "quote", - "syn 2.0.96", + "syn 2.0.106", ] [[package]] name = "rtic-monotonics" -version = "2.0.3" +version = "2.1.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f1cb90bcfdbbacf3ca37340cdab52ec2de5611c744095ef7889e9c50c233b748" +checksum = "99f9923ce32637ee40c0cb28fbbc2fad880d8aebea2d545918c6971ae9be3d17" dependencies = [ "cfg-if", "cortex-m", @@ -578,25 +711,26 @@ dependencies = [ [[package]] name = "rtic-sync" -version = "1.3.0" +version = "1.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "49b1200137ccb2bf272a1801fa6e27264535facd356cb2c1d5bc8e12aa211bad" +checksum = "d378d811a8e25411a139f1428804e390fb2dc9b5bcf84e880a19c25feaa89a2a" dependencies = [ "critical-section", - "defmt", + "defmt 0.3.100", "embedded-hal 1.0.0", "embedded-hal-async", "embedded-hal-bus", - "heapless", + "heapless 0.8.0", + "loom", "portable-atomic", "rtic-common", ] [[package]] name = "rtic-time" -version = "2.0.0" +version = "2.0.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a7b1d853fa50dc125695414ce4510567a0d420221e455b1568cfa8c9aece9614" +checksum = "61485474f5a23247ae1d4875f2bfe860be9b3030dbf87c232e50799e021429a1" dependencies = [ "critical-section", "embedded-hal 1.0.0", @@ -615,21 +749,24 @@ dependencies = [ "semver", ] +[[package]] +name = "rustversion" +version = "1.0.22" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b39cdef0fa800fc44525c84ccb54a029961a8215f9619753635a9c0d2538d46d" + [[package]] name = "satrs" -version = "0.2.1" +version = "0.3.0-alpha.2" dependencies = [ "cobs", - "crc", - "defmt", + "defmt 1.0.1", "delegate", "derive-new", - "heapless", - "num-traits", + "heapless 0.9.1", "num_enum", "paste", "satrs-shared", - "smallvec", "spacepackets", "static_cell", "thiserror", @@ -637,9 +774,7 @@ dependencies = [ [[package]] name = "satrs-shared" -version = "0.2.1" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f10b962c131d0bcb0de06fefa5d4716cbd7f836167f90229f7f38405dc573bd3" +version = "0.2.3" dependencies = [ "spacepackets", ] @@ -651,7 +786,7 @@ dependencies = [ "cortex-m", "cortex-m-rt", "cortex-m-semihosting", - "defmt", + "defmt 1.0.1", "defmt-brtt", "defmt-test", "embedded-alloc", @@ -660,10 +795,16 @@ dependencies = [ "rtic-monotonics", "rtic-sync", "satrs", - "smoltcp", + "smoltcp 0.12.0", "stm32h7xx-hal", ] +[[package]] +name = "scoped-tls" +version = "1.0.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "e1cf6437eb19a8f4a6cc0f7dca544973b0b78843adbfeb3683d1a94a0024a294" + [[package]] name = "semver" version = "0.9.0" @@ -680,10 +821,25 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "388a1df253eca08550bef6c72392cfe7c30914bf41df5269b68cbd6ff8f570a3" [[package]] -name = "smallvec" -version = "1.13.2" +name = "sharded-slab" +version = "0.1.7" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3c5e1a9a646d36c3599cd173a41282daf47c44583ad367b8e6837255952e5c67" +checksum = "f40ca3c46823713e0d4209592e8d6e826aa57e928f09752619fc696c499637f6" +dependencies = [ + "lazy_static", +] + +[[package]] +name = "shlex" +version = "1.3.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0fda2ff0d084019ba4d7c6f371c95d8fd75ce3524c3cb8fb653a3023f6323e64" + +[[package]] +name = "smallvec" +version = "1.15.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "67b1b7a3b5fe4f1376887184045fcf45c69e92af734b7aaddc05fb777b6fbd03" [[package]] name = "smoltcp" @@ -694,19 +850,32 @@ dependencies = [ "bitflags", "byteorder", "cfg-if", - "defmt", - "heapless", + "heapless 0.8.0", + "managed", +] + +[[package]] +name = "smoltcp" +version = "0.12.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "dad095989c1533c1c266d9b1e8d70a1329dd3723c3edac6d03bbd67e7bf6f4bb" +dependencies = [ + "bitflags", + "byteorder", + "cfg-if", + "defmt 0.3.100", + "heapless 0.8.0", "managed", ] [[package]] name = "spacepackets" -version = "0.13.0" +version = "0.15.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "591d42bfa6af2ab308e5efd8f0870e2d0eb5dd19a141bdcb7da731f5ff9cc11c" +checksum = "95ca19d2a251259686f6fffb094a8e32824098f387cd613ae81bfe4216524d02" dependencies = [ "crc", - "defmt", + "defmt 1.0.1", "delegate", "num-traits", "num_enum", @@ -723,9 +892,9 @@ checksum = "a8f112729512f8e442d81f95a8a7ddf2b7c6b8a1a6f509a95864142b30cab2d3" [[package]] name = "static_cell" -version = "2.1.0" +version = "2.1.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d89b0684884a883431282db1e4343f34afc2ff6996fe1f4a1664519b66e14c1e" +checksum = "0530892bb4fa575ee0da4b86f86c667132a94b74bb72160f58ee5a4afec74c23" dependencies = [ "portable-atomic", ] @@ -757,7 +926,7 @@ dependencies = [ "fugit", "nb 1.1.0", "paste", - "smoltcp", + "smoltcp 0.11.0", "stm32h7", "void", ] @@ -788,9 +957,9 @@ dependencies = [ [[package]] name = "syn" -version = "2.0.96" +version = "2.0.106" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d5d0adab1ae378d7f53bdebc67a39f1f151407ef230f0ce2883572f5d8985c80" +checksum = "ede7c438028d4436d71104916910f5bb611972c5cfd7f89b8300a8186e6fada6" dependencies = [ "proc-macro2", "quote", @@ -799,29 +968,87 @@ dependencies = [ [[package]] name = "thiserror" -version = "2.0.11" +version = "2.0.16" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d452f284b73e6d76dd36758a0c8684b1d5be31f92b89d07fd5822175732206fc" +checksum = "3467d614147380f2e4e374161426ff399c91084acd2363eaf549172b3d5e60c0" dependencies = [ "thiserror-impl", ] [[package]] name = "thiserror-impl" -version = "2.0.11" +version = "2.0.16" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "26afc1baea8a989337eeb52b6e72a039780ce45c3edfcc9c5b9d112feeb173c2" +checksum = "6c5e1be1c48b9172ee610da68fd9cd2770e7a4056cb3fc98710ee6906f0c7960" dependencies = [ "proc-macro2", "quote", - "syn 2.0.96", + "syn 2.0.106", +] + +[[package]] +name = "thread_local" +version = "1.1.9" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f60246a4944f24f6e018aa17cdeffb7818b76356965d03b07d6a9886e8962185" +dependencies = [ + "cfg-if", +] + +[[package]] +name = "tracing" +version = "0.1.41" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "784e0ac535deb450455cbfa28a6f0df145ea1bb7ae51b821cf5e7927fdcfbdd0" +dependencies = [ + "pin-project-lite", + "tracing-core", +] + +[[package]] +name = "tracing-core" +version = "0.1.34" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b9d12581f227e93f094d3af2ae690a574abb8a2b9b7a96e7cfe9647b2b617678" +dependencies = [ + "once_cell", + "valuable", +] + +[[package]] +name = "tracing-log" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ee855f1f400bd0e5c02d150ae5de3840039a3f54b025156404e34c23c03f47c3" +dependencies = [ + "log", + "once_cell", + "tracing-core", +] + +[[package]] +name = "tracing-subscriber" +version = "0.3.20" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "2054a14f5307d601f88daf0553e1cbf472acc4f2c51afab632431cdcd72124d5" +dependencies = [ + "matchers", + "nu-ansi-term", + "once_cell", + "regex-automata", + "sharded-slab", + "smallvec", + "thread_local", + "tracing", + "tracing-core", + "tracing-log", ] [[package]] name = "unicode-ident" -version = "1.0.16" +version = "1.0.18" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a210d160f08b701c8721ba1c726c11662f877ea6b7094007e1ca9a1041945034" +checksum = "5a5f39404a5da50712a4c1eecf25e90dd62b613502b7e925fd4e4d19b5c96512" [[package]] name = "unicode-width" @@ -829,6 +1056,12 @@ version = "0.1.14" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "7dd6e30e90baa6f72411720665d41d89b9a3d039dc45b8faea1ddd07f617f6af" +[[package]] +name = "valuable" +version = "0.1.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ba73ea9cf16a25df0c8caa16c51acb937d5712a8429db78a3ee29d5dcacd3a65" + [[package]] name = "vcell" version = "0.1.3" @@ -851,21 +1084,205 @@ dependencies = [ ] [[package]] -name = "zerocopy" -version = "0.8.14" +name = "windows" +version = "0.61.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a367f292d93d4eab890745e75a778da40909cab4d6ff8173693812f79c4a2468" +checksum = "9babd3a767a4c1aef6900409f85f5d53ce2544ccdfaa86dad48c91782c6d6893" +dependencies = [ + "windows-collections", + "windows-core", + "windows-future", + "windows-link", + "windows-numerics", +] + +[[package]] +name = "windows-collections" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "3beeceb5e5cfd9eb1d76b381630e82c4241ccd0d27f1a39ed41b2760b255c5e8" +dependencies = [ + "windows-core", +] + +[[package]] +name = "windows-core" +version = "0.61.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "c0fdd3ddb90610c7638aa2b3a3ab2904fb9e5cdbecc643ddb3647212781c4ae3" +dependencies = [ + "windows-implement", + "windows-interface", + "windows-link", + "windows-result", + "windows-strings", +] + +[[package]] +name = "windows-future" +version = "0.2.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "fc6a41e98427b19fe4b73c550f060b59fa592d7d686537eebf9385621bfbad8e" +dependencies = [ + "windows-core", + "windows-link", + "windows-threading", +] + +[[package]] +name = "windows-implement" +version = "0.60.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a47fddd13af08290e67f4acabf4b459f647552718f683a7b415d290ac744a836" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.106", +] + +[[package]] +name = "windows-interface" +version = "0.59.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "bd9211b69f8dcdfa817bfd14bf1c97c9188afa36f4750130fcdf3f400eca9fa8" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.106", +] + +[[package]] +name = "windows-link" +version = "0.1.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "5e6ad25900d524eaabdbbb96d20b4311e1e7ae1699af4fb28c17ae66c80d798a" + +[[package]] +name = "windows-numerics" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "9150af68066c4c5c07ddc0ce30421554771e528bde427614c61038bc2c92c2b1" +dependencies = [ + "windows-core", + "windows-link", +] + +[[package]] +name = "windows-result" +version = "0.3.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "56f42bd332cc6c8eac5af113fc0c1fd6a8fd2aa08a0119358686e5160d0586c6" +dependencies = [ + "windows-link", +] + +[[package]] +name = "windows-strings" +version = "0.4.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "56e6c93f3a0c3b36176cb1327a4958a0353d5d166c2a35cb268ace15e91d3b57" +dependencies = [ + "windows-link", +] + +[[package]] +name = "windows-sys" +version = "0.52.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "282be5f36a8ce781fad8c8ae18fa3f9beff57ec1b52cb3de0789201425d9a33d" +dependencies = [ + "windows-targets", +] + +[[package]] +name = "windows-targets" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "9b724f72796e036ab90c1021d4780d4d3d648aca59e491e6b98e725b84e99973" +dependencies = [ + "windows_aarch64_gnullvm", + "windows_aarch64_msvc", + "windows_i686_gnu", + "windows_i686_gnullvm", + "windows_i686_msvc", + "windows_x86_64_gnu", + "windows_x86_64_gnullvm", + "windows_x86_64_msvc", +] + +[[package]] +name = "windows-threading" +version = "0.1.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b66463ad2e0ea3bbf808b7f1d371311c80e115c0b71d60efc142cafbcfb057a6" +dependencies = [ + "windows-link", +] + +[[package]] +name = "windows_aarch64_gnullvm" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "32a4622180e7a0ec044bb555404c800bc9fd9ec262ec147edd5989ccd0c02cd3" + +[[package]] +name = "windows_aarch64_msvc" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "09ec2a7bb152e2252b53fa7803150007879548bc709c039df7627cabbd05d469" + +[[package]] +name = "windows_i686_gnu" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8e9b5ad5ab802e97eb8e295ac6720e509ee4c243f69d781394014ebfe8bbfa0b" + +[[package]] +name = "windows_i686_gnullvm" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0eee52d38c090b3caa76c563b86c3a4bd71ef1a819287c19d586d7334ae8ed66" + +[[package]] +name = "windows_i686_msvc" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "240948bc05c5e7c6dabba28bf89d89ffce3e303022809e73deaefe4f6ec56c66" + +[[package]] +name = "windows_x86_64_gnu" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "147a5c80aabfbf0c7d901cb5895d1de30ef2907eb21fbbab29ca94c5b08b1a78" + +[[package]] +name = "windows_x86_64_gnullvm" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "24d5b23dc417412679681396f2b49f3de8c1473deb516bd34410872eff51ed0d" + +[[package]] +name = "windows_x86_64_msvc" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "589f6da84c646204747d1270a2a5661ea66ed1cced2631d546fdfb155959f9ec" + +[[package]] +name = "zerocopy" +version = "0.8.26" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1039dd0d3c310cf05de012d8a39ff557cb0d23087fd44cad61df08fc31907a2f" dependencies = [ "zerocopy-derive", ] [[package]] name = "zerocopy-derive" -version = "0.8.14" +version = "0.8.26" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d3931cb58c62c13adec22e38686b559c86a30565e16ad6e8510a337cedc611e1" +checksum = "9ecf5b4cc5364572d7f4c329661bcc82724222973f2cab6f050a4e5c22f75181" dependencies = [ "proc-macro2", "quote", - "syn 2.0.96", + "syn 2.0.106", ] diff --git a/embedded-examples/stm32h7-nucleo-rtic/Cargo.toml b/embedded-examples/stm32h7-nucleo-rtic/Cargo.toml index 62e87b8..5eb08b8 100644 --- a/embedded-examples/stm32h7-nucleo-rtic/Cargo.toml +++ b/embedded-examples/stm32h7-nucleo-rtic/Cargo.toml @@ -16,16 +16,17 @@ harness = false [dependencies] cortex-m = { version = "0.7", features = ["critical-section-single-core"] } cortex-m-rt = "0.7" -defmt = "0.3" +defmt = "1" defmt-brtt = { version = "0.1", default-features = false, features = ["rtt"] } -panic-probe = { version = "0.3", features = ["print-defmt"] } +panic-probe = { version = "1", features = ["print-defmt"] } cortex-m-semihosting = "0.5.0" +# TODO: Replace with embassy-hal. stm32h7xx-hal = { version="0.16", features= ["stm32h743v", "ethernet"] } embedded-alloc = "0.6" rtic-sync = { version = "1", features = ["defmt-03"] } [dependencies.smoltcp] -version = "0.11" +version = "0.12" default-features = false features = ["medium-ethernet", "proto-ipv4", "socket-raw", "socket-dhcpv4", "socket-udp", "defmt"] @@ -39,12 +40,12 @@ features = ["cortex-m-systick"] [dependencies.satrs] path = "../../satrs" -version = "0.2" +# version = "0.2" default-features = false features = ["defmt", "heapless"] [dev-dependencies] -defmt-test = "0.3" +defmt-test = "0.4" # cargo build/run [profile.dev] diff --git a/satrs/src/pus/verification.rs b/satrs/src/pus/verification.rs index 247317d..ae9eae7 100644 --- a/satrs/src/pus/verification.rs +++ b/satrs/src/pus/verification.rs @@ -507,9 +507,7 @@ impl VerificationReportCreator { self.dest_id = dest_id; } - /// Initialize verification handling by passing a TC reference. This returns a token required - /// to call the acceptance functions - pub fn read_request_id_from_tc(pus_tc: &(impl CcsdsPacket + IsPusTelecommand)) -> RequestId { + pub fn read_request_id(&self, pus_tc: &(impl CcsdsPacket + IsPusTelecommand)) -> RequestId { RequestId::new(pus_tc) } @@ -897,7 +895,7 @@ pub mod alloc_mod { > { owner_id: ComponentId, source_data_buf: RefCell>, - pub reporter_creator: VerificationReportCreator, + pub report_creator: VerificationReportCreator, pub tm_hook: VerificationHookInstance, } @@ -913,7 +911,7 @@ pub mod alloc_mod { + cfg.fail_code_field_width + cfg.max_fail_data_len ]), - reporter_creator: reporter, + report_creator: reporter, tm_hook: DummyVerificationHook::default(), } } @@ -937,7 +935,7 @@ pub mod alloc_mod { + cfg.fail_code_field_width + cfg.max_fail_data_len ]), - reporter_creator: reporter, + report_creator: reporter, tm_hook, } } @@ -946,9 +944,7 @@ pub mod alloc_mod { &self, pus_tc: &(impl CcsdsPacket + IsPusTelecommand), ) -> VerificationToken { - VerificationToken::::new( - VerificationReportCreator::read_request_id_from_tc(pus_tc), - ) + VerificationToken::::new(self.report_creator.read_request_id(pus_tc)) } pub fn start_verification_with_req_id( @@ -976,7 +972,7 @@ pub mod alloc_mod { for VerificationReporter { delegate!( - to self.reporter_creator { + to self.report_creator { fn set_apid(&mut self, apid: Apid); fn apid(&self) -> Apid; } @@ -1002,7 +998,7 @@ pub mod alloc_mod { ) -> Result, EcssTmtcError> { let mut source_data_buf = self.source_data_buf.borrow_mut(); let mut tm_creator = self - .reporter_creator + .report_creator .acceptance_success( source_data_buf.as_mut_slice(), &token.request_id(), @@ -1102,7 +1098,7 @@ pub mod alloc_mod { ) -> Result<(), EcssTmtcError> { let mut buf = self.source_data_buf.borrow_mut(); let mut tm_creator = self - .reporter_creator + .report_creator .step_success( buf.as_mut_slice(), &token.request_id(),