diff --git a/satrs-example-stm32f3-disco/Cargo.lock b/satrs-example-stm32f3-disco/Cargo.lock index b9f9644..74078a3 100644 --- a/satrs-example-stm32f3-disco/Cargo.lock +++ b/satrs-example-stm32f3-disco/Cargo.lock @@ -53,17 +53,6 @@ version = "1.3.2" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "bef38d45163c2f1dde094a7dfd33ccf595c92905c8f8f4fdc18d06fb1037718a" -[[package]] -name = "bxcan" -version = "0.6.2" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4b13b4b2ea9ab2ba924063ebb86ad895cb79f4a79bf90f27949eb20c335b30f9" -dependencies = [ - "bitflags", - "nb 1.1.0", - "vcell", -] - [[package]] name = "bxcan" version = "0.7.0" @@ -677,7 +666,7 @@ dependencies = [ "panic-itm", "satrs", "stm32f3-discovery", - "stm32f3xx-hal 0.11.0-alpha.0", + "stm32f3xx-hal", "systick-monotonic", ] @@ -769,18 +758,6 @@ dependencies = [ "vcell", ] -[[package]] -name = "stm32f3" -version = "0.14.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "265cda62ac13307414de4aca58dbbbd8038ddba85cffbb335823aa216f2e3200" -dependencies = [ - "bare-metal 1.0.0", - "cortex-m", - "cortex-m-rt", - "vcell", -] - [[package]] name = "stm32f3" version = "0.15.1" @@ -796,45 +773,22 @@ dependencies = [ [[package]] name = "stm32f3-discovery" version = "0.8.0-alpha.0" -source = "git+https://github.com/robamu/stm32f3-discovery?branch=all_features#7b1d21b0463331ada405ceed876c93e82b987a9f" +source = "git+https://github.com/robamu/stm32f3-discovery?branch=complete-dma-update-hal#5ccacae07ceff02d7d3649df67a6a0ba2a144752" dependencies = [ "accelerometer", "cortex-m", "cortex-m-rt", "lsm303dlhc", - "stm32f3xx-hal 0.10.0-alpha.0", + "stm32f3xx-hal", "switch-hal", ] -[[package]] -name = "stm32f3xx-hal" -version = "0.10.0-alpha.0" -source = "git+https://github.com/robamu/stm32f3xx-hal?branch=all_features#c9b3a4fcaaf48f8264475de2b34387597211478e" -dependencies = [ - "bare-metal 1.0.0", - "bxcan 0.6.2", - "cfg-if", - "cortex-m", - "cortex-m-rt", - "embedded-dma", - "embedded-hal", - "embedded-time", - "enumset", - "nb 1.1.0", - "paste", - "rtcc", - "slice-group-by", - "stm32-usbd", - "stm32f3 0.14.0", - "void", -] - [[package]] name = "stm32f3xx-hal" version = "0.11.0-alpha.0" -source = "git+https://github.com/robamu/stm32f3xx-hal?branch=update-test#ffe912dddebb9c50c1871de35b993bb5b8cacccf" +source = "git+https://github.com/robamu/stm32f3xx-hal?branch=complete-dma-update#f3c3b81b91ecd9498eb133f2cda0b061ce9c9d98" dependencies = [ - "bxcan 0.7.0", + "bxcan", "cfg-if", "cortex-m", "cortex-m-rt", @@ -849,7 +803,7 @@ dependencies = [ "rtcc", "slice-group-by", "stm32-usbd", - "stm32f3 0.15.1", + "stm32f3", "void", ] diff --git a/satrs-example-stm32f3-disco/Cargo.toml b/satrs-example-stm32f3-disco/Cargo.toml index 63c4c3e..f2fd758 100644 --- a/satrs-example-stm32f3-disco/Cargo.toml +++ b/satrs-example-stm32f3-disco/Cargo.toml @@ -31,14 +31,14 @@ version = "0.1.3-alpha.0" git = "https://github.com/robamu/stm32f3xx-hal" version = "0.11.0-alpha.0" features = ["stm32f303xc", "rt", "enumset"] -branch = "all_features" +branch = "complete-dma-update" # Can be used in workspace to develop and update HAL # path = "../stm32f3xx-hal" [dependencies.stm32f3-discovery] git = "https://github.com/robamu/stm32f3-discovery" version = "0.8.0-alpha.0" -branch = "all_features" +branch = "complete-dma-update-hal" # Can be used in workspace to develop and update BSP # path = "../stm32f3-discovery" diff --git a/satrs-example-stm32f3-disco/src/main.rs b/satrs-example-stm32f3-disco/src/main.rs index ab02b2a..3d0c671 100644 --- a/satrs-example-stm32f3-disco/src/main.rs +++ b/satrs-example-stm32f3-disco/src/main.rs @@ -166,7 +166,7 @@ mod app { use stm32f3_discovery::leds::Direction; use stm32f3_discovery::leds::Leds; use stm32f3xx_hal::prelude::*; - use stm32f3xx_hal::Toggle; + use stm32f3xx_hal::Switch; use stm32f3_discovery::switch_hal::OutputSwitch; #[allow(dead_code)] @@ -246,9 +246,9 @@ mod app { clocks, &mut rcc.apb1, ); - usart2.configure_rx_interrupt(RxEvent::Idle, Toggle::On); + usart2.configure_rx_interrupt(RxEvent::Idle, Switch::On); // This interrupt is enabled to re-schedule new transfers in the interrupt handler immediately. - usart2.configure_tx_interrupt(TxEvent::TransmissionComplete, Toggle::On); + usart2.configure_tx_interrupt(TxEvent::TransmissionComplete, Switch::On); let dma1 = cx.device.DMA1.split(&mut rcc.ahb); let (tx_serial, mut rx_serial) = usart2.split(); @@ -309,26 +309,30 @@ mod app { if let Some(vec) = TM_REQUESTS.dequeue() { cx.shared.tx_transfer.lock(|tx_state| match tx_state { UartTxState::Idle(tx) => { + let encoded_len; //debug!(target: "serial_tx_handler", "bytes: {:x?}", &buf[0..len]); // Safety: We only copy the data into the TX DMA buffer in this task. // If the DMA is active, another branch will be taken. - let mut_tx_dma_buf = unsafe { &mut DMA_TX_BUF }; - // 0 sentinel value as start marker - mut_tx_dma_buf[0] = 0; - // Should never panic, we accounted for the overhead. - // Write into transfer buffer directly, no need for intermediate - // encoding buffer. - let encoded_len = cobs::encode(&vec[0..vec.len()], &mut mut_tx_dma_buf[1..]); - // 0 end marker - mut_tx_dma_buf[encoded_len + 1] = 0; + unsafe { + // 0 sentinel value as start marker + DMA_TX_BUF[0] = 0; + encoded_len = cobs::encode(&vec[0..vec.len()], &mut DMA_TX_BUF[1..]); + // Should never panic, we accounted for the overhead. + // Write into transfer buffer directly, no need for intermediate + // encoding buffer. + // 0 end marker + DMA_TX_BUF[encoded_len + 1] = 0; + } //debug!(target: "serial_tx_handler", "Sending {} bytes", encoded_len + 2); //debug!("sent: {:x?}", &mut_tx_dma_buf[0..encoded_len + 2]); let tx_idle = tx.take().unwrap(); // Transfer completion and re-scheduling of new TX transfers will be done // by the IRQ handler. - let transfer = tx_idle - .tx - .write_all(&mut_tx_dma_buf[0..encoded_len + 2], tx_idle.dma_channel); + // SAFETY: The DMA is the exclusive writer to the DMA buffer now. + let transfer = tx_idle.tx.write_all( + unsafe { &DMA_TX_BUF[0..encoded_len + 2] }, + tx_idle.dma_channel, + ); *tx_state = UartTxState::Transmitting(Some(transfer)); // The memory block is automatically returned to the pool when it is dropped. } @@ -484,7 +488,8 @@ mod app { let sec_header = PusTmSecondaryHeader::new_simple(17, 2, stamp_buf); let ping_reply = PusTmCreator::new(&mut sp_header, sec_header, &[], true); let mut tm_packet = TmPacket::new(); - tm_packet.resize(ping_reply.len_written(), 0) + tm_packet + .resize(ping_reply.len_written(), 0) .expect("vec resize failed"); ping_reply.write_to_bytes(&mut tm_packet).unwrap(); if TM_REQUESTS.enqueue(tm_packet).is_err() {