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Example: vscode.csharp + + // List of extensions which should be recommended for users of this workspace. + "recommendations": [ + "rust-lang.rust", + "marus25.cortex-debug", + ], + // List of extensions recommended by VS Code that should not be recommended for users of this workspace. + "unwantedRecommendations": [] +} \ No newline at end of file diff --git a/satrs-example-stm32f3-disco/.vscode/launch.json b/satrs-example-stm32f3-disco/.vscode/launch.json new file mode 100644 index 0000000..f9e65f2 --- /dev/null +++ b/satrs-example-stm32f3-disco/.vscode/launch.json @@ -0,0 +1,66 @@ +{ + /* + * Requires the Rust Language Server (RLS) and Cortex-Debug extensions + * https://marketplace.visualstudio.com/items?itemName=rust-lang.rust + * https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug + */ + "version": "0.2.0", + "configurations": [ + { + /* Launches debug session for currently open example */ + "type": "cortex-debug", + "request": "launch", + "name": "Debug", + "servertype": "openocd", + "cwd": "${workspaceRoot}", + "preLaunchTask": "cargo build", + "runToEntryPoint": "true", + "executable": "./target/thumbv7em-none-eabihf/debug/satrs-example-stm32f3-disco", + "preLaunchCommands": ["break rust_begin_unwind"], + "device": "STM32F303VCT6", + "configFiles": [ + "${workspaceRoot}/.vscode/openocd-helpers.tcl", + "interface/stlink.cfg", + "target/stm32f3x.cfg" + ], + "svdFile": "${env:HOME}/.svd/STM32F303.svd", + "swoConfig": { + "enabled": true, + "cpuFrequency": 8000000, + "swoFrequency": 2000000, + "source": "probe", + "decoders": [ + { "type": "console", "label": "ITM", "port": 0 } + ] + } + }, + { + /* Launches debug session for currently open example */ + "type": "cortex-debug", + "request": "launch", + "name": "Release", + "servertype": "openocd", + "cwd": "${workspaceRoot}", + "preLaunchTask": "cargo build", + "runToEntryPoint": "true", + "executable": "./target/thumbv7em-none-eabihf/release/satrs-example-stm32f3-disco", + "preLaunchCommands": ["break rust_begin_unwind"], + "device": "STM32F303VCT6", + "configFiles": [ + "${workspaceRoot}/.vscode/openocd-helpers.tcl", + "interface/stlink.cfg", + "target/stm32f3x.cfg" + ], + "svdFile": "${env:HOME}/.svd/STM32F303.svd", + "swoConfig": { + "enabled": true, + "cpuFrequency": 8000000, + "swoFrequency": 2000000, + "source": "probe", + "decoders": [ + { "type": "console", "label": "ITM", "port": 0 } + ] + } + } + ] +} \ No newline at end of file diff --git a/satrs-example-stm32f3-disco/.vscode/openocd-helpers.tcl b/satrs-example-stm32f3-disco/.vscode/openocd-helpers.tcl new file mode 100644 index 0000000..4da6f7e --- /dev/null +++ b/satrs-example-stm32f3-disco/.vscode/openocd-helpers.tcl @@ -0,0 +1,17 @@ +# +# Cortex-Debug extension calls this function during initialization. You can copy this +# file, modify it and specifyy it as one of the config files supplied in launch.json +# preferably at the beginning. +# +# Note that this file simply defines a function for use later when it is time to configure +# for SWO. +# +set USE_SWO 0 +proc CDSWOConfigure { CDCPUFreqHz CDSWOFreqHz CDSWOOutput } { + # Alternative option: Pipe ITM output into itm.txt file + # tpiu config internal itm.txt uart off $CDCPUFreqHz + + # Default option so SWO display of VS code works. + tpiu config internal $CDSWOOutput uart off $CDCPUFreqHz $CDSWOFreqHz + itm port 0 on +} diff --git a/satrs-example-stm32f3-disco/.vscode/settings_default.json b/satrs-example-stm32f3-disco/.vscode/settings_default.json new file mode 100644 index 0000000..e78c4ec --- /dev/null +++ b/satrs-example-stm32f3-disco/.vscode/settings_default.json @@ -0,0 +1,3 @@ +{ + "cortex-debug.gdbPath.linux": "gdb-multiarch" +} diff --git a/satrs-example-stm32f3-disco/.vscode/tasks.json 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= "https://github.com/robamu/stm32f3xx-hal" +version = "0.10.0-alpha.0" +features = ["stm32f303xc", "rt", "enumset"] +branch = "all_features" +# Can be used in workspace to develop and update HAL +# path = "../stm32f3xx-hal" + +[dependencies.stm32f3-discovery] +git = "https://github.com/robamu/stm32f3-discovery" +version = "0.8.0-alpha.0" +branch = "all_features" +# Can be used in workspace to develop and update BSP +# path = "../stm32f3-discovery" + +[dependencies.satrs-core] +git = "https://egit.irs.uni-stuttgart.de/rust/satrs-core.git" +version = "0.1.0-alpha.0" +default-features = false + +# this lets you use `cargo fix`! +# [[bin]] +# name = "stm32f3-blinky" +# test = false +# bench = false + +[profile.release] +codegen-units = 1 # better optimizations +debug = true # symbols are nice and they don't increase the size on Flash +lto = true # better optimizations diff --git a/satrs-example-stm32f3-disco/README.md b/satrs-example-stm32f3-disco/README.md new file mode 100644 index 0000000..9e98f05 --- /dev/null +++ b/satrs-example-stm32f3-disco/README.md @@ -0,0 +1,75 @@ +sat-rs example for the STM32F3-Discovery board +======= + +This example application shows how the [sat-rs framework](https://egit.irs.uni-stuttgart.de/rust/satrs-launchpad) +can be used on an embedded target. It also shows how a relatively simple OBSW could be built when no +standard runtime is available. It uses [RTIC](https://rtic.rs/1/book/en/) as the concurrency +framework. + +The STM32F3-Discovery device was picked because it is a cheap Cortex-M4 based device which is also +used by the [Rust Embedded Book](https://docs.rust-embedded.org/book/intro/hardware.html) and the +[Rust Discovery](https://docs.rust-embedded.org/discovery/f3discovery/) book as an introduction +to embedded Rust. + +## Preparing Rust and the repository + +Building an application requires the `thumbv7em-none-eabihf` cross-compiler toolchain. +If you have not installed it yet, you can do so with + +```sh +rustup target add thumbv7em-none-eabihf +``` + +A default `.cargo` config file is provided for this project, but needs to be copied to have +the correct name. This is so that the config file can be updated or edited for custom needs +without being tracked by git. + +```sh +cp def_config.toml config.toml +``` + +The configuration file will also set the target so it does not always have to be specified with +the `--target` argument. + +## Building + +After that, assuming that you have a `.cargo/config.toml` setting the correct build target, +you can simply build the application with + +```sh +cargo build +``` + +## Flashing and Debugging from the command line + +TODO + +## Debugging with VS Code + +The STM32F3-Discovery comes with an on-board ST-Link so all that is required to flash and debug +the board is a Mini-USB cable. The code in this repository was debugged using `openocd` +and the VS Code [`Cortex-Debug` plugin](https://marketplace.visualstudio.com/items?itemName=marus25.cortex-debug). + +Some sample configuration files for VS Code were provided as well. You can simply use `Run` and `Debug` +to automatically rebuild and flash your application. + +The `tasks.json` and `launch.json` files are generic and you can use them immediately by opening +the folder in VS code or adding it to a workspace. + +If you would like to use a custom GDB application, you can specify the gdb binary in the following +configuration variables in your `settings.json`: + +- `"cortex-debug.gdbPath"` +- `"cortex-debug.gdbPath.linux"` +- `"cortex-debug.gdbPath.windows"` +- `"cortex-debug.gdbPath.osx"` + +## Commanding with Python + +When the SW is running on the Discovery board, you can command the MCU via a serial interface, +using COBS encoded CCSDS packets. + +TODO: + - How and where to connect serial interface on the MCU + - How to set up Python venv (or at least strongly recommend it) and install deps + - How to copy `def_tmtc_conf.json` to `tmtc_conf.json` and adapt it for custom serial port diff --git a/satrs-example-stm32f3-disco/build.rs b/satrs-example-stm32f3-disco/build.rs new file mode 100644 index 0000000..98f603e --- /dev/null +++ b/satrs-example-stm32f3-disco/build.rs @@ -0,0 +1,18 @@ +use std::env; +use std::fs::File; +use std::io::Write; +use std::path::PathBuf; + +fn main() { + // Put the linker script somewhere the linker can find it + let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap()); + File::create(out.join("memory.x")) + .unwrap() + .write_all(include_bytes!("memory.x")) + .unwrap(); + println!("cargo:rustc-link-search={}", out.display()); + + // Only re-run the build script when memory.x is changed, + // instead of when any part of the source code changes. + println!("cargo:rerun-if-changed=memory.x"); +} diff --git a/satrs-example-stm32f3-disco/jlink.gdb b/satrs-example-stm32f3-disco/jlink.gdb new file mode 100644 index 0000000..8eeed7c --- /dev/null +++ b/satrs-example-stm32f3-disco/jlink.gdb @@ -0,0 +1,10 @@ +target extended-remote localhost:2331 + +monitor reset + +# *try* to stop at the user entry point (it might be gone due to inlining) +break main + +load + +continue diff --git a/satrs-example-stm32f3-disco/memory.x b/satrs-example-stm32f3-disco/memory.x new file mode 100644 index 0000000..a3a5787 --- /dev/null +++ b/satrs-example-stm32f3-disco/memory.x @@ -0,0 +1,33 @@ +/* Linker script for the STM32F303VCT6 */ +MEMORY +{ + /* NOTE 1 K = 1 KiBi = 1024 bytes */ + FLASH : ORIGIN = 0x08000000, LENGTH = 256K + RAM : ORIGIN = 0x20000000, LENGTH = 40K +} + +/* This is where the call stack will be allocated. */ +/* The stack is of the full descending type. */ +/* You may want to use this variable to locate the call stack and static + variables in different memory regions. Below is shown the default value */ +/* _stack_start = ORIGIN(RAM) + LENGTH(RAM); */ + +/* You can use this symbol to customize the location of the .text section */ +/* If omitted the .text section will be placed right after the .vector_table + section */ +/* This is required only on microcontrollers that store some configuration right + after the vector table */ +/* _stext = ORIGIN(FLASH) + 0x400; */ + +/* Example of putting non-initialized variables into custom RAM locations. */ +/* This assumes you have defined a region RAM2 above, and in the Rust + sources added the attribute `#[link_section = ".ram2bss"]` to the data + you want to place there. */ +/* Note that the section will not be zero-initialized by the runtime! */ +/* SECTIONS { + .ram2bss (NOLOAD) : ALIGN(4) { + *(.ram2bss); + . = ALIGN(4); + } > RAM2 + } INSERT AFTER .bss; +*/ diff --git a/satrs-example-stm32f3-disco/openocd.cfg b/satrs-example-stm32f3-disco/openocd.cfg new file mode 100644 index 0000000..466c033 --- /dev/null +++ b/satrs-example-stm32f3-disco/openocd.cfg @@ -0,0 +1,12 @@ +# Sample OpenOCD configuration for the STM32F3DISCOVERY development board + +# Depending on the hardware revision you got you'll have to pick ONE of these +# interfaces. At any time only one interface should be commented out. + +# Revision C (newer revision) +source [find interface/stlink.cfg] + +# Revision A and B (older revisions) +# source [find interface/stlink-v2.cfg] + +source [find target/stm32f3x.cfg] diff --git a/satrs-example-stm32f3-disco/openocd.gdb b/satrs-example-stm32f3-disco/openocd.gdb new file mode 100644 index 0000000..0ba0c09 --- /dev/null +++ b/satrs-example-stm32f3-disco/openocd.gdb @@ -0,0 +1,40 @@ +target extended-remote :3333 + +# print demangled symbols +set print asm-demangle on + +# set backtrace limit to not have infinite backtrace loops +set backtrace limit 32 + +# detect unhandled exceptions, hard faults and panics +break DefaultHandler +break HardFault +break rust_begin_unwind +# # run the next few lines so the panic message is printed immediately +# # the number needs to be adjusted for your panic handler +# commands $bpnum +# next 4 +# end + +# *try* to stop at the user entry point (it might be gone due to inlining) +break main + +# monitor arm semihosting enable + +# # send captured ITM to the file itm.fifo +# # (the microcontroller SWO pin must be connected to the programmer SWO pin) +# # 8000000 must match the core clock frequency +monitor tpiu config internal itm.txt uart off 8000000 + +# # OR: make the microcontroller SWO pin output compatible with UART (8N1) +# # 8000000 must match the core clock frequency +# # 2000000 is the frequency of the SWO pin +# monitor tpiu config external uart off 8000000 2000000 + +# # enable ITM port 0 +monitor itm port 0 on + +load + +# start the process but immediately halt the processor +stepi diff --git a/satrs-example-stm32f3-disco/pyclient/.gitignore b/satrs-example-stm32f3-disco/pyclient/.gitignore new file mode 100644 index 0000000..a0c9366 --- /dev/null +++ b/satrs-example-stm32f3-disco/pyclient/.gitignore @@ -0,0 +1,7 @@ +/venv +/log +/.idea/* +!/.idea/runConfigurations + +/seqcnt.txt +/tmtc_conf.json diff --git a/satrs-example-stm32f3-disco/pyclient/def_tmtc_conf.json b/satrs-example-stm32f3-disco/pyclient/def_tmtc_conf.json new file mode 100644 index 0000000..5665681 --- /dev/null +++ b/satrs-example-stm32f3-disco/pyclient/def_tmtc_conf.json @@ -0,0 +1,4 @@ +{ + "com_if": "serial_cobs", + "serial_baudrate": 115200 +} \ No newline at end of file diff --git a/satrs-example-stm32f3-disco/pyclient/main.py b/satrs-example-stm32f3-disco/pyclient/main.py new file mode 100644 index 0000000..a5fa9cd --- /dev/null +++ b/satrs-example-stm32f3-disco/pyclient/main.py @@ -0,0 +1,307 @@ +#!/usr/bin/env python3 +"""Example client for the sat-rs example application""" +import enum +import struct +import sys +import time +from typing import Optional, cast + +import tmtccmd +from spacepackets.ecss import PusTelemetry, PusTelecommand, PusVerificator +from spacepackets.ecss.pus_17_test import Service17Tm +from spacepackets.ecss.pus_1_verification import UnpackParams, Service1Tm + +from tmtccmd import CcsdsTmtcBackend, TcHandlerBase, ProcedureParamsWrapper +from tmtccmd.core.base import BackendRequest +from tmtccmd.pus import VerificationWrapper +from tmtccmd.tm import CcsdsTmHandler, SpecificApidHandlerBase +from tmtccmd.com_if import ComInterface +from tmtccmd.config import ( + default_json_path, + SetupParams, + TmTcCfgHookBase, + TmtcDefinitionWrapper, + CoreServiceList, + OpCodeEntry, + params_to_procedure_conversion, +) +from tmtccmd.config.com_if import SerialCfgWrapper +from tmtccmd.config import PreArgsParsingWrapper, SetupWrapper +from tmtccmd.logging import get_console_logger +from tmtccmd.logging.pus import ( + RegularTmtcLogWrapper, + RawTmtcTimedLogWrapper, + TimedLogWhen, +) +from tmtccmd.tc import ( + TcQueueEntryType, + ProcedureWrapper, + TcProcedureType, + FeedWrapper, + SendCbParams, + DefaultPusQueueHelper, +) +from tmtccmd.tm.pus_5_event import Service5Tm +from tmtccmd.util import FileSeqCountProvider, PusFileSeqCountProvider +from tmtccmd.util.obj_id import ObjectIdDictT + +from tmtccmd.util.tmtc_printer import FsfwTmTcPrinter + +LOGGER = get_console_logger() + +EXAMPLE_PUS_APID = 0x02 + + +class SatRsConfigHook(TmTcCfgHookBase): + def __init__(self, json_cfg_path: str): + super().__init__(json_cfg_path=json_cfg_path) + + def assign_communication_interface(self, com_if_key: str) -> Optional[ComInterface]: + from tmtccmd.config.com_if import ( + create_com_interface_default, + create_com_interface_cfg_default, + ) + + cfg = create_com_interface_cfg_default( + com_if_key=com_if_key, + json_cfg_path=self.cfg_path, + space_packet_ids=None, + ) + if cfg is None: + raise ValueError( + f"No valid configuration could be retrieved for the COM IF with key {com_if_key}" + ) + if cfg.com_if_key == "serial_cobs": + cfg = cast(SerialCfgWrapper, cfg) + cfg.serial_cfg.serial_timeout = 0.5 + return create_com_interface_default(cfg) + + def get_tmtc_definitions(self) -> TmtcDefinitionWrapper: + from tmtccmd.config.globals import get_default_tmtc_defs + + defs = get_default_tmtc_defs() + srv_5 = OpCodeEntry() + srv_5.add("0", "Event Test") + defs.add_service( + name=CoreServiceList.SERVICE_5.value, + info="PUS Service 5 Event", + op_code_entry=srv_5, + ) + srv_17 = OpCodeEntry() + srv_17.add("0", "Ping Test") + defs.add_service( + name=CoreServiceList.SERVICE_17_ALT, + info="PUS Service 17 Test", + op_code_entry=srv_17, + ) + srv_3 = OpCodeEntry() + defs.add_service( + name=CoreServiceList.SERVICE_3, + info="PUS Service 3 Housekeeping", + op_code_entry=srv_3, + ) + return defs + + def perform_mode_operation(self, tmtc_backend: CcsdsTmtcBackend, mode: int): + LOGGER.info("Mode operation hook was called") + pass + + def get_object_ids(self) -> ObjectIdDictT: + from tmtccmd.config.objects import get_core_object_ids + + return get_core_object_ids() + + +class PusHandler(SpecificApidHandlerBase): + def __init__( + self, + verif_wrapper: VerificationWrapper, + printer: FsfwTmTcPrinter, + raw_logger: RawTmtcTimedLogWrapper, + ): + super().__init__(EXAMPLE_PUS_APID, None) + self.printer = printer + self.raw_logger = raw_logger + self.verif_wrapper = verif_wrapper + + def handle_tm(self, packet: bytes, _user_args: any): + try: + tm_packet = PusTelemetry.unpack(packet) + except ValueError as e: + LOGGER.warning("Could not generate PUS TM object from raw data") + LOGGER.warning(f"Raw Packet: [{packet.hex(sep=',')}], REPR: {packet!r}") + raise e + service = tm_packet.service + dedicated_handler = False + if service == 1: + tm_packet = Service1Tm.unpack(data=packet, params=UnpackParams(1, 2)) + res = self.verif_wrapper.add_tm(tm_packet) + if res is None: + LOGGER.info( + f"Received Verification TM[{tm_packet.service}, {tm_packet.subservice}] " + f"with Request ID {tm_packet.tc_req_id.as_u32():#08x}" + ) + LOGGER.warning( + f"No matching telecommand found for {tm_packet.tc_req_id}" + ) + else: + self.verif_wrapper.log_to_console(tm_packet, res) + self.verif_wrapper.log_to_file(tm_packet, res) + dedicated_handler = True + if service == 3: + LOGGER.info("No handling for HK packets implemented") + LOGGER.info(f"Raw packet: 0x[{packet.hex(sep=',')}]") + pus_tm = PusTelemetry.unpack(packet) + if pus_tm.subservice == 25: + if len(pus_tm.source_data) < 8: + raise ValueError("No addressable ID in HK packet") + json_str = pus_tm.source_data[8:] + dedicated_handler = True + if service == 5: + tm_packet = Service5Tm.unpack(packet) + if service == 17: + tm_packet = Service17Tm.unpack(packet) + dedicated_handler = True + if tm_packet.subservice == 2: + self.printer.file_logger.info("Received Ping Reply TM[17,2]") + LOGGER.info("Received Ping Reply TM[17,2]") + else: + self.printer.file_logger.info( + f"Received Test Packet with unknown subservice {tm_packet.subservice}" + ) + LOGGER.info( + f"Received Test Packet with unknown subservice {tm_packet.subservice}" + ) + if tm_packet is None: + LOGGER.info( + f"The service {service} is not implemented in Telemetry Factory" + ) + tm_packet = PusTelemetry.unpack(packet) + self.raw_logger.log_tm(tm_packet) + if not dedicated_handler and tm_packet is not None: + self.printer.handle_long_tm_print(packet_if=tm_packet, info_if=tm_packet) + + +def make_addressable_id(target_id: int, unique_id: int) -> bytes: + byte_string = bytearray(struct.pack("!I", target_id)) + byte_string.extend(struct.pack("!I", unique_id)) + return byte_string + + +class TcHandler(TcHandlerBase): + def __init__( + self, + seq_count_provider: FileSeqCountProvider, + verif_wrapper: VerificationWrapper, + ): + super(TcHandler, self).__init__() + self.seq_count_provider = seq_count_provider + self.verif_wrapper = verif_wrapper + self.queue_helper = DefaultPusQueueHelper( + queue_wrapper=None, + seq_cnt_provider=seq_count_provider, + ) + + def send_cb(self, send_params: SendCbParams): + entry_helper = send_params.entry + if entry_helper.is_tc: + if entry_helper.entry_type == TcQueueEntryType.PUS_TC: + pus_tc_wrapper = entry_helper.to_pus_tc_entry() + pus_tc_wrapper.pus_tc.seq_count = ( + self.seq_count_provider.get_and_increment() + ) + self.verif_wrapper.add_tc(pus_tc_wrapper.pus_tc) + raw_tc = pus_tc_wrapper.pus_tc.pack() + LOGGER.info(f"Sending {pus_tc_wrapper.pus_tc}") + send_params.com_if.send(raw_tc) + elif entry_helper.entry_type == TcQueueEntryType.LOG: + log_entry = entry_helper.to_log_entry() + LOGGER.info(log_entry.log_str) + + def queue_finished_cb(self, helper: ProcedureWrapper): + if helper.proc_type == TcProcedureType.DEFAULT: + def_proc = helper.to_def_procedure() + LOGGER.info( + f"Queue handling finished for service {def_proc.service} and " + f"op code {def_proc.op_code}" + ) + + def feed_cb(self, helper: ProcedureWrapper, wrapper: FeedWrapper): + q = self.queue_helper + q.queue_wrapper = wrapper.queue_wrapper + if helper.proc_type == TcProcedureType.DEFAULT: + def_proc = helper.to_def_procedure() + service = def_proc.service + op_code = def_proc.op_code + if ( + service == CoreServiceList.SERVICE_17 + or service == CoreServiceList.SERVICE_17_ALT + ): + q.add_log_cmd("Sending PUS ping telecommand") + return q.add_pus_tc(PusTelecommand(service=17, subservice=1)) + + +def main(): + tmtccmd.init_printout(False) + hook_obj = SatRsConfigHook(json_cfg_path=default_json_path()) + parser_wrapper = PreArgsParsingWrapper() + parser_wrapper.create_default_parent_parser() + parser_wrapper.create_default_parser() + parser_wrapper.add_def_proc_args() + post_args_wrapper = parser_wrapper.parse(hook_obj) + params = SetupParams() + proc_wrapper = ProcedureParamsWrapper() + if post_args_wrapper.use_gui: + post_args_wrapper.set_params_without_prompts(params, proc_wrapper) + else: + post_args_wrapper.set_params_with_prompts(params, proc_wrapper) + params.apid = EXAMPLE_PUS_APID + setup_args = SetupWrapper( + hook_obj=hook_obj, setup_params=params, proc_param_wrapper=proc_wrapper + ) + # Create console logger helper and file loggers + tmtc_logger = RegularTmtcLogWrapper() + printer = FsfwTmTcPrinter(tmtc_logger.logger) + raw_logger = RawTmtcTimedLogWrapper(when=TimedLogWhen.PER_HOUR, interval=1) + verificator = PusVerificator() + verification_wrapper = VerificationWrapper(verificator, LOGGER, printer.file_logger) + # Create primary TM handler and add it to the CCSDS Packet Handler + tm_handler = PusHandler(verification_wrapper, printer, raw_logger) + ccsds_handler = CcsdsTmHandler(generic_handler=None) + ccsds_handler.add_apid_handler(tm_handler) + + # Create TC handler + seq_count_provider = PusFileSeqCountProvider() + tc_handler = TcHandler(seq_count_provider, verification_wrapper) + tmtccmd.setup(setup_args=setup_args) + init_proc = params_to_procedure_conversion(setup_args.proc_param_wrapper) + tmtc_backend = tmtccmd.create_default_tmtc_backend( + setup_wrapper=setup_args, + tm_handler=ccsds_handler, + tc_handler=tc_handler, + init_procedure=init_proc, + ) + tmtccmd.start(tmtc_backend=tmtc_backend, hook_obj=hook_obj) + try: + while True: + state = tmtc_backend.periodic_op(None) + if state.request == BackendRequest.TERMINATION_NO_ERROR: + sys.exit(0) + elif state.request == BackendRequest.DELAY_IDLE: + LOGGER.info("TMTC Client in IDLE mode") + time.sleep(3.0) + elif state.request == BackendRequest.DELAY_LISTENER: + time.sleep(0.8) + elif state.request == BackendRequest.DELAY_CUSTOM: + if state.next_delay.total_seconds() <= 0.4: + time.sleep(state.next_delay.total_seconds()) + else: + time.sleep(0.4) + elif state.request == BackendRequest.CALL_NEXT: + pass + except KeyboardInterrupt: + sys.exit(0) + + +if __name__ == "__main__": + main() diff --git a/satrs-example-stm32f3-disco/pyclient/requirements.txt b/satrs-example-stm32f3-disco/pyclient/requirements.txt new file mode 100644 index 0000000..d9a7ac1 --- /dev/null +++ b/satrs-example-stm32f3-disco/pyclient/requirements.txt @@ -0,0 +1,2 @@ +tmtccmd == 4.0.0a0 +# -e git+https://github.com/robamu-org/tmtccmd.git@main#egg=tmtccmd diff --git a/satrs-example-stm32f3-disco/src/blinky.rs b/satrs-example-stm32f3-disco/src/blinky.rs new file mode 100644 index 0000000..eefdbfe --- /dev/null +++ b/satrs-example-stm32f3-disco/src/blinky.rs @@ -0,0 +1,78 @@ +#![no_std] +#![no_main] + +extern crate panic_itm; + +use cortex_m_rt::entry; + +use stm32f3_discovery::stm32f3xx_hal::delay::Delay; +use stm32f3_discovery::stm32f3xx_hal::{pac, prelude::*}; +use stm32f3_discovery::leds::Leds; +use stm32f3_discovery::switch_hal::{OutputSwitch, ToggleableOutputSwitch}; + +#[entry] +fn main()-> ! { + let dp = pac::Peripherals::take().unwrap(); + let mut rcc = dp.RCC.constrain(); + let cp = cortex_m::Peripherals::take().unwrap(); + let mut flash = dp.FLASH.constrain(); + let clocks = rcc.cfgr.freeze(&mut flash.acr); + let mut delay = Delay::new(cp.SYST, clocks); + + let mut gpioe = dp.GPIOE.split(&mut rcc.ahb); + let mut leds = Leds::new( + gpioe.pe8, + gpioe.pe9, + gpioe.pe10, + gpioe.pe11, + gpioe.pe12, + gpioe.pe13, + gpioe.pe14, + gpioe.pe15, + &mut gpioe.moder, + &mut gpioe.otyper + ); + let delay_ms = 200u16; + loop { + leds.ld3.toggle().ok(); + delay.delay_ms(delay_ms); + leds.ld3.toggle().ok(); + delay.delay_ms(delay_ms); + + //explicit on/off + leds.ld4.on().ok(); + delay.delay_ms(delay_ms); + leds.ld4.off().ok(); + delay.delay_ms(delay_ms); + + leds.ld5.on().ok(); + delay.delay_ms(delay_ms); + leds.ld5.off().ok(); + delay.delay_ms(delay_ms); + + leds.ld6.on().ok(); + delay.delay_ms(delay_ms); + leds.ld6.off().ok(); + delay.delay_ms(delay_ms); + + leds.ld7.on().ok(); + delay.delay_ms(delay_ms); + leds.ld7.off().ok(); + delay.delay_ms(delay_ms); + + leds.ld8.on().ok(); + delay.delay_ms(delay_ms); + leds.ld8.off().ok(); + delay.delay_ms(delay_ms); + + leds.ld9.on().ok(); + delay.delay_ms(delay_ms); + leds.ld9.off().ok(); + delay.delay_ms(delay_ms); + + leds.ld10.on().ok(); + delay.delay_ms(delay_ms); + leds.ld10.off().ok(); + delay.delay_ms(delay_ms); + } +} diff --git a/satrs-example-stm32f3-disco/src/main.rs b/satrs-example-stm32f3-disco/src/main.rs new file mode 100644 index 0000000..8762cbf --- /dev/null +++ b/satrs-example-stm32f3-disco/src/main.rs @@ -0,0 +1,604 @@ +#![no_std] +#![no_main] +extern crate panic_itm; + +use rtic::app; + +use heapless::{ + mpmc::Q16, + pool, + pool::singleton::{Box, Pool}, +}; +#[allow(unused_imports)] +use itm_logger::{debug, info, logger_init, warn}; +use satrs_core::spacepackets::{ecss::PusPacket, tm::PusTm}; +use satrs_core::{ + pus::{EcssTmErrorWithSend, EcssTmSenderCore}, + seq_count::SequenceCountProviderCore, +}; +use stm32f3xx_hal::dma::dma1; +use stm32f3xx_hal::gpio::{PushPull, AF7, PA2, PA3}; +use stm32f3xx_hal::pac::USART2; +use stm32f3xx_hal::serial::{Rx, RxEvent, Serial, SerialDmaRx, SerialDmaTx, Tx, TxEvent}; +use systick_monotonic::{fugit::Duration, Systick}; + +const UART_BAUD: u32 = 115200; +const BLINK_FREQ_MS: u64 = 1000; +const TX_HANDLER_FREQ_MS: u64 = 20; +const MIN_DELAY_BETWEEN_TX_PACKETS_MS: u16 = 5; +const MAX_TC_LEN: usize = 200; +const MAX_TM_LEN: usize = 200; +pub const PUS_APID: u16 = 0x02; + +type TxType = Tx>>; +type RxType = Rx>>; +type MsDuration = Duration; +type TxDmaTransferType = SerialDmaTx<&'static [u8], dma1::C7, TxType>; +type RxDmaTransferType = SerialDmaRx<&'static mut [u8], dma1::C6, RxType>; + +// This is the predictable maximum overhead of the COBS encoding scheme. +// It is simply the maximum packet lenght dividied by 254 rounded up. +const COBS_TC_OVERHEAD: usize = (MAX_TC_LEN + 254 - 1) / 254; +const COBS_TM_OVERHEAD: usize = (MAX_TM_LEN + 254 - 1) / 254; + +const TC_BUF_LEN: usize = MAX_TC_LEN + COBS_TC_OVERHEAD; +const TM_BUF_LEN: usize = MAX_TC_LEN + COBS_TM_OVERHEAD; + +// This is a static buffer which should ONLY (!) be used as the TX DMA +// transfer buffer. +static mut DMA_TX_BUF: [u8; TM_BUF_LEN] = [0; TM_BUF_LEN]; +// This is a static buffer which should ONLY (!) be used as the RX DMA +// transfer buffer. +static mut DMA_RX_BUF: [u8; TC_BUF_LEN] = [0; TC_BUF_LEN]; + +static TX_REQUESTS: Q16<(Box, usize)> = Q16::new(); + +const TC_POOL_SLOTS: usize = 12; +const TM_POOL_SLOTS: usize = 12; +use core::sync::atomic::{AtomicU16, Ordering}; + +pub struct SeqCountProviderAtomicRef { + atomic: AtomicU16, + ordering: Ordering, +} + +impl SeqCountProviderAtomicRef { + pub const fn new(ordering: Ordering) -> Self { + Self { + atomic: AtomicU16::new(0), + ordering, + } + } +} + +impl SequenceCountProviderCore for SeqCountProviderAtomicRef { + fn get(&self) -> u16 { + self.atomic.load(self.ordering) + } + + fn increment(&self) { + self.atomic.fetch_add(1, self.ordering); + } + + fn get_and_increment(&self) -> u16 { + self.atomic.fetch_add(1, self.ordering) + } +} + +static SEQ_COUNT_PROVIDER: SeqCountProviderAtomicRef = + SeqCountProviderAtomicRef::new(Ordering::Relaxed); + +// Otherwise, warnings because of heapless pool macro. +#[allow(non_camel_case_types)] +mod poolmod { + use super::*; + // Must hold full TC length including COBS overhead. + pool!(TC: [u8; TC_BUF_LEN]); + // Only encoded at the end, so no need to account for COBS overhead. + pool!(TM: [u8; MAX_TM_LEN]); +} + +pub struct TxIdle { + tx: TxType, + dma_channel: dma1::C7, +} + +#[derive(Debug)] +pub enum TmStoreError { + StoreFull, + StoreSlotsTooSmall, +} + +impl From for EcssTmErrorWithSend { + fn from(value: TmStoreError) -> Self { + Self::SendError(value) + } +} + +pub struct TmSender { + mem_block: Option>, + ctx: &'static str, +} + +impl TmSender { + pub fn new(mem_block: Box, ctx: &'static str) -> Self { + Self { + mem_block: Some(mem_block), + ctx, + } + } +} + +impl EcssTmSenderCore for TmSender { + type Error = TmStoreError; + + fn send_tm( + &mut self, + tm: PusTm, + ) -> Result<(), satrs_core::pus::EcssTmErrorWithSend> { + let mem_block = self.mem_block.take(); + if mem_block.is_none() { + panic!("send_tm should only be called once"); + } + let mut mem_block = mem_block.unwrap(); + if tm.len_packed() > MAX_TM_LEN { + return Err(EcssTmErrorWithSend::SendError( + TmStoreError::StoreSlotsTooSmall, + )); + } + tm.write_to_bytes(mem_block.as_mut_slice()) + .map_err(|e| EcssTmErrorWithSend::EcssTmError(e.into()))?; + info!(target: self.ctx, "Sending TM[{},{}] with size {}", tm.service(), tm.subservice(), tm.len_packed()); + TX_REQUESTS + .enqueue((mem_block, tm.len_packed())) + .map_err(|_| TmStoreError::StoreFull)?; + Ok(()) + } +} + +pub enum UartTxState { + // Wrapped in an option because we need an owned type later. + Idle(Option), + // Same as above + Transmitting(Option), +} + +#[app(device = stm32f3xx_hal::pac, peripherals = true, dispatchers = [TIM20_BRK, TIM20_UP, TIM20_TRG_COM])] +mod app { + use super::*; + use core::slice::Iter; + use cortex_m::iprintln; + use satrs_core::pus::verification::FailParams; + use satrs_core::pus::verification::VerificationReporterCore; + use satrs_core::spacepackets::{ + ecss::EcssEnumU16, + tc::PusTc, + time::cds::P_FIELD_BASE, + tm::{PusTm, PusTmSecondaryHeader}, + CcsdsPacket, SpHeader, + }; + #[allow(unused_imports)] + use stm32f3_discovery::leds::Direction; + use stm32f3_discovery::leds::Leds; + use stm32f3xx_hal::prelude::*; + use stm32f3xx_hal::Toggle; + + use stm32f3_discovery::switch_hal::OutputSwitch; + #[allow(dead_code)] + type SerialType = Serial>, PA3>)>; + + #[shared] + struct Shared { + tx_transfer: UartTxState, + rx_transfer: Option, + } + + #[local] + struct Local { + leds: Leds, + last_dir: Direction, + verif_reporter: VerificationReporterCore, + curr_dir: Iter<'static, Direction>, + } + + #[monotonic(binds = SysTick, default = true)] + type MonoTimer = Systick<1000>; + + #[init(local = [ + tc_pool_mem: [u8; TC_BUF_LEN * TC_POOL_SLOTS] = [0; TC_BUF_LEN * TC_POOL_SLOTS], + tm_pool_mem: [u8; MAX_TM_LEN * TM_POOL_SLOTS] = [0; MAX_TM_LEN * TM_POOL_SLOTS] + ])] + fn init(mut cx: init::Context) -> (Shared, Local, init::Monotonics) { + let mut rcc = cx.device.RCC.constrain(); + + let mono = Systick::new(cx.core.SYST, 8_000_000); + logger_init(); + let mut flash = cx.device.FLASH.constrain(); + let clocks = rcc + .cfgr + .use_hse(8.MHz()) + .sysclk(8.MHz()) + .pclk1(8.MHz()) + .freeze(&mut flash.acr); + // setup ITM output + iprintln!( + &mut cx.core.ITM.stim[0], + "Starting sat-rs demo application for the STM32F3-Discovery" + ); + let mut gpioe = cx.device.GPIOE.split(&mut rcc.ahb); + // Assign memory to the pools. + poolmod::TC::grow(cx.local.tc_pool_mem); + poolmod::TM::grow(cx.local.tm_pool_mem); + + let verif_reporter = VerificationReporterCore::new(PUS_APID).unwrap(); + + let leds = Leds::new( + gpioe.pe8, + gpioe.pe9, + gpioe.pe10, + gpioe.pe11, + gpioe.pe12, + gpioe.pe13, + gpioe.pe14, + gpioe.pe15, + &mut gpioe.moder, + &mut gpioe.otyper, + ); + let mut gpioa = cx.device.GPIOA.split(&mut rcc.ahb); + // USART2 pins + let mut pins = ( + // TX pin: PA2 + gpioa + .pa2 + .into_af_push_pull(&mut gpioa.moder, &mut gpioa.otyper, &mut gpioa.afrl), + // RX pin: PA3 + gpioa + .pa3 + .into_af_push_pull(&mut gpioa.moder, &mut gpioa.otyper, &mut gpioa.afrl), + ); + pins.1.internal_pull_up(&mut gpioa.pupdr, true); + let mut usart2 = Serial::new( + cx.device.USART2, + pins, + UART_BAUD.Bd(), + clocks, + &mut rcc.apb1, + ); + usart2.configure_rx_interrupt(RxEvent::Idle, Toggle::On); + // This interrupt is enabled to re-schedule new transfers in the interrupt handler immediately. + usart2.configure_tx_interrupt(TxEvent::TransmissionComplete, Toggle::On); + + let dma1 = cx.device.DMA1.split(&mut rcc.ahb); + let (tx_serial, mut rx_serial) = usart2.split(); + + // This interrupt is immediately triggered, clear it. It will only be reset + // by the hardware when data is received on RX (RXNE event) + rx_serial.clear_event(RxEvent::Idle); + let rx_transfer = rx_serial.read_exact(unsafe { DMA_RX_BUF.as_mut_slice() }, dma1.ch6); + info!(target: "init", "Spawning tasks"); + blink::spawn().unwrap(); + serial_tx_handler::spawn().unwrap(); + ( + Shared { + tx_transfer: UartTxState::Idle(Some(TxIdle { + tx: tx_serial, + dma_channel: dma1.ch7, + })), + rx_transfer: Some(rx_transfer), + }, + Local { + leds, + last_dir: Direction::North, + curr_dir: Direction::iter(), + verif_reporter, + }, + init::Monotonics(mono), + ) + } + + #[task(local = [leds, curr_dir, last_dir])] + fn blink(cx: blink::Context) { + let toggle_leds = |dir: &Direction| { + let leds = cx.local.leds; + let last_led = leds.for_direction(*cx.local.last_dir); + last_led.off().ok(); + let led = leds.for_direction(*dir); + led.on().ok(); + *cx.local.last_dir = *dir; + }; + + match cx.local.curr_dir.next() { + Some(dir) => { + toggle_leds(dir); + } + None => { + *cx.local.curr_dir = Direction::iter(); + toggle_leds(cx.local.curr_dir.next().unwrap()); + } + } + blink::spawn_after(MsDuration::from_ticks(BLINK_FREQ_MS)).unwrap(); + } + + #[task( + shared = [tx_transfer], + local = [] + )] + fn serial_tx_handler(mut cx: serial_tx_handler::Context) { + if let Some((buf, len)) = TX_REQUESTS.dequeue() { + cx.shared.tx_transfer.lock(|tx_state| match tx_state { + UartTxState::Idle(tx) => { + //debug!(target: "serial_tx_handler", "bytes: {:x?}", &buf[0..len]); + // Safety: We only copy the data into the TX DMA buffer in this task. + // If the DMA is active, another branch will be taken. + let mut_tx_dma_buf = unsafe { &mut DMA_TX_BUF }; + // 0 sentinel value as start marker + mut_tx_dma_buf[0] = 0; + // Should never panic, we accounted for the overhead. + // Write into transfer buffer directly, no need for intermediate + // encoding buffer. + let encoded_len = cobs::encode(&buf[0..len], &mut mut_tx_dma_buf[1..]); + // 0 end marker + mut_tx_dma_buf[encoded_len + 1] = 0; + //debug!(target: "serial_tx_handler", "Sending {} bytes", encoded_len + 2); + //debug!("sent: {:x?}", &mut_tx_dma_buf[0..encoded_len + 2]); + let tx_idle = tx.take().unwrap(); + // Transfer completion and re-scheduling of new TX transfers will be done + // by the IRQ handler. + let transfer = tx_idle + .tx + .write_all(&mut_tx_dma_buf[0..encoded_len + 2], tx_idle.dma_channel); + *tx_state = UartTxState::Transmitting(Some(transfer)); + // The memory block is automatically returned to the pool when it is dropped. + } + UartTxState::Transmitting(_) => { + // This is a SW configuration error. Only the ISR which + // detects transfer completion should be able to spawn a new + // task, and that ISR should set the state to IDLE. + panic!("invalid internal tx state detected") + } + }) + } else { + cx.shared.tx_transfer.lock(|tx_state| { + if let UartTxState::Idle(_) = tx_state { + serial_tx_handler::spawn_after(MsDuration::from_ticks(TX_HANDLER_FREQ_MS)) + .unwrap(); + } + }); + } + } + + #[task( + local = [ + stamp_buf: [u8; 7] = [0; 7], + decode_buf: [u8; MAX_TC_LEN] = [0; MAX_TC_LEN], + src_data_buf: [u8; MAX_TM_LEN] = [0; MAX_TM_LEN], + verif_reporter + ], + )] + fn serial_rx_handler( + cx: serial_rx_handler::Context, + received_packet: Box, + rx_len: usize, + ) { + let tgt: &'static str = "serial_rx_handler"; + cx.local.stamp_buf[0] = P_FIELD_BASE; + info!(target: tgt, "Received packet with {} bytes", rx_len); + let decode_buf = cx.local.decode_buf; + let packet = received_packet.as_slice(); + let mut start_idx = None; + for (idx, byte) in packet.iter().enumerate() { + if *byte != 0 { + start_idx = Some(idx); + break; + } + } + if start_idx.is_none() { + warn!( + target: tgt, + "decoding error, can only process cobs encoded frames, data is all 0" + ); + return; + } + let start_idx = start_idx.unwrap(); + match cobs::decode(&received_packet.as_slice()[start_idx..], decode_buf) { + Ok(len) => { + info!(target: tgt, "Decoded packet length: {}", len); + let pus_tc = PusTc::from_bytes(decode_buf); + let verif_reporter = cx.local.verif_reporter; + match pus_tc { + Ok((tc, tc_len)) => handle_tc( + tc, + tc_len, + verif_reporter, + cx.local.src_data_buf, + cx.local.stamp_buf, + tgt, + ), + Err(e) => { + warn!(target: tgt, "Error unpacking PUS TC: {}", e); + } + } + } + Err(_) => { + warn!( + target: tgt, + "decoding error, can only process cobs encoded frames" + ) + } + } + } + + fn handle_tc( + tc: PusTc, + tc_len: usize, + verif_reporter: &mut VerificationReporterCore, + src_data_buf: &mut [u8; MAX_TM_LEN], + stamp_buf: &[u8; 7], + tgt: &'static str, + ) { + info!( + target: tgt, + "Found PUS TC [{},{}] with length {}", + tc.service(), + tc.subservice(), + tc_len + ); + + let token = verif_reporter.add_tc(&tc); + if tc.apid() != PUS_APID { + warn!(target: tgt, "Received tc with unknown APID {}", tc.apid()); + let sendable = verif_reporter + .acceptance_failure( + src_data_buf, + token, + &SEQ_COUNT_PROVIDER, + FailParams::new(stamp_buf, &EcssEnumU16::new(0), None), + ) + .unwrap(); + let mem_block = poolmod::TM::alloc().unwrap().init([0u8; MAX_TM_LEN]); + let mut sender = TmSender::new(mem_block, tgt); + if let Err(e) = + verif_reporter.send_acceptance_failure(sendable, &SEQ_COUNT_PROVIDER, &mut sender) + { + warn!(target: tgt, "Sending acceptance failure failed: {:?}", e.0); + }; + return; + } + let sendable = verif_reporter + .acceptance_success(src_data_buf, token, &SEQ_COUNT_PROVIDER, stamp_buf) + .unwrap(); + + let mem_block = poolmod::TM::alloc().unwrap().init([0u8; MAX_TM_LEN]); + let mut sender = TmSender::new(mem_block, tgt); + let accepted_token = match verif_reporter.send_acceptance_success( + sendable, + &SEQ_COUNT_PROVIDER, + &mut sender, + ) { + Ok(token) => token, + Err(e) => { + warn!(target: "serial_rx_handler", "Sending acceptance success failed: {:?}", e.0); + return; + } + }; + + if tc.service() == 17 { + if tc.subservice() == 1 { + let sendable = verif_reporter + .start_success(src_data_buf, accepted_token, &SEQ_COUNT_PROVIDER, stamp_buf) + .unwrap(); + let mem_block = poolmod::TM::alloc().unwrap().init([0u8; MAX_TM_LEN]); + let mut sender = TmSender::new(mem_block, tgt); + let started_token = match verif_reporter.send_start_success( + sendable, + &SEQ_COUNT_PROVIDER, + &mut sender, + ) { + Ok(token) => token, + Err(e) => { + warn!(target: tgt, "Sending acceptance success failed: {:?}", e.0); + return; + } + }; + info!( + target: tgt, + "Received PUS ping telecommand, sending ping reply TM[17,2]" + ); + let mut sp_header = + SpHeader::tc_unseg(PUS_APID, SEQ_COUNT_PROVIDER.get(), 0).unwrap(); + let sec_header = PusTmSecondaryHeader::new_simple(17, 2, stamp_buf); + let ping_reply = PusTm::new(&mut sp_header, sec_header, None, true); + let mut mem_block = poolmod::TM::alloc().unwrap().init([0u8; MAX_TM_LEN]); + let reply_len = ping_reply.write_to_bytes(mem_block.as_mut_slice()).unwrap(); + if TX_REQUESTS.enqueue((mem_block, reply_len)).is_err() { + warn!(target: tgt, "TC queue full"); + return; + } + SEQ_COUNT_PROVIDER.increment(); + let sendable = verif_reporter + .completion_success(src_data_buf, started_token, &SEQ_COUNT_PROVIDER, stamp_buf) + .unwrap(); + let mem_block = poolmod::TM::alloc().unwrap().init([0u8; MAX_TM_LEN]); + let mut sender = TmSender::new(mem_block, tgt); + if let Err(e) = verif_reporter.send_step_or_completion_success( + sendable, + &SEQ_COUNT_PROVIDER, + &mut sender, + ) { + warn!(target: tgt, "Sending completion success failed: {:?}", e.0); + } + } else { + // TODO: Invalid subservice + } + } + } + + #[task(binds = DMA1_CH6, shared = [rx_transfer])] + fn rx_dma_isr(mut cx: rx_dma_isr::Context) { + cx.shared.rx_transfer.lock(|rx_transfer| { + let rx_ref = rx_transfer.as_ref().unwrap(); + if rx_ref.is_complete() { + let uart_rx_owned = rx_transfer.take().unwrap(); + let (buf, c, rx) = uart_rx_owned.stop(); + // The received data is transferred to another task now to avoid any processing overhead + // during the interrupt. There are multiple ways to do this, we use a memory pool here + // to do this. + let mut mem_block = poolmod::TC::alloc() + .expect("allocating memory block for rx failed") + .init([0u8; TC_BUF_LEN]); + // Copy data into memory pool. + mem_block.copy_from_slice(buf); + *rx_transfer = Some(rx.read_exact(buf, c)); + // Only send owning pointer to pool memory and the received packet length. + serial_rx_handler::spawn(mem_block, TC_BUF_LEN) + .expect("spawning rx handler task failed"); + // If this happens, there is a high chance that the maximum packet length was + // exceeded. Circular mode is not used here, so data might be missed. + warn!( + "rx transfer with maximum length {}, might miss data", + TC_BUF_LEN + ); + } + }); + } + + #[task(binds = USART2_EXTI26, shared = [rx_transfer, tx_transfer])] + fn serial_isr(mut cx: serial_isr::Context) { + cx.shared.tx_transfer.lock(|tx_state| match tx_state { + UartTxState::Idle(_) => (), + UartTxState::Transmitting(transfer) => { + let transfer_ref = transfer.as_ref().unwrap(); + if transfer_ref.is_complete() { + let transfer = transfer.take().unwrap(); + let (_, dma_channel, tx) = transfer.stop(); + *tx_state = UartTxState::Idle(Some(TxIdle { tx, dma_channel })); + serial_tx_handler::spawn_after(MsDuration::from_ticks( + MIN_DELAY_BETWEEN_TX_PACKETS_MS.into(), + )) + .unwrap(); + } + } + }); + cx.shared.rx_transfer.lock(|rx_transfer| { + let rx_transfer_ref = rx_transfer.as_ref().unwrap(); + // Received a partial packet. + if rx_transfer_ref.is_event_triggered(RxEvent::Idle) { + let rx_transfer_owned = rx_transfer.take().unwrap(); + let (buf, ch, mut rx, rx_len) = rx_transfer_owned.stop_and_return_received_bytes(); + // The received data is transferred to another task now to avoid any processing overhead + // during the interrupt. There are multiple ways to do this, we use a memory pool here + // to do this. + let mut mem_block = poolmod::TC::alloc() + .expect("allocating memory block for rx failed") + .init([0u8; TC_BUF_LEN]); + // Copy data into memory pool. + mem_block[0..rx_len as usize].copy_from_slice(&buf[0..rx_len as usize]); + rx.clear_event(RxEvent::Idle); + // Only send owning pointer to pool memory and the received packet length. + serial_rx_handler::spawn(mem_block, rx_len as usize) + .expect("spawning rx handler task failed"); + *rx_transfer = Some(rx.read_exact(buf, ch)); + } + }); + } +}