From ac4f99ac6c056f482151e4ab2b951b8386301350 Mon Sep 17 00:00:00 2001
From: Robin Mueller <robin.mueller.m@gmail.com>
Date: Mon, 20 May 2024 12:04:28 +0200
Subject: [PATCH] add default config.toml file

---
 .../stm32h7-rtic/.cargo/def_config.toml       | 24 +++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 embedded-examples/stm32h7-rtic/.cargo/def_config.toml

diff --git a/embedded-examples/stm32h7-rtic/.cargo/def_config.toml b/embedded-examples/stm32h7-rtic/.cargo/def_config.toml
new file mode 100644
index 0000000..9d352da
--- /dev/null
+++ b/embedded-examples/stm32h7-rtic/.cargo/def_config.toml
@@ -0,0 +1,24 @@
+[target.'cfg(all(target_arch = "arm", target_os = "none"))']
+runner = "probe-rs run --chip STM32H743ZITx"
+# runner = ["probe-rs", "run", "--chip", "$CHIP", "--log-format", "{L} {s}"]
+
+rustflags = [
+  "-C", "linker=flip-link",
+  "-C", "link-arg=-Tlink.x",
+  "-C", "link-arg=-Tdefmt.x",
+  # This is needed if your flash or ram addresses are not aligned to 0x10000 in memory.x
+  # See https://github.com/rust-embedded/cortex-m-quickstart/pull/95
+  "-C", "link-arg=--nmagic",
+]
+
+[build]
+# (`thumbv6m-*` is compatible with all ARM Cortex-M chips but using the right
+# target improves performance)
+# target = "thumbv6m-none-eabi"    # Cortex-M0 and Cortex-M0+
+# target = "thumbv7m-none-eabi"    # Cortex-M3
+# target = "thumbv7em-none-eabi"   # Cortex-M4 and Cortex-M7 (no FPU)
+target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)
+
+[alias]
+rb = "run --bin"
+rrb = "run --release --bin"