Merge pull request 'Replaced Hertz by impl Into<Hertz> completely' (#2) from mueller/impl-into-hertz into main
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Reviewed-on: #2
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1db363fe1a
@ -6,6 +6,15 @@ All notable changes to this project will be documented in this file.
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The format is based on [Keep a Changelog](http://keepachangelog.com/)
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and this project adheres to [Semantic Versioning](http://semver.org/).
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## [unreleased]
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## [v0.4.0]
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### Changed
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- Replaced `Hertz` by `impl Into<Hertz>` completely and removed
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`+ Copy` where not necessary
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## [v0.3.1]
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- Updated all links to point to new repository
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@ -1,6 +1,6 @@
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[package]
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name = "va108xx-hal"
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version = "0.3.1"
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version = "0.4.0"
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authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
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edition = "2021"
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description = "HAL for the Vorago VA108xx family of microcontrollers"
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@ -114,12 +114,8 @@ fn main() -> ! {
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match SPI_BUS_SEL {
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SpiBusSelect::SpiAPortA | SpiBusSelect::SpiAPortB => {
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if let Some(ref mut spi) = *spia_ref.borrow_mut() {
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let transfer_cfg = TransferConfig::new_no_hw_cs(
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SPI_SPEED_KHZ.khz().into(),
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SPI_MODE,
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BLOCKMODE,
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false,
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);
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let transfer_cfg =
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TransferConfig::new_no_hw_cs(SPI_SPEED_KHZ.khz(), SPI_MODE, BLOCKMODE, false);
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spi.cfg_transfer(&transfer_cfg);
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}
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}
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@ -127,7 +123,7 @@ fn main() -> ! {
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if let Some(ref mut spi) = *spib_ref.borrow_mut() {
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let hw_cs_pin = pinsb.pb2.into_funsel_1();
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let transfer_cfg = TransferConfig::new(
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SPI_SPEED_KHZ.khz().into(),
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SPI_SPEED_KHZ.khz(),
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SPI_MODE,
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Some(hw_cs_pin),
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BLOCKMODE,
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@ -25,7 +25,7 @@ fn main() -> ! {
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(tx, rx),
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115200.bps(),
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&mut dp.SYSCONFIG,
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50.mhz().into(),
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50.mhz(),
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);
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let (mut tx, mut rx) = uartb.split();
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writeln!(tx, "Hello World\r").unwrap();
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@ -231,7 +231,7 @@ macro_rules! i2c_base {
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impl I2cBase<$I2CX> {
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pub fn $i2cx(
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i2c: $I2CX,
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sys_clk: impl Into<Hertz> + Copy,
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sys_clk: impl Into<Hertz>,
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speed_mode: I2cSpeed,
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ms_cfg: Option<&MasterConfig>,
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sl_cfg: Option<&SlaveConfig>,
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@ -740,7 +740,7 @@ macro_rules! i2c_slave {
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fn $i2cx_slave(
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i2c: $I2CX,
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cfg: SlaveConfig,
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sys_clk: impl Into<Hertz> + Copy,
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sys_clk: impl Into<Hertz>,
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speed_mode: I2cSpeed,
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sys_cfg: Option<&mut SYSCONFIG>,
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) -> Self {
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@ -897,7 +897,7 @@ macro_rules! i2c_slave {
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pub fn i2ca(
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i2c: $I2CX,
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cfg: SlaveConfig,
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sys_clk: impl Into<Hertz> + Copy,
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sys_clk: impl Into<Hertz>,
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speed_mode: I2cSpeed,
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sys_cfg: Option<&mut SYSCONFIG>,
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) -> Result<Self, Error> {
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@ -912,7 +912,7 @@ macro_rules! i2c_slave {
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pub fn $i2cx(
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i2c: $I2CX,
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cfg: SlaveConfig,
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sys_clk: impl Into<Hertz> + Copy,
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sys_clk: impl Into<Hertz>,
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speed_mode: I2cSpeed,
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sys_cfg: Option<&mut SYSCONFIG>,
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) -> Self {
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14
src/spi.rs
14
src/spi.rs
@ -218,9 +218,9 @@ pub struct ReducedTransferConfig {
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}
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impl TransferConfig<NoneT> {
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pub fn new_no_hw_cs(spi_clk: Hertz, mode: Mode, blockmode: bool, sod: bool) -> Self {
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pub fn new_no_hw_cs(spi_clk: impl Into<Hertz>, mode: Mode, blockmode: bool, sod: bool) -> Self {
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TransferConfig {
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spi_clk,
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spi_clk: spi_clk.into(),
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mode,
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hw_cs: None,
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sod,
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@ -231,14 +231,14 @@ impl TransferConfig<NoneT> {
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impl<HWCS: HwCs> TransferConfig<HWCS> {
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pub fn new(
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spi_clk: Hertz,
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spi_clk: impl Into<Hertz>,
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mode: Mode,
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hw_cs: Option<HWCS>,
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blockmode: bool,
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sod: bool,
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) -> Self {
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TransferConfig {
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spi_clk,
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spi_clk: spi_clk.into(),
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mode,
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hw_cs,
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sod,
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@ -452,7 +452,7 @@ macro_rules! spi {
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}
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#[inline]
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pub fn cfg_clock(&mut self, spi_clk: Hertz) {
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pub fn cfg_clock(&mut self, spi_clk: impl Into<Hertz>) {
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self.spi_base.cfg_clock(spi_clk);
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}
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@ -482,8 +482,8 @@ macro_rules! spi {
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impl<WORD: Word> SpiBase<$SPIX, WORD> {
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#[inline]
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pub fn cfg_clock(&mut self, spi_clk: Hertz) {
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let clk_prescale = self.sys_clk.0 / (spi_clk.0 * (self.cfg.scrdv as u32 + 1));
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pub fn cfg_clock(&mut self, spi_clk: impl Into<Hertz>) {
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let clk_prescale = self.sys_clk.0 / (spi_clk.into().0 * (self.cfg.scrdv as u32 + 1));
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self.spi
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.clkprescale
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.write(|w| unsafe { w.bits(clk_prescale) });
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@ -306,12 +306,12 @@ macro_rules! uart_impl {
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pins: PINS,
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config: impl Into<Config>,
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syscfg: &mut SYSCONFIG,
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sys_clk: Hertz
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sys_clk: impl Into<Hertz>
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) -> Self
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{
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enable_peripheral_clock(syscfg, $clk_enb_enum);
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Uart { uart, pins, tx: Tx::new(), rx: Rx::new() }.init(
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config.into(), sys_clk
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config.into(), sys_clk.into()
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)
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}
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}
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