From 2db345af9f89524aacb797cc57153d21f4309869 Mon Sep 17 00:00:00 2001
From: Robin Mueller <muellerr@irs.uni-stuttgart.de>
Date: Sun, 16 Jun 2024 16:07:41 +0200
Subject: [PATCH] prep patch v0.5.2

---
 CHANGELOG.md | 7 +++++++
 Cargo.toml   | 2 +-
 src/uart.rs  | 5 ++---
 3 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index cf4cb3b..706be5a 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -6,6 +6,13 @@ All notable changes to this project will be documented in this file.
 The format is based on [Keep a Changelog](http://keepachangelog.com/)
 and this project adheres to [Semantic Versioning](http://semver.org/).
 
+## [v0.5.2] 2024-06-16
+
+## Fixed
+
+- Replaced usage to `ptr::write_volatile` in UART module which is denied on more recent Rust
+  compilers.
+
 ## [v0.5.1]
 
 ### Changes
diff --git a/Cargo.toml b/Cargo.toml
index 6d7fe82..72dffe4 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -1,6 +1,6 @@
 [package]
 name = "va108xx-hal"
-version = "0.5.1"
+version = "0.5.2"
 authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
 edition = "2021"
 description = "HAL for the Vorago VA108xx family of microcontrollers"
diff --git a/src/uart.rs b/src/uart.rs
index 2896e4a..b6f652f 100644
--- a/src/uart.rs
+++ b/src/uart.rs
@@ -900,11 +900,10 @@ impl<UART: Instance> serial::Write<u8> for Tx<UART> {
             return Err(nb::Error::WouldBlock);
         } else {
             // DPARITY bit not supported yet
+            // NOTE(unsafe) atomic write to data register
             unsafe {
                 // NOTE(unsafe) atomic write to data register
-                // NOTE(write_volatile) 8-bit write that's not
-                // possible through the svd2rust API
-                ptr::write_volatile(&(*UART::ptr()).data as *const _ as *mut _, word);
+                (*UART::ptr()).data.write(|w| w.bits(word as u32));
             }
         }
         Ok(())