diff --git a/CHANGELOG.md b/CHANGELOG.md index fd5048a..9a5893d 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -6,6 +6,15 @@ All notable changes to this project will be documented in this file. The format is based on [Keep a Changelog](http://keepachangelog.com/) and this project adheres to [Semantic Versioning](http://semver.org/). +## [unreleased] + +## [v0.4.0] + +### Changed + +- Replaced `Hertz` by `impl Into` completely and removed + `+ Copy` where not necessary + ## [v0.3.1] - Updated all links to point to new repository diff --git a/Cargo.toml b/Cargo.toml index 4076097..b8c0ca7 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -1,6 +1,6 @@ [package] name = "va108xx-hal" -version = "0.3.1" +version = "0.4.0" authors = ["Robin Mueller "] edition = "2021" description = "HAL for the Vorago VA108xx family of microcontrollers" diff --git a/examples/spi.rs b/examples/spi.rs index 33daf31..59445e0 100644 --- a/examples/spi.rs +++ b/examples/spi.rs @@ -114,12 +114,8 @@ fn main() -> ! { match SPI_BUS_SEL { SpiBusSelect::SpiAPortA | SpiBusSelect::SpiAPortB => { if let Some(ref mut spi) = *spia_ref.borrow_mut() { - let transfer_cfg = TransferConfig::new_no_hw_cs( - SPI_SPEED_KHZ.khz().into(), - SPI_MODE, - BLOCKMODE, - false, - ); + let transfer_cfg = + TransferConfig::new_no_hw_cs(SPI_SPEED_KHZ.khz(), SPI_MODE, BLOCKMODE, false); spi.cfg_transfer(&transfer_cfg); } } @@ -127,7 +123,7 @@ fn main() -> ! { if let Some(ref mut spi) = *spib_ref.borrow_mut() { let hw_cs_pin = pinsb.pb2.into_funsel_1(); let transfer_cfg = TransferConfig::new( - SPI_SPEED_KHZ.khz().into(), + SPI_SPEED_KHZ.khz(), SPI_MODE, Some(hw_cs_pin), BLOCKMODE, diff --git a/examples/uart.rs b/examples/uart.rs index 1aa72dd..8f6ed31 100644 --- a/examples/uart.rs +++ b/examples/uart.rs @@ -25,7 +25,7 @@ fn main() -> ! { (tx, rx), 115200.bps(), &mut dp.SYSCONFIG, - 50.mhz().into(), + 50.mhz(), ); let (mut tx, mut rx) = uartb.split(); writeln!(tx, "Hello World\r").unwrap(); diff --git a/src/i2c.rs b/src/i2c.rs index 0134831..507f8fd 100644 --- a/src/i2c.rs +++ b/src/i2c.rs @@ -231,7 +231,7 @@ macro_rules! i2c_base { impl I2cBase<$I2CX> { pub fn $i2cx( i2c: $I2CX, - sys_clk: impl Into + Copy, + sys_clk: impl Into, speed_mode: I2cSpeed, ms_cfg: Option<&MasterConfig>, sl_cfg: Option<&SlaveConfig>, @@ -740,7 +740,7 @@ macro_rules! i2c_slave { fn $i2cx_slave( i2c: $I2CX, cfg: SlaveConfig, - sys_clk: impl Into + Copy, + sys_clk: impl Into, speed_mode: I2cSpeed, sys_cfg: Option<&mut SYSCONFIG>, ) -> Self { @@ -897,7 +897,7 @@ macro_rules! i2c_slave { pub fn i2ca( i2c: $I2CX, cfg: SlaveConfig, - sys_clk: impl Into + Copy, + sys_clk: impl Into, speed_mode: I2cSpeed, sys_cfg: Option<&mut SYSCONFIG>, ) -> Result { @@ -912,7 +912,7 @@ macro_rules! i2c_slave { pub fn $i2cx( i2c: $I2CX, cfg: SlaveConfig, - sys_clk: impl Into + Copy, + sys_clk: impl Into, speed_mode: I2cSpeed, sys_cfg: Option<&mut SYSCONFIG>, ) -> Self { diff --git a/src/spi.rs b/src/spi.rs index 36cd58e..f4208b7 100644 --- a/src/spi.rs +++ b/src/spi.rs @@ -218,9 +218,9 @@ pub struct ReducedTransferConfig { } impl TransferConfig { - pub fn new_no_hw_cs(spi_clk: Hertz, mode: Mode, blockmode: bool, sod: bool) -> Self { + pub fn new_no_hw_cs(spi_clk: impl Into, mode: Mode, blockmode: bool, sod: bool) -> Self { TransferConfig { - spi_clk, + spi_clk: spi_clk.into(), mode, hw_cs: None, sod, @@ -231,14 +231,14 @@ impl TransferConfig { impl TransferConfig { pub fn new( - spi_clk: Hertz, + spi_clk: impl Into, mode: Mode, hw_cs: Option, blockmode: bool, sod: bool, ) -> Self { TransferConfig { - spi_clk, + spi_clk: spi_clk.into(), mode, hw_cs, sod, @@ -452,7 +452,7 @@ macro_rules! spi { } #[inline] - pub fn cfg_clock(&mut self, spi_clk: Hertz) { + pub fn cfg_clock(&mut self, spi_clk: impl Into) { self.spi_base.cfg_clock(spi_clk); } @@ -482,8 +482,8 @@ macro_rules! spi { impl SpiBase<$SPIX, WORD> { #[inline] - pub fn cfg_clock(&mut self, spi_clk: Hertz) { - let clk_prescale = self.sys_clk.0 / (spi_clk.0 * (self.cfg.scrdv as u32 + 1)); + pub fn cfg_clock(&mut self, spi_clk: impl Into) { + let clk_prescale = self.sys_clk.0 / (spi_clk.into().0 * (self.cfg.scrdv as u32 + 1)); self.spi .clkprescale .write(|w| unsafe { w.bits(clk_prescale) }); diff --git a/src/uart.rs b/src/uart.rs index b33c3f7..fbb430d 100644 --- a/src/uart.rs +++ b/src/uart.rs @@ -306,12 +306,12 @@ macro_rules! uart_impl { pins: PINS, config: impl Into, syscfg: &mut SYSCONFIG, - sys_clk: Hertz + sys_clk: impl Into ) -> Self { enable_peripheral_clock(syscfg, $clk_enb_enum); Uart { uart, pins, tx: Tx::new(), rx: Rx::new() }.init( - config.into(), sys_clk + config.into(), sys_clk.into() ) } }