diff --git a/src/gpio/pins.rs b/src/gpio/pins.rs
index 6b8a0fe..265a82d 100644
--- a/src/gpio/pins.rs
+++ b/src/gpio/pins.rs
@@ -48,7 +48,7 @@
 //!
 //! ```
 //! let mut peripherals = Peripherals::take().unwrap();
-//! let pins = Pins::new(&mut dp.SYSCONFIG, Some(dp.IOCONFIG), dp.PORTA);
+//! let pins = PinsA::new(&mut dp.SYSCONFIG, Some(dp.IOCONFIG), dp.PORTA);
 //! ```
 //!
 //! Pins can be converted between modes using several different methods.
diff --git a/src/gpio/reg.rs b/src/gpio/reg.rs
index 9f3792e..3a6648f 100644
--- a/src/gpio/reg.rs
+++ b/src/gpio/reg.rs
@@ -233,7 +233,7 @@ pub(super) unsafe trait RegisterInterface {
 
     /// Read a pin but use the masked version but check whether the datamask for the pin is
     /// cleared as well
-    #[inline]
+    #[inline(always)]
     fn read_pin_masked(&self) -> Result<bool, PinError> {
         if !self.datamask() {
             Err(PinError::IsMasked)
@@ -243,7 +243,7 @@ pub(super) unsafe trait RegisterInterface {
     }
 
     /// Write the logic level of an output pin
-    #[inline]
+    #[inline(always)]
     fn write_pin(&mut self, bit: bool) {
         // Safety: SETOUT is a "mask" register, and we only write the bit for
         // this pin ID
@@ -277,7 +277,7 @@ pub(super) unsafe trait RegisterInterface {
     }
 
     /// Toggle the logic level of an output pin
-    #[inline]
+    #[inline(always)]
     fn toggle(&mut self) {
         // Safety: TOGOUT is a "mask" register, and we only write the bit for
         // this pin ID