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mueller/so
Author | SHA1 | Date | |
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3eb92f8e10 | |||
dc4639b2f0 |
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@ -6,15 +6,6 @@ All notable changes to this project will be documented in this file.
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||||||
The format is based on [Keep a Changelog](http://keepachangelog.com/)
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The format is based on [Keep a Changelog](http://keepachangelog.com/)
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and this project adheres to [Semantic Versioning](http://semver.org/).
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and this project adheres to [Semantic Versioning](http://semver.org/).
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## [v0.5.1]
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### Changes
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- Updated dependencies:
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- `cortex-m-rtic` (dev-depencency) to 1.1.2
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- `once_cell` to 1.12.0
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- Other dependencies: Only revision has changed
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## [v0.5.0]
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## [v0.5.0]
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### Added
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### Added
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35
Cargo.toml
35
Cargo.toml
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@ -1,6 +1,6 @@
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[package]
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[package]
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name = "va108xx-hal"
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name = "va108xx-hal"
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version = "0.5.1"
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version = "0.5.0"
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authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
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authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
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edition = "2021"
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edition = "2021"
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description = "HAL for the Vorago VA108xx family of microcontrollers"
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description = "HAL for the Vorago VA108xx family of microcontrollers"
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@ -8,43 +8,30 @@ homepage = "https://egit.irs.uni-stuttgart.de/rust/va108xx-hal"
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repository = "https://egit.irs.uni-stuttgart.de/rust/va108xx-hal"
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repository = "https://egit.irs.uni-stuttgart.de/rust/va108xx-hal"
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license = "Apache-2.0"
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license = "Apache-2.0"
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keywords = ["no-std", "hal", "cortex-m", "vorago", "va108xx"]
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keywords = ["no-std", "hal", "cortex-m", "vorago", "va108xx"]
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categories = ["aerospace", "embedded", "no-std", "hardware-support"]
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categories = ["embedded", "no-std", "hardware-support"]
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[dependencies]
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[dependencies]
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va108xx = "0.2.4"
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cortex-m = "0.7"
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cortex-m = "0.7"
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cortex-m-rt = "0.7"
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cortex-m-rt = "0.7"
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nb = "1"
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nb = "1"
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paste = "1.0"
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paste = "1.0"
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libm = "0.2"
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embedded-hal = { features = ["unproven"], version = "0.2.6" }
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void = { version = "1.0", default-features = false }
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once_cell = { version = "1.8.0", default-features = false }
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libm = "0.2.1"
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[dependencies.embedded-hal]
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[dependencies.va108xx]
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version = "0.2.7"
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version = "0.2.4"
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features = ["unproven"]
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[dependencies.void]
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version = "1.0"
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default-features = false
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[dependencies.once_cell]
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version = "1.14"
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default-features = false
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[features]
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[features]
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rt = ["va108xx/rt"]
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rt = ["va108xx/rt"]
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[dev-dependencies]
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[dev-dependencies]
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cortex-m-rtic = "1.1.2"
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cortex-m-rtic = "0.6.0-rc.4"
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panic-rtt-target = { version = "0.1", features = ["cortex-m"] }
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rtt-target = { version = "0.3", features = ["cortex-m"] }
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panic-halt = "0.2"
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panic-halt = "0.2"
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[dev-dependencies.rtt-target]
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version = "0.3"
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features = ["cortex-m"]
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[dev-dependencies.panic-rtt-target]
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version = "0.1"
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features = ["cortex-m"]
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[profile.dev]
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[profile.dev]
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debug = true
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debug = true
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lto = false
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lto = false
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@ -1,5 +1,5 @@
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[![Crates.io](https://img.shields.io/crates/v/va108xx-hal)](https://crates.io/crates/va108xx-hal)
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[![Crates.io](https://img.shields.io/crates/v/va108xx-hal)](https://crates.io/crates/va108xx-hal)
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[![ci](https://github.com/us-irs/va108xx-hal-rs/actions/workflows/ci.yml/badge.svg)](https://github.com/us-irs/va108xx-hal-rs/actions/workflows/ci.yml)
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[![ci](https://github.com/robamu-org/va108xx-hal-rs/actions/workflows/ci.yml/badge.svg)](https://github.com/robamu-org/va108xx-hal-rs/actions/workflows/ci.yml)
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[![docs.rs](https://img.shields.io/docsrs/va108xx-hal)](https://docs.rs/va108xx-hal)
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[![docs.rs](https://img.shields.io/docsrs/va108xx-hal)](https://docs.rs/va108xx-hal)
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# HAL for the Vorago VA108xx MCU family
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# HAL for the Vorago VA108xx MCU family
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@ -63,7 +63,7 @@ is contained within the
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1. Set up your Rust cross-compiler if you have not done so yet. See more in the [build chapter](#Building)
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1. Set up your Rust cross-compiler if you have not done so yet. See more in the [build chapter](#Building)
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2. Create a new binary crate with `cargo init`
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2. Create a new binary crate with `cargo init`
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3. To ensure that `cargo build` cross-compiles, it is recommended to create a `.cargo/config.toml`
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3. To ensure that `cargo build` cross-compiles, it is recommended to create a `cargo/config.toml`
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file. A sample `.cargo/config.toml` file is provided in this repository as well
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file. A sample `.cargo/config.toml` file is provided in this repository as well
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4. Copy the `memory.x` file into your project. This file contains information required by the linker.
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4. Copy the `memory.x` file into your project. This file contains information required by the linker.
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5. Copy the `blinky.rs` file to the `src/main.rs` file in your binary crate
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5. Copy the `blinky.rs` file to the `src/main.rs` file in your binary crate
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@ -7,7 +7,5 @@ RUN apt-get --yes upgrade
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# tzdata is a dependency, won't install otherwise
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# tzdata is a dependency, won't install otherwise
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ARG DEBIAN_FRONTEND=noninteractive
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ARG DEBIAN_FRONTEND=noninteractive
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RUN rustup install nightly && \
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RUN rustup target add thumbv6m-none-eabi && \
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rustup target add thumbv6m-none-eabi && \
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rustup +nightly target add thumbv6m-none-eabi && \
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rustup component add rustfmt clippy
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rustup component add rustfmt clippy
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37
automation/Jenkinsfile
vendored
37
automation/Jenkinsfile
vendored
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@ -1,34 +1,47 @@
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pipeline {
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pipeline {
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agent {
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agent any
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dockerfile {
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dir 'automation'
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reuseNode true
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}
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}
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stages {
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stages {
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stage('Clippy') {
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stage('Clippy') {
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agent {
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dockerfile {
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dir 'automation'
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reuseNode true
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}
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}
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steps {
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steps {
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sh 'cargo clippy'
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sh 'cargo clippy'
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}
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}
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}
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}
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stage('Rustfmt') {
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stage('Rustfmt') {
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agent {
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dockerfile {
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dir 'automation'
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reuseNode true
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}
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}
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steps {
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steps {
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sh 'cargo fmt'
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sh 'cargo fmt'
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}
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}
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}
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}
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stage('Docs') {
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steps {
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sh 'cargo +nightly doc'
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}
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}
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stage('Check') {
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stage('Check') {
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agent {
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dockerfile {
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dir 'automation'
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reuseNode true
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}
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}
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steps {
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steps {
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sh 'cargo check --target thumbv6m-none-eabi'
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sh 'cargo check --target thumbv6m-none-eabi'
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}
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}
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}
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}
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stage('Check Examples') {
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stage('Check Examples') {
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agent {
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dockerfile {
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dir 'automation'
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reuseNode true
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}
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}
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steps {
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steps {
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sh 'cargo check --target thumbv6m-none-eabi --examples'
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sh 'cargo check --target thumbv6m-none-eabi --examples'
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}
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}
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@ -11,7 +11,7 @@ static SYS_CLOCK: Mutex<OnceCell<Hertz>> = Mutex::new(OnceCell::new());
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pub type PeripheralClocks = PeripheralSelect;
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pub type PeripheralClocks = PeripheralSelect;
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#[derive(Debug, PartialEq, Eq)]
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#[derive(Debug, PartialEq)]
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pub enum FilterClkSel {
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pub enum FilterClkSel {
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SysClk = 0,
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SysClk = 0,
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Clk1 = 1,
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Clk1 = 1,
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@ -143,14 +143,14 @@ pub const DYN_ALT_FUNC_3: DynPinMode = DynPinMode::Alternate(DynAlternate::Funse
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//==================================================================================================
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//==================================================================================================
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/// Value-level `enum` for pin groups
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/// Value-level `enum` for pin groups
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#[derive(PartialEq, Eq, Clone, Copy)]
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#[derive(PartialEq, Clone, Copy)]
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pub enum DynGroup {
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pub enum DynGroup {
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A,
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A,
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B,
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B,
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}
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}
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/// Value-level `struct` representing pin IDs
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/// Value-level `struct` representing pin IDs
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#[derive(PartialEq, Eq, Clone, Copy)]
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#[derive(PartialEq, Clone, Copy)]
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pub struct DynPinId {
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pub struct DynPinId {
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pub group: DynGroup,
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pub group: DynGroup,
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pub num: u8,
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pub num: u8,
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@ -106,27 +106,27 @@ use paste::paste;
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// Errors and Definitions
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// Errors and Definitions
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//==================================================================================================
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//==================================================================================================
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#[derive(Debug, PartialEq, Eq)]
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#[derive(Debug, PartialEq)]
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pub enum InterruptEdge {
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pub enum InterruptEdge {
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HighToLow,
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HighToLow,
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LowToHigh,
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LowToHigh,
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BothEdges,
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BothEdges,
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}
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}
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#[derive(Debug, PartialEq, Eq)]
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#[derive(Debug, PartialEq)]
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pub enum InterruptLevel {
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pub enum InterruptLevel {
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Low = 0,
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Low = 0,
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High = 1,
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High = 1,
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}
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}
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#[derive(Debug, PartialEq, Eq)]
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#[derive(Debug, PartialEq)]
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pub enum PinState {
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pub enum PinState {
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Low = 0,
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Low = 0,
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High = 1,
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High = 1,
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}
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}
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/// GPIO error type
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/// GPIO error type
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#[derive(Debug, PartialEq, Eq)]
|
#[derive(Debug, PartialEq)]
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pub enum PinError {
|
pub enum PinError {
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/// The pin did not have the correct ID or mode for the requested operation.
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/// The pin did not have the correct ID or mode for the requested operation.
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/// [`DynPin`](crate::gpio::DynPin)s are not tracked and verified at compile-time, so run-time
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/// [`DynPin`](crate::gpio::DynPin)s are not tracked and verified at compile-time, so run-time
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@ -182,7 +182,7 @@ pub struct Input<C: InputConfig> {
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impl<C: InputConfig> Sealed for Input<C> {}
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impl<C: InputConfig> Sealed for Input<C> {}
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#[derive(Debug, PartialEq, Eq)]
|
#[derive(Debug, PartialEq)]
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pub enum FilterType {
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pub enum FilterType {
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SystemClock = 0,
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SystemClock = 0,
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DirectInputWithSynchronization = 1,
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DirectInputWithSynchronization = 1,
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|
|
14
src/i2c.rs
14
src/i2c.rs
|
@ -18,13 +18,13 @@ pub use embedded_hal::blocking::i2c::{SevenBitAddress, TenBitAddress};
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// Defintions
|
// Defintions
|
||||||
//==================================================================================================
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//==================================================================================================
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#[derive(Debug, PartialEq, Eq, Copy, Clone)]
|
#[derive(Debug, PartialEq, Copy, Clone)]
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pub enum FifoEmptyMode {
|
pub enum FifoEmptyMode {
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Stall = 0,
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Stall = 0,
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EndTransaction = 1,
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EndTransaction = 1,
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||||||
}
|
}
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#[derive(Debug, PartialEq, Eq)]
|
#[derive(Debug, PartialEq)]
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pub enum Error {
|
pub enum Error {
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InvalidTimingParams,
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InvalidTimingParams,
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ArbitrationLost,
|
ArbitrationLost,
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@ -46,19 +46,19 @@ enum I2cCmd {
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Cancel = 0b100,
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Cancel = 0b100,
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}
|
}
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|
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#[derive(Debug, PartialEq, Eq, Copy, Clone)]
|
#[derive(Debug, PartialEq, Copy, Clone)]
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pub enum I2cSpeed {
|
pub enum I2cSpeed {
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Regular100khz = 0,
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Regular100khz = 0,
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Fast400khz = 1,
|
Fast400khz = 1,
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}
|
}
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|
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#[derive(Debug, PartialEq, Eq)]
|
#[derive(Debug, PartialEq)]
|
||||||
pub enum I2cDirection {
|
pub enum I2cDirection {
|
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Send = 0,
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Send = 0,
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Read = 1,
|
Read = 1,
|
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}
|
}
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|
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#[derive(Debug, PartialEq, Eq, Copy, Clone)]
|
#[derive(Debug, PartialEq, Copy, Clone)]
|
||||||
pub enum I2cAddress {
|
pub enum I2cAddress {
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Regular(u8),
|
Regular(u8),
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TenBit(u16),
|
TenBit(u16),
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||||||
|
@ -119,14 +119,14 @@ impl TimingCfg {
|
||||||
}
|
}
|
||||||
|
|
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pub fn reg(&self) -> u32 {
|
pub fn reg(&self) -> u32 {
|
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(self.tbuf as u32) << 28
|
((self.tbuf as u32) << 28
|
||||||
| (self.thd_sta as u32) << 24
|
| (self.thd_sta as u32) << 24
|
||||||
| (self.tsu_sta as u32) << 20
|
| (self.tsu_sta as u32) << 20
|
||||||
| (self.tsu_sto as u32) << 16
|
| (self.tsu_sto as u32) << 16
|
||||||
| (self.tlow as u32) << 12
|
| (self.tlow as u32) << 12
|
||||||
| (self.thigh as u32) << 8
|
| (self.thigh as u32) << 8
|
||||||
| (self.tf as u32) << 4
|
| (self.tf as u32) << 4
|
||||||
| (self.tr as u32)
|
| (self.tr as u32)) as u32
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -25,7 +25,7 @@ use embedded_hal::{
|
||||||
// Defintions
|
// Defintions
|
||||||
//==================================================================================================
|
//==================================================================================================
|
||||||
|
|
||||||
#[derive(Debug, PartialEq, Eq, Copy, Clone)]
|
#[derive(Debug, PartialEq, Copy, Clone)]
|
||||||
pub enum HwChipSelectId {
|
pub enum HwChipSelectId {
|
||||||
Id0 = 0,
|
Id0 = 0,
|
||||||
Id1 = 1,
|
Id1 = 1,
|
||||||
|
@ -38,7 +38,7 @@ pub enum HwChipSelectId {
|
||||||
Invalid = 0xff,
|
Invalid = 0xff,
|
||||||
}
|
}
|
||||||
|
|
||||||
#[derive(Debug, PartialEq, Eq, Copy, Clone)]
|
#[derive(Debug, PartialEq, Copy, Clone)]
|
||||||
pub enum WordSize {
|
pub enum WordSize {
|
||||||
OneBit = 0x00,
|
OneBit = 0x00,
|
||||||
FourBits = 0x03,
|
FourBits = 0x03,
|
||||||
|
|
12
src/time.rs
12
src/time.rs
|
@ -6,7 +6,7 @@
|
||||||
//! allowing it to be converted into frequencies.
|
//! allowing it to be converted into frequencies.
|
||||||
|
|
||||||
/// Bits per second
|
/// Bits per second
|
||||||
#[derive(Clone, Copy, PartialEq, Eq, PartialOrd, Debug)]
|
#[derive(Clone, Copy, PartialEq, PartialOrd, Debug)]
|
||||||
pub struct Bps(pub u32);
|
pub struct Bps(pub u32);
|
||||||
|
|
||||||
/// Hertz
|
/// Hertz
|
||||||
|
@ -25,7 +25,7 @@ pub struct Bps(pub u32);
|
||||||
///
|
///
|
||||||
/// let freq = 60.hz();
|
/// let freq = 60.hz();
|
||||||
/// ```
|
/// ```
|
||||||
#[derive(Clone, Copy, PartialEq, Eq, PartialOrd, Debug)]
|
#[derive(Clone, Copy, PartialEq, PartialOrd, Debug)]
|
||||||
pub struct Hertz(pub u32);
|
pub struct Hertz(pub u32);
|
||||||
|
|
||||||
/// Kilohertz
|
/// Kilohertz
|
||||||
|
@ -47,7 +47,7 @@ pub struct Hertz(pub u32);
|
||||||
///
|
///
|
||||||
/// let freq = 100.khz();
|
/// let freq = 100.khz();
|
||||||
/// ```
|
/// ```
|
||||||
#[derive(Clone, Copy, PartialEq, Eq, PartialOrd, Debug)]
|
#[derive(Clone, Copy, PartialEq, PartialOrd, Debug)]
|
||||||
pub struct KiloHertz(pub u32);
|
pub struct KiloHertz(pub u32);
|
||||||
|
|
||||||
/// Megahertz
|
/// Megahertz
|
||||||
|
@ -68,14 +68,14 @@ pub struct KiloHertz(pub u32);
|
||||||
///
|
///
|
||||||
/// let freq = 8.mhz();
|
/// let freq = 8.mhz();
|
||||||
/// ```
|
/// ```
|
||||||
#[derive(Clone, Copy, PartialEq, Eq, PartialOrd, Debug)]
|
#[derive(Clone, Copy, PartialEq, PartialOrd, Debug)]
|
||||||
pub struct MegaHertz(pub u32);
|
pub struct MegaHertz(pub u32);
|
||||||
|
|
||||||
/// Time unit
|
/// Time unit
|
||||||
#[derive(PartialEq, Eq, PartialOrd, Clone, Copy)]
|
#[derive(PartialEq, PartialOrd, Clone, Copy)]
|
||||||
pub struct MilliSeconds(pub u32);
|
pub struct MilliSeconds(pub u32);
|
||||||
|
|
||||||
#[derive(PartialEq, Eq, PartialOrd, Clone, Copy)]
|
#[derive(PartialEq, PartialOrd, Clone, Copy)]
|
||||||
pub struct MicroSeconds(pub u32);
|
pub struct MicroSeconds(pub u32);
|
||||||
|
|
||||||
/// Extension trait that adds convenience methods to the `u32` type
|
/// Extension trait that adds convenience methods to the `u32` type
|
||||||
|
|
20
src/timer.rs
20
src/timer.rs
|
@ -21,7 +21,7 @@ use crate::{
|
||||||
private::Sealed,
|
private::Sealed,
|
||||||
time::Hertz,
|
time::Hertz,
|
||||||
timer,
|
timer,
|
||||||
utility::unmask_irq,
|
utility::{mask_irq, unmask_irq},
|
||||||
};
|
};
|
||||||
use core::cell::Cell;
|
use core::cell::Cell;
|
||||||
use cortex_m::interrupt::Mutex;
|
use cortex_m::interrupt::Mutex;
|
||||||
|
@ -45,7 +45,7 @@ pub enum Event {
|
||||||
TimeOut,
|
TimeOut,
|
||||||
}
|
}
|
||||||
|
|
||||||
#[derive(Default, Debug, PartialEq, Eq, Copy, Clone)]
|
#[derive(Default, Debug, PartialEq, Copy, Clone)]
|
||||||
pub struct CascadeCtrl {
|
pub struct CascadeCtrl {
|
||||||
/// Enable Cascade 0 signal active as a requirement for counting
|
/// Enable Cascade 0 signal active as a requirement for counting
|
||||||
pub enb_start_src_csd0: bool,
|
pub enb_start_src_csd0: bool,
|
||||||
|
@ -74,7 +74,7 @@ pub struct CascadeCtrl {
|
||||||
pub trg_csd2: bool,
|
pub trg_csd2: bool,
|
||||||
}
|
}
|
||||||
|
|
||||||
#[derive(Debug, PartialEq, Eq)]
|
#[derive(Debug, PartialEq)]
|
||||||
pub enum CascadeSel {
|
pub enum CascadeSel {
|
||||||
Csd0 = 0,
|
Csd0 = 0,
|
||||||
Csd1 = 1,
|
Csd1 = 1,
|
||||||
|
@ -82,7 +82,7 @@ pub enum CascadeSel {
|
||||||
}
|
}
|
||||||
|
|
||||||
/// The numbers are the base numbers for bundles like PORTA, PORTB or TIM
|
/// The numbers are the base numbers for bundles like PORTA, PORTB or TIM
|
||||||
#[derive(Debug, PartialEq, Eq)]
|
#[derive(Debug, PartialEq)]
|
||||||
pub enum CascadeSource {
|
pub enum CascadeSource {
|
||||||
PortABase = 0,
|
PortABase = 0,
|
||||||
PortBBase = 32,
|
PortBBase = 32,
|
||||||
|
@ -95,7 +95,7 @@ pub enum CascadeSource {
|
||||||
ClockDividerBase = 120,
|
ClockDividerBase = 120,
|
||||||
}
|
}
|
||||||
|
|
||||||
#[derive(Debug, PartialEq, Eq)]
|
#[derive(Debug, PartialEq)]
|
||||||
pub enum TimerErrors {
|
pub enum TimerErrors {
|
||||||
Canceled,
|
Canceled,
|
||||||
/// Invalid input for Cascade source
|
/// Invalid input for Cascade source
|
||||||
|
@ -576,6 +576,12 @@ impl<TIM: ValidTim> CountDownTimer<TIM> {
|
||||||
#[inline(always)]
|
#[inline(always)]
|
||||||
pub fn disable(&mut self) {
|
pub fn disable(&mut self) {
|
||||||
self.tim.reg().ctrl.modify(|_, w| w.enable().clear_bit());
|
self.tim.reg().ctrl.modify(|_, w| w.enable().clear_bit());
|
||||||
|
if let Some(irq_cfg) = self.irq_cfg {
|
||||||
|
self.disable_interrupt();
|
||||||
|
if irq_cfg.enable {
|
||||||
|
mask_irq(irq_cfg.irq);
|
||||||
|
}
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/// Disable the counter, setting both enable and active bit to 0
|
/// Disable the counter, setting both enable and active bit to 0
|
||||||
|
@ -742,9 +748,9 @@ pub fn set_up_ms_timer<TIM: ValidTim>(
|
||||||
sys_cfg: &mut pac::SYSCONFIG,
|
sys_cfg: &mut pac::SYSCONFIG,
|
||||||
irq_sel: Option<&mut pac::IRQSEL>,
|
irq_sel: Option<&mut pac::IRQSEL>,
|
||||||
sys_clk: impl Into<Hertz>,
|
sys_clk: impl Into<Hertz>,
|
||||||
tim0: TIM,
|
tim: TIM,
|
||||||
) -> CountDownTimer<TIM> {
|
) -> CountDownTimer<TIM> {
|
||||||
let mut ms_timer = CountDownTimer::new(sys_cfg, sys_clk, tim0);
|
let mut ms_timer = CountDownTimer::new(sys_cfg, sys_clk, tim);
|
||||||
ms_timer.listen(timer::Event::TimeOut, irq_cfg, irq_sel, Some(sys_cfg));
|
ms_timer.listen(timer::Event::TimeOut, irq_cfg, irq_sel, Some(sys_cfg));
|
||||||
ms_timer.start(1000.hz());
|
ms_timer.start(1000.hz());
|
||||||
ms_timer
|
ms_timer
|
||||||
|
|
10
src/uart.rs
10
src/uart.rs
|
@ -60,7 +60,7 @@ pub enum Error {
|
||||||
IrqError,
|
IrqError,
|
||||||
}
|
}
|
||||||
|
|
||||||
#[derive(Debug, PartialEq, Eq, Copy, Clone)]
|
#[derive(Debug, PartialEq, Copy, Clone)]
|
||||||
pub enum Event {
|
pub enum Event {
|
||||||
// Receiver FIFO interrupt enable. Generates interrupt
|
// Receiver FIFO interrupt enable. Generates interrupt
|
||||||
// when FIFO is at least half full. Half full is defined as FIFO
|
// when FIFO is at least half full. Half full is defined as FIFO
|
||||||
|
@ -84,20 +84,20 @@ pub enum Event {
|
||||||
TxCts,
|
TxCts,
|
||||||
}
|
}
|
||||||
|
|
||||||
#[derive(Copy, Clone, PartialEq, Eq)]
|
#[derive(Copy, Clone, PartialEq)]
|
||||||
pub enum Parity {
|
pub enum Parity {
|
||||||
None,
|
None,
|
||||||
Odd,
|
Odd,
|
||||||
Even,
|
Even,
|
||||||
}
|
}
|
||||||
|
|
||||||
#[derive(Copy, Clone, PartialEq, Eq)]
|
#[derive(Copy, Clone, PartialEq)]
|
||||||
pub enum StopBits {
|
pub enum StopBits {
|
||||||
One = 0,
|
One = 0,
|
||||||
Two = 1,
|
Two = 1,
|
||||||
}
|
}
|
||||||
|
|
||||||
#[derive(Copy, Clone, PartialEq, Eq)]
|
#[derive(Copy, Clone, PartialEq)]
|
||||||
pub enum WordSize {
|
pub enum WordSize {
|
||||||
Five = 0,
|
Five = 0,
|
||||||
Six = 1,
|
Six = 1,
|
||||||
|
@ -354,7 +354,7 @@ impl<UART: Instance> UartBase<UART> {
|
||||||
};
|
};
|
||||||
let x = sys_clk.0 as f32 / (config.baudrate.0 * baud_multiplier) as f32;
|
let x = sys_clk.0 as f32 / (config.baudrate.0 * baud_multiplier) as f32;
|
||||||
let integer_part = floorf(x) as u32;
|
let integer_part = floorf(x) as u32;
|
||||||
let frac = floorf(64.0 * (x - integer_part as f32) + 0.5) as u32;
|
let frac = floorf((64.0 * (x - integer_part as f32) + 0.5) as f32) as u32;
|
||||||
self.uart
|
self.uart
|
||||||
.clkscale
|
.clkscale
|
||||||
.write(|w| unsafe { w.bits(integer_part * 64 + frac) });
|
.write(|w| unsafe { w.bits(integer_part * 64 + frac) });
|
||||||
|
|
|
@ -6,7 +6,7 @@
|
||||||
use crate::pac;
|
use crate::pac;
|
||||||
use va108xx::{IOCONFIG, SYSCONFIG};
|
use va108xx::{IOCONFIG, SYSCONFIG};
|
||||||
|
|
||||||
#[derive(PartialEq, Eq, Debug)]
|
#[derive(PartialEq, Debug)]
|
||||||
pub enum UtilityError {
|
pub enum UtilityError {
|
||||||
InvalidCounterResetVal,
|
InvalidCounterResetVal,
|
||||||
InvalidPin,
|
InvalidPin,
|
||||||
|
@ -19,13 +19,13 @@ pub enum Funsel {
|
||||||
Funsel3 = 0b11,
|
Funsel3 = 0b11,
|
||||||
}
|
}
|
||||||
|
|
||||||
#[derive(Debug, Copy, Clone, PartialEq, Eq)]
|
#[derive(Debug, Copy, Clone, PartialEq)]
|
||||||
pub enum PortSel {
|
pub enum PortSel {
|
||||||
PortA,
|
PortA,
|
||||||
PortB,
|
PortB,
|
||||||
}
|
}
|
||||||
|
|
||||||
#[derive(Copy, Clone, PartialEq, Eq)]
|
#[derive(Copy, Clone, PartialEq)]
|
||||||
pub enum PeripheralSelect {
|
pub enum PeripheralSelect {
|
||||||
PortA = 0,
|
PortA = 0,
|
||||||
PortB = 1,
|
PortB = 1,
|
||||||
|
@ -46,7 +46,7 @@ pub enum PeripheralSelect {
|
||||||
/// use the IRQSEL register to route an interrupt, and whether the IRQ will be unmasked in the
|
/// use the IRQSEL register to route an interrupt, and whether the IRQ will be unmasked in the
|
||||||
/// Cortex-M0 NVIC. Both are generally necessary for IRQs to work, but the user might perform
|
/// Cortex-M0 NVIC. Both are generally necessary for IRQs to work, but the user might perform
|
||||||
/// this steps themselves
|
/// this steps themselves
|
||||||
#[derive(Debug, PartialEq, Eq, Clone, Copy)]
|
#[derive(Debug, PartialEq, Clone, Copy)]
|
||||||
pub struct IrqCfg {
|
pub struct IrqCfg {
|
||||||
/// Interrupt target vector. Should always be set, might be required for disabling IRQs
|
/// Interrupt target vector. Should always be set, might be required for disabling IRQs
|
||||||
pub irq: pac::Interrupt,
|
pub irq: pac::Interrupt,
|
||||||
|
@ -142,3 +142,8 @@ pub fn port_mux(
|
||||||
pub(crate) fn unmask_irq(irq: pac::Interrupt) {
|
pub(crate) fn unmask_irq(irq: pac::Interrupt) {
|
||||||
unsafe { cortex_m::peripheral::NVIC::unmask(irq) };
|
unsafe { cortex_m::peripheral::NVIC::unmask(irq) };
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#[inline]
|
||||||
|
pub(crate) fn mask_irq(irq: pac::Interrupt) {
|
||||||
|
cortex_m::peripheral::NVIC::mask(irq);
|
||||||
|
}
|
||||||
|
|
Loading…
Reference in New Issue
Block a user