1 Commits

Author SHA1 Message Date
0d74fd250f EGit integration
All checks were successful
Rust/va108xx-hal/pipeline/pr-main This commit looks good
- Changed license to Apache-2.0 only
- Added NOTICE file
- Added Jenkins CI/CD files
2021-12-06 13:01:50 +01:00
11 changed files with 35 additions and 50 deletions

View File

@ -8,25 +8,6 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
## [unreleased] ## [unreleased]
## [v0.4.1]
### Fixed
- Initial blockmode setting was not set in SPI constructor
## [v0.4.0]
### Changed
- Replaced `Hertz` by `impl Into<Hertz>` completely and removed
`+ Copy` where not necessary
## [v0.3.1]
- Updated all links to point to new repository
## [v0.3.0]
### Added ### Added
- TIM Cascade example - TIM Cascade example
@ -34,8 +15,6 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
### Changed ### Changed
- `CountDownTimer` new function now expects an `impl Into<Hertz>` instead of `Hertz` - `CountDownTimer` new function now expects an `impl Into<Hertz>` instead of `Hertz`
- Primary repository now hosted on IRS external git: https://egit.irs.uni-stuttgart.de/rust/va108xx-hal
- Relicensed as Apache-2.0
## [0.2.3] ## [0.2.3]

View File

@ -1,7 +1,7 @@
[package] [package]
name = "va108xx-hal" name = "va108xx-hal"
version = "0.4.1" version = "0.2.3"
authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"] authors = ["Robin Mueller <robin.mueller.m@gmail.com>"]
edition = "2021" edition = "2021"
description = "HAL for the Vorago VA108xx family of microcontrollers" description = "HAL for the Vorago VA108xx family of microcontrollers"
homepage = "https://egit.irs.uni-stuttgart.de/rust/va108xx-hal" homepage = "https://egit.irs.uni-stuttgart.de/rust/va108xx-hal"

View File

@ -59,7 +59,7 @@ your custom board.
The hello world of embedded development is usually to blinky a LED. This example The hello world of embedded development is usually to blinky a LED. This example
is contained within the is contained within the
[examples folder](https://egit.irs.uni-stuttgart.de/rust/va108xx-hal/src/branch/main/examples/blinky.rs). [examples folder](https://github.com/robamu-org/va108xx-hal-rs/tree/main/examples/blinky.rs).
1. Set up your Rust cross-compiler if you have not done so yet. See more in the [build chapter](#Building) 1. Set up your Rust cross-compiler if you have not done so yet. See more in the [build chapter](#Building)
2. Create a new binary crate with `cargo init` 2. Create a new binary crate with `cargo init`
@ -81,8 +81,12 @@ is contained within the
features = ["rt"] features = ["rt"]
``` ```
6. Build the application with `cargo build` 6. Build the application with
```sh
cargo build
```
7. Flashing the board might work differently for different boards and there is usually 7. Flashing the board might work differently for different boards and there is usually
more than one way. You can find example instructions for the REB1 development board more than one way. You can find example instructions for the REB1 development board
[here](https://github.com/robamu-org/vorago-reb1-rs). [here](https://github.com/robamu/vorago-reb1-rs).

View File

@ -114,8 +114,12 @@ fn main() -> ! {
match SPI_BUS_SEL { match SPI_BUS_SEL {
SpiBusSelect::SpiAPortA | SpiBusSelect::SpiAPortB => { SpiBusSelect::SpiAPortA | SpiBusSelect::SpiAPortB => {
if let Some(ref mut spi) = *spia_ref.borrow_mut() { if let Some(ref mut spi) = *spia_ref.borrow_mut() {
let transfer_cfg = let transfer_cfg = TransferConfig::new_no_hw_cs(
TransferConfig::new_no_hw_cs(SPI_SPEED_KHZ.khz(), SPI_MODE, BLOCKMODE, false); SPI_SPEED_KHZ.khz().into(),
SPI_MODE,
BLOCKMODE,
false,
);
spi.cfg_transfer(&transfer_cfg); spi.cfg_transfer(&transfer_cfg);
} }
} }
@ -123,7 +127,7 @@ fn main() -> ! {
if let Some(ref mut spi) = *spib_ref.borrow_mut() { if let Some(ref mut spi) = *spib_ref.borrow_mut() {
let hw_cs_pin = pinsb.pb2.into_funsel_1(); let hw_cs_pin = pinsb.pb2.into_funsel_1();
let transfer_cfg = TransferConfig::new( let transfer_cfg = TransferConfig::new(
SPI_SPEED_KHZ.khz(), SPI_SPEED_KHZ.khz().into(),
SPI_MODE, SPI_MODE,
Some(hw_cs_pin), Some(hw_cs_pin),
BLOCKMODE, BLOCKMODE,

View File

@ -25,7 +25,7 @@ fn main() -> ! {
(tx, rx), (tx, rx),
115200.bps(), 115200.bps(),
&mut dp.SYSCONFIG, &mut dp.SYSCONFIG,
50.mhz(), 50.mhz().into(),
); );
let (mut tx, mut rx) = uartb.split(); let (mut tx, mut rx) = uartb.split();
writeln!(tx, "Hello World\r").unwrap(); writeln!(tx, "Hello World\r").unwrap();

View File

@ -20,7 +20,7 @@
//! //!
//! ## Examples //! ## Examples
//! //!
//! - [Blinky example](https://egit.irs.uni-stuttgart.de/rust/va108xx-hal/src/branch/main/examples/blinky.rs) //! - [Blinky example](https://github.com/robamu-org/va108xx-hal-rs/blob/main/examples/blinky.rs)
pub mod dynpins; pub mod dynpins;
pub use dynpins::*; pub use dynpins::*;

View File

@ -231,7 +231,7 @@ macro_rules! i2c_base {
impl I2cBase<$I2CX> { impl I2cBase<$I2CX> {
pub fn $i2cx( pub fn $i2cx(
i2c: $I2CX, i2c: $I2CX,
sys_clk: impl Into<Hertz>, sys_clk: impl Into<Hertz> + Copy,
speed_mode: I2cSpeed, speed_mode: I2cSpeed,
ms_cfg: Option<&MasterConfig>, ms_cfg: Option<&MasterConfig>,
sl_cfg: Option<&SlaveConfig>, sl_cfg: Option<&SlaveConfig>,
@ -740,7 +740,7 @@ macro_rules! i2c_slave {
fn $i2cx_slave( fn $i2cx_slave(
i2c: $I2CX, i2c: $I2CX,
cfg: SlaveConfig, cfg: SlaveConfig,
sys_clk: impl Into<Hertz>, sys_clk: impl Into<Hertz> + Copy,
speed_mode: I2cSpeed, speed_mode: I2cSpeed,
sys_cfg: Option<&mut SYSCONFIG>, sys_cfg: Option<&mut SYSCONFIG>,
) -> Self { ) -> Self {
@ -897,7 +897,7 @@ macro_rules! i2c_slave {
pub fn i2ca( pub fn i2ca(
i2c: $I2CX, i2c: $I2CX,
cfg: SlaveConfig, cfg: SlaveConfig,
sys_clk: impl Into<Hertz>, sys_clk: impl Into<Hertz> + Copy,
speed_mode: I2cSpeed, speed_mode: I2cSpeed,
sys_cfg: Option<&mut SYSCONFIG>, sys_cfg: Option<&mut SYSCONFIG>,
) -> Result<Self, Error> { ) -> Result<Self, Error> {
@ -912,7 +912,7 @@ macro_rules! i2c_slave {
pub fn $i2cx( pub fn $i2cx(
i2c: $I2CX, i2c: $I2CX,
cfg: SlaveConfig, cfg: SlaveConfig,
sys_clk: impl Into<Hertz>, sys_clk: impl Into<Hertz> + Copy,
speed_mode: I2cSpeed, speed_mode: I2cSpeed,
sys_cfg: Option<&mut SYSCONFIG>, sys_cfg: Option<&mut SYSCONFIG>,
) -> Self { ) -> Self {

View File

@ -4,7 +4,7 @@
//! //!
//! ## Examples //! ## Examples
//! //!
//! - [PWM example](https://egit.irs.uni-stuttgart.de/rust/va108xx-hal/src/branch/main/examples/pwm.rs) //! - [PWM example](https://github.com/robamu-org/va108xx-hal-rs/blob/main/examples/pwm.rs)
use core::marker::PhantomData; use core::marker::PhantomData;
use crate::{clock::enable_peripheral_clock, gpio::DynPinId}; use crate::{clock::enable_peripheral_clock, gpio::DynPinId};

View File

@ -2,7 +2,7 @@
//! //!
//! ## Examples //! ## Examples
//! //!
//! - [Blocking SPI example](https://egit.irs.uni-stuttgart.de/rust/va108xx-hal/src/branch/main/examples/spi.rs) //! - [Blocking SPI example](https://github.com/robamu-org/va108xx-hal-rs/blob/main/examples/spi.rs)
use crate::Sealed; use crate::Sealed;
use crate::{ use crate::{
clock::{enable_peripheral_clock, PeripheralClocks}, clock::{enable_peripheral_clock, PeripheralClocks},
@ -218,9 +218,9 @@ pub struct ReducedTransferConfig {
} }
impl TransferConfig<NoneT> { impl TransferConfig<NoneT> {
pub fn new_no_hw_cs(spi_clk: impl Into<Hertz>, mode: Mode, blockmode: bool, sod: bool) -> Self { pub fn new_no_hw_cs(spi_clk: Hertz, mode: Mode, blockmode: bool, sod: bool) -> Self {
TransferConfig { TransferConfig {
spi_clk: spi_clk.into(), spi_clk,
mode, mode,
hw_cs: None, hw_cs: None,
sod, sod,
@ -231,14 +231,14 @@ impl TransferConfig<NoneT> {
impl<HWCS: HwCs> TransferConfig<HWCS> { impl<HWCS: HwCs> TransferConfig<HWCS> {
pub fn new( pub fn new(
spi_clk: impl Into<Hertz>, spi_clk: Hertz,
mode: Mode, mode: Mode,
hw_cs: Option<HWCS>, hw_cs: Option<HWCS>,
blockmode: bool, blockmode: bool,
sod: bool, sod: bool,
) -> Self { ) -> Self {
TransferConfig { TransferConfig {
spi_clk: spi_clk.into(), spi_clk,
mode, mode,
hw_cs, hw_cs,
sod, sod,
@ -428,7 +428,6 @@ macro_rules! spi {
w.sod().bit(sod); w.sod().bit(sod);
w.ms().bit(ms); w.ms().bit(ms);
w.mdlycap().bit(mdlycap); w.mdlycap().bit(mdlycap);
w.blockmode().bit(init_blockmode);
unsafe { w.ss().bits(ss) } unsafe { w.ss().bits(ss) }
}); });
@ -453,7 +452,7 @@ macro_rules! spi {
} }
#[inline] #[inline]
pub fn cfg_clock(&mut self, spi_clk: impl Into<Hertz>) { pub fn cfg_clock(&mut self, spi_clk: Hertz) {
self.spi_base.cfg_clock(spi_clk); self.spi_base.cfg_clock(spi_clk);
} }
@ -483,8 +482,8 @@ macro_rules! spi {
impl<WORD: Word> SpiBase<$SPIX, WORD> { impl<WORD: Word> SpiBase<$SPIX, WORD> {
#[inline] #[inline]
pub fn cfg_clock(&mut self, spi_clk: impl Into<Hertz>) { pub fn cfg_clock(&mut self, spi_clk: Hertz) {
let clk_prescale = self.sys_clk.0 / (spi_clk.into().0 * (self.cfg.scrdv as u32 + 1)); let clk_prescale = self.sys_clk.0 / (spi_clk.0 * (self.cfg.scrdv as u32 + 1));
self.spi self.spi
.clkprescale .clkprescale
.write(|w| unsafe { w.bits(clk_prescale) }); .write(|w| unsafe { w.bits(clk_prescale) });

View File

@ -2,8 +2,7 @@
//! //!
//! ## Examples //! ## Examples
//! //!
//! - [MS and second tick implementation](https://egit.irs.uni-stuttgart.de/rust/va108xx-hal/src/branch/main/examples/timer-ticks.rs) //! - [MS and second tick implementation](https://github.com/robamu-org/va108xx-hal-rs/blob/main/examples/timer-ticks.rs)
//! - [Cascade feature example](https://egit.irs.uni-stuttgart.de/rust/va108xx-hal/src/branch/main/examples/cascade.rs)
use crate::{ use crate::{
clock::{enable_peripheral_clock, PeripheralClocks}, clock::{enable_peripheral_clock, PeripheralClocks},
gpio::{ gpio::{

View File

@ -2,7 +2,7 @@
//! //!
//! ## Examples //! ## Examples
//! //!
//! - [UART example](https://egit.irs.uni-stuttgart.de/rust/va108xx-hal/src/branch/main/examples/uart.rs) //! - [UART example](https://github.com/robamu-org/va108xx-hal-rs/blob/main/examples/uart.rs)
use core::{convert::Infallible, ptr}; use core::{convert::Infallible, ptr};
use core::{marker::PhantomData, ops::Deref}; use core::{marker::PhantomData, ops::Deref};
use libm::floorf; use libm::floorf;
@ -306,12 +306,12 @@ macro_rules! uart_impl {
pins: PINS, pins: PINS,
config: impl Into<Config>, config: impl Into<Config>,
syscfg: &mut SYSCONFIG, syscfg: &mut SYSCONFIG,
sys_clk: impl Into<Hertz> sys_clk: Hertz
) -> Self ) -> Self
{ {
enable_peripheral_clock(syscfg, $clk_enb_enum); enable_peripheral_clock(syscfg, $clk_enb_enum);
Uart { uart, pins, tx: Tx::new(), rx: Rx::new() }.init( Uart { uart, pins, tx: Tx::new(), rx: Rx::new() }.init(
config.into(), sys_clk.into() config.into(), sys_clk
) )
} }
} }