822 lines
24 KiB
Rust
822 lines
24 KiB
Rust
//! # Type-level module for GPIO pins
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//!
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//! This module provides a type-level API for GPIO pins. It uses the type system
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//! to track the state of pins at compile-time. Representing GPIO pins in this
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//! manner incurs no run-time overhead. Each [`Pin`] struct is zero-sized, so
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//! there is no data to copy around. Instead, real code is generated as a side
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//! effect of type transformations, and the resulting assembly is nearly
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//! identical to the equivalent, hand-written C.
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//!
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//! To track the state of pins at compile-time, this module uses traits to
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//! represent [type classes] and types as instances of those type classes. For
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//! example, the trait [`InputConfig`] acts as a [type-level enum] of the
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//! available input configurations, and the types [`Floating`], [`PullDown`] and
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//! [`PullUp`] are its type-level variants.
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//!
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//! Type-level [`Pin`]s are parameterized by two type-level enums, [`PinId`] and
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//! [`PinMode`].
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//!
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//! ```
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//! pub struct Pin<I, M>
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//! where
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//! I: PinId,
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//! M: PinMode,
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//! {
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//! // ...
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//! }
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//! ```
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//!
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//! A `PinId` identifies a pin by it's group (A, B) and pin number. Each
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//! `PinId` instance is named according to its datasheet identifier, e.g.
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//! [`PA02`].
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//!
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//! A `PinMode` represents the various pin modes. The available `PinMode`
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//! variants are [`Input`], [`Output`] and [`Alternate`], each with its own corresponding
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//! configurations.
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//!
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//! It is not possible for users to create new instances of a [`Pin`]. Singleton
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//! instances of each pin are made available to users through the [`Pins`]
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//! struct.
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//!
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//! To create the [`PinsA`] or [`PinsB`] struct, users must supply the PAC
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//! [`PORTA`](crate::pac::PORTA) or [`PORTB`](crate::pac::PORTB)peripheral.
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//! The struct takes ownership of the port and provides the corresponding pins. Each [`Pin`]
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//! within the [`PinsA`] or [`PinsB`] struct can be moved out and used individually.
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//! The pins structure can also consume the [`IOCONFIG`] structure optionally by
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//! passing it as an option
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//!
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//! ```
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//! let mut peripherals = Peripherals::take().unwrap();
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//! let pins = Pins::new(&mut dp.SYSCONFIG, Some(dp.IOCONFIG), dp.PORTA);
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//! ```
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//!
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//! Pins can be converted between modes using several different methods.
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//!
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//! ```
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//! // Use one of the literal function names
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//! let pa0 = pins.pa0.into_floating_input();
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//! // Use a generic method and one of the `PinMode` variant types
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//! let pa0 = pins.pa0.into_mode::<FloatingInput>();
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//! // Specify the target type and use `From`/`Into`
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//! let pa0: Pin<PA0, FloatingInput> = pins.pa0.into();
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//! ```
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//!
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//! # Embedded HAL traits
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//!
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//! This module implements all of the embedded HAL GPIO traits for each [`Pin`]
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//! in the corresponding [`PinMode`]s, namely: [`InputPin`], [`OutputPin`],
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//! [`ToggleableOutputPin`].
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//!
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//! For example, you can control the logic level of an `OutputPin` like so
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//!
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//! ```
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//! use atsamd_hal::pac::Peripherals;
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//! use atsamd_hal::gpio::v2::Pins;
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//! use embedded_hal::digital::v2::OutputPin;
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//!
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//! let mut peripherals = Peripherals::take().unwrap();
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//! let mut pins = Pins::new(&mut dp.SYSCONFIG, Some(dp.IOCONFIG), dp.PORTA);
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//! pins.pa0.set_high();
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//! ```
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//!
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//! # Type-level features
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//!
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//! This module also provides additional, type-level tools to work with GPIO
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//! pins.
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//!
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//! The [`OptionalPinId`] and [`OptionalPin`] traits use the [`OptionalKind`]
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//! pattern to act as type-level versions of [`Option`] for `PinId` and `Pin`
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//! respectively. And the [`AnyPin`] trait defines an [`AnyKind`] type class
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//! for all `Pin` types.
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//!
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//! [type classes]: crate::typelevel#type-classes
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//! [type-level enum]: crate::typelevel#type-level-enum
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//! [`OptionalKind`]: crate::typelevel#optionalkind-trait-pattern
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//! [`AnyKind`]: crate::typelevel#anykind-trait-pattern
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use super::dynpins::{DynAlternate, DynGroup, DynInput, DynOutput, DynPinId, DynPinMode};
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use super::reg::RegisterInterface;
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use crate::pac::{IOCONFIG, PORTA, PORTB, SYSCONFIG};
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use crate::typelevel::Is;
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use crate::Sealed;
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use core::convert::Infallible;
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use core::marker::PhantomData;
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use embedded_hal::digital::v2::{InputPin, OutputPin, ToggleableOutputPin};
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use paste::paste;
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//==================================================================================================
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// Errors and Definitions
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//==================================================================================================
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#[derive(Debug, PartialEq)]
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pub enum PinState {
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Low = 0,
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High = 1,
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}
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/// GPIO error type
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///
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/// [`DynPin`]s are not tracked and verified at compile-time, so run-time
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/// operations are fallible. This `enum` represents the corresponding errors.
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#[derive(Debug, PartialEq)]
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pub enum PinError {
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/// The pin did not have the correct ID or mode for the requested operation
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InvalidPinType,
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InputDisabledForOutput,
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IsMasked,
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}
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//==================================================================================================
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// Input configuration
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//==================================================================================================
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/// Type-level enum for input configurations
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///
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/// The valid options are [`Floating`], [`PullDown`] and [`PullUp`].
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pub trait InputConfig: Sealed {
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/// Corresponding [`DynInput`](super::DynInput)
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const DYN: DynInput;
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}
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pub enum Floating {}
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pub enum PullDown {}
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pub enum PullUp {}
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impl InputConfig for Floating {
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const DYN: DynInput = DynInput::Floating;
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}
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impl InputConfig for PullDown {
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const DYN: DynInput = DynInput::PullDown;
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}
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impl InputConfig for PullUp {
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const DYN: DynInput = DynInput::PullUp;
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}
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impl Sealed for Floating {}
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impl Sealed for PullDown {}
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impl Sealed for PullUp {}
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/// Type-level variant of [`PinMode`] for floating input mode
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pub type InputFloating = Input<Floating>;
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/// Type-level variant of [`PinMode`] for pull-down input mode
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pub type InputPullDown = Input<PullDown>;
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/// Type-level variant of [`PinMode`] for pull-up input mode
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pub type InputPullUp = Input<PullUp>;
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/// Type-level variant of [`PinMode`] for input modes
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///
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/// Type `C` is one of three input configurations: [`Floating`], [`PullDown`] or
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/// [`PullUp`]
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pub struct Input<C: InputConfig> {
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cfg: PhantomData<C>,
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}
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impl<C: InputConfig> Sealed for Input<C> {}
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pub enum FilterType {
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SystemClock = 0,
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DirectInputWithSynchronization = 1,
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FilterOneClockCycle = 2,
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FilterTwoClockCycles = 3,
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FilterThreeClockCycles = 4,
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FilterFourClockCycles = 5,
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}
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pub enum FilterClkSel {
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SysClk = 0,
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Clk1 = 1,
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Clk2 = 2,
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Clk3 = 3,
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Clk4 = 4,
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Clk5 = 5,
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Clk6 = 6,
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Clk7 = 7,
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}
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//==================================================================================================
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// Output configuration
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//==================================================================================================
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pub trait OutputConfig: Sealed {
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const DYN: DynOutput;
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}
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/// Type-level variant of [`OutputConfig`] for a push-pull configuration
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pub enum PushPull {}
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/// Type-level variant of [`OutputConfig`] for an open drain configuration
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pub enum OpenDrain {}
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/// Type-level variant of [`OutputConfig`] for a readable push-pull configuration
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pub enum ReadablePushPull {}
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/// Type-level variant of [`OutputConfig`] for a readable open-drain configuration
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pub enum ReadableOpenDrain {}
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impl Sealed for PushPull {}
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impl Sealed for OpenDrain {}
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impl Sealed for ReadableOpenDrain {}
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impl Sealed for ReadablePushPull {}
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impl OutputConfig for PushPull {
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const DYN: DynOutput = DynOutput::PushPull;
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}
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impl OutputConfig for OpenDrain {
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const DYN: DynOutput = DynOutput::OpenDrain;
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}
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impl OutputConfig for ReadablePushPull {
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const DYN: DynOutput = DynOutput::ReadablePushPull;
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}
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impl OutputConfig for ReadableOpenDrain {
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const DYN: DynOutput = DynOutput::ReadableOpenDrain;
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}
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/// Type-level variant of [`PinMode`] for output modes
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///
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/// Type `C` is one of two output configurations: [`PushPull`] or [`Readable`]
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pub struct Output<C: OutputConfig> {
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cfg: PhantomData<C>,
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}
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impl<C: OutputConfig> Sealed for Output<C> {}
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/// Type-level variant of [`PinMode`] for push-pull output mode
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pub type PushPullOutput = Output<PushPull>;
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/// Type-level variant of [`PinMode`] for open drain output mode
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pub type OutputOpenDrain = Output<OpenDrain>;
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pub type OutputReadablePushPull = Output<ReadablePushPull>;
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pub type OutputReadableOpenDrain = Output<ReadableOpenDrain>;
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//==================================================================================================
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// Alternate configurations
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//==================================================================================================
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/// Type-level enum for alternate peripheral function configurations
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pub trait AlternateConfig: Sealed {
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const DYN: DynAlternate;
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}
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pub enum Funsel1 {}
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pub enum Funsel2 {}
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pub enum Funsel3 {}
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impl AlternateConfig for Funsel1 {
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const DYN: DynAlternate = DynAlternate::Funsel1;
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}
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impl AlternateConfig for Funsel2 {
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const DYN: DynAlternate = DynAlternate::Funsel2;
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}
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impl AlternateConfig for Funsel3 {
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const DYN: DynAlternate = DynAlternate::Funsel3;
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}
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impl Sealed for Funsel1 {}
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impl Sealed for Funsel2 {}
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impl Sealed for Funsel3 {}
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/// Type-level variant of [`PinMode`] for alternate peripheral functions
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///
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/// Type `C` is an [`AlternateConfig`]
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pub struct Alternate<C: AlternateConfig> {
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cfg: PhantomData<C>,
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}
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impl<C: AlternateConfig> Sealed for Alternate<C> {}
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pub type AltFunc1 = Alternate<Funsel1>;
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pub type AltFunc2 = Alternate<Funsel2>;
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pub type AltFunc3 = Alternate<Funsel3>;
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/// Type alias for the [`PinMode`] at reset
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pub type Reset = InputFloating;
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//==================================================================================================
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// Pin modes
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//==================================================================================================
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/// Type-level enum representing pin modes
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///
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/// The valid options are [`Input`], [`Output`] and [`Alternate`].
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pub trait PinMode: Sealed {
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/// Corresponding [`DynPinMode`](super::DynPinMode)
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const DYN: DynPinMode;
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}
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impl<C: InputConfig> PinMode for Input<C> {
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const DYN: DynPinMode = DynPinMode::Input(C::DYN);
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}
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impl<C: OutputConfig> PinMode for Output<C> {
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const DYN: DynPinMode = DynPinMode::Output(C::DYN);
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}
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impl<C: AlternateConfig> PinMode for Alternate<C> {
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const DYN: DynPinMode = DynPinMode::Alternate(C::DYN);
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}
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//==================================================================================================
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// Pin IDs
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//==================================================================================================
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/// Type-level enum for pin IDs
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pub trait PinId: Sealed {
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/// Corresponding [`DynPinId`](super::DynPinId)
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const DYN: DynPinId;
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}
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macro_rules! pin_id {
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($Group:ident, $Id:ident, $NUM:literal) => {
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// Need paste macro to use ident in doc attribute
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paste! {
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#[doc = "Pin ID representing pin " $Id]
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pub enum $Id {}
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impl Sealed for $Id {}
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impl PinId for $Id {
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const DYN: DynPinId = DynPinId {
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group: DynGroup::$Group,
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num: $NUM,
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};
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}
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}
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};
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}
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//==================================================================================================
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// Pin
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//==================================================================================================
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/// A type-level GPIO pin, parameterized by [`PinId`] and [`PinMode`] types
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pub struct Pin<I: PinId, M: PinMode> {
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pub(in crate::gpio) regs: Registers<I>,
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mode: PhantomData<M>,
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}
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impl<I: PinId, M: PinMode> Sealed for Pin<I, M> {}
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impl<I: PinId, M: PinMode> AnyPin for Pin<I, M> {
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type Id = I;
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type Mode = M;
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}
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impl<I: PinId, M: PinMode> Pin<I, M> {
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/// Create a new [`Pin`]
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///
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/// # Safety
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///
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/// Each [`Pin`] must be a singleton. For a given [`PinId`], there must be
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/// at most one corresponding [`Pin`] in existence at any given time.
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/// Violating this requirement is `unsafe`.
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#[inline]
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pub(crate) unsafe fn new() -> Pin<I, M> {
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Pin {
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regs: Registers::new(),
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mode: PhantomData,
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}
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}
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/// Convert the pin to the requested [`PinMode`]
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#[inline]
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pub fn into_mode<N: PinMode>(mut self) -> Pin<I, N> {
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// Only modify registers if we are actually changing pin mode
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// This check should compile away
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if N::DYN != M::DYN {
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self.regs.change_mode::<N>();
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}
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// Safe because we drop the existing Pin
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unsafe { Pin::new() }
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}
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/// Configure the pin for function select 1. See Programmer Guide p.40 for the function table
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#[inline]
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pub fn into_funsel_1(self) -> Pin<I, AltFunc1> {
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self.into_mode()
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}
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/// Configure the pin for function select 2. See Programmer Guide p.40 for the function table
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#[inline]
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pub fn into_funsel_2(self) -> Pin<I, AltFunc2> {
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self.into_mode()
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}
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/// Configure the pin for function select 3. See Programmer Guide p.40 for the function table
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#[inline]
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pub fn into_funsel_3(self) -> Pin<I, AltFunc3> {
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self.into_mode()
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}
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/// Configure the pin to operate as a floating input
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#[inline]
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pub fn into_floating_input(self) -> Pin<I, InputFloating> {
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self.into_mode()
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}
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/// Configure the pin to operate as a pulled down input
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|
#[inline]
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pub fn into_pull_down_input(self) -> Pin<I, InputPullDown> {
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self.into_mode()
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}
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/// Configure the pin to operate as a pulled up input
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|
#[inline]
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pub fn into_pull_up_input(self) -> Pin<I, InputPullUp> {
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self.into_mode()
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}
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|
|
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/// Configure the pin to operate as a push-pull output
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|
#[inline]
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|
pub fn into_push_pull_output(self) -> Pin<I, PushPullOutput> {
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|
self.into_mode()
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|
}
|
|
|
|
/// Configure the pin to operate as a readable push-pull output
|
|
#[inline]
|
|
pub fn into_readable_push_pull_output(self) -> Pin<I, OutputReadablePushPull> {
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|
self.into_mode()
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|
}
|
|
|
|
/// Configure the pin to operate as a readable open-drain output
|
|
#[inline]
|
|
pub fn into_readable_open_drain_output(self) -> Pin<I, OutputReadableOpenDrain> {
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|
self.into_mode()
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|
}
|
|
|
|
#[inline]
|
|
pub fn datamask(&self) -> bool {
|
|
self.regs.datamask()
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|
}
|
|
|
|
#[inline]
|
|
pub fn clear_datamask(self) -> Self {
|
|
self.regs.clear_datamask();
|
|
self
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|
}
|
|
|
|
#[inline]
|
|
pub fn set_datamask(self) -> Self {
|
|
self.regs.set_datamask();
|
|
self
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|
}
|
|
|
|
#[inline]
|
|
pub fn is_high_masked(&self) -> Result<bool, PinError> {
|
|
self.regs.read_pin_masked()
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|
}
|
|
|
|
#[inline]
|
|
pub fn is_low_masked(&self) -> Result<bool, PinError> {
|
|
self.regs.read_pin_masked().map(|v| !v)
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|
}
|
|
|
|
#[inline]
|
|
pub fn set_high_masked(&mut self) -> Result<(), PinError> {
|
|
self.regs.write_pin_masked(true)
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|
}
|
|
|
|
#[inline]
|
|
pub fn set_low_masked(&mut self) -> Result<(), PinError> {
|
|
self.regs.write_pin_masked(false)
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|
}
|
|
|
|
#[inline]
|
|
pub(crate) fn _set_high(&mut self) {
|
|
self.regs.write_pin(true)
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|
}
|
|
|
|
#[inline]
|
|
pub(crate) fn _set_low(&mut self) {
|
|
self.regs.write_pin(false)
|
|
}
|
|
|
|
#[inline]
|
|
pub(crate) fn _toggle(&mut self) {
|
|
self.regs.toggle();
|
|
}
|
|
|
|
#[inline]
|
|
pub(crate) fn _is_low(&self) -> bool {
|
|
!self.regs.read_pin()
|
|
}
|
|
|
|
#[inline]
|
|
pub(crate) fn _is_high(&self) -> bool {
|
|
self.regs.read_pin()
|
|
}
|
|
}
|
|
|
|
pub type SpecificPin<P> = Pin<<P as AnyPin>::Id, <P as AnyPin>::Mode>;
|
|
|
|
//==================================================================================================
|
|
// AnyPin
|
|
//==================================================================================================
|
|
|
|
/// Type class for [`Pin`] types
|
|
///
|
|
/// This trait uses the [`AnyKind`] trait pattern to create a [type class] for
|
|
/// [`Pin`] types. See the `AnyKind` documentation for more details on the
|
|
/// pattern.
|
|
pub trait AnyPin: Is<Type = SpecificPin<Self>> {
|
|
type Id: PinId;
|
|
type Mode: PinMode;
|
|
}
|
|
|
|
impl<I: PinId, M: PinMode> AsRef<Self> for Pin<I, M> {
|
|
#[inline]
|
|
fn as_ref(&self) -> &Self {
|
|
self
|
|
}
|
|
}
|
|
|
|
impl<I: PinId, M: PinMode> AsMut<Self> for Pin<I, M> {
|
|
#[inline]
|
|
fn as_mut(&mut self) -> &mut Self {
|
|
self
|
|
}
|
|
}
|
|
|
|
//==================================================================================================
|
|
// Additional functionality
|
|
//==================================================================================================
|
|
|
|
impl<I: PinId, C: OutputConfig> Pin<I, Output<C>> {
|
|
/// See p.53 of the programmers guide for more information.
|
|
/// Possible delays in clock cycles:
|
|
/// - Delay 1: 1
|
|
/// - Delay 2: 2
|
|
/// - Delay 1 + Delay 2: 3
|
|
#[inline]
|
|
pub fn delay(self, delay_1: bool, delay_2: bool) -> Self {
|
|
self.regs.delay(delay_1, delay_2);
|
|
self
|
|
}
|
|
|
|
/// See p.52 of the programmers guide for more information.
|
|
/// When configured for pulse mode, a given pin will set the non-default state for exactly
|
|
/// one clock cycle before returning to the configured default state
|
|
pub fn pulse_mode(self, enable: bool, default_state: PinState) -> Self {
|
|
self.regs.pulse_mode(enable, default_state);
|
|
self
|
|
}
|
|
}
|
|
|
|
impl<I: PinId, C: InputConfig> Pin<I, Input<C>> {
|
|
/// See p.37 and p.38 of the programmers guide for more information.
|
|
#[inline]
|
|
pub fn filter_type(self, filter: FilterType, clksel: FilterClkSel) -> Self {
|
|
self.regs.filter_type(filter, clksel);
|
|
self
|
|
}
|
|
}
|
|
|
|
//==================================================================================================
|
|
// Embedded HAL traits
|
|
//==================================================================================================
|
|
|
|
impl<I: PinId, C: OutputConfig> OutputPin for Pin<I, Output<C>> {
|
|
type Error = Infallible;
|
|
|
|
#[inline]
|
|
fn set_high(&mut self) -> Result<(), Self::Error> {
|
|
self._set_high();
|
|
Ok(())
|
|
}
|
|
|
|
#[inline]
|
|
fn set_low(&mut self) -> Result<(), Self::Error> {
|
|
self._set_low();
|
|
Ok(())
|
|
}
|
|
}
|
|
|
|
impl<I: PinId, C: OutputConfig> ToggleableOutputPin for Pin<I, Output<C>> {
|
|
type Error = Infallible;
|
|
|
|
#[inline]
|
|
fn toggle(&mut self) -> Result<(), Self::Error> {
|
|
self._toggle();
|
|
Ok(())
|
|
}
|
|
}
|
|
|
|
impl<I: PinId, C: InputConfig> InputPin for Pin<I, Input<C>> {
|
|
type Error = Infallible;
|
|
|
|
#[inline]
|
|
fn is_high(&self) -> Result<bool, Self::Error> {
|
|
Ok(self._is_high())
|
|
}
|
|
#[inline]
|
|
fn is_low(&self) -> Result<bool, Self::Error> {
|
|
Ok(self._is_low())
|
|
}
|
|
}
|
|
|
|
impl<I: PinId> InputPin for Pin<I, OutputReadableOpenDrain> {
|
|
type Error = Infallible;
|
|
|
|
#[inline]
|
|
fn is_high(&self) -> Result<bool, Self::Error> {
|
|
Ok(self._is_high())
|
|
}
|
|
|
|
#[inline]
|
|
fn is_low(&self) -> Result<bool, Self::Error> {
|
|
Ok(self._is_low())
|
|
}
|
|
}
|
|
|
|
impl<I: PinId> InputPin for Pin<I, OutputReadablePushPull> {
|
|
type Error = Infallible;
|
|
|
|
#[inline]
|
|
fn is_high(&self) -> Result<bool, Self::Error> {
|
|
Ok(self._is_high())
|
|
}
|
|
|
|
#[inline]
|
|
fn is_low(&self) -> Result<bool, Self::Error> {
|
|
Ok(self._is_low())
|
|
}
|
|
}
|
|
|
|
//==================================================================================================
|
|
// Registers
|
|
//==================================================================================================
|
|
|
|
/// Provide a safe register interface for [`Pin`]s
|
|
///
|
|
/// This `struct` takes ownership of a [`PinId`] and provides an API to
|
|
/// access the corresponding regsiters.
|
|
pub(in crate::gpio) struct Registers<I: PinId> {
|
|
id: PhantomData<I>,
|
|
}
|
|
|
|
// [`Registers`] takes ownership of the [`PinId`], and [`Pin`] guarantees that
|
|
// each pin is a singleton, so this implementation is safe.
|
|
unsafe impl<I: PinId> RegisterInterface for Registers<I> {
|
|
#[inline]
|
|
fn id(&self) -> DynPinId {
|
|
I::DYN
|
|
}
|
|
}
|
|
|
|
impl<I: PinId> Registers<I> {
|
|
/// Create a new instance of [`Registers`]
|
|
///
|
|
/// # Safety
|
|
///
|
|
/// Users must never create two simultaneous instances of this `struct` with
|
|
/// the same [`PinId`]
|
|
#[inline]
|
|
unsafe fn new() -> Self {
|
|
Registers { id: PhantomData }
|
|
}
|
|
|
|
/// Provide a type-level equivalent for the
|
|
/// [`RegisterInterface::change_mode`] method.
|
|
#[inline]
|
|
pub(in crate::gpio) fn change_mode<M: PinMode>(&mut self) {
|
|
RegisterInterface::change_mode(self, M::DYN);
|
|
}
|
|
}
|
|
|
|
//==================================================================================================
|
|
// Pin definitions
|
|
//==================================================================================================
|
|
|
|
macro_rules! pins {
|
|
(
|
|
$Port:ident, $PinsName:ident, $($Id:ident,)+,
|
|
) => {
|
|
paste!(
|
|
/// Collection of all the individual [`Pin`]s for a given port (PORTA or PORTB)
|
|
pub struct $PinsName {
|
|
iocfg: Option<IOCONFIG>,
|
|
port: $Port,
|
|
$(
|
|
#[doc = "Pin " $Id]
|
|
pub [<$Id:lower>]: Pin<$Id, Reset>,
|
|
)+
|
|
}
|
|
|
|
impl $PinsName{
|
|
/// Create a new struct containing all the Pins. Passing the IOCONFIG peripheral
|
|
/// is optional because it might be required to create pin definitions for both
|
|
/// ports.
|
|
#[inline]
|
|
pub fn new(
|
|
syscfg: &mut SYSCONFIG,
|
|
iocfg: Option<IOCONFIG>,
|
|
port: $Port
|
|
) -> $PinsName {
|
|
syscfg.peripheral_clk_enable.modify(|_, w| {
|
|
w.[<$Port:lower>]().set_bit();
|
|
w.gpio().set_bit();
|
|
w.ioconfig().set_bit()
|
|
});
|
|
$PinsName {
|
|
iocfg,
|
|
port,
|
|
// Safe because we only create one `Pin` per `PinId`
|
|
$(
|
|
[<$Id:lower>]: unsafe { Pin::new() },
|
|
)+
|
|
}
|
|
}
|
|
|
|
/// Get the peripheral ID
|
|
/// Safety: Read-only register
|
|
pub fn get_perid() -> u32 {
|
|
let port = unsafe { &(*$Port::ptr()) };
|
|
port.perid.read().bits()
|
|
}
|
|
|
|
/// Consumes the Pins struct and returns the port definitions
|
|
pub fn release(self) -> (Option<IOCONFIG>, $Port) {
|
|
(self.iocfg, self.port)
|
|
}
|
|
}
|
|
);
|
|
}
|
|
}
|
|
|
|
macro_rules! declare_pins {
|
|
(
|
|
$Group:ident, $PinsName:ident, $Port:ident, [$(($Id:ident, $NUM:literal),)+]
|
|
) => {
|
|
pins!($Port, $PinsName, $($Id,)+,);
|
|
$(
|
|
pin_id!($Group, $Id, $NUM);
|
|
)+
|
|
}
|
|
}
|
|
|
|
declare_pins!(
|
|
A,
|
|
PinsA,
|
|
PORTA,
|
|
[
|
|
(PA0, 0),
|
|
(PA1, 1),
|
|
(PA2, 2),
|
|
(PA3, 3),
|
|
(PA4, 4),
|
|
(PA5, 5),
|
|
(PA6, 6),
|
|
(PA7, 7),
|
|
(PA8, 8),
|
|
(PA9, 9),
|
|
(PA10, 10),
|
|
(PA11, 11),
|
|
(PA12, 12),
|
|
(PA13, 13),
|
|
(PA14, 14),
|
|
(PA15, 15),
|
|
(PA16, 16),
|
|
(PA17, 17),
|
|
(PA18, 18),
|
|
(PA19, 19),
|
|
(PA20, 20),
|
|
(PA21, 21),
|
|
(PA22, 22),
|
|
(PA23, 23),
|
|
(PA24, 24),
|
|
(PA25, 25),
|
|
(PA26, 26),
|
|
(PA27, 27),
|
|
(PA28, 28),
|
|
(PA29, 29),
|
|
(PA30, 30),
|
|
(PA31, 31),
|
|
]
|
|
);
|
|
|
|
declare_pins!(
|
|
B,
|
|
PinsB,
|
|
PORTB,
|
|
[
|
|
(PB0, 0),
|
|
(PB1, 1),
|
|
(PB2, 2),
|
|
(PB3, 3),
|
|
(PB4, 4),
|
|
(PB5, 5),
|
|
(PB6, 6),
|
|
(PB7, 7),
|
|
(PB8, 8),
|
|
(PB9, 9),
|
|
(PB10, 10),
|
|
(PB11, 11),
|
|
(PB12, 12),
|
|
(PB13, 13),
|
|
(PB14, 14),
|
|
(PB15, 15),
|
|
(PB16, 16),
|
|
(PB17, 17),
|
|
(PB18, 18),
|
|
(PB19, 19),
|
|
(PB20, 20),
|
|
(PB21, 21),
|
|
(PB22, 22),
|
|
(PB23, 23),
|
|
]
|
|
);
|