added explicit converters

va108xx-hal/src/gpio/dynpin.rs

@@ -59,6 +59,7 @@
 use super::{
     pin::{FilterType, InterruptEdge, InterruptLevel, Pin, PinId, PinMode, PinState},
     reg::RegisterInterface,
+    InputDynPinAsync,
 };
 use crate::{clock::FilterClkSel, enable_interrupt, pac, FunSel, IrqCfg};
 
@@ -529,6 +530,15 @@ impl DynPin {
         }
         Err(InvalidPinTypeError)
     }
+
+    /// Convert the pin into an async pin. The pin can be converted back by calling
+    /// [InputDynPinAsync::release]
+    pub fn into_async_input(
+        self,
+        irq: crate::pac::Interrupt,
+    ) -> Result<InputDynPinAsync, InvalidPinTypeError> {
+        InputDynPinAsync::new(self, irq)
+    }
 }
 
 //==================================================================================================

va108xx-hal/src/gpio/pin.rs

@@ -72,7 +72,7 @@
 //! and [`StatefulOutputPin`].
 use super::dynpin::{DynAlternate, DynGroup, DynInput, DynOutput, DynPinId, DynPinMode};
 use super::reg::RegisterInterface;
-use super::DynPin;
+use super::{DynPin, InputPinAsync};
 use crate::{
     pac::{Irqsel, Porta, Portb, Sysconfig},
     typelevel::Sealed,
@@ -575,6 +575,12 @@ impl<P: AnyPin> AsMut<P> for SpecificPin<P> {
 //==================================================================================================
 
 impl<I: PinId, C: InputConfig> Pin<I, Input<C>> {
+    /// Convert the pin into an async pin. The pin can be converted back by calling
+    /// [InputPinAsync::release]
+    pub fn into_async_input(self, irq: crate::pac::Interrupt) -> InputPinAsync<I, C> {
+        InputPinAsync::new(self, irq)
+    }
+
     pub fn interrupt_edge(
         &mut self,
         edge_type: InterruptEdge,