Update and improve HAL library and docs
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@ -57,7 +57,7 @@
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//! [InvalidPinTypeError].
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use super::{
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pins::{FilterType, InterruptEdge, InterruptLevel, Pin, PinId, PinMode, PinState},
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pin::{FilterType, InterruptEdge, InterruptLevel, Pin, PinId, PinMode, PinState},
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reg::RegisterInterface,
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};
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use crate::{clock::FilterClkSel, pac, FunSel, IrqCfg};
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@ -3,10 +3,10 @@
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//! The implementation of this GPIO module is heavily based on the
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//! [ATSAMD HAL implementation](https://docs.rs/atsamd-hal/latest/atsamd_hal/gpio/index.html).
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//!
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//! This API provides two different submodules, [`mod@pins`] and [`dynpins`],
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//! representing two different ways to handle GPIO pins. The default, [`mod@pins`],
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//! This API provides two different submodules, [pin] and [dynpin],
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//! representing two different ways to handle GPIO pins. The default, [pin],
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//! is a type-level API that tracks the state of each pin at compile-time. The
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//! alternative, [`dynpins`] is a type-erased, value-level API that tracks the
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//! alternative, [dynpin] is a type-erased, value-level API that tracks the
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//! state of each pin at run-time.
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//!
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//! The type-level API is strongly preferred. By representing the state of each
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@ -14,7 +14,7 @@
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//! compile-time. Furthermore, the type-level API has absolutely zero run-time
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//! cost.
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//!
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//! If needed, [`dynpins`] can be used to erase the type-level differences
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//! If needed, [dynpin] can be used to erase the type-level differences
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//! between pins. However, by doing so, pins must now be tracked at run-time,
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//! and each pin has a non-zero memory footprint.
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//!
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@ -101,10 +101,10 @@ macro_rules! common_reg_if_functions {
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};
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}
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pub mod dynpins;
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pub use dynpins::*;
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pub mod dynpin;
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pub use dynpin::*;
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pub mod pins;
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pub use pins::*;
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pub mod pin;
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pub use pin::*;
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mod reg;
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@ -70,7 +70,7 @@
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//! This module implements all of the embedded HAL GPIO traits for each [`Pin`]
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//! in the corresponding [`PinMode`]s, namely: [`InputPin`], [`OutputPin`],
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//! and [`StatefulOutputPin`].
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use super::dynpins::{DynAlternate, DynGroup, DynInput, DynOutput, DynPinId, DynPinMode};
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use super::dynpin::{DynAlternate, DynGroup, DynInput, DynOutput, DynPinId, DynPinMode};
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use super::reg::RegisterInterface;
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use crate::{
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pac::{Irqsel, Porta, Portb, Sysconfig},
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@ -1,5 +1,5 @@
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use super::dynpins::{self, DynGroup, DynPinId, DynPinMode};
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use super::pins::{FilterType, InterruptEdge, InterruptLevel, PinState};
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use super::dynpin::{self, DynGroup, DynPinId, DynPinMode};
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use super::pin::{FilterType, InterruptEdge, InterruptLevel, PinState};
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use super::IsMaskedError;
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use crate::clock::FilterClkSel;
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use va108xx::{ioconfig, porta};
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@ -30,7 +30,7 @@ impl From<DynPinMode> for ModeFields {
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use DynPinMode::*;
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match mode {
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Input(config) => {
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use dynpins::DynInput::*;
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use dynpin::DynInput::*;
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fields.dir = false;
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match config {
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Floating => (),
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@ -44,7 +44,7 @@ impl From<DynPinMode> for ModeFields {
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}
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}
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Output(config) => {
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use dynpins::DynOutput::*;
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use dynpin::DynOutput::*;
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fields.dir = true;
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match config {
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PushPull => (),
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