diff --git a/board-tests/Cargo.toml b/board-tests/Cargo.toml index 36b34c9..01b7901 100644 --- a/board-tests/Cargo.toml +++ b/board-tests/Cargo.toml @@ -15,7 +15,7 @@ embedded-hal-nb = "1" embedded-io = "0.6" [dependencies.va108xx-hal] -version = "0.6" +version = "0.7" path = "../va108xx-hal" features = ["rt"] diff --git a/examples/simple/Cargo.toml b/examples/simple/Cargo.toml index 0458b1b..746aedb 100644 --- a/examples/simple/Cargo.toml +++ b/examples/simple/Cargo.toml @@ -28,6 +28,6 @@ version = "1" features = ["cortex-m-systick"] [dependencies.va108xx-hal] -version = "0.6" +version = "0.7" path = "../../va108xx-hal" -features = ["rt", "defmt"] \ No newline at end of file +features = ["rt", "defmt"] diff --git a/examples/simple/examples/pwm.rs b/examples/simple/examples/pwm.rs index db3fe1c..e51b5b0 100644 --- a/examples/simple/examples/pwm.rs +++ b/examples/simple/examples/pwm.rs @@ -21,9 +21,9 @@ fn main() -> ! { let mut dp = pac::Peripherals::take().unwrap(); let pinsa = PinsA::new(&mut dp.sysconfig, None, dp.porta); let mut pwm = pwm::PwmPin::new( - (pinsa.pa3.into_funsel_1(), dp.tim3), - 50.MHz(), &mut dp.sysconfig, + 50.MHz(), + (pinsa.pa3.into_funsel_1(), dp.tim3), 10.Hz(), ); let mut delay = set_up_ms_delay_provider(&mut dp.sysconfig, 50.MHz(), dp.tim0); diff --git a/va108xx-hal/Cargo.toml b/va108xx-hal/Cargo.toml index 415cbe4..4941a41 100644 --- a/va108xx-hal/Cargo.toml +++ b/va108xx-hal/Cargo.toml @@ -1,6 +1,6 @@ [package] name = "va108xx-hal" -version = "0.6.0" +version = "0.7.0" authors = ["Robin Mueller "] edition = "2021" description = "HAL for the Vorago VA108xx family of microcontrollers" diff --git a/va108xx-hal/src/pwm.rs b/va108xx-hal/src/pwm.rs index 1232666..982e7d7 100644 --- a/va108xx-hal/src/pwm.rs +++ b/va108xx-hal/src/pwm.rs @@ -158,9 +158,9 @@ where { /// Create a new stronlgy typed PWM pin pub fn new( - vtp: (Pin, Tim), - sys_clk: impl Into + Copy, sys_cfg: &mut pac::Sysconfig, + sys_clk: impl Into + Copy, + tim_and_pin: (Pin, Tim), initial_period: impl Into + Copy, ) -> Self { let mut pin = PwmPin { @@ -171,7 +171,7 @@ where current_rst_val: 0, sys_clk: sys_clk.into(), }, - reg: unsafe { TimAndPinRegister::new(vtp.0, vtp.1) }, + reg: unsafe { TimAndPinRegister::new(tim_and_pin.0, tim_and_pin.1) }, mode: PhantomData, }; enable_peripheral_clock(sys_cfg, crate::clock::PeripheralClocks::Gpio); @@ -225,12 +225,13 @@ where (Pin, Tim): ValidTimAndPin, { pub fn pwma( - vtp: (Pin, Tim), - sys_clk: impl Into + Copy, sys_cfg: &mut pac::Sysconfig, + sys_clk: impl Into + Copy, + pin_and_tim: (Pin, Tim), initial_period: impl Into + Copy, ) -> Self { - let mut pin: PwmPin = Self::new(vtp, sys_clk, sys_cfg, initial_period); + let mut pin: PwmPin = + Self::new(sys_cfg, sys_clk, pin_and_tim, initial_period); pin.enable_pwm_a(); pin } @@ -241,12 +242,13 @@ where (Pin, Tim): ValidTimAndPin, { pub fn pwmb( - vtp: (Pin, Tim), - sys_clk: impl Into + Copy, sys_cfg: &mut pac::Sysconfig, + sys_clk: impl Into + Copy, + pin_and_tim: (Pin, Tim), initial_period: impl Into + Copy, ) -> Self { - let mut pin: PwmPin = Self::new(vtp, sys_clk, sys_cfg, initial_period); + let mut pin: PwmPin = + Self::new(sys_cfg, sys_clk, pin_and_tim, initial_period); pin.enable_pwm_b(); pin } diff --git a/vorago-reb1/Cargo.toml b/vorago-reb1/Cargo.toml index 94c0afc..7e9e9bd 100644 --- a/vorago-reb1/Cargo.toml +++ b/vorago-reb1/Cargo.toml @@ -20,7 +20,7 @@ version = "0.3" [dependencies.va108xx-hal] path = "../va108xx-hal" -version = "0.6" +version = "0.7" features = ["rt"] [features]