Rework library structure
Changed: - Move most library components to new [`vorago-shared-periphs`](https://egit.irs.uni-stuttgart.de/rust/vorago-shared-periphs) which is mostly re-exported in this crate. - All HAL API constructors now have a more consistent argument order: PAC structures and resource management structures first, then clock configuration, then any other configuration. - Overhaul and simplification of several HAL APIs. The system configuration and IRQ router peripheral instance generally does not need to be passed to HAL API anymore. - All HAL drivers are now type erased. The constructors will still expect and consume the PAC singleton component for resource management purposes, but are not cached anymore. - Refactoring of GPIO library to be more inline with embassy GPIO API. Added: - I2C clock timeout feature support.
This commit is contained in:
@ -14,20 +14,19 @@ use max116xx_10bit::VoltageRefMode;
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use max116xx_10bit::{AveragingConversions, AveragingResults};
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use panic_rtt_target as _;
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use rtt_target::{rprintln, rtt_init_print};
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use va108xx_hal::gpio::Port;
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use va108xx_hal::spi::{OptionalHwCs, SpiClkConfig};
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use va108xx_hal::gpio::{Input, Output, PinState, Port};
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use va108xx_hal::pins::PinsA;
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use va108xx_hal::spi::{configure_pin_as_hw_cs_pin, SpiClkConfig};
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use va108xx_hal::timer::CountdownTimer;
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use va108xx_hal::{
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gpio::PinsA,
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pac::{self, interrupt},
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pac,
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prelude::*,
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spi::{Spi, SpiBase, SpiConfig},
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timer::{default_ms_irq_handler, set_up_ms_tick, DelayMs, InterruptConfig},
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spi::{HwChipSelectId, Spi, SpiConfig},
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};
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use va108xx_hal::{port_function_select, FunSel};
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use vorago_reb1::max11619::{
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max11619_externally_clocked_no_wakeup, max11619_externally_clocked_with_wakeup,
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max11619_internally_clocked, EocPin, AN2_CHANNEL, POTENTIOMETER_CHANNEL,
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max11619_internally_clocked, AN2_CHANNEL, POTENTIOMETER_CHANNEL,
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};
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#[derive(Debug, PartialEq, Copy, Clone)]
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@ -57,34 +56,34 @@ const MUX_MODE: MuxMode = MuxMode::None;
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// This is probably more or less a re-implementation of https://docs.rs/embedded-hal-bus/latest/embedded_hal_bus/spi/struct.ExclusiveDevice.html.
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// Users should look at the embedded-hal-bus crate for sharing the bus.
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pub struct SpiWithHwCs<Delay, HwCs> {
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inner: SpiBase<pac::Spib, u8>,
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pub struct SpiWithHwCs<Delay> {
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inner: Spi<u8>,
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delay_provider: Delay,
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hw_cs: HwCs,
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hw_cs_id: HwChipSelectId,
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}
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impl<Delay: DelayNs, HwCs: OptionalHwCs<pac::Spib>> SpiWithHwCs<Delay, HwCs> {
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pub fn new(spi: SpiBase<pac::Spib, u8>, hw_cs: HwCs, delay_provider: Delay) -> Self {
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impl<Delay: DelayNs> SpiWithHwCs<Delay> {
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pub fn new(spi: Spi<u8>, hw_cs_id: HwChipSelectId, delay_provider: Delay) -> Self {
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Self {
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inner: spi,
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hw_cs,
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hw_cs_id,
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delay_provider,
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}
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}
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}
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impl<Delay, HwCs> embedded_hal::spi::ErrorType for SpiWithHwCs<Delay, HwCs> {
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impl<Delay> embedded_hal::spi::ErrorType for SpiWithHwCs<Delay> {
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type Error = Infallible;
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}
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impl<Delay: DelayNs, HwCs: OptionalHwCs<pac::Spib>> SpiDevice for SpiWithHwCs<Delay, HwCs> {
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impl<Delay: DelayNs> SpiDevice for SpiWithHwCs<Delay> {
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fn transaction(
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&mut self,
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operations: &mut [spi::Operation<'_, u8>],
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) -> Result<(), Self::Error> {
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// Only the HW CS is configured here. This is not really necessary, but showcases
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// that we could scale this multiple SPI devices.
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self.inner.cfg_hw_cs_with_pin(&self.hw_cs);
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self.inner.cfg_hw_cs(self.hw_cs_id);
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for operation in operations {
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match operation {
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spi::Operation::Read(buf) => self.inner.read(buf).ok().unwrap(),
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@ -111,28 +110,17 @@ fn main() -> ! {
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rprintln!("-- Vorago ADC Example --");
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let mut dp = pac::Peripherals::take().unwrap();
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let tim0 = set_up_ms_tick(
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InterruptConfig::new(pac::Interrupt::OC0, true, true),
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&mut dp.sysconfig,
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Some(&mut dp.irqsel),
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SYS_CLK,
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dp.tim0,
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);
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let delay = DelayMs::new(tim0).unwrap();
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let mut delay = CountdownTimer::new(dp.tim0, SYS_CLK);
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unsafe {
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cortex_m::peripheral::NVIC::unmask(pac::Interrupt::OC0);
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}
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let pinsa = PinsA::new(&mut dp.sysconfig, dp.porta);
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let pinsa = PinsA::new(dp.porta);
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let spi_cfg = SpiConfig::default()
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.clk_cfg(SpiClkConfig::from_clk(SYS_CLK, 3.MHz()).unwrap())
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.mode(MODE_0)
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.blockmode(true);
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let (sck, mosi, miso) = (
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pinsa.pa20.into_funsel_2(),
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pinsa.pa19.into_funsel_2(),
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pinsa.pa18.into_funsel_2(),
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);
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let (sck, mosi, miso) = (pinsa.pa20, pinsa.pa19, pinsa.pa18);
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if MUX_MODE == MuxMode::PortB19to17 {
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port_function_select(&mut dp.ioconfig, Port::B, 19, FunSel::Sel1).ok();
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@ -141,39 +129,30 @@ fn main() -> ! {
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port_function_select(&mut dp.ioconfig, Port::B, 16, FunSel::Sel1).ok();
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}
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// Set the accelerometer chip select low in case the board slot is populated
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let mut accel_cs = pinsa.pa16.into_push_pull_output();
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accel_cs.set_high();
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Output::new(pinsa.pa16, PinState::Low);
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let spi = Spi::new(
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&mut dp.sysconfig,
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50.MHz(),
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dp.spib,
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(sck, miso, mosi),
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spi_cfg,
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)
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.downgrade();
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let delay_provider = CountdownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim1);
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let spi_with_hwcs = SpiWithHwCs::new(spi, pinsa.pa17.into_funsel_2(), delay_provider);
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let hw_cs_id = configure_pin_as_hw_cs_pin(pinsa.pa17);
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let spi = Spi::new(dp.spib, (sck, miso, mosi), spi_cfg).unwrap();
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let delay_spi = CountdownTimer::new(dp.tim1, SYS_CLK);
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let spi_with_hwcs = SpiWithHwCs::new(spi, hw_cs_id, delay_spi);
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match EXAMPLE_MODE {
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ExampleMode::NotUsingEoc => spi_example_externally_clocked(spi_with_hwcs, delay),
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ExampleMode::NotUsingEoc => spi_example_externally_clocked(spi_with_hwcs, &mut delay),
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ExampleMode::UsingEoc => {
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spi_example_internally_clocked(spi_with_hwcs, delay, pinsa.pa14.into_floating_input());
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spi_example_internally_clocked(
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spi_with_hwcs,
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&mut delay,
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Input::new_floating(pinsa.pa14),
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);
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}
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ExampleMode::NotUsingEocWithDelay => {
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let delay_us = CountdownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim2);
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spi_example_externally_clocked_with_delay(spi_with_hwcs, delay, delay_us);
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spi_example_externally_clocked_with_delay(spi_with_hwcs, &mut delay);
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}
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}
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}
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#[interrupt]
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#[allow(non_snake_case)]
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fn OC0() {
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default_ms_irq_handler();
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}
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/// Use the SPI clock as the conversion clock
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fn spi_example_externally_clocked(spi: impl SpiDevice, mut delay: DelayMs) -> ! {
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fn spi_example_externally_clocked(spi: impl SpiDevice, delay: &mut impl DelayNs) -> ! {
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let mut adc = max11619_externally_clocked_no_wakeup(spi)
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.expect("Creating externally clocked MAX11619 device failed");
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if READ_MODE == ReadMode::AverageN {
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@ -228,11 +207,7 @@ fn spi_example_externally_clocked(spi: impl SpiDevice, mut delay: DelayMs) -> !
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}
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}
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fn spi_example_externally_clocked_with_delay(
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spi: impl SpiDevice,
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mut delay: DelayMs,
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mut delay_us: impl DelayNs,
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) -> ! {
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fn spi_example_externally_clocked_with_delay(spi: impl SpiDevice, delay: &mut impl DelayNs) -> ! {
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let mut adc =
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max11619_externally_clocked_with_wakeup(spi).expect("Creating MAX116xx device failed");
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let mut cmd_buf: [u8; 32] = [0; 32];
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@ -244,7 +219,7 @@ fn spi_example_externally_clocked_with_delay(
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ReadMode::Single => {
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rprintln!("Reading single potentiometer channel");
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let pot_val = adc
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.read_single_channel(&mut cmd_buf, POTENTIOMETER_CHANNEL, &mut delay_us)
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.read_single_channel(&mut cmd_buf, POTENTIOMETER_CHANNEL, delay)
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.expect("Creating externally clocked MAX11619 ADC failed");
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rprintln!("Single channel read:");
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rprintln!("\tPotentiometer value: {}", pot_val);
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@ -255,7 +230,7 @@ fn spi_example_externally_clocked_with_delay(
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&mut cmd_buf,
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&mut res_buf.iter_mut(),
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POTENTIOMETER_CHANNEL,
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&mut delay_us,
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delay,
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)
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.expect("Multi-Channel read failed");
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print_res_buf(&res_buf);
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@ -266,7 +241,7 @@ fn spi_example_externally_clocked_with_delay(
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&mut cmd_buf,
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&mut res_buf.iter_mut(),
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AN2_CHANNEL,
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&mut delay_us,
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delay,
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)
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.expect("Multi-Channel read failed");
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rprintln!("Multi channel read from 2 to 3:");
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@ -283,7 +258,11 @@ fn spi_example_externally_clocked_with_delay(
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}
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/// This function uses the EOC pin to determine whether the conversion finished
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fn spi_example_internally_clocked(spi: impl SpiDevice, mut delay: DelayMs, eoc_pin: EocPin) -> ! {
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fn spi_example_internally_clocked(
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spi: impl SpiDevice,
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delay: &mut impl DelayNs,
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eoc_pin: Input,
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) -> ! {
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let mut adc = max11619_internally_clocked(
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spi,
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eoc_pin,
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