rust/va108xx-rs
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Rework library structure

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Changed:

- Move most library components to new [`vorago-shared-periphs`](https://egit.irs.uni-stuttgart.de/rust/vorago-shared-periphs)
  which is mostly re-exported in this crate.
- All HAL API constructors now have a more consistent argument order: PAC structures and resource
  management structures first, then clock configuration, then any other configuration.
- Overhaul and simplification of several HAL APIs. The system configuration and IRQ router
  peripheral instance generally does not need to be passed to HAL API anymore.
- All HAL drivers are now type erased. The constructors will still expect and consume the PAC
  singleton component for resource management purposes, but are not cached anymore.
- Refactoring of GPIO library to be more inline with embassy GPIO API.

Added:

- I2C clock timeout feature support.
This commit is contained in:
Robin Müller
2025-04-12 17:01:53 +02:00
parent 5b2ded51f9
commit 58934e293f
67 changed files with 790 additions and 9283 deletions
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10
vorago-reb1/src/button.rs
View File

@ -5,16 +5,18 @@
//! - [Button Blinky with IRQs](https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/src/branch/main/vorago-reb1/examples/blinky-button-irq.rs)
//! - [Button Blinky with IRQs and RTIC](https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/src/branch/main/vorago-reb1/examples/blinky-button-rtic.rs)
use va108xx_hal::{
gpio::{FilterClkSel, FilterType, InputFloating, InterruptEdge, InterruptLevel, Pin, PA11},
clock::FilterClkSel,
gpio::{FilterType, Input, InterruptEdge, InterruptLevel, Pin},
pins::Pa11,
InterruptConfig,
};
#[derive(Debug)]
pub struct Button(pub Pin<PA11, InputFloating>);
pub struct Button(pub Input);
impl Button {
pub fn new(pin: Pin<PA11, InputFloating>) -> Button {
Button(pin)
pub fn new(pin: Pin<Pa11>) -> Button {
Button(Input::new_floating(pin))
}
#[inline]

38
vorago-reb1/src/leds.rs
View File

@ -6,20 +6,20 @@
//! - [Button Blinky using IRQs](https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/src/branch/main/vorago-reb1/examples/blinky-button-irq.rs)
//! - [Button Blinky using IRQs and RTIC](https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/src/branch/main/vorago-reb1/examples/blinky-button-rtic.rs)
use va108xx_hal::{
gpio::dynpin::DynPin,
gpio::pin::{Pin, PushPullOutput, PA10, PA6, PA7},
gpio::{Output, PinState},
pins::{Pa10, Pa6, Pa7, Pin},
};
pub type LD2 = Pin<PA10, PushPullOutput>;
pub type LD3 = Pin<PA7, PushPullOutput>;
pub type LD4 = Pin<PA6, PushPullOutput>;
#[derive(Debug)]
pub struct Leds(pub [Led; 3]);
impl Leds {
pub fn new(led_pin1: LD2, led_pin2: LD3, led_pin3: LD4) -> Leds {
Leds([led_pin1.into(), led_pin2.into(), led_pin3.into()])
pub fn new(led_pin1: Pin<Pa10>, led_pin2: Pin<Pa7>, led_pin3: Pin<Pa6>) -> Leds {
Leds([
Led(Output::new(led_pin1, PinState::Low)),
Led(Output::new(led_pin2, PinState::Low)),
Led(Output::new(led_pin3, PinState::Low)),
])
}
}
@ -52,38 +52,24 @@ impl core::ops::IndexMut<usize> for Leds {
}
#[derive(Debug)]
pub struct Led(pub DynPin);
macro_rules! ctor {
($($ldx:ident),+) => {
$(
impl From<$ldx> for Led {
fn from(led: $ldx) -> Self {
Led(led.into())
}
}
)+
}
}
ctor!(LD2, LD3, LD4);
pub struct Led(Output);
impl Led {
/// Turns the LED off. Setting the pin high actually turns the LED off
#[inline]
pub fn off(&mut self) {
self.0.set_high().ok();
self.0.set_high();
}
/// Turns the LED on. Setting the pin low actually turns the LED on
#[inline]
pub fn on(&mut self) {
self.0.set_low().ok();
self.0.set_low();
}
/// Toggles the LED
#[inline]
pub fn toggle(&mut self) {
self.0.toggle().ok();
self.0.toggle();
}
}

48
vorago-reb1/src/m95m01.rs
View File

@ -7,20 +7,25 @@
//! # Example
//!
//! - [REB1 EEPROM example](https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/src/branch/main/vorago-reb1/examples/nvm.rs)
use arbitrary_int::{u2, u3};
use core::convert::Infallible;
use embedded_hal::spi::SpiBus;
pub const PAGE_SIZE: usize = 256;
bitfield::bitfield! {
pub struct StatusReg(u8);
impl Debug;
u8;
pub status_register_write_protect, _: 7;
pub zero_segment, _: 6, 4;
pub block_protection_bits, set_block_protection_bits: 3, 2;
pub write_enable_latch, _: 1;
pub write_in_progress, _: 0;
#[bitbybit::bitfield(u8)]
#[derive(Debug)]
pub struct StatusReg {
#[bit(7, r)]
status_register_write_protect: bool,
#[bits(4..=6, r)]
zero_segment: u3,
#[bits(2..=3, rw)]
block_protection_bits: u2,
#[bit(1, r)]
write_enable_latch: bool,
#[bit(0, r)]
write_in_progress: bool,
}
// Registers.
@ -42,11 +47,10 @@ pub mod regs {
use regs::*;
use va108xx_hal::{
pac,
prelude::*,
spi::{RomMiso, RomMosi, RomSck, Spi, SpiClkConfig, SpiConfig, BMSTART_BMSTOP_MASK},
spi::{Spi, SpiClkConfig, SpiConfig, SpiLowLevel, BMSTART_BMSTOP_MASK},
};
pub type RomSpi = Spi<pac::Spic, (RomSck, RomMiso, RomMosi), u8>;
pub type RomSpi = Spi<u8>;
/// Driver for the ST device M95M01 EEPROM memory.
///
@ -59,14 +63,8 @@ pub struct M95M01 {
pub struct PageBoundaryExceededError;
impl M95M01 {
pub fn new(syscfg: &mut pac::Sysconfig, sys_clk: impl Into<Hertz>, spi: pac::Spic) -> Self {
let spi = RomSpi::new(
syscfg,
sys_clk,
spi,
(RomSck, RomMiso, RomMosi),
SpiConfig::default().clk_cfg(SpiClkConfig::new(2, 4)),
);
pub fn new(spi: pac::Spic, clk_config: SpiClkConfig) -> Self {
let spi = RomSpi::new_for_rom(spi, SpiConfig::default().clk_cfg(clk_config)).unwrap();
let mut spi_dev = Self { spi };
spi_dev.clear_block_protection().unwrap();
spi_dev
@ -74,7 +72,7 @@ impl M95M01 {
pub fn release(mut self) -> pac::Spic {
self.set_block_protection().unwrap();
self.spi.release().0
unsafe { pac::Spic::steal() }
}
// Wait until the write-in-progress state is cleared. This exposes a [nb] API, so this function
@ -90,7 +88,7 @@ impl M95M01 {
pub fn read_status_reg(&mut self) -> Result<StatusReg, Infallible> {
let mut write_read: [u8; 2] = [regs::RDSR, 0x00];
self.spi.transfer_in_place(&mut write_read)?;
Ok(StatusReg(write_read[1]))
Ok(StatusReg::new_with_raw_value(write_read[1]))
}
pub fn write_enable(&mut self) -> Result<(), Infallible> {
@ -104,10 +102,10 @@ impl M95M01 {
}
pub fn set_block_protection(&mut self) -> Result<(), Infallible> {
let mut reg = StatusReg(0);
reg.set_block_protection_bits(0b11);
let mut reg = StatusReg::new_with_raw_value(0);
reg.set_block_protection_bits(u2::new(0b11));
self.write_enable()?;
self.spi.write(&[WRSR, reg.0])
self.spi.write(&[WRSR, reg.raw_value()])
}
fn common_init_write_and_read(&mut self, address: usize, reg: u8) -> Result<(), Infallible> {

7
vorago-reb1/src/max11619.rs
View File

@ -9,7 +9,7 @@ use max116xx_10bit::{
Error, ExternallyClocked, InternallyClockedInternallyTimedSerialInterface, Max116xx10Bit,
Max116xx10BitEocExt, VoltageRefMode, WithWakeupDelay, WithoutWakeupDelay,
};
use va108xx_hal::gpio::{Floating, Input, Pin, PA14};
use va108xx_hal::gpio::Input;
pub type Max11619ExternallyClockedNoWakeup<Spi> =
Max116xx10Bit<Spi, ExternallyClocked, WithoutWakeupDelay>;
@ -17,7 +17,6 @@ pub type Max11619ExternallyClockedWithWakeup<Spi> =
Max116xx10Bit<Spi, ExternallyClocked, WithWakeupDelay>;
pub type Max11619InternallyClocked<Spi, Eoc> =
Max116xx10BitEocExt<Spi, Eoc, InternallyClockedInternallyTimedSerialInterface>;
pub type EocPin = Pin<PA14, Input<Floating>>;
pub const AN0_CHANNEL: u8 = 0;
pub const AN1_CHANNEL: u8 = 1;
@ -44,9 +43,9 @@ pub fn max11619_externally_clocked_with_wakeup<Spi: SpiDevice>(
pub fn max11619_internally_clocked<Spi: SpiDevice>(
spi: Spi,
eoc: EocPin,
eoc: Input,
v_ref: VoltageRefMode,
) -> Result<Max11619InternallyClocked<Spi, EocPin>, Error<Spi::Error, Infallible>> {
) -> Result<Max11619InternallyClocked<Spi, Input>, Error<Spi::Error, Infallible>> {
let mut adc = Max116xx10Bit::max11619(spi)?
.into_int_clkd_int_timed_through_ser_if_without_wakeup(v_ref, eoc)?;
adc.reset(false)?;

11
vorago-reb1/src/temp_sensor.rs
View File

@ -15,7 +15,7 @@ use va108xx_hal::{
const ADT75_I2C_ADDR: u8 = 0b1001000;
pub struct Adt75TempSensor {
sensor_if: I2cMaster<pac::I2ca, SevenBitAddress>,
sensor_if: I2cMaster<SevenBitAddress>,
cmd_buf: [u8; 1],
current_reg: RegAddresses,
}
@ -48,17 +48,12 @@ impl From<Error> for AdtInitError {
}
impl Adt75TempSensor {
pub fn new(
sys_cfg: &mut pac::Sysconfig,
sys_clk: impl Into<Hertz> + Copy,
i2ca: pac::I2ca,
) -> Result<Self, Error> {
pub fn new(sys_clk: Hertz, i2ca: pac::I2ca) -> Result<Self, Error> {
let mut sensor = Adt75TempSensor {
// The master construction can not fail for regular I2C speed.
sensor_if: I2cMaster::new(
sys_cfg,
sys_clk,
i2ca,
sys_clk,
MasterConfig::default(),
I2cSpeed::Regular100khz,
)