From 5b2ded51f972a038c54c9edffc2b3b7919d64721 Mon Sep 17 00:00:00 2001
From: Robin Mueller <robin.mueller.m@gmail.com>
Date: Sat, 12 Apr 2025 16:55:45 +0200
Subject: [PATCH] remove some old cruft

---
 sections/sec-debug.txt       | 21524 ---------------------------------
 sections/sec-release-lto.txt |  6312 ----------
 2 files changed, 27836 deletions(-)
 delete mode 100644 sections/sec-debug.txt
 delete mode 100644 sections/sec-release-lto.txt

diff --git a/sections/sec-debug.txt b/sections/sec-debug.txt
deleted file mode 100644
index 07b6bee..0000000
--- a/sections/sec-debug.txt
+++ /dev/null
@@ -1,21524 +0,0 @@
-
-max11619-adc:	file format elf32-littlearm
-
-Disassembly of section .text:
-
-000000c0 <__stext>:
-      c0:      	ldr	r4, [pc, #44] <$d>
-      c2:      	mov	lr, r4
-      c4:      	bl	0x8374 <__pre_init>     @ imm = #33452
-      c8:      	mov	lr, r4
-      ca:      	ldr	r0, [pc, #40] <$d+0x6>
-      cc:      	ldr	r1, [pc, #40] <$d+0x8>
-      ce:      	movs	r2, #0
-      d0:      	cmp	r1, r0
-      d2:      	beq	0xd8 <__stext+0x18>     @ imm = #2
-      d4:      	stm	r0!, {r2}
-      d6:      	b	0xd0 <__stext+0x10>     @ imm = #-10
-      d8:      	ldr	r0, [pc, #32] <$d+0xc>
-      da:      	ldr	r1, [pc, #36] <$d+0x12>
-      dc:      	ldr	r2, [pc, #36] <$d+0x14>
-      de:      	cmp	r1, r0
-      e0:      	beq	0xe8 <__stext+0x28>     @ imm = #4
-      e2:      	ldm	r2!, {r3}
-      e4:      	stm	r0!, {r3}
-      e6:      	b	0xde <__stext+0x1e>     @ imm = #-12
-      e8:      	push	{lr}
-      ea:      	bl	0x2604 <main>           @ imm = #9494
-      ee:      	udf	#0
-
-000000f0 <$d>:
-      f0:	ff ff ff ff	.word	0xffffffff
-      f4:	00 00 00 10	.word	0x10000000
-      f8:	44 04 00 10	.word	0x10000444
-      fc:	00 00 00 10	.word	0x10000000
-     100:	00 00 00 10	.word	0x10000000
-     104:	30 c7 00 00	.word	0x0000c730
-
-00000108 <<T as core::convert::Into<U>>::into::hc185e8b6b339f934>:
-     108:      	push	{r7, lr}
-     10a:      	add	r7, sp, #0
-     10c:      	sub	sp, #8
-     10e:      	str	r0, [sp, #4]
-     110:      	bl	0x544c <<va108xx_hal::time::Hertz as core::convert::From<va108xx_hal::time::MegaHertz>>::from::hc5caf156f8e04a82> @ imm = #21304
-     114:      	str	r0, [sp]
-     116:      	b	0x118 <<T as core::convert::Into<U>>::into::hc185e8b6b339f934+0x10> @ imm = #-2
-     118:      	ldr	r0, [sp]
-     11a:      	add	sp, #8
-     11c:      	pop	{r7, pc}
-
-0000011e <_ZN153_$LT$core..result..Result$LT$T$C$F$GT$$u20$as$u20$core..ops..try_trait..FromResidual$LT$core..result..Result$LT$core..convert..Infallible$C$E$GT$$GT$$GT$13from_residual17h09721f9c421c6e2bE>:
-     11e:      	push	{r7, lr}
-     120:      	add	r7, sp, #0
-     122:      	sub	sp, #16
-     124:      	add	r1, sp, #4
-     126:      	strb	r0, [r1]
-     128:      	ldr	r0, [sp, #4]
-     12a:      	add	r1, sp, #12
-     12c:      	strb	r0, [r1]
-     12e:      	bl	0x1488 <_ZN112_$LT$max116xx_10bit..Error$LT$SpiE$C$PinE$GT$$u20$as$u20$core..convert..From$LT$max116xx_10bit..AdcError$GT$$GT$4from17h13b2f106daae083dE> @ imm = #4950
-     132:      	uxtb	r0, r0
-     134:      	str	r0, [sp]
-     136:      	b	0x138 <_ZN153_$LT$core..result..Result$LT$T$C$F$GT$$u20$as$u20$core..ops..try_trait..FromResidual$LT$core..result..Result$LT$core..convert..Infallible$C$E$GT$$GT$$GT$13from_residual17h09721f9c421c6e2bE+0x1a> @ imm = #-2
-     138:      	ldr	r0, [sp]
-     13a:      	add	r1, sp, #8
-     13c:      	strb	r0, [r1]
-     13e:      	ldr	r0, [sp, #8]
-     140:      	add	sp, #16
-     142:      	pop	{r7, pc}
-
-00000144 <_ZN153_$LT$core..result..Result$LT$T$C$F$GT$$u20$as$u20$core..ops..try_trait..FromResidual$LT$core..result..Result$LT$core..convert..Infallible$C$E$GT$$GT$$GT$13from_residual17hde03a568dc94affdE>:
-     144:      	push	{r7, lr}
-     146:      	add	r7, sp, #0
-     148:      	sub	sp, #16
-     14a:      	add	r1, sp, #4
-     14c:      	strb	r0, [r1]
-     14e:      	ldr	r0, [sp, #4]
-     150:      	add	r1, sp, #12
-     152:      	strb	r0, [r1]
-     154:      	bl	0x1e78 <<T as core::convert::From<T>>::from::hd605e0ee22c7694c> @ imm = #7456
-     158:      	uxtb	r0, r0
-     15a:      	str	r0, [sp]
-     15c:      	b	0x15e <_ZN153_$LT$core..result..Result$LT$T$C$F$GT$$u20$as$u20$core..ops..try_trait..FromResidual$LT$core..result..Result$LT$core..convert..Infallible$C$E$GT$$GT$$GT$13from_residual17hde03a568dc94affdE+0x1a> @ imm = #-2
-     15e:      	ldr	r0, [sp]
-     160:      	add	r1, sp, #8
-     162:      	strb	r0, [r1]
-     164:      	ldr	r0, [sp, #8]
-     166:      	add	sp, #16
-     168:      	pop	{r7, pc}
-
-0000016a <_ZN153_$LT$core..result..Result$LT$T$C$F$GT$$u20$as$u20$core..ops..try_trait..FromResidual$LT$core..result..Result$LT$core..convert..Infallible$C$E$GT$$GT$$GT$13from_residual17hf0b33a7df54d743fE>:
-     16a:      	push	{r7, lr}
-     16c:      	add	r7, sp, #0
-     16e:      	sub	sp, #16
-     170:      	str	r0, [sp]
-     172:      	add	r0, sp, #8
-     174:      	strb	r1, [r0]
-     176:      	ldr	r0, [sp, #8]
-     178:      	add	r1, sp, #12
-     17a:      	strb	r0, [r1]
-     17c:      	bl	0x1e78 <<T as core::convert::From<T>>::from::hd605e0ee22c7694c> @ imm = #7416
-     180:      	uxtb	r0, r0
-     182:      	str	r0, [sp, #4]
-     184:      	b	0x186 <_ZN153_$LT$core..result..Result$LT$T$C$F$GT$$u20$as$u20$core..ops..try_trait..FromResidual$LT$core..result..Result$LT$core..convert..Infallible$C$E$GT$$GT$$GT$13from_residual17hf0b33a7df54d743fE+0x1c> @ imm = #-2
-     186:      	ldr	r1, [sp]
-     188:      	ldr	r0, [sp, #4]
-     18a:      	strb	r0, [r1, #1]
-     18c:      	movs	r0, #1
-     18e:      	strb	r0, [r1]
-     190:      	add	sp, #16
-     192:      	pop	{r7, pc}
-
-00000194 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h03f43d67c30d745bE>:
-     194:      	sub	sp, #12
-     196:      	mov	r1, r0
-     198:      	mov	r0, sp
-     19a:      	strb	r1, [r0]
-     19c:      	ldrb	r0, [r0]
-     19e:      	subs	r1, r0, #2
-     1a0:      	subs	r2, r1, #1
-     1a2:      	sbcs	r1, r2
-     1a4:      	cmp	r0, #2
-     1a6:      	beq	0x1ae <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h03f43d67c30d745bE+0x1a> @ imm = #4
-     1a8:      	b	0x1aa <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h03f43d67c30d745bE+0x16> @ imm = #-2
-     1aa:      	b	0x1b6 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h03f43d67c30d745bE+0x22> @ imm = #8
-     1ac:      	trap
-     1ae:      	add	r1, sp, #4
-     1b0:      	movs	r0, #1
-     1b2:      	strb	r0, [r1]
-     1b4:      	b	0x1be <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h03f43d67c30d745bE+0x2a> @ imm = #6
-     1b6:      	add	r1, sp, #4
-     1b8:      	movs	r0, #0
-     1ba:      	strb	r0, [r1]
-     1bc:      	b	0x1be <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h03f43d67c30d745bE+0x2a> @ imm = #-2
-     1be:      	mov	r0, sp
-     1c0:      	ldrb	r0, [r0]
-     1c2:      	cmp	r0, #2
-     1c4:      	bne	0x1d0 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h03f43d67c30d745bE+0x3c> @ imm = #8
-     1c6:      	b	0x1c8 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h03f43d67c30d745bE+0x34> @ imm = #-2
-     1c8:      	add	r0, sp, #4
-     1ca:      	ldrb	r0, [r0]
-     1cc:      	add	sp, #12
-     1ce:      	bx	lr
-     1d0:      	b	0x1c8 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h03f43d67c30d745bE+0x34> @ imm = #-12
-     1d2:      	bmi	0x17e <_ZN153_$LT$core..result..Result$LT$T$C$F$GT$$u20$as$u20$core..ops..try_trait..FromResidual$LT$core..result..Result$LT$core..convert..Infallible$C$E$GT$$GT$$GT$13from_residual17hf0b33a7df54d743fE+0x14> @ imm = #-88
-
-000001d4 <_ZN4core6result19Result$LT$T$C$E$GT$6expect17h72221175f5037eceE>:
-     1d4:      	push	{r4, r6, r7, lr}
-     1d6:      	add	r7, sp, #8
-     1d8:      	sub	sp, #40
-     1da:      	str	r3, [sp, #8]
-     1dc:      	str	r2, [sp, #12]
-     1de:      	str	r1, [sp, #16]
-     1e0:      	mov	r3, r0
-     1e2:      	add	r0, sp, #20
-     1e4:      	strb	r3, [r0]
-     1e6:      	str	r1, [sp, #32]
-     1e8:      	str	r2, [sp, #36]
-     1ea:      	ldrb	r0, [r0]
-     1ec:      	subs	r1, r0, #7
-     1ee:      	subs	r2, r1, #1
-     1f0:      	sbcs	r1, r2
-     1f2:      	cmp	r0, #7
-     1f4:      	beq	0x1fc <_ZN4core6result19Result$LT$T$C$E$GT$6expect17h72221175f5037eceE+0x28> @ imm = #4
-     1f6:      	b	0x1f8 <_ZN4core6result19Result$LT$T$C$E$GT$6expect17h72221175f5037eceE+0x24> @ imm = #-2
-     1f8:      	b	0x200 <_ZN4core6result19Result$LT$T$C$E$GT$6expect17h72221175f5037eceE+0x2c> @ imm = #4
-     1fa:      	trap
-     1fc:      	add	sp, #40
-     1fe:      	pop	{r4, r6, r7, pc}
-     200:      	ldr	r1, [sp, #12]
-     202:      	ldr	r0, [sp, #16]
-     204:      	ldr	r3, [sp, #8]
-     206:      	ldr	r4, [sp, #20]
-     208:      	add	r2, sp, #24
-     20a:      	strb	r4, [r2]
-     20c:      	str	r3, [sp]
-     20e:      	ldr	r3, [pc, #8] <$d.5+0x2>
-     210:      	bl	0x85d8 <core::result::unwrap_failed::hab9917f6469ee00f> @ imm = #33732
-     214:      	trap
-     216:      	mov	r8, r8
-
-00000218 <$d.5>:
-     218:	f0 a8 00 00	.word	0x0000a8f0
-
-0000021c <_ZN4core6result19Result$LT$T$C$E$GT$6expect17h8e33f6808ace1129E>:
-     21c:      	push	{r7, lr}
-     21e:      	add	r7, sp, #0
-     220:      	sub	sp, #40
-     222:      	str	r2, [sp, #8]
-     224:      	str	r1, [sp, #12]
-     226:      	str	r0, [sp, #16]
-     228:      	str	r0, [sp, #32]
-     22a:      	str	r1, [sp, #36]
-     22c:      	movs	r0, #1
-     22e:      	cmp	r0, #0
-     230:      	bne	0x238 <_ZN4core6result19Result$LT$T$C$E$GT$6expect17h8e33f6808ace1129E+0x1c> @ imm = #4
-     232:      	b	0x234 <_ZN4core6result19Result$LT$T$C$E$GT$6expect17h8e33f6808ace1129E+0x18> @ imm = #-2
-     234:      	b	0x23c <_ZN4core6result19Result$LT$T$C$E$GT$6expect17h8e33f6808ace1129E+0x20> @ imm = #4
-     236:      	trap
-     238:      	add	sp, #40
-     23a:      	pop	{r7, pc}
-     23c:      	ldr	r1, [sp, #12]
-     23e:      	ldr	r0, [sp, #16]
-     240:      	ldr	r2, [sp, #8]
-     242:      	str	r2, [sp]
-     244:      	ldr	r3, [pc, #8] <$d.7>
-     246:      	add	r2, sp, #24
-     248:      	bl	0x85d8 <core::result::unwrap_failed::hab9917f6469ee00f> @ imm = #33676
-     24c:      	trap
-     24e:      	mov	r8, r8
-
-00000250 <$d.7>:
-     250:	00 a9 00 00	.word	0x0000a900
-
-00000254 <_ZN4core6result19Result$LT$T$C$E$GT$6expect17h8e7426d0ee999988E>:
-     254:      	push	{r4, r6, r7, lr}
-     256:      	add	r7, sp, #8
-     258:      	sub	sp, #40
-     25a:      	str	r3, [sp, #8]
-     25c:      	str	r2, [sp, #12]
-     25e:      	str	r1, [sp, #16]
-     260:      	str	r0, [sp, #20]
-     262:      	ldr	r0, [r7, #8]
-     264:      	str	r0, [sp, #24]
-     266:      	str	r2, [sp, #32]
-     268:      	str	r3, [sp, #36]
-     26a:      	ldrb	r0, [r1]
-     26c:      	lsls	r0, r0, #31
-     26e:      	cmp	r0, #0
-     270:      	beq	0x278 <_ZN4core6result19Result$LT$T$C$E$GT$6expect17h8e7426d0ee999988E+0x24> @ imm = #4
-     272:      	b	0x274 <_ZN4core6result19Result$LT$T$C$E$GT$6expect17h8e7426d0ee999988E+0x20> @ imm = #-2
-     274:      	b	0x28a <_ZN4core6result19Result$LT$T$C$E$GT$6expect17h8e7426d0ee999988E+0x36> @ imm = #18
-     276:      	trap
-     278:      	ldr	r0, [sp, #20]
-     27a:      	ldr	r1, [sp, #16]
-     27c:      	adds	r1, r1, #4
-     27e:      	ldm	r1!, {r2, r3, r4}
-     280:      	stm	r0!, {r2, r3, r4}
-     282:      	ldm	r1!, {r2, r3, r4}
-     284:      	stm	r0!, {r2, r3, r4}
-     286:      	add	sp, #40
-     288:      	pop	{r4, r6, r7, pc}
-     28a:      	ldr	r1, [sp, #8]
-     28c:      	ldr	r0, [sp, #12]
-     28e:      	ldr	r3, [sp, #24]
-     290:      	ldr	r2, [sp, #16]
-     292:      	ldrb	r4, [r2, #1]
-     294:      	add	r2, sp, #28
-     296:      	strb	r4, [r2]
-     298:      	str	r3, [sp]
-     29a:      	ldr	r3, [pc, #8] <$d.9+0x2>
-     29c:      	bl	0x85d8 <core::result::unwrap_failed::hab9917f6469ee00f> @ imm = #33592
-     2a0:      	trap
-     2a2:      	mov	r8, r8
-
-000002a4 <$d.9>:
-     2a4:	f0 a8 00 00	.word	0x0000a8f0
-
-000002a8 <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h2f75cf6a7249e271E>:
-     2a8:      	push	{r7, lr}
-     2aa:      	add	r7, sp, #0
-     2ac:      	sub	sp, #40
-     2ae:      	str	r0, [sp, #4]
-     2b0:      	str	r1, [sp, #8]
-     2b2:      	str	r2, [sp, #12]
-     2b4:      	add	r1, sp, #20
-     2b6:      	movs	r0, #0
-     2b8:      	strb	r0, [r1]
-     2ba:      	movs	r0, #1
-     2bc:      	strb	r0, [r1]
-     2be:      	cmp	r0, #0
-     2c0:      	bne	0x2c8 <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h2f75cf6a7249e271E+0x20> @ imm = #4
-     2c2:      	b	0x2c4 <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h2f75cf6a7249e271E+0x1c> @ imm = #-2
-     2c4:      	b	0x2dc <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h2f75cf6a7249e271E+0x34> @ imm = #20
-     2c6:      	trap
-     2c8:      	ldr	r1, [sp, #4]
-     2ca:      	ldr	r2, [sp, #8]
-     2cc:      	ldr	r0, [sp, #12]
-     2ce:      	str	r2, [sp, #32]
-     2d0:      	str	r0, [sp, #36]
-     2d2:      	str	r2, [r1, #4]
-     2d4:      	str	r0, [r1, #8]
-     2d6:      	movs	r0, #0
-     2d8:      	strb	r0, [r1]
-     2da:      	b	0x2f8 <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h2f75cf6a7249e271E+0x50> @ imm = #26
-     2dc:      	add	r1, sp, #20
-     2de:      	movs	r0, #0
-     2e0:      	strb	r0, [r1]
-     2e2:      	bl	0x1f6e <core::ops::function::FnOnce::call_once::hfc8883650157a433> @ imm = #7304
-     2e6:      	uxtb	r0, r0
-     2e8:      	str	r0, [sp]
-     2ea:      	b	0x2ec <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h2f75cf6a7249e271E+0x44> @ imm = #-2
-     2ec:      	ldr	r1, [sp, #4]
-     2ee:      	ldr	r0, [sp]
-     2f0:      	strb	r0, [r1, #1]
-     2f2:      	movs	r0, #1
-     2f4:      	strb	r0, [r1]
-     2f6:      	b	0x2f8 <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h2f75cf6a7249e271E+0x50> @ imm = #-2
-     2f8:      	add	r0, sp, #20
-     2fa:      	ldrb	r0, [r0]
-     2fc:      	lsls	r0, r0, #31
-     2fe:      	cmp	r0, #0
-     300:      	bne	0x308 <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h2f75cf6a7249e271E+0x60> @ imm = #4
-     302:      	b	0x304 <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h2f75cf6a7249e271E+0x5c> @ imm = #-2
-     304:      	add	sp, #40
-     306:      	pop	{r7, pc}
-     308:      	b	0x304 <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h2f75cf6a7249e271E+0x5c> @ imm = #-8
-
-0000030a <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h99eb9539e0a1ad8eE>:
-     30a:      	push	{r7, lr}
-     30c:      	add	r7, sp, #0
-     30e:      	sub	sp, #32
-     310:      	add	r1, sp, #16
-     312:      	movs	r0, #0
-     314:      	strb	r0, [r1]
-     316:      	movs	r0, #1
-     318:      	strb	r0, [r1]
-     31a:      	cmp	r0, #0
-     31c:      	bne	0x324 <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h99eb9539e0a1ad8eE+0x1a> @ imm = #4
-     31e:      	b	0x320 <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h99eb9539e0a1ad8eE+0x16> @ imm = #-2
-     320:      	b	0x330 <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h99eb9539e0a1ad8eE+0x26> @ imm = #12
-     322:      	trap
-     324:      	add	r1, sp, #8
-     326:      	movs	r0, #0
-     328:      	strb	r0, [r1]
-     32a:      	movs	r0, #7
-     32c:      	strb	r0, [r1]
-     32e:      	b	0x348 <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h99eb9539e0a1ad8eE+0x3e> @ imm = #22
-     330:      	add	r1, sp, #16
-     332:      	movs	r0, #0
-     334:      	strb	r0, [r1]
-     336:      	bl	0x1f58 <core::ops::function::FnOnce::call_once::h63d663bb20109018> @ imm = #7198
-     33a:      	uxtb	r0, r0
-     33c:      	str	r0, [sp]
-     33e:      	b	0x340 <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h99eb9539e0a1ad8eE+0x36> @ imm = #-2
-     340:      	ldr	r0, [sp]
-     342:      	add	r1, sp, #8
-     344:      	strb	r0, [r1]
-     346:      	b	0x348 <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h99eb9539e0a1ad8eE+0x3e> @ imm = #-2
-     348:      	add	r0, sp, #16
-     34a:      	ldrb	r0, [r0]
-     34c:      	lsls	r0, r0, #31
-     34e:      	cmp	r0, #0
-     350:      	bne	0x35a <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h99eb9539e0a1ad8eE+0x50> @ imm = #6
-     352:      	b	0x354 <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h99eb9539e0a1ad8eE+0x4a> @ imm = #-2
-     354:      	ldr	r0, [sp, #8]
-     356:      	add	sp, #32
-     358:      	pop	{r7, pc}
-     35a:      	b	0x354 <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h99eb9539e0a1ad8eE+0x4a> @ imm = #-10
-
-0000035c <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17hf0e429eaa3a37c4aE>:
-     35c:      	push	{r7, lr}
-     35e:      	add	r7, sp, #0
-     360:      	sub	sp, #32
-     362:      	add	r1, sp, #16
-     364:      	movs	r0, #0
-     366:      	strb	r0, [r1]
-     368:      	movs	r0, #1
-     36a:      	strb	r0, [r1]
-     36c:      	cmp	r0, #0
-     36e:      	bne	0x376 <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17hf0e429eaa3a37c4aE+0x1a> @ imm = #4
-     370:      	b	0x372 <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17hf0e429eaa3a37c4aE+0x16> @ imm = #-2
-     372:      	b	0x382 <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17hf0e429eaa3a37c4aE+0x26> @ imm = #12
-     374:      	trap
-     376:      	add	r1, sp, #8
-     378:      	movs	r0, #0
-     37a:      	strb	r0, [r1]
-     37c:      	movs	r0, #7
-     37e:      	strb	r0, [r1]
-     380:      	b	0x39a <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17hf0e429eaa3a37c4aE+0x3e> @ imm = #22
-     382:      	add	r1, sp, #16
-     384:      	movs	r0, #0
-     386:      	strb	r0, [r1]
-     388:      	bl	0x1f6e <core::ops::function::FnOnce::call_once::hfc8883650157a433> @ imm = #7138
-     38c:      	uxtb	r0, r0
-     38e:      	str	r0, [sp]
-     390:      	b	0x392 <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17hf0e429eaa3a37c4aE+0x36> @ imm = #-2
-     392:      	ldr	r0, [sp]
-     394:      	add	r1, sp, #8
-     396:      	strb	r0, [r1]
-     398:      	b	0x39a <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17hf0e429eaa3a37c4aE+0x3e> @ imm = #-2
-     39a:      	add	r0, sp, #16
-     39c:      	ldrb	r0, [r0]
-     39e:      	lsls	r0, r0, #31
-     3a0:      	cmp	r0, #0
-     3a2:      	bne	0x3ac <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17hf0e429eaa3a37c4aE+0x50> @ imm = #6
-     3a4:      	b	0x3a6 <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17hf0e429eaa3a37c4aE+0x4a> @ imm = #-2
-     3a6:      	ldr	r0, [sp, #8]
-     3a8:      	add	sp, #32
-     3aa:      	pop	{r7, pc}
-     3ac:      	b	0x3a6 <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17hf0e429eaa3a37c4aE+0x4a> @ imm = #-10
-
-000003ae <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h03eff1b1a9c091dcE>:
-     3ae:      	push	{r4, r5, r6, r7, lr}
-     3b0:      	add	r7, sp, #12
-     3b2:      	sub	sp, #64
-     3b4:      	str	r1, [sp]
-     3b6:      	str	r0, [sp, #4]
-     3b8:      	ldrb	r0, [r1]
-     3ba:      	lsls	r0, r0, #31
-     3bc:      	cmp	r0, #0
-     3be:      	beq	0x3c6 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h03eff1b1a9c091dcE+0x18> @ imm = #4
-     3c0:      	b	0x3c2 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h03eff1b1a9c091dcE+0x14> @ imm = #-2
-     3c2:      	b	0x3f4 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h03eff1b1a9c091dcE+0x46> @ imm = #46
-     3c4:      	trap
-     3c6:      	ldr	r1, [sp, #4]
-     3c8:      	ldr	r0, [sp]
-     3ca:      	adds	r2, r0, #4
-     3cc:      	add	r3, sp, #8
-     3ce:      	mov	r0, r3
-     3d0:      	ldm	r2!, {r4, r5, r6}
-     3d2:      	stm	r0!, {r4, r5, r6}
-     3d4:      	ldm	r2!, {r4, r5, r6}
-     3d6:      	stm	r0!, {r4, r5, r6}
-     3d8:      	add	r2, sp, #32
-     3da:      	mov	r0, r2
-     3dc:      	ldm	r3!, {r4, r5, r6}
-     3de:      	stm	r0!, {r4, r5, r6}
-     3e0:      	ldm	r3!, {r4, r5, r6}
-     3e2:      	stm	r0!, {r4, r5, r6}
-     3e4:      	adds	r0, r1, #4
-     3e6:      	ldm	r2!, {r3, r4, r5}
-     3e8:      	stm	r0!, {r3, r4, r5}
-     3ea:      	ldm	r2!, {r3, r4, r5}
-     3ec:      	stm	r0!, {r3, r4, r5}
-     3ee:      	movs	r0, #0
-     3f0:      	strb	r0, [r1]
-     3f2:      	b	0x40c <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h03eff1b1a9c091dcE+0x5e> @ imm = #22
-     3f4:      	ldr	r1, [sp, #4]
-     3f6:      	ldr	r0, [sp]
-     3f8:      	ldrb	r0, [r0, #1]
-     3fa:      	add	r2, sp, #60
-     3fc:      	strb	r0, [r2]
-     3fe:      	add	r2, sp, #56
-     400:      	strb	r0, [r2]
-     402:      	ldr	r0, [sp, #56]
-     404:      	strb	r0, [r1, #1]
-     406:      	movs	r0, #1
-     408:      	strb	r0, [r1]
-     40a:      	b	0x40c <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h03eff1b1a9c091dcE+0x5e> @ imm = #-2
-     40c:      	add	sp, #64
-     40e:      	pop	{r4, r5, r6, r7, pc}
-
-00000410 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h17eaa2cd8a173bf2E>:
-     410:      	sub	sp, #40
-     412:      	str	r1, [sp, #12]
-     414:      	str	r0, [sp, #8]
-     416:      	ldr	r0, [sp, #12]
-     418:      	str	r0, [sp, #4]
-     41a:      	ldr	r0, [sp, #8]
-     41c:      	str	r0, [sp]
-     41e:      	mov	r0, sp
-     420:      	ldrb	r0, [r0]
-     422:      	lsls	r0, r0, #31
-     424:      	cmp	r0, #0
-     426:      	beq	0x42e <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h17eaa2cd8a173bf2E+0x1e> @ imm = #4
-     428:      	b	0x42a <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h17eaa2cd8a173bf2E+0x1a> @ imm = #-2
-     42a:      	b	0x43c <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h17eaa2cd8a173bf2E+0x2c> @ imm = #14
-     42c:      	trap
-     42e:      	ldr	r0, [sp, #4]
-     430:      	str	r0, [sp, #36]
-     432:      	str	r0, [sp, #24]
-     434:      	add	r1, sp, #20
-     436:      	movs	r0, #0
-     438:      	strb	r0, [r1]
-     43a:      	b	0x454 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h17eaa2cd8a173bf2E+0x44> @ imm = #22
-     43c:      	mov	r0, sp
-     43e:      	ldrb	r0, [r0, #1]
-     440:      	add	r1, sp, #32
-     442:      	strb	r0, [r1]
-     444:      	add	r1, sp, #28
-     446:      	strb	r0, [r1]
-     448:      	ldr	r0, [sp, #28]
-     44a:      	add	r1, sp, #20
-     44c:      	strb	r0, [r1, #1]
-     44e:      	movs	r0, #1
-     450:      	strb	r0, [r1]
-     452:      	b	0x454 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h17eaa2cd8a173bf2E+0x44> @ imm = #-2
-     454:      	ldr	r0, [sp, #20]
-     456:      	ldr	r1, [sp, #24]
-     458:      	add	sp, #40
-     45a:      	bx	lr
-
-0000045c <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h338082970efc5187E>:
-     45c:      	sub	sp, #20
-     45e:      	mov	r1, r0
-     460:      	mov	r0, sp
-     462:      	strb	r1, [r0]
-     464:      	ldrb	r0, [r0]
-     466:      	subs	r1, r0, #7
-     468:      	subs	r2, r1, #1
-     46a:      	sbcs	r1, r2
-     46c:      	cmp	r0, #7
-     46e:      	beq	0x476 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h338082970efc5187E+0x1a> @ imm = #4
-     470:      	b	0x472 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h338082970efc5187E+0x16> @ imm = #-2
-     472:      	b	0x482 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h338082970efc5187E+0x26> @ imm = #12
-     474:      	trap
-     476:      	add	r1, sp, #4
-     478:      	movs	r0, #0
-     47a:      	strb	r0, [r1]
-     47c:      	movs	r0, #7
-     47e:      	strb	r0, [r1]
-     480:      	b	0x494 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h338082970efc5187E+0x38> @ imm = #16
-     482:      	ldr	r0, [sp]
-     484:      	add	r1, sp, #16
-     486:      	strb	r0, [r1]
-     488:      	add	r1, sp, #8
-     48a:      	strb	r0, [r1]
-     48c:      	ldr	r0, [sp, #8]
-     48e:      	add	r1, sp, #4
-     490:      	strb	r0, [r1]
-     492:      	b	0x494 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h338082970efc5187E+0x38> @ imm = #-2
-     494:      	ldr	r0, [sp, #4]
-     496:      	add	sp, #20
-     498:      	bx	lr
-
-0000049a <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h6af079890abca98aE>:
-     49a:      	sub	sp, #40
-     49c:      	str	r1, [sp, #12]
-     49e:      	str	r0, [sp, #8]
-     4a0:      	ldr	r0, [sp, #12]
-     4a2:      	str	r0, [sp, #4]
-     4a4:      	ldr	r0, [sp, #8]
-     4a6:      	str	r0, [sp]
-     4a8:      	mov	r0, sp
-     4aa:      	ldrb	r0, [r0]
-     4ac:      	lsls	r0, r0, #31
-     4ae:      	cmp	r0, #0
-     4b0:      	beq	0x4b8 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h6af079890abca98aE+0x1e> @ imm = #4
-     4b2:      	b	0x4b4 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h6af079890abca98aE+0x1a> @ imm = #-2
-     4b4:      	b	0x4c6 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h6af079890abca98aE+0x2c> @ imm = #14
-     4b6:      	trap
-     4b8:      	ldr	r0, [sp, #4]
-     4ba:      	str	r0, [sp, #36]
-     4bc:      	str	r0, [sp, #24]
-     4be:      	add	r1, sp, #20
-     4c0:      	movs	r0, #0
-     4c2:      	strb	r0, [r1]
-     4c4:      	b	0x4de <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h6af079890abca98aE+0x44> @ imm = #22
-     4c6:      	mov	r0, sp
-     4c8:      	ldrb	r0, [r0, #1]
-     4ca:      	add	r1, sp, #32
-     4cc:      	strb	r0, [r1]
-     4ce:      	add	r1, sp, #28
-     4d0:      	strb	r0, [r1]
-     4d2:      	ldr	r0, [sp, #28]
-     4d4:      	add	r1, sp, #20
-     4d6:      	strb	r0, [r1, #1]
-     4d8:      	movs	r0, #1
-     4da:      	strb	r0, [r1]
-     4dc:      	b	0x4de <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h6af079890abca98aE+0x44> @ imm = #-2
-     4de:      	ldr	r0, [sp, #20]
-     4e0:      	ldr	r1, [sp, #24]
-     4e2:      	add	sp, #40
-     4e4:      	bx	lr
-
-000004e6 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17hc3644b3e57563e31E>:
-     4e6:      	sub	sp, #24
-     4e8:      	str	r1, [sp]
-     4ea:      	str	r0, [sp, #4]
-     4ec:      	ldrb	r0, [r1]
-     4ee:      	lsls	r0, r0, #31
-     4f0:      	cmp	r0, #0
-     4f2:      	beq	0x4fa <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17hc3644b3e57563e31E+0x14> @ imm = #4
-     4f4:      	b	0x4f6 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17hc3644b3e57563e31E+0x10> @ imm = #-2
-     4f6:      	b	0x510 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17hc3644b3e57563e31E+0x2a> @ imm = #22
-     4f8:      	trap
-     4fa:      	ldr	r1, [sp, #4]
-     4fc:      	ldr	r0, [sp]
-     4fe:      	ldr	r2, [r0, #4]
-     500:      	ldr	r0, [r0, #8]
-     502:      	str	r2, [sp, #16]
-     504:      	str	r0, [sp, #20]
-     506:      	str	r2, [r1, #4]
-     508:      	str	r0, [r1, #8]
-     50a:      	movs	r0, #0
-     50c:      	strb	r0, [r1]
-     50e:      	b	0x528 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17hc3644b3e57563e31E+0x42> @ imm = #22
-     510:      	ldr	r1, [sp, #4]
-     512:      	ldr	r0, [sp]
-     514:      	ldrb	r0, [r0, #1]
-     516:      	add	r2, sp, #12
-     518:      	strb	r0, [r2]
-     51a:      	add	r2, sp, #8
-     51c:      	strb	r0, [r2]
-     51e:      	ldr	r0, [sp, #8]
-     520:      	strb	r0, [r1, #1]
-     522:      	movs	r0, #1
-     524:      	strb	r0, [r1]
-     526:      	b	0x528 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17hc3644b3e57563e31E+0x42> @ imm = #-2
-     528:      	add	sp, #24
-     52a:      	bx	lr
-
-0000052c <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17hd072381b3388b3ddE>:
-     52c:      	sub	sp, #20
-     52e:      	mov	r2, r0
-     530:      	mov	r0, sp
-     532:      	strb	r2, [r0]
-     534:      	strb	r1, [r0, #1]
-     536:      	ldrb	r0, [r0]
-     538:      	lsls	r0, r0, #31
-     53a:      	cmp	r0, #0
-     53c:      	beq	0x544 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17hd072381b3388b3ddE+0x18> @ imm = #4
-     53e:      	b	0x540 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17hd072381b3388b3ddE+0x14> @ imm = #-2
-     540:      	b	0x556 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17hd072381b3388b3ddE+0x2a> @ imm = #18
-     542:      	trap
-     544:      	mov	r0, sp
-     546:      	ldrb	r0, [r0, #1]
-     548:      	add	r1, sp, #16
-     54a:      	strb	r0, [r1]
-     54c:      	add	r1, sp, #4
-     54e:      	strb	r0, [r1, #1]
-     550:      	movs	r0, #0
-     552:      	strb	r0, [r1]
-     554:      	b	0x56e <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17hd072381b3388b3ddE+0x42> @ imm = #22
-     556:      	mov	r0, sp
-     558:      	ldrb	r0, [r0, #1]
-     55a:      	add	r1, sp, #12
-     55c:      	strb	r0, [r1]
-     55e:      	add	r1, sp, #8
-     560:      	strb	r0, [r1]
-     562:      	ldr	r0, [sp, #8]
-     564:      	add	r1, sp, #4
-     566:      	strb	r0, [r1, #1]
-     568:      	movs	r0, #1
-     56a:      	strb	r0, [r1]
-     56c:      	b	0x56e <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17hd072381b3388b3ddE+0x42> @ imm = #-2
-     56e:      	add	r1, sp, #4
-     570:      	ldrb	r0, [r1]
-     572:      	ldrb	r1, [r1, #1]
-     574:      	add	sp, #20
-     576:      	bx	lr
-
-00000578 <<u8 as core::default::Default>::default::hb2792f91b4560cc9>:
-     578:      	movs	r0, #0
-     57a:      	bx	lr
-
-0000057c <<bool as core::default::Default>::default::h6ce1fdee60a85673>:
-     57c:      	movs	r0, #0
-     57e:      	bx	lr
-
-00000580 <core::intrinsics::write_bytes::he9556dc6ad4a2fb1>:
-     580:      	push	{r7, lr}
-     582:      	add	r7, sp, #0
-     584:      	sub	sp, #16
-     586:      	mov	r3, r2
-     588:      	mov	r2, r1
-     58a:      	str	r0, [sp, #4]
-     58c:      	add	r1, sp, #8
-     58e:      	strb	r2, [r1]
-     590:      	str	r3, [sp, #12]
-     592:      	movs	r1, #48
-     594:      	muls	r1, r3, r1
-     596:      	uxtb	r2, r2
-     598:      	bl	0xa678 <__aeabi_memset4> @ imm = #41180
-     59c:      	b	0x59e <core::intrinsics::write_bytes::he9556dc6ad4a2fb1+0x1e> @ imm = #-2
-     59e:      	add	sp, #16
-     5a0:      	pop	{r7, pc}
-
-000005a2 <core::ptr::read::h5948e98be177969d>:
-     5a2:      	sub	sp, #32
-     5a4:      	str	r0, [sp, #4]
-     5a6:      	str	r0, [sp, #12]
-     5a8:      	ldr	r0, [sp, #16]
-     5aa:      	add	r1, sp, #8
-     5ac:      	strb	r0, [r1]
-     5ae:      	b	0x5b0 <core::ptr::read::h5948e98be177969d+0xe> @ imm = #-2
-     5b0:      	add	r0, sp, #8
-     5b2:      	str	r0, [sp, #28]
-     5b4:      	b	0x5b6 <core::ptr::read::h5948e98be177969d+0x14> @ imm = #-2
-     5b6:      	ldr	r0, [sp, #4]
-     5b8:      	ldrb	r1, [r0]
-     5ba:      	add	r0, sp, #8
-     5bc:      	strb	r1, [r0]
-     5be:      	ldrb	r0, [r0]
-     5c0:      	str	r0, [sp]
-     5c2:      	add	r1, sp, #20
-     5c4:      	strb	r0, [r1]
-     5c6:      	add	r1, sp, #24
-     5c8:      	strb	r0, [r1]
-     5ca:      	b	0x5cc <core::ptr::read::h5948e98be177969d+0x2a> @ imm = #-2
-     5cc:      	ldr	r0, [sp]
-     5ce:      	add	sp, #32
-     5d0:      	bx	lr
-
-000005d2 <core::ptr::write::hf9047898b6b9eddf>:
-     5d2:      	sub	sp, #12
-     5d4:      	str	r1, [sp]
-     5d6:      	mov	r1, r0
-     5d8:      	ldr	r0, [sp]
-     5da:      	add	r2, sp, #4
-     5dc:      	strb	r0, [r2]
-     5de:      	str	r1, [sp, #8]
-     5e0:      	ldr	r0, [sp, #4]
-     5e2:      	strb	r0, [r1]
-     5e4:      	add	sp, #12
-     5e6:      	bx	lr
-
-000005e8 <core::cmp::PartialEq::ne::hbb814c417ceb0a0e>:
-     5e8:      	push	{r7, lr}
-     5ea:      	add	r7, sp, #0
-     5ec:      	sub	sp, #16
-     5ee:      	str	r0, [sp, #8]
-     5f0:      	str	r1, [sp, #12]
-     5f2:      	bl	0x9d8 <<va108xx_hal::utility::Funsel as core::cmp::PartialEq>::eq::h3e9e1be30ca41b10> @ imm = #994
-     5f6:      	str	r0, [sp, #4]
-     5f8:      	b	0x5fa <core::cmp::PartialEq::ne::hbb814c417ceb0a0e+0x12> @ imm = #-2
-     5fa:      	ldr	r1, [sp, #4]
-     5fc:      	movs	r0, #1
-     5fe:      	bics	r0, r1
-     600:      	add	sp, #16
-     602:      	pop	{r7, pc}
-
-00000604 <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6>:
-     604:      	push	{r4, r5, r6, r7, lr}
-     606:      	add	r7, sp, #12
-     608:      	sub	sp, #180
-     60a:      	str	r0, [sp, #8]
-     60c:      	ldr	r0, [r1, #8]
-     60e:      	str	r0, [sp, #100]
-     610:      	ldr	r0, [r1, #4]
-     612:      	str	r0, [sp, #96]
-     614:      	ldr	r0, [r1]
-     616:      	str	r0, [sp, #92]
-     618:      	bl	0x4618 <dummy_pin::dummy::DummyPin::new_low::h44eb1aac66c84527> @ imm = #16380
-     61c:      	b	0x61e <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0x1a> @ imm = #-2
-     61e:      	add	r0, sp, #64
-     620:      	add	r1, sp, #92
-     622:      	bl	0x1a54 <max116xx_10bit::Max116xx10Bit<SPI,CS>::max11619::h108cee7c000e330c> @ imm = #5166
-     626:      	b	0x628 <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0x24> @ imm = #-2
-     628:      	add	r0, sp, #36
-     62a:      	add	r1, sp, #64
-     62c:      	bl	0x3ae <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h03eff1b1a9c091dcE> @ imm = #-642
-     630:      	b	0x632 <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0x2e> @ imm = #-2
-     632:      	add	r0, sp, #36
-     634:      	ldrb	r0, [r0]
-     636:      	lsls	r0, r0, #31
-     638:      	cmp	r0, #0
-     63a:      	beq	0x642 <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0x3e> @ imm = #4
-     63c:      	b	0x63e <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0x3a> @ imm = #-2
-     63e:      	b	0x66a <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0x66> @ imm = #40
-     640:      	trap
-     642:      	add	r0, sp, #36
-     644:      	adds	r1, r0, #4
-     646:      	add	r2, sp, #104
-     648:      	mov	r0, r2
-     64a:      	ldm	r1!, {r3, r4, r5}
-     64c:      	stm	r0!, {r3, r4, r5}
-     64e:      	ldm	r1!, {r3, r4, r5}
-     650:      	stm	r0!, {r3, r4, r5}
-     652:      	add	r0, sp, #12
-     654:      	mov	r1, r0
-     656:      	ldm	r2!, {r3, r4, r5}
-     658:      	stm	r1!, {r3, r4, r5}
-     65a:      	ldm	r2!, {r3, r4, r5}
-     65c:      	stm	r1!, {r3, r4, r5}
-     65e:      	movs	r1, #0
-     660:      	bl	0x1d98 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::reset::h6445cf02374a70dd> @ imm = #5940
-     664:      	uxtb	r0, r0
-     666:      	str	r0, [sp, #4]
-     668:      	b	0x680 <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0x7c> @ imm = #20
-     66a:      	ldr	r0, [sp, #8]
-     66c:      	add	r1, sp, #36
-     66e:      	ldrb	r1, [r1, #1]
-     670:      	add	r2, sp, #168
-     672:      	strb	r1, [r2]
-     674:      	bl	0x16a <_ZN153_$LT$core..result..Result$LT$T$C$F$GT$$u20$as$u20$core..ops..try_trait..FromResidual$LT$core..result..Result$LT$core..convert..Infallible$C$E$GT$$GT$$GT$13from_residual17hf0b33a7df54d743fE> @ imm = #-1294
-     678:      	b	0x67a <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0x76> @ imm = #-2
-     67a:      	b	0x67c <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0x78> @ imm = #-2
-     67c:      	add	sp, #180
-     67e:      	pop	{r4, r5, r6, r7, pc}
-     680:      	ldr	r0, [sp, #4]
-     682:      	bl	0x45c <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h338082970efc5187E> @ imm = #-554
-     686:      	uxtb	r0, r0
-     688:      	add	r1, sp, #128
-     68a:      	strb	r0, [r1]
-     68c:      	b	0x68e <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0x8a> @ imm = #-2
-     68e:      	add	r0, sp, #128
-     690:      	ldrb	r0, [r0]
-     692:      	subs	r1, r0, #7
-     694:      	subs	r2, r1, #1
-     696:      	sbcs	r1, r2
-     698:      	cmp	r0, #7
-     69a:      	beq	0x6a2 <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0x9e> @ imm = #4
-     69c:      	b	0x69e <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0x9a> @ imm = #-2
-     69e:      	b	0x6ae <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0xaa> @ imm = #12
-     6a0:      	trap
-     6a2:      	add	r0, sp, #12
-     6a4:      	bl	0x1dd2 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::setup::h2b9af7e788767d10> @ imm = #5930
-     6a8:      	uxtb	r0, r0
-     6aa:      	str	r0, [sp]
-     6ac:      	b	0x6c0 <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0xbc> @ imm = #16
-     6ae:      	ldr	r0, [sp, #8]
-     6b0:      	ldr	r1, [sp, #128]
-     6b2:      	add	r2, sp, #172
-     6b4:      	strb	r1, [r2]
-     6b6:      	bl	0x16a <_ZN153_$LT$core..result..Result$LT$T$C$F$GT$$u20$as$u20$core..ops..try_trait..FromResidual$LT$core..result..Result$LT$core..convert..Infallible$C$E$GT$$GT$$GT$13from_residual17hf0b33a7df54d743fE> @ imm = #-1360
-     6ba:      	b	0x6bc <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0xb8> @ imm = #-2
-     6bc:      	b	0x6be <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0xba> @ imm = #-2
-     6be:      	b	0x67c <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0x78> @ imm = #-70
-     6c0:      	ldr	r0, [sp]
-     6c2:      	bl	0x45c <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h338082970efc5187E> @ imm = #-618
-     6c6:      	uxtb	r0, r0
-     6c8:      	add	r1, sp, #132
-     6ca:      	strb	r0, [r1]
-     6cc:      	b	0x6ce <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0xca> @ imm = #-2
-     6ce:      	add	r0, sp, #132
-     6d0:      	ldrb	r0, [r0]
-     6d2:      	subs	r1, r0, #7
-     6d4:      	subs	r2, r1, #1
-     6d6:      	sbcs	r1, r2
-     6d8:      	cmp	r0, #7
-     6da:      	beq	0x6e2 <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0xde> @ imm = #4
-     6dc:      	b	0x6de <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0xda> @ imm = #-2
-     6de:      	b	0x702 <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0xfe> @ imm = #32
-     6e0:      	trap
-     6e2:      	ldr	r1, [sp, #8]
-     6e4:      	add	r3, sp, #12
-     6e6:      	add	r2, sp, #136
-     6e8:      	mov	r0, r2
-     6ea:      	ldm	r3!, {r4, r5, r6}
-     6ec:      	stm	r0!, {r4, r5, r6}
-     6ee:      	ldm	r3!, {r4, r5, r6}
-     6f0:      	stm	r0!, {r4, r5, r6}
-     6f2:      	adds	r0, r1, #4
-     6f4:      	ldm	r2!, {r3, r4, r5}
-     6f6:      	stm	r0!, {r3, r4, r5}
-     6f8:      	ldm	r2!, {r3, r4, r5}
-     6fa:      	stm	r0!, {r3, r4, r5}
-     6fc:      	movs	r0, #0
-     6fe:      	strb	r0, [r1]
-     700:      	b	0x67c <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0x78> @ imm = #-136
-     702:      	ldr	r0, [sp, #8]
-     704:      	ldr	r1, [sp, #132]
-     706:      	add	r2, sp, #176
-     708:      	strb	r1, [r2]
-     70a:      	bl	0x16a <_ZN153_$LT$core..result..Result$LT$T$C$F$GT$$u20$as$u20$core..ops..try_trait..FromResidual$LT$core..result..Result$LT$core..convert..Infallible$C$E$GT$$GT$$GT$13from_residual17hf0b33a7df54d743fE> @ imm = #-1444
-     70e:      	b	0x710 <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0x10c> @ imm = #-2
-     710:      	b	0x6be <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0xba> @ imm = #-86
-     712:      	bmi	0x6be <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6+0xba> @ imm = #-88
-
-00000714 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70>:
-     714:      	push	{r7, lr}
-     716:      	add	r7, sp, #0
-     718:      	sub	sp, #96
-     71a:      	mov	r2, r1
-     71c:      	str	r2, [sp, #4]
-     71e:      	str	r0, [sp, #12]
-     720:      	add	r2, sp, #16
-     722:      	strb	r1, [r2]
-     724:      	str	r0, [sp, #24]
-     726:      	b	0x728 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0x14> @ imm = #-2
-     728:      	ldr	r0, [pc, #280] <$d.1>
-     72a:      	str	r0, [sp]
-     72c:      	str	r0, [sp, #52]
-     72e:      	str	r0, [sp, #60]
-     730:      	str	r0, [sp, #64]
-     732:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #31034
-     736:      	str	r0, [sp, #56]
-     738:      	str	r0, [sp, #40]
-     73a:      	ldr	r1, [sp, #40]
-     73c:      	str	r1, [sp, #72]
-     73e:      	str	r1, [sp, #68]
-     740:      	ldr	r1, [sp, #68]
-     742:      	str	r1, [sp, #36]
-     744:      	str	r0, [sp, #48]
-     746:      	ldr	r0, [sp, #48]
-     748:      	str	r0, [sp, #92]
-     74a:      	str	r0, [sp, #88]
-     74c:      	ldr	r0, [sp, #88]
-     74e:      	str	r0, [sp, #44]
-     750:      	add	r0, sp, #36
-     752:      	str	r0, [sp, #28]
-     754:      	add	r0, sp, #44
-     756:      	str	r0, [sp, #32]
-     758:      	ldr	r0, [sp, #28]
-     75a:      	ldr	r1, [sp, #32]
-     75c:      	bl	0x3df0 <va108xx_hal::gpio::pins::PinsA::new::{{closure}}::hf626c193cc0edba5> @ imm = #13968
-     760:      	mov	r1, r0
-     762:      	ldr	r0, [sp]
-     764:      	ldr	r1, [r1]
-     766:      	str	r0, [sp, #76]
-     768:      	str	r1, [sp, #80]
-     76a:      	str	r0, [sp, #84]
-     76c:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #30996
-     770:      	b	0x772 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0x5e> @ imm = #-2
-     772:      	bl	0x3a58 <va108xx_hal::gpio::pins::Pin<I,M>::new::h64715132fd133831> @ imm = #13026
-     776:      	b	0x778 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0x64> @ imm = #-2
-     778:      	bl	0x3a94 <va108xx_hal::gpio::pins::Pin<I,M>::new::h7d51278e7f56056d> @ imm = #13080
-     77c:      	b	0x77e <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0x6a> @ imm = #-2
-     77e:      	bl	0x3a64 <va108xx_hal::gpio::pins::Pin<I,M>::new::h650c37744f8489ae> @ imm = #13026
-     782:      	b	0x784 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0x70> @ imm = #-2
-     784:      	bl	0x3a40 <va108xx_hal::gpio::pins::Pin<I,M>::new::h45e011f5ea5d3bdc> @ imm = #12984
-     788:      	b	0x78a <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0x76> @ imm = #-2
-     78a:      	bl	0x3ad0 <va108xx_hal::gpio::pins::Pin<I,M>::new::h908f3b669f15dfdf> @ imm = #13122
-     78e:      	b	0x790 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0x7c> @ imm = #-2
-     790:      	bl	0x3a10 <va108xx_hal::gpio::pins::Pin<I,M>::new::h18eb5f607c4e3b6a> @ imm = #12924
-     794:      	b	0x796 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0x82> @ imm = #-2
-     796:      	bl	0x3b6c <va108xx_hal::gpio::pins::Pin<I,M>::new::hda10b6a26e856d16> @ imm = #13266
-     79a:      	b	0x79c <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0x88> @ imm = #-2
-     79c:      	bl	0x3b30 <va108xx_hal::gpio::pins::Pin<I,M>::new::hc700a86ca7326b11> @ imm = #13200
-     7a0:      	b	0x7a2 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0x8e> @ imm = #-2
-     7a2:      	bl	0x3ae8 <va108xx_hal::gpio::pins::Pin<I,M>::new::h9cf26ae7ed0ab65c> @ imm = #13122
-     7a6:      	b	0x7a8 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0x94> @ imm = #-2
-     7a8:      	bl	0x3b54 <va108xx_hal::gpio::pins::Pin<I,M>::new::hd3eadb3b051279a3> @ imm = #13224
-     7ac:      	b	0x7ae <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0x9a> @ imm = #-2
-     7ae:      	bl	0x3b3c <va108xx_hal::gpio::pins::Pin<I,M>::new::hccaa9b3f205c4166> @ imm = #13194
-     7b2:      	b	0x7b4 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0xa0> @ imm = #-2
-     7b4:      	bl	0x3af4 <va108xx_hal::gpio::pins::Pin<I,M>::new::ha0b449f7fbf71e3d> @ imm = #13116
-     7b8:      	b	0x7ba <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0xa6> @ imm = #-2
-     7ba:      	bl	0x3a70 <va108xx_hal::gpio::pins::Pin<I,M>::new::h69a28e0f07999afb> @ imm = #12978
-     7be:      	b	0x7c0 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0xac> @ imm = #-2
-     7c0:      	bl	0x3b24 <va108xx_hal::gpio::pins::Pin<I,M>::new::hc56534f9bc4f5f98> @ imm = #13152
-     7c4:      	b	0x7c6 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0xb2> @ imm = #-2
-     7c6:      	bl	0x3a4c <va108xx_hal::gpio::pins::Pin<I,M>::new::h58edf0006af20877> @ imm = #12930
-     7ca:      	b	0x7cc <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0xb8> @ imm = #-2
-     7cc:      	bl	0x3adc <va108xx_hal::gpio::pins::Pin<I,M>::new::h9afd2bd61f6c7977> @ imm = #13068
-     7d0:      	b	0x7d2 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0xbe> @ imm = #-2
-     7d2:      	bl	0x39f8 <va108xx_hal::gpio::pins::Pin<I,M>::new::h0e947d8f70a5c4ee> @ imm = #12834
-     7d6:      	b	0x7d8 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0xc4> @ imm = #-2
-     7d8:      	bl	0x3a1c <va108xx_hal::gpio::pins::Pin<I,M>::new::h1cb8688bb646f501> @ imm = #12864
-     7dc:      	b	0x7de <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0xca> @ imm = #-2
-     7de:      	bl	0x3aac <va108xx_hal::gpio::pins::Pin<I,M>::new::h89205fae5478f36f> @ imm = #13002
-     7e2:      	b	0x7e4 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0xd0> @ imm = #-2
-     7e4:      	bl	0x3aa0 <va108xx_hal::gpio::pins::Pin<I,M>::new::h8275ab7bcbb6a54a> @ imm = #12984
-     7e8:      	b	0x7ea <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0xd6> @ imm = #-2
-     7ea:      	bl	0x3a7c <va108xx_hal::gpio::pins::Pin<I,M>::new::h7201b256be9742a4> @ imm = #12942
-     7ee:      	b	0x7f0 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0xdc> @ imm = #-2
-     7f0:      	bl	0x3a28 <va108xx_hal::gpio::pins::Pin<I,M>::new::h2396cd2530aebe96> @ imm = #12852
-     7f4:      	b	0x7f6 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0xe2> @ imm = #-2
-     7f6:      	bl	0x3a88 <va108xx_hal::gpio::pins::Pin<I,M>::new::h7aa3553f211620ac> @ imm = #12942
-     7fa:      	b	0x7fc <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0xe8> @ imm = #-2
-     7fc:      	bl	0x3b0c <va108xx_hal::gpio::pins::Pin<I,M>::new::hbf033e46699cdbbc> @ imm = #13068
-     800:      	b	0x802 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0xee> @ imm = #-2
-     802:      	bl	0x3b60 <va108xx_hal::gpio::pins::Pin<I,M>::new::hd6ad579ade87ada7> @ imm = #13146
-     806:      	b	0x808 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0xf4> @ imm = #-2
-     808:      	bl	0x3b84 <va108xx_hal::gpio::pins::Pin<I,M>::new::he1b9d5f2ef973f75> @ imm = #13176
-     80c:      	b	0x80e <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0xfa> @ imm = #-2
-     80e:      	bl	0x3b18 <va108xx_hal::gpio::pins::Pin<I,M>::new::hc1b8b25c992f8f59> @ imm = #13062
-     812:      	b	0x814 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0x100> @ imm = #-2
-     814:      	bl	0x3b78 <va108xx_hal::gpio::pins::Pin<I,M>::new::he19b1ce5ac8003d5> @ imm = #13152
-     818:      	b	0x81a <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0x106> @ imm = #-2
-     81a:      	bl	0x3b9c <va108xx_hal::gpio::pins::Pin<I,M>::new::hf528d82e2890ec98> @ imm = #13182
-     81e:      	b	0x820 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0x10c> @ imm = #-2
-     820:      	bl	0x3ac4 <va108xx_hal::gpio::pins::Pin<I,M>::new::h8b80fc4d66623596> @ imm = #12960
-     824:      	b	0x826 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0x112> @ imm = #-2
-     826:      	bl	0x3b48 <va108xx_hal::gpio::pins::Pin<I,M>::new::hd22393e3b7f5ef05> @ imm = #13086
-     82a:      	b	0x82c <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0x118> @ imm = #-2
-     82c:      	bl	0x3a34 <va108xx_hal::gpio::pins::Pin<I,M>::new::h3a848f637e0dd407> @ imm = #12804
-     830:      	b	0x832 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70+0x11e> @ imm = #-2
-     832:      	ldr	r1, [sp, #4]
-     834:      	movs	r0, #1
-     836:      	ands	r1, r0
-     838:      	add	r0, sp, #8
-     83a:      	strb	r1, [r0]
-     83c:      	ldrb	r0, [r0]
-     83e:      	add	sp, #96
-     840:      	pop	{r7, pc}
-     842:      	mov	r8, r8
-
-00000844 <$d.1>:
-     844:	7c 00 00 40	.word	0x4000007c
-
-00000848 <core::fmt::Arguments::new_v1::h2fca5f745a17c9bb>:
-     848:      	push	{r4, r5, r7, lr}
-     84a:      	add	r7, sp, #8
-     84c:      	sub	sp, #56
-     84e:      	str	r3, [sp, #8]
-     850:      	str	r2, [sp, #12]
-     852:      	str	r1, [sp, #16]
-     854:      	str	r0, [sp, #20]
-     856:      	ldr	r0, [r7, #8]
-     858:      	str	r0, [sp, #24]
-     85a:      	str	r1, [sp, #40]
-     85c:      	str	r2, [sp, #44]
-     85e:      	str	r3, [sp, #48]
-     860:      	str	r0, [sp, #52]
-     862:      	cmp	r2, r0
-     864:      	blo	0x886 <core::fmt::Arguments::new_v1::h2fca5f745a17c9bb+0x3e> @ imm = #30
-     866:      	b	0x868 <core::fmt::Arguments::new_v1::h2fca5f745a17c9bb+0x20> @ imm = #-2
-     868:      	ldr	r1, [sp, #12]
-     86a:      	ldr	r0, [sp, #24]
-     86c:      	adds	r2, r0, #1
-     86e:      	movs	r0, #1
-     870:      	movs	r3, #0
-     872:      	str	r3, [sp]
-     874:      	cmp	r1, r2
-     876:      	str	r0, [sp, #4]
-     878:      	bhi	0x87e <core::fmt::Arguments::new_v1::h2fca5f745a17c9bb+0x36> @ imm = #2
-     87a:      	ldr	r0, [sp]
-     87c:      	str	r0, [sp, #4]
-     87e:      	ldr	r0, [sp, #4]
-     880:      	add	r1, sp, #28
-     882:      	strb	r0, [r1]
-     884:      	b	0x88e <core::fmt::Arguments::new_v1::h2fca5f745a17c9bb+0x46> @ imm = #6
-     886:      	add	r1, sp, #28
-     888:      	movs	r0, #1
-     88a:      	strb	r0, [r1]
-     88c:      	b	0x88e <core::fmt::Arguments::new_v1::h2fca5f745a17c9bb+0x46> @ imm = #-2
-     88e:      	add	r0, sp, #28
-     890:      	ldrb	r0, [r0]
-     892:      	lsls	r0, r0, #31
-     894:      	cmp	r0, #0
-     896:      	bne	0x8c0 <core::fmt::Arguments::new_v1::h2fca5f745a17c9bb+0x78> @ imm = #38
-     898:      	b	0x89a <core::fmt::Arguments::new_v1::h2fca5f745a17c9bb+0x52> @ imm = #-2
-     89a:      	ldr	r0, [sp, #24]
-     89c:      	ldr	r1, [sp, #20]
-     89e:      	ldr	r2, [sp, #8]
-     8a0:      	ldr	r3, [sp, #12]
-     8a2:      	ldr	r4, [sp, #16]
-     8a4:      	movs	r5, #0
-     8a6:      	str	r5, [sp, #36]
-     8a8:      	str	r5, [sp, #32]
-     8aa:      	str	r5, [sp, #32]
-     8ac:      	str	r4, [r1]
-     8ae:      	str	r3, [r1, #4]
-     8b0:      	ldr	r4, [sp, #32]
-     8b2:      	ldr	r3, [sp, #36]
-     8b4:      	str	r4, [r1, #8]
-     8b6:      	str	r3, [r1, #12]
-     8b8:      	str	r2, [r1, #16]
-     8ba:      	str	r0, [r1, #20]
-     8bc:      	add	sp, #56
-     8be:      	pop	{r4, r5, r7, pc}
-     8c0:      	ldr	r0, [pc, #8] <$d.1>
-     8c2:      	ldr	r2, [pc, #12] <$d.1+0x6>
-     8c4:      	movs	r1, #12
-     8c6:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #31870
-     8ca:      	trap
-
-000008cc <$d.1>:
-     8cc:	10 a9 00 00	.word	0x0000a910
-     8d0:	68 a9 00 00	.word	0x0000a968
-
-000008d4 <<va108xx_hal::gpio::dynpins::DynInput as core::cmp::PartialEq>::eq::hf566ff60b6aa11fe>:
-     8d4:      	sub	sp, #20
-     8d6:      	str	r0, [sp, #4]
-     8d8:      	str	r1, [sp, #8]
-     8da:      	ldrb	r0, [r0]
-     8dc:      	str	r0, [sp, #12]
-     8de:      	ldrb	r1, [r1]
-     8e0:      	str	r1, [sp, #16]
-     8e2:      	cmp	r0, r1
-     8e4:      	beq	0x8f0 <<va108xx_hal::gpio::dynpins::DynInput as core::cmp::PartialEq>::eq::hf566ff60b6aa11fe+0x1c> @ imm = #8
-     8e6:      	b	0x8e8 <<va108xx_hal::gpio::dynpins::DynInput as core::cmp::PartialEq>::eq::hf566ff60b6aa11fe+0x14> @ imm = #-2
-     8e8:      	mov	r1, sp
-     8ea:      	movs	r0, #0
-     8ec:      	strb	r0, [r1]
-     8ee:      	b	0x8f8 <<va108xx_hal::gpio::dynpins::DynInput as core::cmp::PartialEq>::eq::hf566ff60b6aa11fe+0x24> @ imm = #6
-     8f0:      	mov	r1, sp
-     8f2:      	movs	r0, #1
-     8f4:      	strb	r0, [r1]
-     8f6:      	b	0x8f8 <<va108xx_hal::gpio::dynpins::DynInput as core::cmp::PartialEq>::eq::hf566ff60b6aa11fe+0x24> @ imm = #-2
-     8f8:      	mov	r0, sp
-     8fa:      	ldrb	r0, [r0]
-     8fc:      	add	sp, #20
-     8fe:      	bx	lr
-
-00000900 <<va108xx_hal::gpio::dynpins::DynOutput as core::cmp::PartialEq>::eq::hf1273109ef798499>:
-     900:      	sub	sp, #20
-     902:      	str	r0, [sp, #4]
-     904:      	str	r1, [sp, #8]
-     906:      	ldrb	r0, [r0]
-     908:      	str	r0, [sp, #12]
-     90a:      	ldrb	r1, [r1]
-     90c:      	str	r1, [sp, #16]
-     90e:      	cmp	r0, r1
-     910:      	beq	0x91c <<va108xx_hal::gpio::dynpins::DynOutput as core::cmp::PartialEq>::eq::hf1273109ef798499+0x1c> @ imm = #8
-     912:      	b	0x914 <<va108xx_hal::gpio::dynpins::DynOutput as core::cmp::PartialEq>::eq::hf1273109ef798499+0x14> @ imm = #-2
-     914:      	mov	r1, sp
-     916:      	movs	r0, #0
-     918:      	strb	r0, [r1]
-     91a:      	b	0x924 <<va108xx_hal::gpio::dynpins::DynOutput as core::cmp::PartialEq>::eq::hf1273109ef798499+0x24> @ imm = #6
-     91c:      	mov	r1, sp
-     91e:      	movs	r0, #1
-     920:      	strb	r0, [r1]
-     922:      	b	0x924 <<va108xx_hal::gpio::dynpins::DynOutput as core::cmp::PartialEq>::eq::hf1273109ef798499+0x24> @ imm = #-2
-     924:      	mov	r0, sp
-     926:      	ldrb	r0, [r0]
-     928:      	add	sp, #20
-     92a:      	bx	lr
-
-0000092c <<va108xx_hal::gpio::dynpins::DynPinMode as core::cmp::PartialEq>::ne::h9557062a1ebbf52d>:
-     92c:      	push	{r7, lr}
-     92e:      	add	r7, sp, #0
-     930:      	sub	sp, #64
-     932:      	str	r1, [sp, #4]
-     934:      	str	r0, [sp, #8]
-     936:      	str	r0, [sp, #24]
-     938:      	str	r1, [sp, #28]
-     93a:      	ldrb	r0, [r0]
-     93c:      	str	r0, [sp, #32]
-     93e:      	ldrb	r1, [r1]
-     940:      	str	r1, [sp, #36]
-     942:      	cmp	r0, r1
-     944:      	beq	0x950 <<va108xx_hal::gpio::dynpins::DynPinMode as core::cmp::PartialEq>::ne::h9557062a1ebbf52d+0x24> @ imm = #8
-     946:      	b	0x948 <<va108xx_hal::gpio::dynpins::DynPinMode as core::cmp::PartialEq>::ne::h9557062a1ebbf52d+0x1c> @ imm = #-2
-     948:      	add	r1, sp, #12
-     94a:      	movs	r0, #1
-     94c:      	strb	r0, [r1]
-     94e:      	b	0x9a4 <<va108xx_hal::gpio::dynpins::DynPinMode as core::cmp::PartialEq>::ne::h9557062a1ebbf52d+0x78> @ imm = #82
-     950:      	ldr	r0, [sp, #4]
-     952:      	ldr	r1, [sp, #8]
-     954:      	str	r1, [sp, #16]
-     956:      	str	r0, [sp, #20]
-     958:      	ldr	r0, [sp, #16]
-     95a:      	ldrb	r0, [r0]
-     95c:      	str	r0, [sp]
-     95e:      	cmp	r0, #0
-     960:      	beq	0x970 <<va108xx_hal::gpio::dynpins::DynPinMode as core::cmp::PartialEq>::ne::h9557062a1ebbf52d+0x44> @ imm = #12
-     962:      	b	0x964 <<va108xx_hal::gpio::dynpins::DynPinMode as core::cmp::PartialEq>::ne::h9557062a1ebbf52d+0x38> @ imm = #-2
-     964:      	ldr	r0, [sp]
-     966:      	cmp	r0, #1
-     968:      	beq	0x97a <<va108xx_hal::gpio::dynpins::DynPinMode as core::cmp::PartialEq>::ne::h9557062a1ebbf52d+0x4e> @ imm = #14
-     96a:      	b	0x96c <<va108xx_hal::gpio::dynpins::DynPinMode as core::cmp::PartialEq>::ne::h9557062a1ebbf52d+0x40> @ imm = #-2
-     96c:      	b	0x984 <<va108xx_hal::gpio::dynpins::DynPinMode as core::cmp::PartialEq>::ne::h9557062a1ebbf52d+0x58> @ imm = #20
-     96e:      	trap
-     970:      	ldr	r0, [sp, #20]
-     972:      	ldrb	r0, [r0]
-     974:      	cmp	r0, #0
-     976:      	beq	0x9c2 <<va108xx_hal::gpio::dynpins::DynPinMode as core::cmp::PartialEq>::ne::h9557062a1ebbf52d+0x96> @ imm = #72
-     978:      	b	0x96e <<va108xx_hal::gpio::dynpins::DynPinMode as core::cmp::PartialEq>::ne::h9557062a1ebbf52d+0x42> @ imm = #-14
-     97a:      	ldr	r0, [sp, #20]
-     97c:      	ldrb	r0, [r0]
-     97e:      	cmp	r0, #1
-     980:      	beq	0x9ac <<va108xx_hal::gpio::dynpins::DynPinMode as core::cmp::PartialEq>::ne::h9557062a1ebbf52d+0x80> @ imm = #40
-     982:      	b	0x96e <<va108xx_hal::gpio::dynpins::DynPinMode as core::cmp::PartialEq>::ne::h9557062a1ebbf52d+0x42> @ imm = #-24
-     984:      	ldr	r0, [sp, #20]
-     986:      	ldrb	r0, [r0]
-     988:      	cmp	r0, #2
-     98a:      	bne	0x96e <<va108xx_hal::gpio::dynpins::DynPinMode as core::cmp::PartialEq>::ne::h9557062a1ebbf52d+0x42> @ imm = #-32
-     98c:      	b	0x98e <<va108xx_hal::gpio::dynpins::DynPinMode as core::cmp::PartialEq>::ne::h9557062a1ebbf52d+0x62> @ imm = #-2
-     98e:      	ldr	r0, [sp, #16]
-     990:      	adds	r0, r0, #1
-     992:      	str	r0, [sp, #40]
-     994:      	ldr	r1, [sp, #20]
-     996:      	adds	r1, r1, #1
-     998:      	str	r1, [sp, #44]
-     99a:      	bl	0x5e8 <core::cmp::PartialEq::ne::hbb814c417ceb0a0e> @ imm = #-950
-     99e:      	add	r1, sp, #12
-     9a0:      	strb	r0, [r1]
-     9a2:      	b	0x9a4 <<va108xx_hal::gpio::dynpins::DynPinMode as core::cmp::PartialEq>::ne::h9557062a1ebbf52d+0x78> @ imm = #-2
-     9a4:      	add	r0, sp, #12
-     9a6:      	ldrb	r0, [r0]
-     9a8:      	add	sp, #64
-     9aa:      	pop	{r7, pc}
-     9ac:      	ldr	r0, [sp, #16]
-     9ae:      	adds	r0, r0, #1
-     9b0:      	str	r0, [sp, #48]
-     9b2:      	ldr	r1, [sp, #20]
-     9b4:      	adds	r1, r1, #1
-     9b6:      	str	r1, [sp, #52]
-     9b8:      	bl	0x2034 <core::cmp::PartialEq::ne::h12c2ee69d5902ab8> @ imm = #5752
-     9bc:      	add	r1, sp, #12
-     9be:      	strb	r0, [r1]
-     9c0:      	b	0x9a4 <<va108xx_hal::gpio::dynpins::DynPinMode as core::cmp::PartialEq>::ne::h9557062a1ebbf52d+0x78> @ imm = #-32
-     9c2:      	ldr	r0, [sp, #16]
-     9c4:      	adds	r0, r0, #1
-     9c6:      	str	r0, [sp, #56]
-     9c8:      	ldr	r1, [sp, #20]
-     9ca:      	adds	r1, r1, #1
-     9cc:      	str	r1, [sp, #60]
-     9ce:      	bl	0x2050 <core::cmp::PartialEq::ne::h7227460b38c673f8> @ imm = #5758
-     9d2:      	add	r1, sp, #12
-     9d4:      	strb	r0, [r1]
-     9d6:      	b	0x9a4 <<va108xx_hal::gpio::dynpins::DynPinMode as core::cmp::PartialEq>::ne::h9557062a1ebbf52d+0x78> @ imm = #-54
-
-000009d8 <<va108xx_hal::utility::Funsel as core::cmp::PartialEq>::eq::h3e9e1be30ca41b10>:
-     9d8:      	sub	sp, #20
-     9da:      	str	r0, [sp, #4]
-     9dc:      	str	r1, [sp, #8]
-     9de:      	ldrb	r0, [r0]
-     9e0:      	str	r0, [sp, #12]
-     9e2:      	ldrb	r1, [r1]
-     9e4:      	str	r1, [sp, #16]
-     9e6:      	cmp	r0, r1
-     9e8:      	beq	0x9f4 <<va108xx_hal::utility::Funsel as core::cmp::PartialEq>::eq::h3e9e1be30ca41b10+0x1c> @ imm = #8
-     9ea:      	b	0x9ec <<va108xx_hal::utility::Funsel as core::cmp::PartialEq>::eq::h3e9e1be30ca41b10+0x14> @ imm = #-2
-     9ec:      	mov	r1, sp
-     9ee:      	movs	r0, #0
-     9f0:      	strb	r0, [r1]
-     9f2:      	b	0x9fc <<va108xx_hal::utility::Funsel as core::cmp::PartialEq>::eq::h3e9e1be30ca41b10+0x24> @ imm = #6
-     9f4:      	mov	r1, sp
-     9f6:      	movs	r0, #1
-     9f8:      	strb	r0, [r1]
-     9fa:      	b	0x9fc <<va108xx_hal::utility::Funsel as core::cmp::PartialEq>::eq::h3e9e1be30ca41b10+0x24> @ imm = #-2
-     9fc:      	mov	r0, sp
-     9fe:      	ldrb	r0, [r0]
-     a00:      	add	sp, #20
-     a02:      	bx	lr
-
-00000a04 <core::option::Option<T>::ok_or::h5474822a3a86c46c>:
-     a04:      	sub	sp, #28
-     a06:      	mov	r2, r1
-     a08:      	str	r2, [sp]
-     a0a:      	str	r0, [sp, #4]
-     a0c:      	add	r0, sp, #20
-     a0e:      	strb	r1, [r0]
-     a10:      	add	r1, sp, #16
-     a12:      	movs	r0, #0
-     a14:      	strb	r0, [r1]
-     a16:      	movs	r0, #1
-     a18:      	strb	r0, [r1]
-     a1a:      	ldr	r0, [sp, #4]
-     a1c:      	subs	r2, r0, #1
-     a1e:      	mov	r1, r0
-     a20:      	sbcs	r1, r2
-     a22:      	cmp	r0, #0
-     a24:      	beq	0xa2c <core::option::Option<T>::ok_or::h5474822a3a86c46c+0x28> @ imm = #4
-     a26:      	b	0xa28 <core::option::Option<T>::ok_or::h5474822a3a86c46c+0x24> @ imm = #-2
-     a28:      	b	0xa3e <core::option::Option<T>::ok_or::h5474822a3a86c46c+0x3a> @ imm = #18
-     a2a:      	trap
-     a2c:      	ldr	r0, [sp]
-     a2e:      	add	r2, sp, #16
-     a30:      	movs	r1, #0
-     a32:      	strb	r1, [r2]
-     a34:      	add	r1, sp, #8
-     a36:      	strb	r0, [r1, #1]
-     a38:      	movs	r0, #1
-     a3a:      	strb	r0, [r1]
-     a3c:      	b	0xa4c <core::option::Option<T>::ok_or::h5474822a3a86c46c+0x48> @ imm = #12
-     a3e:      	ldr	r0, [sp, #4]
-     a40:      	str	r0, [sp, #24]
-     a42:      	str	r0, [sp, #12]
-     a44:      	add	r1, sp, #8
-     a46:      	movs	r0, #0
-     a48:      	strb	r0, [r1]
-     a4a:      	b	0xa4c <core::option::Option<T>::ok_or::h5474822a3a86c46c+0x48> @ imm = #-2
-     a4c:      	add	r0, sp, #16
-     a4e:      	ldrb	r0, [r0]
-     a50:      	lsls	r0, r0, #31
-     a52:      	cmp	r0, #0
-     a54:      	bne	0xa60 <core::option::Option<T>::ok_or::h5474822a3a86c46c+0x5c> @ imm = #8
-     a56:      	b	0xa58 <core::option::Option<T>::ok_or::h5474822a3a86c46c+0x54> @ imm = #-2
-     a58:      	ldr	r0, [sp, #8]
-     a5a:      	ldr	r1, [sp, #12]
-     a5c:      	add	sp, #28
-     a5e:      	bx	lr
-     a60:      	b	0xa58 <core::option::Option<T>::ok_or::h5474822a3a86c46c+0x54> @ imm = #-12
-
-00000a62 <core::option::Option<T>::ok_or::h7600f9cbeca56c74>:
-     a62:      	sub	sp, #28
-     a64:      	mov	r2, r1
-     a66:      	str	r2, [sp]
-     a68:      	str	r0, [sp, #4]
-     a6a:      	add	r0, sp, #20
-     a6c:      	strb	r1, [r0]
-     a6e:      	add	r1, sp, #16
-     a70:      	movs	r0, #0
-     a72:      	strb	r0, [r1]
-     a74:      	movs	r0, #1
-     a76:      	strb	r0, [r1]
-     a78:      	ldr	r0, [sp, #4]
-     a7a:      	subs	r2, r0, #1
-     a7c:      	mov	r1, r0
-     a7e:      	sbcs	r1, r2
-     a80:      	cmp	r0, #0
-     a82:      	beq	0xa8a <core::option::Option<T>::ok_or::h7600f9cbeca56c74+0x28> @ imm = #4
-     a84:      	b	0xa86 <core::option::Option<T>::ok_or::h7600f9cbeca56c74+0x24> @ imm = #-2
-     a86:      	b	0xa9c <core::option::Option<T>::ok_or::h7600f9cbeca56c74+0x3a> @ imm = #18
-     a88:      	trap
-     a8a:      	ldr	r0, [sp]
-     a8c:      	add	r2, sp, #16
-     a8e:      	movs	r1, #0
-     a90:      	strb	r1, [r2]
-     a92:      	add	r1, sp, #8
-     a94:      	strb	r0, [r1, #1]
-     a96:      	movs	r0, #1
-     a98:      	strb	r0, [r1]
-     a9a:      	b	0xaaa <core::option::Option<T>::ok_or::h7600f9cbeca56c74+0x48> @ imm = #12
-     a9c:      	ldr	r0, [sp, #4]
-     a9e:      	str	r0, [sp, #24]
-     aa0:      	str	r0, [sp, #12]
-     aa2:      	add	r1, sp, #8
-     aa4:      	movs	r0, #0
-     aa6:      	strb	r0, [r1]
-     aa8:      	b	0xaaa <core::option::Option<T>::ok_or::h7600f9cbeca56c74+0x48> @ imm = #-2
-     aaa:      	add	r0, sp, #16
-     aac:      	ldrb	r0, [r0]
-     aae:      	lsls	r0, r0, #31
-     ab0:      	cmp	r0, #0
-     ab2:      	bne	0xabe <core::option::Option<T>::ok_or::h7600f9cbeca56c74+0x5c> @ imm = #8
-     ab4:      	b	0xab6 <core::option::Option<T>::ok_or::h7600f9cbeca56c74+0x54> @ imm = #-2
-     ab6:      	ldr	r0, [sp, #8]
-     ab8:      	ldr	r1, [sp, #12]
-     aba:      	add	sp, #28
-     abc:      	bx	lr
-     abe:      	b	0xab6 <core::option::Option<T>::ok_or::h7600f9cbeca56c74+0x54> @ imm = #-12
-
-00000ac0 <core::option::Option<T>::unwrap::h4a61a13bc106e812>:
-     ac0:      	push	{r7, lr}
-     ac2:      	add	r7, sp, #0
-     ac4:      	sub	sp, #16
-     ac6:      	str	r1, [sp, #4]
-     ac8:      	mov	r1, r0
-     aca:      	add	r0, sp, #8
-     acc:      	strb	r1, [r0]
-     ace:      	ldrb	r0, [r0]
-     ad0:      	lsls	r0, r0, #31
-     ad2:      	cmp	r0, #0
-     ad4:      	beq	0xadc <core::option::Option<T>::unwrap::h4a61a13bc106e812+0x1c> @ imm = #4
-     ad6:      	b	0xad8 <core::option::Option<T>::unwrap::h4a61a13bc106e812+0x18> @ imm = #-2
-     ad8:      	b	0xae8 <core::option::Option<T>::unwrap::h4a61a13bc106e812+0x28> @ imm = #12
-     ada:      	trap
-     adc:      	ldr	r2, [sp, #4]
-     ade:      	ldr	r0, [pc, #12] <$d.3+0x2>
-     ae0:      	movs	r1, #43
-     ae2:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #31330
-     ae6:      	trap
-     ae8:      	add	sp, #16
-     aea:      	pop	{r7, pc}
-
-00000aec <$d.3>:
-     aec:	78 a9 00 00	.word	0x0000a978
-
-00000af0 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h0749be06a56a00e3>:
-     af0:      	sub	sp, #32
-     af2:      	str	r1, [sp]
-     af4:      	str	r0, [sp, #4]
-     af6:      	str	r1, [sp, #8]
-     af8:      	ldr	r0, [r0]
-     afa:      	str	r1, [sp, #12]
-     afc:      	str	r0, [sp, #16]
-     afe:      	str	r1, [sp, #20]
-     b00:      	str	r0, [sp, #24]
-     b02:      	str	r0, [r1]
-     b04:      	b	0xb06 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h0749be06a56a00e3+0x16> @ imm = #-2
-     b06:      	ldr	r0, [sp]
-     b08:      	str	r0, [sp, #28]
-     b0a:      	b	0xb0c <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h0749be06a56a00e3+0x1c> @ imm = #-2
-     b0c:      	ldr	r0, [sp]
-     b0e:      	add	sp, #32
-     b10:      	bx	lr
-
-00000b12 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h1da809e59f2f513d>:
-     b12:      	sub	sp, #56
-     b14:      	str	r2, [sp, #4]
-     b16:      	str	r1, [sp, #8]
-     b18:      	str	r0, [sp, #12]
-     b1a:      	str	r0, [sp, #16]
-     b1c:      	str	r1, [sp, #20]
-     b1e:      	str	r2, [sp, #24]
-     b20:      	str	r1, [sp, #28]
-     b22:      	b	0xb24 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h1da809e59f2f513d+0x12> @ imm = #-2
-     b24:      	ldr	r0, [sp, #8]
-     b26:      	str	r0, [sp, #52]
-     b28:      	ldr	r0, [r0]
-     b2a:      	str	r0, [sp]
-     b2c:      	b	0xb2e <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h1da809e59f2f513d+0x1c> @ imm = #-2
-     b2e:      	ldr	r1, [sp, #4]
-     b30:      	ldr	r0, [sp]
-     b32:      	ldr	r2, [sp, #12]
-     b34:      	ldr	r2, [r2]
-     b36:      	orrs	r0, r2
-     b38:      	str	r1, [sp, #36]
-     b3a:      	str	r0, [sp, #40]
-     b3c:      	str	r1, [sp, #44]
-     b3e:      	str	r0, [sp, #48]
-     b40:      	str	r0, [r1]
-     b42:      	b	0xb44 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h1da809e59f2f513d+0x32> @ imm = #-2
-     b44:      	ldr	r0, [sp, #4]
-     b46:      	str	r0, [sp, #32]
-     b48:      	b	0xb4a <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h1da809e59f2f513d+0x38> @ imm = #-2
-     b4a:      	ldr	r0, [sp, #4]
-     b4c:      	add	sp, #56
-     b4e:      	bx	lr
-
-00000b50 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h1dbb3ecca469fca4>:
-     b50:      	sub	sp, #56
-     b52:      	str	r2, [sp, #4]
-     b54:      	str	r1, [sp, #8]
-     b56:      	str	r0, [sp, #12]
-     b58:      	str	r0, [sp, #16]
-     b5a:      	str	r1, [sp, #20]
-     b5c:      	str	r2, [sp, #24]
-     b5e:      	str	r1, [sp, #28]
-     b60:      	b	0xb62 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h1dbb3ecca469fca4+0x12> @ imm = #-2
-     b62:      	ldr	r0, [sp, #8]
-     b64:      	str	r0, [sp, #52]
-     b66:      	ldr	r0, [r0]
-     b68:      	str	r0, [sp]
-     b6a:      	b	0xb6c <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h1dbb3ecca469fca4+0x1c> @ imm = #-2
-     b6c:      	ldr	r1, [sp, #4]
-     b6e:      	ldr	r0, [sp]
-     b70:      	ldr	r2, [sp, #12]
-     b72:      	ldr	r2, [r2]
-     b74:      	orrs	r0, r2
-     b76:      	str	r1, [sp, #36]
-     b78:      	str	r0, [sp, #40]
-     b7a:      	str	r1, [sp, #44]
-     b7c:      	str	r0, [sp, #48]
-     b7e:      	str	r0, [r1]
-     b80:      	b	0xb82 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h1dbb3ecca469fca4+0x32> @ imm = #-2
-     b82:      	ldr	r0, [sp, #4]
-     b84:      	str	r0, [sp, #32]
-     b86:      	b	0xb88 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h1dbb3ecca469fca4+0x38> @ imm = #-2
-     b88:      	ldr	r0, [sp, #4]
-     b8a:      	add	sp, #56
-     b8c:      	bx	lr
-
-00000b8e <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h2a2e7ae71d5d4391>:
-     b8e:      	sub	sp, #32
-     b90:      	str	r1, [sp]
-     b92:      	str	r0, [sp, #4]
-     b94:      	str	r1, [sp, #8]
-     b96:      	ldr	r0, [r0]
-     b98:      	str	r1, [sp, #12]
-     b9a:      	str	r0, [sp, #16]
-     b9c:      	str	r1, [sp, #20]
-     b9e:      	str	r0, [sp, #24]
-     ba0:      	str	r0, [r1]
-     ba2:      	b	0xba4 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h2a2e7ae71d5d4391+0x16> @ imm = #-2
-     ba4:      	ldr	r0, [sp]
-     ba6:      	str	r0, [sp, #28]
-     ba8:      	b	0xbaa <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h2a2e7ae71d5d4391+0x1c> @ imm = #-2
-     baa:      	ldr	r0, [sp]
-     bac:      	add	sp, #32
-     bae:      	bx	lr
-
-00000bb0 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h2a85ec3a68a3780a>:
-     bb0:      	sub	sp, #56
-     bb2:      	str	r2, [sp, #4]
-     bb4:      	str	r1, [sp, #8]
-     bb6:      	str	r0, [sp, #12]
-     bb8:      	str	r0, [sp, #16]
-     bba:      	str	r1, [sp, #20]
-     bbc:      	str	r2, [sp, #24]
-     bbe:      	str	r1, [sp, #28]
-     bc0:      	b	0xbc2 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h2a85ec3a68a3780a+0x12> @ imm = #-2
-     bc2:      	ldr	r0, [sp, #8]
-     bc4:      	str	r0, [sp, #52]
-     bc6:      	ldr	r0, [r0]
-     bc8:      	str	r0, [sp]
-     bca:      	b	0xbcc <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h2a85ec3a68a3780a+0x1c> @ imm = #-2
-     bcc:      	ldr	r1, [sp, #4]
-     bce:      	ldr	r0, [sp]
-     bd0:      	ldr	r2, [sp, #12]
-     bd2:      	ldr	r2, [r2]
-     bd4:      	bics	r0, r2
-     bd6:      	str	r1, [sp, #36]
-     bd8:      	str	r0, [sp, #40]
-     bda:      	str	r1, [sp, #44]
-     bdc:      	str	r0, [sp, #48]
-     bde:      	str	r0, [r1]
-     be0:      	b	0xbe2 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h2a85ec3a68a3780a+0x32> @ imm = #-2
-     be2:      	ldr	r0, [sp, #4]
-     be4:      	str	r0, [sp, #32]
-     be6:      	b	0xbe8 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h2a85ec3a68a3780a+0x38> @ imm = #-2
-     be8:      	ldr	r0, [sp, #4]
-     bea:      	add	sp, #56
-     bec:      	bx	lr
-
-00000bee <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h2b7975d046532670>:
-     bee:      	sub	sp, #156
-     bf0:      	str	r1, [sp, #16]
-     bf2:      	str	r0, [sp, #20]
-     bf4:      	str	r1, [sp, #28]
-     bf6:      	str	r1, [sp, #36]
-     bf8:      	str	r1, [sp, #32]
-     bfa:      	ldr	r0, [sp, #32]
-     bfc:      	str	r0, [sp, #24]
-     bfe:      	b	0xc00 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h2b7975d046532670+0x12> @ imm = #-2
-     c00:      	ldr	r1, [sp, #24]
-     c02:      	ldr	r0, [sp, #20]
-     c04:      	ldr	r0, [r0]
-     c06:      	ldrb	r2, [r0]
-     c08:      	str	r1, [sp, #140]
-     c0a:      	add	r0, sp, #144
-     c0c:      	strb	r2, [r0]
-     c0e:      	str	r1, [sp, #148]
-     c10:      	ldr	r0, [r1]
-     c12:      	movs	r3, #1
-     c14:      	lsls	r3, r3, #8
-     c16:      	bics	r0, r3
-     c18:      	lsls	r2, r2, #8
-     c1a:      	str	r1, [sp, #152]
-     c1c:      	orrs	r0, r2
-     c1e:      	str	r0, [r1]
-     c20:      	b	0xc22 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h2b7975d046532670+0x34> @ imm = #-2
-     c22:      	ldr	r0, [sp, #16]
-     c24:      	str	r0, [sp, #136]
-     c26:      	str	r0, [sp, #132]
-     c28:      	ldr	r0, [sp, #132]
-     c2a:      	str	r0, [sp, #12]
-     c2c:      	b	0xc2e <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h2b7975d046532670+0x40> @ imm = #-2
-     c2e:      	ldr	r1, [sp, #12]
-     c30:      	ldr	r0, [sp, #20]
-     c32:      	ldr	r0, [r0, #4]
-     c34:      	ldrb	r2, [r0]
-     c36:      	str	r1, [sp, #116]
-     c38:      	add	r0, sp, #120
-     c3a:      	strb	r2, [r0]
-     c3c:      	str	r1, [sp, #124]
-     c3e:      	ldr	r0, [r1]
-     c40:      	movs	r3, #1
-     c42:      	lsls	r3, r3, #11
-     c44:      	bics	r0, r3
-     c46:      	lsls	r2, r2, #11
-     c48:      	str	r1, [sp, #128]
-     c4a:      	orrs	r0, r2
-     c4c:      	str	r0, [r1]
-     c4e:      	b	0xc50 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h2b7975d046532670+0x62> @ imm = #-2
-     c50:      	ldr	r0, [sp, #16]
-     c52:      	str	r0, [sp, #112]
-     c54:      	str	r0, [sp, #108]
-     c56:      	ldr	r0, [sp, #108]
-     c58:      	str	r0, [sp, #8]
-     c5a:      	b	0xc5c <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h2b7975d046532670+0x6e> @ imm = #-2
-     c5c:      	ldr	r1, [sp, #8]
-     c5e:      	ldr	r0, [sp, #20]
-     c60:      	ldr	r0, [r0, #8]
-     c62:      	ldrb	r2, [r0]
-     c64:      	str	r1, [sp, #92]
-     c66:      	add	r0, sp, #96
-     c68:      	strb	r2, [r0]
-     c6a:      	str	r1, [sp, #100]
-     c6c:      	ldr	r0, [r1]
-     c6e:      	movs	r3, #1
-     c70:      	lsls	r3, r3, #10
-     c72:      	bics	r0, r3
-     c74:      	lsls	r2, r2, #10
-     c76:      	str	r1, [sp, #104]
-     c78:      	orrs	r0, r2
-     c7a:      	str	r0, [r1]
-     c7c:      	b	0xc7e <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h2b7975d046532670+0x90> @ imm = #-2
-     c7e:      	ldr	r0, [sp, #16]
-     c80:      	str	r0, [sp, #88]
-     c82:      	str	r0, [sp, #84]
-     c84:      	ldr	r0, [sp, #84]
-     c86:      	str	r0, [sp, #4]
-     c88:      	b	0xc8a <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h2b7975d046532670+0x9c> @ imm = #-2
-     c8a:      	ldr	r1, [sp, #4]
-     c8c:      	ldr	r0, [sp, #20]
-     c8e:      	ldr	r0, [r0, #12]
-     c90:      	ldrb	r2, [r0]
-     c92:      	str	r1, [sp, #68]
-     c94:      	add	r0, sp, #72
-     c96:      	strb	r2, [r0]
-     c98:      	str	r1, [sp, #76]
-     c9a:      	ldr	r0, [r1]
-     c9c:      	movs	r3, #128
-     c9e:      	bics	r0, r3
-     ca0:      	lsls	r2, r2, #7
-     ca2:      	str	r1, [sp, #80]
-     ca4:      	orrs	r0, r2
-     ca6:      	str	r0, [r1]
-     ca8:      	b	0xcaa <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h2b7975d046532670+0xbc> @ imm = #-2
-     caa:      	ldr	r0, [sp, #16]
-     cac:      	str	r0, [sp, #64]
-     cae:      	str	r0, [sp, #60]
-     cb0:      	ldr	r0, [sp, #60]
-     cb2:      	str	r0, [sp]
-     cb4:      	b	0xcb6 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h2b7975d046532670+0xc8> @ imm = #-2
-     cb6:      	ldr	r1, [sp]
-     cb8:      	ldr	r0, [sp, #20]
-     cba:      	ldr	r0, [r0, #16]
-     cbc:      	ldrb	r2, [r0]
-     cbe:      	str	r1, [sp, #44]
-     cc0:      	add	r0, sp, #48
-     cc2:      	strb	r2, [r0]
-     cc4:      	str	r1, [sp, #52]
-     cc6:      	ldr	r0, [r1]
-     cc8:      	movs	r3, #7
-     cca:      	lsls	r3, r3, #13
-     ccc:      	bics	r0, r3
-     cce:      	lsls	r2, r2, #29
-     cd0:      	lsrs	r2, r2, #16
-     cd2:      	str	r1, [sp, #56]
-     cd4:      	adds	r0, r0, r2
-     cd6:      	str	r0, [r1]
-     cd8:      	b	0xcda <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h2b7975d046532670+0xec> @ imm = #-2
-     cda:      	ldr	r0, [sp]
-     cdc:      	str	r0, [sp, #40]
-     cde:      	b	0xce0 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h2b7975d046532670+0xf2> @ imm = #-2
-     ce0:      	ldr	r0, [sp]
-     ce2:      	add	sp, #156
-     ce4:      	bx	lr
-
-00000ce6 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h508745a5edd80e9e>:
-     ce6:      	sub	sp, #32
-     ce8:      	str	r1, [sp]
-     cea:      	str	r0, [sp, #4]
-     cec:      	str	r1, [sp, #8]
-     cee:      	ldr	r0, [r0]
-     cf0:      	str	r1, [sp, #12]
-     cf2:      	str	r0, [sp, #16]
-     cf4:      	str	r1, [sp, #20]
-     cf6:      	str	r0, [sp, #24]
-     cf8:      	str	r0, [r1]
-     cfa:      	b	0xcfc <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h508745a5edd80e9e+0x16> @ imm = #-2
-     cfc:      	ldr	r0, [sp]
-     cfe:      	str	r0, [sp, #28]
-     d00:      	b	0xd02 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h508745a5edd80e9e+0x1c> @ imm = #-2
-     d02:      	ldr	r0, [sp]
-     d04:      	add	sp, #32
-     d06:      	bx	lr
-
-00000d08 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h596b187473cdcc6a>:
-     d08:      	sub	sp, #32
-     d0a:      	str	r1, [sp]
-     d0c:      	str	r0, [sp, #4]
-     d0e:      	str	r1, [sp, #8]
-     d10:      	ldr	r0, [r0]
-     d12:      	str	r1, [sp, #12]
-     d14:      	str	r0, [sp, #16]
-     d16:      	str	r1, [sp, #20]
-     d18:      	str	r0, [sp, #24]
-     d1a:      	str	r0, [r1]
-     d1c:      	b	0xd1e <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h596b187473cdcc6a+0x16> @ imm = #-2
-     d1e:      	ldr	r0, [sp]
-     d20:      	str	r0, [sp, #28]
-     d22:      	b	0xd24 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h596b187473cdcc6a+0x1c> @ imm = #-2
-     d24:      	ldr	r0, [sp]
-     d26:      	add	sp, #32
-     d28:      	bx	lr
-
-00000d2a <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h65afbe282fc9a675>:
-     d2a:      	sub	sp, #56
-     d2c:      	str	r2, [sp, #4]
-     d2e:      	str	r1, [sp, #8]
-     d30:      	str	r0, [sp, #12]
-     d32:      	str	r0, [sp, #16]
-     d34:      	str	r1, [sp, #20]
-     d36:      	str	r2, [sp, #24]
-     d38:      	str	r1, [sp, #28]
-     d3a:      	b	0xd3c <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h65afbe282fc9a675+0x12> @ imm = #-2
-     d3c:      	ldr	r0, [sp, #8]
-     d3e:      	str	r0, [sp, #52]
-     d40:      	ldr	r0, [r0]
-     d42:      	str	r0, [sp]
-     d44:      	b	0xd46 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h65afbe282fc9a675+0x1c> @ imm = #-2
-     d46:      	ldr	r1, [sp, #4]
-     d48:      	ldr	r0, [sp]
-     d4a:      	ldr	r2, [sp, #12]
-     d4c:      	ldr	r2, [r2]
-     d4e:      	orrs	r0, r2
-     d50:      	str	r1, [sp, #36]
-     d52:      	str	r0, [sp, #40]
-     d54:      	str	r1, [sp, #44]
-     d56:      	str	r0, [sp, #48]
-     d58:      	str	r0, [r1]
-     d5a:      	b	0xd5c <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h65afbe282fc9a675+0x32> @ imm = #-2
-     d5c:      	ldr	r0, [sp, #4]
-     d5e:      	str	r0, [sp, #32]
-     d60:      	b	0xd62 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h65afbe282fc9a675+0x38> @ imm = #-2
-     d62:      	ldr	r0, [sp, #4]
-     d64:      	add	sp, #56
-     d66:      	bx	lr
-
-00000d68 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h71331b163ae8c41a>:
-     d68:      	sub	sp, #56
-     d6a:      	str	r2, [sp, #4]
-     d6c:      	str	r1, [sp, #8]
-     d6e:      	str	r0, [sp, #12]
-     d70:      	str	r0, [sp, #16]
-     d72:      	str	r1, [sp, #20]
-     d74:      	str	r2, [sp, #24]
-     d76:      	str	r1, [sp, #28]
-     d78:      	b	0xd7a <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h71331b163ae8c41a+0x12> @ imm = #-2
-     d7a:      	ldr	r0, [sp, #8]
-     d7c:      	str	r0, [sp, #52]
-     d7e:      	ldr	r0, [r0]
-     d80:      	str	r0, [sp]
-     d82:      	b	0xd84 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h71331b163ae8c41a+0x1c> @ imm = #-2
-     d84:      	ldr	r1, [sp, #4]
-     d86:      	ldr	r0, [sp]
-     d88:      	ldr	r2, [sp, #12]
-     d8a:      	ldr	r2, [r2]
-     d8c:      	orrs	r0, r2
-     d8e:      	str	r1, [sp, #36]
-     d90:      	str	r0, [sp, #40]
-     d92:      	str	r1, [sp, #44]
-     d94:      	str	r0, [sp, #48]
-     d96:      	str	r0, [r1]
-     d98:      	b	0xd9a <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h71331b163ae8c41a+0x32> @ imm = #-2
-     d9a:      	ldr	r0, [sp, #4]
-     d9c:      	str	r0, [sp, #32]
-     d9e:      	b	0xda0 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h71331b163ae8c41a+0x38> @ imm = #-2
-     da0:      	ldr	r0, [sp, #4]
-     da2:      	add	sp, #56
-     da4:      	bx	lr
-
-00000da6 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h79f484a6be3139a3>:
-     da6:      	sub	sp, #156
-     da8:      	str	r1, [sp, #16]
-     daa:      	str	r0, [sp, #20]
-     dac:      	str	r1, [sp, #28]
-     dae:      	str	r1, [sp, #36]
-     db0:      	str	r1, [sp, #32]
-     db2:      	ldr	r0, [sp, #32]
-     db4:      	str	r0, [sp, #24]
-     db6:      	b	0xdb8 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h79f484a6be3139a3+0x12> @ imm = #-2
-     db8:      	ldr	r1, [sp, #24]
-     dba:      	ldr	r0, [sp, #20]
-     dbc:      	ldr	r0, [r0]
-     dbe:      	ldrb	r2, [r0]
-     dc0:      	str	r1, [sp, #140]
-     dc2:      	add	r0, sp, #144
-     dc4:      	strb	r2, [r0]
-     dc6:      	str	r1, [sp, #148]
-     dc8:      	ldr	r0, [r1]
-     dca:      	movs	r3, #1
-     dcc:      	lsls	r3, r3, #8
-     dce:      	bics	r0, r3
-     dd0:      	lsls	r2, r2, #8
-     dd2:      	str	r1, [sp, #152]
-     dd4:      	orrs	r0, r2
-     dd6:      	str	r0, [r1]
-     dd8:      	b	0xdda <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h79f484a6be3139a3+0x34> @ imm = #-2
-     dda:      	ldr	r0, [sp, #16]
-     ddc:      	str	r0, [sp, #136]
-     dde:      	str	r0, [sp, #132]
-     de0:      	ldr	r0, [sp, #132]
-     de2:      	str	r0, [sp, #12]
-     de4:      	b	0xde6 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h79f484a6be3139a3+0x40> @ imm = #-2
-     de6:      	ldr	r1, [sp, #12]
-     de8:      	ldr	r0, [sp, #20]
-     dea:      	ldr	r0, [r0, #4]
-     dec:      	ldrb	r2, [r0]
-     dee:      	str	r1, [sp, #116]
-     df0:      	add	r0, sp, #120
-     df2:      	strb	r2, [r0]
-     df4:      	str	r1, [sp, #124]
-     df6:      	ldr	r0, [r1]
-     df8:      	movs	r3, #1
-     dfa:      	lsls	r3, r3, #11
-     dfc:      	bics	r0, r3
-     dfe:      	lsls	r2, r2, #11
-     e00:      	str	r1, [sp, #128]
-     e02:      	orrs	r0, r2
-     e04:      	str	r0, [r1]
-     e06:      	b	0xe08 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h79f484a6be3139a3+0x62> @ imm = #-2
-     e08:      	ldr	r0, [sp, #16]
-     e0a:      	str	r0, [sp, #112]
-     e0c:      	str	r0, [sp, #108]
-     e0e:      	ldr	r0, [sp, #108]
-     e10:      	str	r0, [sp, #8]
-     e12:      	b	0xe14 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h79f484a6be3139a3+0x6e> @ imm = #-2
-     e14:      	ldr	r1, [sp, #8]
-     e16:      	ldr	r0, [sp, #20]
-     e18:      	ldr	r0, [r0, #8]
-     e1a:      	ldrb	r2, [r0]
-     e1c:      	str	r1, [sp, #92]
-     e1e:      	add	r0, sp, #96
-     e20:      	strb	r2, [r0]
-     e22:      	str	r1, [sp, #100]
-     e24:      	ldr	r0, [r1]
-     e26:      	movs	r3, #1
-     e28:      	lsls	r3, r3, #10
-     e2a:      	bics	r0, r3
-     e2c:      	lsls	r2, r2, #10
-     e2e:      	str	r1, [sp, #104]
-     e30:      	orrs	r0, r2
-     e32:      	str	r0, [r1]
-     e34:      	b	0xe36 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h79f484a6be3139a3+0x90> @ imm = #-2
-     e36:      	ldr	r0, [sp, #16]
-     e38:      	str	r0, [sp, #88]
-     e3a:      	str	r0, [sp, #84]
-     e3c:      	ldr	r0, [sp, #84]
-     e3e:      	str	r0, [sp, #4]
-     e40:      	b	0xe42 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h79f484a6be3139a3+0x9c> @ imm = #-2
-     e42:      	ldr	r1, [sp, #4]
-     e44:      	ldr	r0, [sp, #20]
-     e46:      	ldr	r0, [r0, #12]
-     e48:      	ldrb	r2, [r0]
-     e4a:      	str	r1, [sp, #68]
-     e4c:      	add	r0, sp, #72
-     e4e:      	strb	r2, [r0]
-     e50:      	str	r1, [sp, #76]
-     e52:      	ldr	r0, [r1]
-     e54:      	movs	r3, #128
-     e56:      	bics	r0, r3
-     e58:      	lsls	r2, r2, #7
-     e5a:      	str	r1, [sp, #80]
-     e5c:      	orrs	r0, r2
-     e5e:      	str	r0, [r1]
-     e60:      	b	0xe62 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h79f484a6be3139a3+0xbc> @ imm = #-2
-     e62:      	ldr	r0, [sp, #16]
-     e64:      	str	r0, [sp, #64]
-     e66:      	str	r0, [sp, #60]
-     e68:      	ldr	r0, [sp, #60]
-     e6a:      	str	r0, [sp]
-     e6c:      	b	0xe6e <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h79f484a6be3139a3+0xc8> @ imm = #-2
-     e6e:      	ldr	r1, [sp]
-     e70:      	ldr	r0, [sp, #20]
-     e72:      	ldr	r0, [r0, #16]
-     e74:      	ldrb	r2, [r0]
-     e76:      	str	r1, [sp, #44]
-     e78:      	add	r0, sp, #48
-     e7a:      	strb	r2, [r0]
-     e7c:      	str	r1, [sp, #52]
-     e7e:      	ldr	r0, [r1]
-     e80:      	movs	r3, #7
-     e82:      	lsls	r3, r3, #13
-     e84:      	bics	r0, r3
-     e86:      	lsls	r2, r2, #29
-     e88:      	lsrs	r2, r2, #16
-     e8a:      	str	r1, [sp, #56]
-     e8c:      	adds	r0, r0, r2
-     e8e:      	str	r0, [r1]
-     e90:      	b	0xe92 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h79f484a6be3139a3+0xec> @ imm = #-2
-     e92:      	ldr	r0, [sp]
-     e94:      	str	r0, [sp, #40]
-     e96:      	b	0xe98 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h79f484a6be3139a3+0xf2> @ imm = #-2
-     e98:      	ldr	r0, [sp]
-     e9a:      	add	sp, #156
-     e9c:      	bx	lr
-
-00000e9e <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h89bc1eccc2486d81>:
-     e9e:      	sub	sp, #156
-     ea0:      	str	r1, [sp, #16]
-     ea2:      	str	r0, [sp, #20]
-     ea4:      	str	r1, [sp, #28]
-     ea6:      	str	r1, [sp, #36]
-     ea8:      	str	r1, [sp, #32]
-     eaa:      	ldr	r0, [sp, #32]
-     eac:      	str	r0, [sp, #24]
-     eae:      	b	0xeb0 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h89bc1eccc2486d81+0x12> @ imm = #-2
-     eb0:      	ldr	r1, [sp, #24]
-     eb2:      	ldr	r0, [sp, #20]
-     eb4:      	ldr	r0, [r0]
-     eb6:      	ldrb	r2, [r0]
-     eb8:      	str	r1, [sp, #140]
-     eba:      	add	r0, sp, #144
-     ebc:      	strb	r2, [r0]
-     ebe:      	str	r1, [sp, #148]
-     ec0:      	ldr	r0, [r1]
-     ec2:      	movs	r3, #1
-     ec4:      	lsls	r3, r3, #8
-     ec6:      	bics	r0, r3
-     ec8:      	lsls	r2, r2, #8
-     eca:      	str	r1, [sp, #152]
-     ecc:      	orrs	r0, r2
-     ece:      	str	r0, [r1]
-     ed0:      	b	0xed2 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h89bc1eccc2486d81+0x34> @ imm = #-2
-     ed2:      	ldr	r0, [sp, #16]
-     ed4:      	str	r0, [sp, #136]
-     ed6:      	str	r0, [sp, #132]
-     ed8:      	ldr	r0, [sp, #132]
-     eda:      	str	r0, [sp, #12]
-     edc:      	b	0xede <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h89bc1eccc2486d81+0x40> @ imm = #-2
-     ede:      	ldr	r1, [sp, #12]
-     ee0:      	ldr	r0, [sp, #20]
-     ee2:      	ldr	r0, [r0, #4]
-     ee4:      	ldrb	r2, [r0]
-     ee6:      	str	r1, [sp, #116]
-     ee8:      	add	r0, sp, #120
-     eea:      	strb	r2, [r0]
-     eec:      	str	r1, [sp, #124]
-     eee:      	ldr	r0, [r1]
-     ef0:      	movs	r3, #1
-     ef2:      	lsls	r3, r3, #11
-     ef4:      	bics	r0, r3
-     ef6:      	lsls	r2, r2, #11
-     ef8:      	str	r1, [sp, #128]
-     efa:      	orrs	r0, r2
-     efc:      	str	r0, [r1]
-     efe:      	b	0xf00 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h89bc1eccc2486d81+0x62> @ imm = #-2
-     f00:      	ldr	r0, [sp, #16]
-     f02:      	str	r0, [sp, #112]
-     f04:      	str	r0, [sp, #108]
-     f06:      	ldr	r0, [sp, #108]
-     f08:      	str	r0, [sp, #8]
-     f0a:      	b	0xf0c <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h89bc1eccc2486d81+0x6e> @ imm = #-2
-     f0c:      	ldr	r1, [sp, #8]
-     f0e:      	ldr	r0, [sp, #20]
-     f10:      	ldr	r0, [r0, #8]
-     f12:      	ldrb	r2, [r0]
-     f14:      	str	r1, [sp, #92]
-     f16:      	add	r0, sp, #96
-     f18:      	strb	r2, [r0]
-     f1a:      	str	r1, [sp, #100]
-     f1c:      	ldr	r0, [r1]
-     f1e:      	movs	r3, #1
-     f20:      	lsls	r3, r3, #10
-     f22:      	bics	r0, r3
-     f24:      	lsls	r2, r2, #10
-     f26:      	str	r1, [sp, #104]
-     f28:      	orrs	r0, r2
-     f2a:      	str	r0, [r1]
-     f2c:      	b	0xf2e <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h89bc1eccc2486d81+0x90> @ imm = #-2
-     f2e:      	ldr	r0, [sp, #16]
-     f30:      	str	r0, [sp, #88]
-     f32:      	str	r0, [sp, #84]
-     f34:      	ldr	r0, [sp, #84]
-     f36:      	str	r0, [sp, #4]
-     f38:      	b	0xf3a <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h89bc1eccc2486d81+0x9c> @ imm = #-2
-     f3a:      	ldr	r1, [sp, #4]
-     f3c:      	ldr	r0, [sp, #20]
-     f3e:      	ldr	r0, [r0, #12]
-     f40:      	ldrb	r2, [r0]
-     f42:      	str	r1, [sp, #68]
-     f44:      	add	r0, sp, #72
-     f46:      	strb	r2, [r0]
-     f48:      	str	r1, [sp, #76]
-     f4a:      	ldr	r0, [r1]
-     f4c:      	movs	r3, #128
-     f4e:      	bics	r0, r3
-     f50:      	lsls	r2, r2, #7
-     f52:      	str	r1, [sp, #80]
-     f54:      	orrs	r0, r2
-     f56:      	str	r0, [r1]
-     f58:      	b	0xf5a <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h89bc1eccc2486d81+0xbc> @ imm = #-2
-     f5a:      	ldr	r0, [sp, #16]
-     f5c:      	str	r0, [sp, #64]
-     f5e:      	str	r0, [sp, #60]
-     f60:      	ldr	r0, [sp, #60]
-     f62:      	str	r0, [sp]
-     f64:      	b	0xf66 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h89bc1eccc2486d81+0xc8> @ imm = #-2
-     f66:      	ldr	r1, [sp]
-     f68:      	ldr	r0, [sp, #20]
-     f6a:      	ldr	r0, [r0, #16]
-     f6c:      	ldrb	r2, [r0]
-     f6e:      	str	r1, [sp, #44]
-     f70:      	add	r0, sp, #48
-     f72:      	strb	r2, [r0]
-     f74:      	str	r1, [sp, #52]
-     f76:      	ldr	r0, [r1]
-     f78:      	movs	r3, #7
-     f7a:      	lsls	r3, r3, #13
-     f7c:      	bics	r0, r3
-     f7e:      	lsls	r2, r2, #29
-     f80:      	lsrs	r2, r2, #16
-     f82:      	str	r1, [sp, #56]
-     f84:      	adds	r0, r0, r2
-     f86:      	str	r0, [r1]
-     f88:      	b	0xf8a <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h89bc1eccc2486d81+0xec> @ imm = #-2
-     f8a:      	ldr	r0, [sp]
-     f8c:      	str	r0, [sp, #40]
-     f8e:      	b	0xf90 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h89bc1eccc2486d81+0xf2> @ imm = #-2
-     f90:      	ldr	r0, [sp]
-     f92:      	add	sp, #156
-     f94:      	bx	lr
-
-00000f96 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h9d2e25fa09987069>:
-     f96:      	sub	sp, #156
-     f98:      	str	r1, [sp, #16]
-     f9a:      	str	r0, [sp, #20]
-     f9c:      	str	r1, [sp, #28]
-     f9e:      	str	r1, [sp, #36]
-     fa0:      	str	r1, [sp, #32]
-     fa2:      	ldr	r0, [sp, #32]
-     fa4:      	str	r0, [sp, #24]
-     fa6:      	b	0xfa8 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h9d2e25fa09987069+0x12> @ imm = #-2
-     fa8:      	ldr	r1, [sp, #24]
-     faa:      	ldr	r0, [sp, #20]
-     fac:      	ldr	r0, [r0]
-     fae:      	ldrb	r2, [r0]
-     fb0:      	str	r1, [sp, #140]
-     fb2:      	add	r0, sp, #144
-     fb4:      	strb	r2, [r0]
-     fb6:      	str	r1, [sp, #148]
-     fb8:      	ldr	r0, [r1]
-     fba:      	movs	r3, #1
-     fbc:      	lsls	r3, r3, #8
-     fbe:      	bics	r0, r3
-     fc0:      	lsls	r2, r2, #8
-     fc2:      	str	r1, [sp, #152]
-     fc4:      	orrs	r0, r2
-     fc6:      	str	r0, [r1]
-     fc8:      	b	0xfca <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h9d2e25fa09987069+0x34> @ imm = #-2
-     fca:      	ldr	r0, [sp, #16]
-     fcc:      	str	r0, [sp, #136]
-     fce:      	str	r0, [sp, #132]
-     fd0:      	ldr	r0, [sp, #132]
-     fd2:      	str	r0, [sp, #12]
-     fd4:      	b	0xfd6 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h9d2e25fa09987069+0x40> @ imm = #-2
-     fd6:      	ldr	r1, [sp, #12]
-     fd8:      	ldr	r0, [sp, #20]
-     fda:      	ldr	r0, [r0, #4]
-     fdc:      	ldrb	r2, [r0]
-     fde:      	str	r1, [sp, #116]
-     fe0:      	add	r0, sp, #120
-     fe2:      	strb	r2, [r0]
-     fe4:      	str	r1, [sp, #124]
-     fe6:      	ldr	r0, [r1]
-     fe8:      	movs	r3, #1
-     fea:      	lsls	r3, r3, #11
-     fec:      	bics	r0, r3
-     fee:      	lsls	r2, r2, #11
-     ff0:      	str	r1, [sp, #128]
-     ff2:      	orrs	r0, r2
-     ff4:      	str	r0, [r1]
-     ff6:      	b	0xff8 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h9d2e25fa09987069+0x62> @ imm = #-2
-     ff8:      	ldr	r0, [sp, #16]
-     ffa:      	str	r0, [sp, #112]
-     ffc:      	str	r0, [sp, #108]
-     ffe:      	ldr	r0, [sp, #108]
-    1000:      	str	r0, [sp, #8]
-    1002:      	b	0x1004 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h9d2e25fa09987069+0x6e> @ imm = #-2
-    1004:      	ldr	r1, [sp, #8]
-    1006:      	ldr	r0, [sp, #20]
-    1008:      	ldr	r0, [r0, #8]
-    100a:      	ldrb	r2, [r0]
-    100c:      	str	r1, [sp, #92]
-    100e:      	add	r0, sp, #96
-    1010:      	strb	r2, [r0]
-    1012:      	str	r1, [sp, #100]
-    1014:      	ldr	r0, [r1]
-    1016:      	movs	r3, #1
-    1018:      	lsls	r3, r3, #10
-    101a:      	bics	r0, r3
-    101c:      	lsls	r2, r2, #10
-    101e:      	str	r1, [sp, #104]
-    1020:      	orrs	r0, r2
-    1022:      	str	r0, [r1]
-    1024:      	b	0x1026 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h9d2e25fa09987069+0x90> @ imm = #-2
-    1026:      	ldr	r0, [sp, #16]
-    1028:      	str	r0, [sp, #88]
-    102a:      	str	r0, [sp, #84]
-    102c:      	ldr	r0, [sp, #84]
-    102e:      	str	r0, [sp, #4]
-    1030:      	b	0x1032 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h9d2e25fa09987069+0x9c> @ imm = #-2
-    1032:      	ldr	r1, [sp, #4]
-    1034:      	ldr	r0, [sp, #20]
-    1036:      	ldr	r0, [r0, #12]
-    1038:      	ldrb	r2, [r0]
-    103a:      	str	r1, [sp, #68]
-    103c:      	add	r0, sp, #72
-    103e:      	strb	r2, [r0]
-    1040:      	str	r1, [sp, #76]
-    1042:      	ldr	r0, [r1]
-    1044:      	movs	r3, #128
-    1046:      	bics	r0, r3
-    1048:      	lsls	r2, r2, #7
-    104a:      	str	r1, [sp, #80]
-    104c:      	orrs	r0, r2
-    104e:      	str	r0, [r1]
-    1050:      	b	0x1052 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h9d2e25fa09987069+0xbc> @ imm = #-2
-    1052:      	ldr	r0, [sp, #16]
-    1054:      	str	r0, [sp, #64]
-    1056:      	str	r0, [sp, #60]
-    1058:      	ldr	r0, [sp, #60]
-    105a:      	str	r0, [sp]
-    105c:      	b	0x105e <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h9d2e25fa09987069+0xc8> @ imm = #-2
-    105e:      	ldr	r1, [sp]
-    1060:      	ldr	r0, [sp, #20]
-    1062:      	ldr	r0, [r0, #16]
-    1064:      	ldrb	r2, [r0]
-    1066:      	str	r1, [sp, #44]
-    1068:      	add	r0, sp, #48
-    106a:      	strb	r2, [r0]
-    106c:      	str	r1, [sp, #52]
-    106e:      	ldr	r0, [r1]
-    1070:      	movs	r3, #7
-    1072:      	lsls	r3, r3, #13
-    1074:      	bics	r0, r3
-    1076:      	lsls	r2, r2, #29
-    1078:      	lsrs	r2, r2, #16
-    107a:      	str	r1, [sp, #56]
-    107c:      	adds	r0, r0, r2
-    107e:      	str	r0, [r1]
-    1080:      	b	0x1082 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h9d2e25fa09987069+0xec> @ imm = #-2
-    1082:      	ldr	r0, [sp]
-    1084:      	str	r0, [sp, #40]
-    1086:      	b	0x1088 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h9d2e25fa09987069+0xf2> @ imm = #-2
-    1088:      	ldr	r0, [sp]
-    108a:      	add	sp, #156
-    108c:      	bx	lr
-
-0000108e <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::haa49f5997c16baa2>:
-    108e:      	sub	sp, #56
-    1090:      	str	r2, [sp, #4]
-    1092:      	str	r1, [sp, #8]
-    1094:      	str	r0, [sp, #12]
-    1096:      	str	r0, [sp, #16]
-    1098:      	str	r1, [sp, #20]
-    109a:      	str	r2, [sp, #24]
-    109c:      	str	r1, [sp, #28]
-    109e:      	b	0x10a0 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::haa49f5997c16baa2+0x12> @ imm = #-2
-    10a0:      	ldr	r0, [sp, #8]
-    10a2:      	str	r0, [sp, #52]
-    10a4:      	ldr	r0, [r0]
-    10a6:      	str	r0, [sp]
-    10a8:      	b	0x10aa <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::haa49f5997c16baa2+0x1c> @ imm = #-2
-    10aa:      	ldr	r1, [sp, #4]
-    10ac:      	ldr	r0, [sp]
-    10ae:      	ldr	r2, [sp, #12]
-    10b0:      	ldr	r2, [r2]
-    10b2:      	bics	r0, r2
-    10b4:      	str	r1, [sp, #36]
-    10b6:      	str	r0, [sp, #40]
-    10b8:      	str	r1, [sp, #44]
-    10ba:      	str	r0, [sp, #48]
-    10bc:      	str	r0, [r1]
-    10be:      	b	0x10c0 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::haa49f5997c16baa2+0x32> @ imm = #-2
-    10c0:      	ldr	r0, [sp, #4]
-    10c2:      	str	r0, [sp, #32]
-    10c4:      	b	0x10c6 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::haa49f5997c16baa2+0x38> @ imm = #-2
-    10c6:      	ldr	r0, [sp, #4]
-    10c8:      	add	sp, #56
-    10ca:      	bx	lr
-
-000010cc <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hc973b045d09c06ea>:
-    10cc:      	sub	sp, #156
-    10ce:      	str	r1, [sp, #16]
-    10d0:      	str	r0, [sp, #20]
-    10d2:      	str	r1, [sp, #28]
-    10d4:      	str	r1, [sp, #36]
-    10d6:      	str	r1, [sp, #32]
-    10d8:      	ldr	r0, [sp, #32]
-    10da:      	str	r0, [sp, #24]
-    10dc:      	b	0x10de <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hc973b045d09c06ea+0x12> @ imm = #-2
-    10de:      	ldr	r1, [sp, #24]
-    10e0:      	ldr	r0, [sp, #20]
-    10e2:      	ldr	r0, [r0]
-    10e4:      	ldrb	r2, [r0]
-    10e6:      	str	r1, [sp, #140]
-    10e8:      	add	r0, sp, #144
-    10ea:      	strb	r2, [r0]
-    10ec:      	str	r1, [sp, #148]
-    10ee:      	ldr	r0, [r1]
-    10f0:      	movs	r3, #1
-    10f2:      	lsls	r3, r3, #8
-    10f4:      	bics	r0, r3
-    10f6:      	lsls	r2, r2, #8
-    10f8:      	str	r1, [sp, #152]
-    10fa:      	orrs	r0, r2
-    10fc:      	str	r0, [r1]
-    10fe:      	b	0x1100 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hc973b045d09c06ea+0x34> @ imm = #-2
-    1100:      	ldr	r0, [sp, #16]
-    1102:      	str	r0, [sp, #136]
-    1104:      	str	r0, [sp, #132]
-    1106:      	ldr	r0, [sp, #132]
-    1108:      	str	r0, [sp, #12]
-    110a:      	b	0x110c <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hc973b045d09c06ea+0x40> @ imm = #-2
-    110c:      	ldr	r1, [sp, #12]
-    110e:      	ldr	r0, [sp, #20]
-    1110:      	ldr	r0, [r0, #4]
-    1112:      	ldrb	r2, [r0]
-    1114:      	str	r1, [sp, #116]
-    1116:      	add	r0, sp, #120
-    1118:      	strb	r2, [r0]
-    111a:      	str	r1, [sp, #124]
-    111c:      	ldr	r0, [r1]
-    111e:      	movs	r3, #1
-    1120:      	lsls	r3, r3, #11
-    1122:      	bics	r0, r3
-    1124:      	lsls	r2, r2, #11
-    1126:      	str	r1, [sp, #128]
-    1128:      	orrs	r0, r2
-    112a:      	str	r0, [r1]
-    112c:      	b	0x112e <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hc973b045d09c06ea+0x62> @ imm = #-2
-    112e:      	ldr	r0, [sp, #16]
-    1130:      	str	r0, [sp, #112]
-    1132:      	str	r0, [sp, #108]
-    1134:      	ldr	r0, [sp, #108]
-    1136:      	str	r0, [sp, #8]
-    1138:      	b	0x113a <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hc973b045d09c06ea+0x6e> @ imm = #-2
-    113a:      	ldr	r1, [sp, #8]
-    113c:      	ldr	r0, [sp, #20]
-    113e:      	ldr	r0, [r0, #8]
-    1140:      	ldrb	r2, [r0]
-    1142:      	str	r1, [sp, #92]
-    1144:      	add	r0, sp, #96
-    1146:      	strb	r2, [r0]
-    1148:      	str	r1, [sp, #100]
-    114a:      	ldr	r0, [r1]
-    114c:      	movs	r3, #1
-    114e:      	lsls	r3, r3, #10
-    1150:      	bics	r0, r3
-    1152:      	lsls	r2, r2, #10
-    1154:      	str	r1, [sp, #104]
-    1156:      	orrs	r0, r2
-    1158:      	str	r0, [r1]
-    115a:      	b	0x115c <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hc973b045d09c06ea+0x90> @ imm = #-2
-    115c:      	ldr	r0, [sp, #16]
-    115e:      	str	r0, [sp, #88]
-    1160:      	str	r0, [sp, #84]
-    1162:      	ldr	r0, [sp, #84]
-    1164:      	str	r0, [sp, #4]
-    1166:      	b	0x1168 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hc973b045d09c06ea+0x9c> @ imm = #-2
-    1168:      	ldr	r1, [sp, #4]
-    116a:      	ldr	r0, [sp, #20]
-    116c:      	ldr	r0, [r0, #12]
-    116e:      	ldrb	r2, [r0]
-    1170:      	str	r1, [sp, #68]
-    1172:      	add	r0, sp, #72
-    1174:      	strb	r2, [r0]
-    1176:      	str	r1, [sp, #76]
-    1178:      	ldr	r0, [r1]
-    117a:      	movs	r3, #128
-    117c:      	bics	r0, r3
-    117e:      	lsls	r2, r2, #7
-    1180:      	str	r1, [sp, #80]
-    1182:      	orrs	r0, r2
-    1184:      	str	r0, [r1]
-    1186:      	b	0x1188 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hc973b045d09c06ea+0xbc> @ imm = #-2
-    1188:      	ldr	r0, [sp, #16]
-    118a:      	str	r0, [sp, #64]
-    118c:      	str	r0, [sp, #60]
-    118e:      	ldr	r0, [sp, #60]
-    1190:      	str	r0, [sp]
-    1192:      	b	0x1194 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hc973b045d09c06ea+0xc8> @ imm = #-2
-    1194:      	ldr	r1, [sp]
-    1196:      	ldr	r0, [sp, #20]
-    1198:      	ldr	r0, [r0, #16]
-    119a:      	ldrb	r2, [r0]
-    119c:      	str	r1, [sp, #44]
-    119e:      	add	r0, sp, #48
-    11a0:      	strb	r2, [r0]
-    11a2:      	str	r1, [sp, #52]
-    11a4:      	ldr	r0, [r1]
-    11a6:      	movs	r3, #7
-    11a8:      	lsls	r3, r3, #13
-    11aa:      	bics	r0, r3
-    11ac:      	lsls	r2, r2, #29
-    11ae:      	lsrs	r2, r2, #16
-    11b0:      	str	r1, [sp, #56]
-    11b2:      	adds	r0, r0, r2
-    11b4:      	str	r0, [r1]
-    11b6:      	b	0x11b8 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hc973b045d09c06ea+0xec> @ imm = #-2
-    11b8:      	ldr	r0, [sp]
-    11ba:      	str	r0, [sp, #40]
-    11bc:      	b	0x11be <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hc973b045d09c06ea+0xf2> @ imm = #-2
-    11be:      	ldr	r0, [sp]
-    11c0:      	add	sp, #156
-    11c2:      	bx	lr
-
-000011c4 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hca9233633cf4eef3>:
-    11c4:      	sub	sp, #56
-    11c6:      	str	r2, [sp, #4]
-    11c8:      	str	r1, [sp, #8]
-    11ca:      	str	r0, [sp, #12]
-    11cc:      	str	r0, [sp, #16]
-    11ce:      	str	r1, [sp, #20]
-    11d0:      	str	r2, [sp, #24]
-    11d2:      	str	r1, [sp, #28]
-    11d4:      	b	0x11d6 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hca9233633cf4eef3+0x12> @ imm = #-2
-    11d6:      	ldr	r0, [sp, #8]
-    11d8:      	str	r0, [sp, #52]
-    11da:      	ldr	r0, [r0]
-    11dc:      	str	r0, [sp]
-    11de:      	b	0x11e0 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hca9233633cf4eef3+0x1c> @ imm = #-2
-    11e0:      	ldr	r1, [sp, #4]
-    11e2:      	ldr	r0, [sp]
-    11e4:      	ldr	r2, [sp, #12]
-    11e6:      	ldr	r2, [r2]
-    11e8:      	bics	r0, r2
-    11ea:      	str	r1, [sp, #36]
-    11ec:      	str	r0, [sp, #40]
-    11ee:      	str	r1, [sp, #44]
-    11f0:      	str	r0, [sp, #48]
-    11f2:      	str	r0, [r1]
-    11f4:      	b	0x11f6 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hca9233633cf4eef3+0x32> @ imm = #-2
-    11f6:      	ldr	r0, [sp, #4]
-    11f8:      	str	r0, [sp, #32]
-    11fa:      	b	0x11fc <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hca9233633cf4eef3+0x38> @ imm = #-2
-    11fc:      	ldr	r0, [sp, #4]
-    11fe:      	add	sp, #56
-    1200:      	bx	lr
-
-00001202 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hcb4c105b78483c5c>:
-    1202:      	sub	sp, #56
-    1204:      	str	r2, [sp, #4]
-    1206:      	str	r1, [sp, #8]
-    1208:      	str	r0, [sp, #12]
-    120a:      	str	r0, [sp, #16]
-    120c:      	str	r1, [sp, #20]
-    120e:      	str	r2, [sp, #24]
-    1210:      	str	r1, [sp, #28]
-    1212:      	b	0x1214 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hcb4c105b78483c5c+0x12> @ imm = #-2
-    1214:      	ldr	r0, [sp, #8]
-    1216:      	str	r0, [sp, #52]
-    1218:      	ldr	r0, [r0]
-    121a:      	str	r0, [sp]
-    121c:      	b	0x121e <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hcb4c105b78483c5c+0x1c> @ imm = #-2
-    121e:      	ldr	r1, [sp, #4]
-    1220:      	ldr	r0, [sp]
-    1222:      	ldr	r2, [sp, #12]
-    1224:      	ldr	r2, [r2]
-    1226:      	bics	r0, r2
-    1228:      	str	r1, [sp, #36]
-    122a:      	str	r0, [sp, #40]
-    122c:      	str	r1, [sp, #44]
-    122e:      	str	r0, [sp, #48]
-    1230:      	str	r0, [r1]
-    1232:      	b	0x1234 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hcb4c105b78483c5c+0x32> @ imm = #-2
-    1234:      	ldr	r0, [sp, #4]
-    1236:      	str	r0, [sp, #32]
-    1238:      	b	0x123a <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hcb4c105b78483c5c+0x38> @ imm = #-2
-    123a:      	ldr	r0, [sp, #4]
-    123c:      	add	sp, #56
-    123e:      	bx	lr
-
-00001240 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hd4d34508588b5aab>:
-    1240:      	sub	sp, #56
-    1242:      	str	r2, [sp, #4]
-    1244:      	str	r1, [sp, #8]
-    1246:      	str	r0, [sp, #12]
-    1248:      	str	r0, [sp, #16]
-    124a:      	str	r1, [sp, #20]
-    124c:      	str	r2, [sp, #24]
-    124e:      	str	r1, [sp, #28]
-    1250:      	b	0x1252 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hd4d34508588b5aab+0x12> @ imm = #-2
-    1252:      	ldr	r0, [sp, #8]
-    1254:      	str	r0, [sp, #52]
-    1256:      	ldr	r0, [r0]
-    1258:      	str	r0, [sp]
-    125a:      	b	0x125c <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hd4d34508588b5aab+0x1c> @ imm = #-2
-    125c:      	ldr	r1, [sp, #4]
-    125e:      	ldr	r0, [sp]
-    1260:      	ldr	r2, [sp, #12]
-    1262:      	ldr	r2, [r2]
-    1264:      	bics	r0, r2
-    1266:      	str	r1, [sp, #36]
-    1268:      	str	r0, [sp, #40]
-    126a:      	str	r1, [sp, #44]
-    126c:      	str	r0, [sp, #48]
-    126e:      	str	r0, [r1]
-    1270:      	b	0x1272 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hd4d34508588b5aab+0x32> @ imm = #-2
-    1272:      	ldr	r0, [sp, #4]
-    1274:      	str	r0, [sp, #32]
-    1276:      	b	0x1278 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hd4d34508588b5aab+0x38> @ imm = #-2
-    1278:      	ldr	r0, [sp, #4]
-    127a:      	add	sp, #56
-    127c:      	bx	lr
-
-0000127e <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hdf2551c38320ba25>:
-    127e:      	sub	sp, #56
-    1280:      	str	r2, [sp, #4]
-    1282:      	str	r1, [sp, #8]
-    1284:      	str	r0, [sp, #12]
-    1286:      	str	r0, [sp, #16]
-    1288:      	str	r1, [sp, #20]
-    128a:      	str	r2, [sp, #24]
-    128c:      	str	r1, [sp, #28]
-    128e:      	b	0x1290 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hdf2551c38320ba25+0x12> @ imm = #-2
-    1290:      	ldr	r0, [sp, #8]
-    1292:      	str	r0, [sp, #52]
-    1294:      	ldr	r0, [r0]
-    1296:      	str	r0, [sp]
-    1298:      	b	0x129a <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hdf2551c38320ba25+0x1c> @ imm = #-2
-    129a:      	ldr	r1, [sp, #4]
-    129c:      	ldr	r0, [sp]
-    129e:      	ldr	r2, [sp, #12]
-    12a0:      	ldr	r2, [r2]
-    12a2:      	orrs	r0, r2
-    12a4:      	str	r1, [sp, #36]
-    12a6:      	str	r0, [sp, #40]
-    12a8:      	str	r1, [sp, #44]
-    12aa:      	str	r0, [sp, #48]
-    12ac:      	str	r0, [r1]
-    12ae:      	b	0x12b0 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hdf2551c38320ba25+0x32> @ imm = #-2
-    12b0:      	ldr	r0, [sp, #4]
-    12b2:      	str	r0, [sp, #32]
-    12b4:      	b	0x12b6 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hdf2551c38320ba25+0x38> @ imm = #-2
-    12b6:      	ldr	r0, [sp, #4]
-    12b8:      	add	sp, #56
-    12ba:      	bx	lr
-
-000012bc <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hf1632c7badd66729>:
-    12bc:      	sub	sp, #32
-    12be:      	str	r1, [sp]
-    12c0:      	str	r0, [sp, #4]
-    12c2:      	str	r1, [sp, #8]
-    12c4:      	ldr	r0, [r0]
-    12c6:      	str	r1, [sp, #12]
-    12c8:      	str	r0, [sp, #16]
-    12ca:      	str	r1, [sp, #20]
-    12cc:      	str	r0, [sp, #24]
-    12ce:      	str	r0, [r1]
-    12d0:      	b	0x12d2 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hf1632c7badd66729+0x16> @ imm = #-2
-    12d2:      	ldr	r0, [sp]
-    12d4:      	str	r0, [sp, #28]
-    12d6:      	b	0x12d8 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hf1632c7badd66729+0x1c> @ imm = #-2
-    12d8:      	ldr	r0, [sp]
-    12da:      	add	sp, #32
-    12dc:      	bx	lr
-
-000012de <va108xx_hal::gpio::reg::RegisterInterface::write_pin::{{closure}}::hc5bf496c3e19651b>:
-    12de:      	push	{r7, lr}
-    12e0:      	add	r7, sp, #0
-    12e2:      	sub	sp, #40
-    12e4:      	str	r1, [sp, #4]
-    12e6:      	str	r0, [sp, #12]
-    12e8:      	str	r1, [sp, #16]
-    12ea:      	bl	0x3790 <va108xx_hal::gpio::reg::RegisterInterface::mask_32::h8a718548d138d583> @ imm = #9378
-    12ee:      	str	r0, [sp, #8]
-    12f0:      	b	0x12f2 <va108xx_hal::gpio::reg::RegisterInterface::write_pin::{{closure}}::hc5bf496c3e19651b+0x14> @ imm = #-2
-    12f2:      	ldr	r0, [sp, #8]
-    12f4:      	ldr	r1, [sp, #4]
-    12f6:      	str	r1, [sp, #20]
-    12f8:      	str	r0, [sp, #24]
-    12fa:      	str	r1, [sp, #28]
-    12fc:      	str	r0, [sp, #32]
-    12fe:      	str	r0, [r1]
-    1300:      	b	0x1302 <va108xx_hal::gpio::reg::RegisterInterface::write_pin::{{closure}}::hc5bf496c3e19651b+0x24> @ imm = #-2
-    1302:      	ldr	r0, [sp, #4]
-    1304:      	str	r0, [sp, #36]
-    1306:      	b	0x1308 <va108xx_hal::gpio::reg::RegisterInterface::write_pin::{{closure}}::hc5bf496c3e19651b+0x2a> @ imm = #-2
-    1308:      	ldr	r0, [sp, #4]
-    130a:      	add	sp, #40
-    130c:      	pop	{r7, pc}
-
-0000130e <<dummy_pin::dummy::DummyPin<L> as embedded_hal::digital::v2::OutputPin>::set_low::hb543f757bce9f448>:
-    130e:      	sub	sp, #8
-    1310:      	str	r0, [sp, #4]
-    1312:      	add	sp, #8
-    1314:      	bx	lr
-
-00001316 <<dummy_pin::dummy::DummyPin<L> as embedded_hal::digital::v2::OutputPin>::set_high::h7185e627752c569a>:
-    1316:      	sub	sp, #8
-    1318:      	str	r0, [sp, #4]
-    131a:      	add	sp, #8
-    131c:      	bx	lr
-    131e:      	bmi	0x12ca <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hf1632c7badd66729+0xe> @ imm = #-88
-
-00001320 <<va108xx_hal::gpio::reg::ModeFields as core::convert::From<va108xx_hal::gpio::dynpins::DynPinMode>>::from::hff894586e60702b8>:
-    1320:      	push	{r7, lr}
-    1322:      	add	r7, sp, #0
-    1324:      	sub	sp, #48
-    1326:      	mov	r2, r0
-    1328:      	add	r0, sp, #12
-    132a:      	strb	r2, [r0]
-    132c:      	strb	r1, [r0, #1]
-    132e:      	bl	0x140c <<va108xx_hal::gpio::reg::ModeFields as core::default::Default>::default::h15370db3c3e40568> @ imm = #218
-    1332:      	add	r2, sp, #32
-    1334:      	strh	r1, [r2, #4]
-    1336:      	str	r0, [sp, #32]
-    1338:      	ldr	r0, [sp, #36]
-    133a:      	add	r1, sp, #16
-    133c:      	strh	r0, [r1, #4]
-    133e:      	ldr	r0, [sp, #32]
-    1340:      	str	r0, [sp, #16]
-    1342:      	b	0x1344 <<va108xx_hal::gpio::reg::ModeFields as core::convert::From<va108xx_hal::gpio::dynpins::DynPinMode>>::from::hff894586e60702b8+0x24> @ imm = #-2
-    1344:      	add	r0, sp, #12
-    1346:      	ldrb	r0, [r0]
-    1348:      	str	r0, [sp, #8]
-    134a:      	cmp	r0, #0
-    134c:      	beq	0x135c <<va108xx_hal::gpio::reg::ModeFields as core::convert::From<va108xx_hal::gpio::dynpins::DynPinMode>>::from::hff894586e60702b8+0x3c> @ imm = #12
-    134e:      	b	0x1350 <<va108xx_hal::gpio::reg::ModeFields as core::convert::From<va108xx_hal::gpio::dynpins::DynPinMode>>::from::hff894586e60702b8+0x30> @ imm = #-2
-    1350:      	ldr	r0, [sp, #8]
-    1352:      	cmp	r0, #1
-    1354:      	beq	0x137e <<va108xx_hal::gpio::reg::ModeFields as core::convert::From<va108xx_hal::gpio::dynpins::DynPinMode>>::from::hff894586e60702b8+0x5e> @ imm = #38
-    1356:      	b	0x1358 <<va108xx_hal::gpio::reg::ModeFields as core::convert::From<va108xx_hal::gpio::dynpins::DynPinMode>>::from::hff894586e60702b8+0x38> @ imm = #-2
-    1358:      	b	0x13ac <$t.2>           @ imm = #80
-    135a:      	trap
-    135c:      	add	r0, sp, #12
-    135e:      	ldrb	r1, [r0, #1]
-    1360:      	add	r0, sp, #24
-    1362:      	strb	r1, [r0]
-    1364:      	add	r2, sp, #16
-    1366:      	movs	r1, #0
-    1368:      	strb	r1, [r2]
-    136a:      	ldrb	r0, [r0]
-    136c:      	str	r0, [sp, #4]
-    136e:      	cmp	r0, #0
-    1370:      	beq	0x13ba <$t.2+0xe>       @ imm = #70
-    1372:      	b	0x1374 <<va108xx_hal::gpio::reg::ModeFields as core::convert::From<va108xx_hal::gpio::dynpins::DynPinMode>>::from::hff894586e60702b8+0x54> @ imm = #-2
-    1374:      	ldr	r0, [sp, #4]
-    1376:      	cmp	r0, #1
-    1378:      	beq	0x13fa <$t.2+0x4e>      @ imm = #126
-    137a:      	b	0x137c <<va108xx_hal::gpio::reg::ModeFields as core::convert::From<va108xx_hal::gpio::dynpins::DynPinMode>>::from::hff894586e60702b8+0x5c> @ imm = #-2
-    137c:      	b	0x1402 <$t.2+0x56>      @ imm = #130
-    137e:      	add	r0, sp, #12
-    1380:      	ldrb	r1, [r0, #1]
-    1382:      	add	r0, sp, #28
-    1384:      	strb	r1, [r0]
-    1386:      	add	r2, sp, #16
-    1388:      	movs	r1, #1
-    138a:      	strb	r1, [r2]
-    138c:      	ldrb	r0, [r0]
-    138e:      	str	r0, [sp]
-    1390:      	ldr	r0, [sp]
-    1392:      	lsls	r1, r0, #2
-    1394:      	adr	r0, #4 <<va108xx_hal::gpio::reg::ModeFields as core::convert::From<va108xx_hal::gpio::dynpins::DynPinMode>>::from::hff894586e60702b8+0x79>
-    1396:      	ldr	r0, [r0, r1]
-    1398:      	mov	pc, r0
-    139a:      	mov	r8, r8
-
-0000139c <$d.1>:
-    139c:	bb 13 00 00	.word	0x000013bb
-    13a0:	df 13 00 00	.word	0x000013df
-    13a4:	e7 13 00 00	.word	0x000013e7
-    13a8:	ef 13 00 00	.word	0x000013ef
-
-000013ac <$t.2>:
-    13ac:      	add	r0, sp, #12
-    13ae:      	ldrb	r0, [r0, #1]
-    13b0:      	add	r1, sp, #44
-    13b2:      	strb	r0, [r1]
-    13b4:      	add	r1, sp, #16
-    13b6:      	strb	r0, [r1, #4]
-    13b8:      	b	0x13ba <$t.2+0xe>       @ imm = #-2
-    13ba:      	add	r1, sp, #16
-    13bc:      	ldrb	r2, [r1]
-    13be:      	ldrb	r0, [r1, #1]
-    13c0:      	lsls	r0, r0, #8
-    13c2:      	adds	r2, r0, r2
-    13c4:      	ldrb	r3, [r1, #2]
-    13c6:      	ldrb	r0, [r1, #3]
-    13c8:      	lsls	r0, r0, #8
-    13ca:      	adds	r0, r0, r3
-    13cc:      	lsls	r0, r0, #16
-    13ce:      	adds	r0, r0, r2
-    13d0:      	ldrb	r2, [r1, #4]
-    13d2:      	ldrb	r1, [r1, #5]
-    13d4:      	lsls	r1, r1, #8
-    13d6:      	adds	r1, r1, r2
-    13d8:      	add	sp, #48
-    13da:      	pop	{r7, pc}
-    13dc:      	trap
-    13de:      	add	r1, sp, #16
-    13e0:      	movs	r0, #1
-    13e2:      	strb	r0, [r1, #1]
-    13e4:      	b	0x13ba <$t.2+0xe>       @ imm = #-46
-    13e6:      	add	r1, sp, #16
-    13e8:      	movs	r0, #1
-    13ea:      	strb	r0, [r1, #5]
-    13ec:      	b	0x13ba <$t.2+0xe>       @ imm = #-54
-    13ee:      	add	r1, sp, #16
-    13f0:      	movs	r0, #1
-    13f2:      	strb	r0, [r1, #5]
-    13f4:      	strb	r0, [r1, #1]
-    13f6:      	b	0x13ba <$t.2+0xe>       @ imm = #-64
-    13f8:      	trap
-    13fa:      	add	r1, sp, #16
-    13fc:      	movs	r0, #1
-    13fe:      	strb	r0, [r1, #2]
-    1400:      	b	0x13ba <$t.2+0xe>       @ imm = #-74
-    1402:      	add	r1, sp, #16
-    1404:      	movs	r0, #1
-    1406:      	strb	r0, [r1, #2]
-    1408:      	strb	r0, [r1, #3]
-    140a:      	b	0x13ba <$t.2+0xe>       @ imm = #-84
-
-0000140c <<va108xx_hal::gpio::reg::ModeFields as core::default::Default>::default::h15370db3c3e40568>:
-    140c:      	push	{r4, r5, r6, r7, lr}
-    140e:      	add	r7, sp, #12
-    1410:      	sub	sp, #36
-    1412:      	bl	0x57c <<bool as core::default::Default>::default::h6ce1fdee60a85673> @ imm = #-3738
-    1416:      	str	r0, [sp, #24]
-    1418:      	b	0x141a <<va108xx_hal::gpio::reg::ModeFields as core::default::Default>::default::h15370db3c3e40568+0xe> @ imm = #-2
-    141a:      	bl	0x57c <<bool as core::default::Default>::default::h6ce1fdee60a85673> @ imm = #-3746
-    141e:      	str	r0, [sp, #20]
-    1420:      	b	0x1422 <<va108xx_hal::gpio::reg::ModeFields as core::default::Default>::default::h15370db3c3e40568+0x16> @ imm = #-2
-    1422:      	bl	0x57c <<bool as core::default::Default>::default::h6ce1fdee60a85673> @ imm = #-3754
-    1426:      	str	r0, [sp, #16]
-    1428:      	b	0x142a <<va108xx_hal::gpio::reg::ModeFields as core::default::Default>::default::h15370db3c3e40568+0x1e> @ imm = #-2
-    142a:      	bl	0x57c <<bool as core::default::Default>::default::h6ce1fdee60a85673> @ imm = #-3762
-    142e:      	str	r0, [sp, #12]
-    1430:      	b	0x1432 <<va108xx_hal::gpio::reg::ModeFields as core::default::Default>::default::h15370db3c3e40568+0x26> @ imm = #-2
-    1432:      	bl	0x578 <<u8 as core::default::Default>::default::hb2792f91b4560cc9> @ imm = #-3774
-    1436:      	str	r0, [sp, #8]
-    1438:      	b	0x143a <<va108xx_hal::gpio::reg::ModeFields as core::default::Default>::default::h15370db3c3e40568+0x2e> @ imm = #-2
-    143a:      	bl	0x57c <<bool as core::default::Default>::default::h6ce1fdee60a85673> @ imm = #-3778
-    143e:      	str	r0, [sp, #4]
-    1440:      	b	0x1442 <<va108xx_hal::gpio::reg::ModeFields as core::default::Default>::default::h15370db3c3e40568+0x36> @ imm = #-2
-    1442:      	ldr	r3, [sp, #8]
-    1444:      	ldr	r4, [sp, #12]
-    1446:      	ldr	r5, [sp, #16]
-    1448:      	ldr	r6, [sp, #20]
-    144a:      	ldr	r0, [sp, #24]
-    144c:      	movs	r2, #1
-    144e:      	ands	r0, r2
-    1450:      	add	r1, sp, #28
-    1452:      	strb	r0, [r1]
-    1454:      	ldr	r0, [sp, #4]
-    1456:      	ands	r6, r2
-    1458:      	strb	r6, [r1, #1]
-    145a:      	ands	r5, r2
-    145c:      	strb	r5, [r1, #2]
-    145e:      	ands	r4, r2
-    1460:      	strb	r4, [r1, #3]
-    1462:      	strb	r3, [r1, #4]
-    1464:      	ands	r0, r2
-    1466:      	strb	r0, [r1, #5]
-    1468:      	ldrb	r2, [r1]
-    146a:      	ldrb	r0, [r1, #1]
-    146c:      	lsls	r0, r0, #8
-    146e:      	adds	r2, r0, r2
-    1470:      	ldrb	r3, [r1, #2]
-    1472:      	ldrb	r0, [r1, #3]
-    1474:      	lsls	r0, r0, #8
-    1476:      	adds	r0, r0, r3
-    1478:      	lsls	r0, r0, #16
-    147a:      	adds	r0, r0, r2
-    147c:      	ldrb	r2, [r1, #4]
-    147e:      	ldrb	r1, [r1, #5]
-    1480:      	lsls	r1, r1, #8
-    1482:      	adds	r1, r1, r2
-    1484:      	add	sp, #36
-    1486:      	pop	{r4, r5, r6, r7, pc}
-
-00001488 <_ZN112_$LT$max116xx_10bit..Error$LT$SpiE$C$PinE$GT$$u20$as$u20$core..convert..From$LT$max116xx_10bit..AdcError$GT$$GT$4from17h13b2f106daae083dE>:
-    1488:      	sub	sp, #8
-    148a:      	add	r1, sp, #4
-    148c:      	strb	r0, [r1]
-    148e:      	mov	r1, sp
-    1490:      	strb	r0, [r1]
-    1492:      	ldr	r0, [sp]
-    1494:      	add	sp, #8
-    1496:      	bx	lr
-
-00001498 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d>:
-    1498:      	push	{r4, r6, r7, lr}
-    149a:      	add	r7, sp, #8
-    149c:      	sub	sp, #508
-    149e:      	sub	sp, #36
-    14a0:      	str	r3, [sp, #140]
-    14a2:      	str	r2, [sp, #144]
-    14a4:      	mov	r2, r1
-    14a6:      	ldr	r1, [sp, #144]
-    14a8:      	str	r2, [sp, #148]
-    14aa:      	mov	r4, r0
-    14ac:      	ldr	r0, [sp, #148]
-    14ae:      	str	r4, [sp, #152]
-    14b0:      	ldr	r2, [r7, #8]
-    14b2:      	str	r2, [sp, #156]
-    14b4:      	str	r4, [sp, #352]
-    14b6:      	str	r0, [sp, #356]
-    14b8:      	str	r1, [sp, #360]
-    14ba:      	str	r3, [sp, #364]
-    14bc:      	add	r3, sp, #368
-    14be:      	strb	r2, [r3]
-    14c0:      	bl	0x64c8 <core::slice::<impl [T]>::iter_mut::h0c9d630705430598> @ imm = #20484
-    14c4:      	str	r1, [sp, #168]
-    14c6:      	str	r0, [sp, #164]
-    14c8:      	b	0x14ca <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x32> @ imm = #-2
-    14ca:      	ldr	r0, [sp, #156]
-    14cc:      	uxtb	r0, r0
-    14ce:      	adds	r1, r0, #1
-    14d0:      	str	r1, [sp, #136]
-    14d2:      	uxtb	r0, r1
-    14d4:      	cmp	r0, r1
-    14d6:      	bne	0x14f2 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x5a> @ imm = #24
-    14d8:      	b	0x14da <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x42> @ imm = #-2
-    14da:      	ldr	r1, [sp, #136]
-    14dc:      	add	r0, sp, #176
-    14de:      	movs	r2, #0
-    14e0:      	strb	r2, [r0]
-    14e2:      	strb	r1, [r0, #1]
-    14e4:      	ldrb	r1, [r0, #1]
-    14e6:      	ldr	r0, [sp, #176]
-    14e8:      	bl	0x21e4 <<I as core::iter::traits::collect::IntoIterator>::into_iter::h394fa755b7de161a> @ imm = #3320
-    14ec:      	str	r0, [sp, #128]
-    14ee:      	str	r1, [sp, #132]
-    14f0:      	b	0x14fe <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x66> @ imm = #10
-    14f2:      	ldr	r0, [pc, #1008] <$d.2+0x6>
-    14f4:      	ldr	r2, [pc, #1000] <$d.2>
-    14f6:      	movs	r1, #28
-    14f8:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #28748
-    14fc:      	trap
-    14fe:      	ldr	r0, [sp, #132]
-    1500:      	ldr	r2, [sp, #128]
-    1502:      	add	r1, sp, #180
-    1504:      	strb	r2, [r1]
-    1506:      	strb	r0, [r1, #1]
-    1508:      	b	0x150a <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x72> @ imm = #-2
-    150a:      	add	r0, sp, #180
-    150c:      	bl	0x21c6 <core::iter::range::<impl core::iter::traits::iterator::Iterator for core::ops::range::Range<A>>::next::hdc3d7bd7b0883915> @ imm = #3254
-    1510:      	mov	r2, r1
-    1512:      	add	r1, sp, #184
-    1514:      	strb	r2, [r1, #1]
-    1516:      	strb	r0, [r1]
-    1518:      	b	0x151a <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x82> @ imm = #-2
-    151a:      	add	r0, sp, #184
-    151c:      	ldrb	r0, [r0]
-    151e:      	lsls	r0, r0, #31
-    1520:      	cmp	r0, #0
-    1522:      	beq	0x152a <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x92> @ imm = #4
-    1524:      	b	0x1526 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x8e> @ imm = #-2
-    1526:      	b	0x1534 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x9c> @ imm = #10
-    1528:      	trap
-    152a:      	add	r0, sp, #164
-    152c:      	bl	0x572c <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hb1dbd48c35961a04> @ imm = #16892
-    1530:      	str	r0, [sp, #124]
-    1532:      	b	0x1690 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x1f8> @ imm = #346
-    1534:      	add	r0, sp, #184
-    1536:      	ldrb	r0, [r0, #1]
-    1538:      	str	r0, [sp, #116]
-    153a:      	add	r1, sp, #380
-    153c:      	strb	r0, [r1]
-    153e:      	add	r1, sp, #384
-    1540:      	strb	r0, [r1]
-    1542:      	add	r1, sp, #388
-    1544:      	strb	r0, [r1]
-    1546:      	add	r0, sp, #164
-    1548:      	bl	0x572c <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hb1dbd48c35961a04> @ imm = #16864
-    154c:      	str	r0, [sp, #120]
-    154e:      	b	0x1550 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0xb8> @ imm = #-2
-    1550:      	ldr	r0, [sp, #120]
-    1552:      	add	r2, sp, #208
-    1554:      	movs	r1, #2
-    1556:      	strb	r1, [r2]
-    1558:      	ldr	r1, [sp, #208]
-    155a:      	add	r2, sp, #204
-    155c:      	strb	r1, [r2]
-    155e:      	ldr	r1, [sp, #204]
-    1560:      	bl	0xa62 <core::option::Option<T>::ok_or::h7600f9cbeca56c74> @ imm = #-2818
-    1564:      	str	r1, [sp, #396]
-    1566:      	str	r0, [sp, #392]
-    1568:      	ldr	r0, [sp, #396]
-    156a:      	str	r0, [sp, #200]
-    156c:      	ldr	r0, [sp, #392]
-    156e:      	str	r0, [sp, #196]
-    1570:      	b	0x1572 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0xda> @ imm = #-2
-    1572:      	ldr	r1, [sp, #200]
-    1574:      	ldr	r0, [sp, #196]
-    1576:      	bl	0x410 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h17eaa2cd8a173bf2E> @ imm = #-4458
-    157a:      	str	r1, [sp, #404]
-    157c:      	str	r0, [sp, #400]
-    157e:      	ldr	r0, [sp, #404]
-    1580:      	str	r0, [sp, #192]
-    1582:      	ldr	r0, [sp, #400]
-    1584:      	str	r0, [sp, #188]
-    1586:      	b	0x1588 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0xf0> @ imm = #-2
-    1588:      	add	r0, sp, #188
-    158a:      	ldrb	r0, [r0]
-    158c:      	lsls	r0, r0, #31
-    158e:      	cmp	r0, #0
-    1590:      	beq	0x1598 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x100> @ imm = #4
-    1592:      	b	0x1594 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0xfc> @ imm = #-2
-    1594:      	b	0x15b4 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x11c> @ imm = #28
-    1596:      	trap
-    1598:      	ldr	r2, [sp, #116]
-    159a:      	ldr	r0, [sp, #152]
-    159c:      	ldr	r1, [sp, #192]
-    159e:      	str	r1, [sp, #412]
-    15a0:      	str	r1, [sp, #172]
-    15a2:      	add	r3, sp, #216
-    15a4:      	movs	r1, #3
-    15a6:      	strb	r1, [r3]
-    15a8:      	ldr	r1, [sp, #216]
-    15aa:      	bl	0x1d32 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::get_conversion_byte::hb7ec64df4edb09f6> @ imm = #1924
-    15ae:      	str	r0, [sp, #108]
-    15b0:      	str	r1, [sp, #112]
-    15b2:      	b	0x15d4 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x13c> @ imm = #30
-    15b4:      	add	r0, sp, #188
-    15b6:      	ldrb	r0, [r0, #1]
-    15b8:      	add	r1, sp, #408
-    15ba:      	strb	r0, [r1]
-    15bc:      	bl	0x144 <_ZN153_$LT$core..result..Result$LT$T$C$F$GT$$u20$as$u20$core..ops..try_trait..FromResidual$LT$core..result..Result$LT$core..convert..Infallible$C$E$GT$$GT$$GT$13from_residual17hde03a568dc94affdE> @ imm = #-5244
-    15c0:      	uxtb	r0, r0
-    15c2:      	add	r1, sp, #160
-    15c4:      	strb	r0, [r1]
-    15c6:      	b	0x15c8 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x130> @ imm = #-2
-    15c8:      	b	0x15ca <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x132> @ imm = #-2
-    15ca:      	ldr	r0, [sp, #160]
-    15cc:      	subs	r4, r7, #7
-    15ce:      	subs	r4, #1
-    15d0:      	mov	sp, r4
-    15d2:      	pop	{r4, r6, r7, pc}
-    15d4:      	ldr	r1, [sp, #112]
-    15d6:      	ldr	r0, [sp, #108]
-    15d8:      	movs	r2, #1
-    15da:      	ands	r0, r2
-    15dc:      	bl	0x52c <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17hd072381b3388b3ddE> @ imm = #-4276
-    15e0:      	mov	r2, r1
-    15e2:      	add	r1, sp, #212
-    15e4:      	strb	r2, [r1, #1]
-    15e6:      	strb	r0, [r1]
-    15e8:      	b	0x15ea <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x152> @ imm = #-2
-    15ea:      	add	r0, sp, #212
-    15ec:      	ldrb	r0, [r0]
-    15ee:      	lsls	r0, r0, #31
-    15f0:      	cmp	r0, #0
-    15f2:      	beq	0x15fa <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x162> @ imm = #4
-    15f4:      	b	0x15f6 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x15e> @ imm = #-2
-    15f6:      	b	0x1610 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x178> @ imm = #22
-    15f8:      	trap
-    15fa:      	add	r0, sp, #212
-    15fc:      	ldrb	r0, [r0, #1]
-    15fe:      	add	r1, sp, #420
-    1600:      	strb	r0, [r1]
-    1602:      	ldr	r1, [sp, #172]
-    1604:      	strb	r0, [r1]
-    1606:      	add	r0, sp, #164
-    1608:      	bl	0x572c <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hb1dbd48c35961a04> @ imm = #16672
-    160c:      	str	r0, [sp, #104]
-    160e:      	b	0x1624 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x18c> @ imm = #18
-    1610:      	add	r0, sp, #212
-    1612:      	ldrb	r0, [r0, #1]
-    1614:      	add	r1, sp, #416
-    1616:      	strb	r0, [r1]
-    1618:      	bl	0x11e <_ZN153_$LT$core..result..Result$LT$T$C$F$GT$$u20$as$u20$core..ops..try_trait..FromResidual$LT$core..result..Result$LT$core..convert..Infallible$C$E$GT$$GT$$GT$13from_residual17h09721f9c421c6e2bE> @ imm = #-5374
-    161c:      	uxtb	r0, r0
-    161e:      	add	r1, sp, #160
-    1620:      	strb	r0, [r1]
-    1622:      	b	0x15ca <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x132> @ imm = #-92
-    1624:      	ldr	r0, [sp, #104]
-    1626:      	add	r2, sp, #240
-    1628:      	movs	r1, #2
-    162a:      	strb	r1, [r2]
-    162c:      	ldr	r1, [sp, #240]
-    162e:      	add	r2, sp, #236
-    1630:      	strb	r1, [r2]
-    1632:      	ldr	r1, [sp, #236]
-    1634:      	bl	0xa62 <core::option::Option<T>::ok_or::h7600f9cbeca56c74> @ imm = #-3030
-    1638:      	str	r1, [sp, #428]
-    163a:      	str	r0, [sp, #424]
-    163c:      	ldr	r0, [sp, #428]
-    163e:      	str	r0, [sp, #232]
-    1640:      	ldr	r0, [sp, #424]
-    1642:      	str	r0, [sp, #228]
-    1644:      	b	0x1646 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x1ae> @ imm = #-2
-    1646:      	ldr	r1, [sp, #232]
-    1648:      	ldr	r0, [sp, #228]
-    164a:      	bl	0x410 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h17eaa2cd8a173bf2E> @ imm = #-4670
-    164e:      	str	r1, [sp, #436]
-    1650:      	str	r0, [sp, #432]
-    1652:      	ldr	r0, [sp, #436]
-    1654:      	str	r0, [sp, #224]
-    1656:      	ldr	r0, [sp, #432]
-    1658:      	str	r0, [sp, #220]
-    165a:      	b	0x165c <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x1c4> @ imm = #-2
-    165c:      	add	r0, sp, #220
-    165e:      	ldrb	r0, [r0]
-    1660:      	lsls	r0, r0, #31
-    1662:      	cmp	r0, #0
-    1664:      	beq	0x166c <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x1d4> @ imm = #4
-    1666:      	b	0x1668 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x1d0> @ imm = #-2
-    1668:      	b	0x167a <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x1e2> @ imm = #14
-    166a:      	trap
-    166c:      	ldr	r0, [sp, #224]
-    166e:      	str	r0, [sp, #444]
-    1670:      	str	r0, [sp, #172]
-    1672:      	ldr	r1, [sp, #172]
-    1674:      	movs	r0, #0
-    1676:      	strb	r0, [r1]
-    1678:      	b	0x150a <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x72> @ imm = #-370
-    167a:      	add	r0, sp, #220
-    167c:      	ldrb	r0, [r0, #1]
-    167e:      	add	r1, sp, #440
-    1680:      	strb	r0, [r1]
-    1682:      	bl	0x144 <_ZN153_$LT$core..result..Result$LT$T$C$F$GT$$u20$as$u20$core..ops..try_trait..FromResidual$LT$core..result..Result$LT$core..convert..Infallible$C$E$GT$$GT$$GT$13from_residual17hde03a568dc94affdE> @ imm = #-5442
-    1686:      	uxtb	r0, r0
-    1688:      	add	r1, sp, #160
-    168a:      	strb	r0, [r1]
-    168c:      	b	0x168e <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x1f6> @ imm = #-2
-    168e:      	b	0x15ca <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x132> @ imm = #-200
-    1690:      	ldr	r0, [sp, #124]
-    1692:      	add	r2, sp, #264
-    1694:      	movs	r1, #2
-    1696:      	strb	r1, [r2]
-    1698:      	ldr	r1, [sp, #264]
-    169a:      	add	r2, sp, #260
-    169c:      	strb	r1, [r2]
-    169e:      	ldr	r1, [sp, #260]
-    16a0:      	bl	0xa62 <core::option::Option<T>::ok_or::h7600f9cbeca56c74> @ imm = #-3138
-    16a4:      	str	r1, [sp, #452]
-    16a6:      	str	r0, [sp, #448]
-    16a8:      	ldr	r0, [sp, #452]
-    16aa:      	str	r0, [sp, #256]
-    16ac:      	ldr	r0, [sp, #448]
-    16ae:      	str	r0, [sp, #252]
-    16b0:      	b	0x16b2 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x21a> @ imm = #-2
-    16b2:      	ldr	r1, [sp, #256]
-    16b4:      	ldr	r0, [sp, #252]
-    16b6:      	bl	0x410 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h17eaa2cd8a173bf2E> @ imm = #-4778
-    16ba:      	str	r1, [sp, #460]
-    16bc:      	str	r0, [sp, #456]
-    16be:      	ldr	r0, [sp, #460]
-    16c0:      	str	r0, [sp, #248]
-    16c2:      	ldr	r0, [sp, #456]
-    16c4:      	str	r0, [sp, #244]
-    16c6:      	b	0x16c8 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x230> @ imm = #-2
-    16c8:      	add	r0, sp, #244
-    16ca:      	ldrb	r0, [r0]
-    16cc:      	lsls	r0, r0, #31
-    16ce:      	cmp	r0, #0
-    16d0:      	beq	0x16d8 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x240> @ imm = #4
-    16d2:      	b	0x16d4 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x23c> @ imm = #-2
-    16d4:      	b	0x16ec <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x254> @ imm = #20
-    16d6:      	trap
-    16d8:      	ldr	r0, [sp, #152]
-    16da:      	ldr	r1, [sp, #248]
-    16dc:      	str	r1, [sp, #472]
-    16de:      	str	r1, [sp, #172]
-    16e0:      	ldr	r2, [sp, #172]
-    16e2:      	movs	r1, #0
-    16e4:      	strb	r1, [r2]
-    16e6:      	bl	0x130e <<dummy_pin::dummy::DummyPin<L> as embedded_hal::digital::v2::OutputPin>::set_low::hb543f757bce9f448> @ imm = #-988
-    16ea:      	b	0x1702 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x26a> @ imm = #20
-    16ec:      	add	r0, sp, #244
-    16ee:      	ldrb	r0, [r0, #1]
-    16f0:      	add	r1, sp, #468
-    16f2:      	strb	r0, [r1]
-    16f4:      	bl	0x144 <_ZN153_$LT$core..result..Result$LT$T$C$F$GT$$u20$as$u20$core..ops..try_trait..FromResidual$LT$core..result..Result$LT$core..convert..Infallible$C$E$GT$$GT$$GT$13from_residual17hde03a568dc94affdE> @ imm = #-5556
-    16f8:      	uxtb	r0, r0
-    16fa:      	add	r1, sp, #160
-    16fc:      	strb	r0, [r1]
-    16fe:      	b	0x1700 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x268> @ imm = #-2
-    1700:      	b	0x15ca <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x132> @ imm = #-314
-    1702:      	bl	0x30a <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h99eb9539e0a1ad8eE> @ imm = #-5116
-    1706:      	uxtb	r0, r0
-    1708:      	str	r0, [sp, #100]
-    170a:      	b	0x170c <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x274> @ imm = #-2
-    170c:      	ldr	r0, [sp, #100]
-    170e:      	bl	0x45c <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h338082970efc5187E> @ imm = #-4790
-    1712:      	uxtb	r0, r0
-    1714:      	add	r1, sp, #268
-    1716:      	strb	r0, [r1]
-    1718:      	b	0x171a <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x282> @ imm = #-2
-    171a:      	add	r0, sp, #268
-    171c:      	ldrb	r0, [r0]
-    171e:      	subs	r1, r0, #7
-    1720:      	subs	r2, r1, #1
-    1722:      	sbcs	r1, r2
-    1724:      	cmp	r0, #7
-    1726:      	beq	0x172e <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x296> @ imm = #4
-    1728:      	b	0x172a <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x292> @ imm = #-2
-    172a:      	b	0x1742 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x2aa> @ imm = #20
-    172c:      	trap
-    172e:      	ldr	r0, [sp, #156]
-    1730:      	ldr	r1, [sp, #152]
-    1732:      	str	r1, [sp, #92]
-    1734:      	uxtb	r0, r0
-    1736:      	adds	r1, r0, #1
-    1738:      	str	r1, [sp, #96]
-    173a:      	uxtb	r0, r1
-    173c:      	cmp	r0, r1
-    173e:      	bne	0x1766 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x2ce> @ imm = #36
-    1740:      	b	0x1756 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x2be> @ imm = #18
-    1742:      	ldr	r0, [sp, #268]
-    1744:      	add	r1, sp, #476
-    1746:      	strb	r0, [r1]
-    1748:      	bl	0x144 <_ZN153_$LT$core..result..Result$LT$T$C$F$GT$$u20$as$u20$core..ops..try_trait..FromResidual$LT$core..result..Result$LT$core..convert..Infallible$C$E$GT$$GT$$GT$13from_residual17hde03a568dc94affdE> @ imm = #-5640
-    174c:      	uxtb	r0, r0
-    174e:      	add	r1, sp, #160
-    1750:      	strb	r0, [r1]
-    1752:      	b	0x1754 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x2bc> @ imm = #-2
-    1754:      	b	0x15ca <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x132> @ imm = #-398
-    1756:      	ldr	r0, [sp, #96]
-    1758:      	uxtb	r0, r0
-    175a:      	adds	r1, r0, r0
-    175c:      	str	r1, [sp, #88]
-    175e:      	uxtb	r0, r1
-    1760:      	cmp	r0, r1
-    1762:      	bne	0x1782 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x2ea> @ imm = #28
-    1764:      	b	0x1772 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x2da> @ imm = #10
-    1766:      	ldr	r0, [pc, #612] <$d.4+0x12>
-    1768:      	ldr	r2, [pc, #624] <$d.4+0x20>
-    176a:      	movs	r1, #28
-    176c:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #28120
-    1770:      	trap
-    1772:      	ldr	r0, [sp, #88]
-    1774:      	uxtb	r0, r0
-    1776:      	adds	r1, r0, #1
-    1778:      	str	r1, [sp, #84]
-    177a:      	uxtb	r0, r1
-    177c:      	cmp	r0, r1
-    177e:      	bne	0x17ae <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x316> @ imm = #44
-    1780:      	b	0x178e <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x2f6> @ imm = #10
-    1782:      	ldr	r0, [pc, #596] <$d.4+0x1e>
-    1784:      	ldr	r2, [pc, #596] <$d.4+0x20>
-    1786:      	movs	r1, #33
-    1788:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #28092
-    178c:      	trap
-    178e:      	ldr	r1, [sp, #144]
-    1790:      	ldr	r0, [sp, #148]
-    1792:      	ldr	r2, [sp, #84]
-    1794:      	uxtb	r2, r2
-    1796:      	movs	r3, #0
-    1798:      	str	r3, [sp, #296]
-    179a:      	str	r2, [sp, #300]
-    179c:      	ldr	r2, [sp, #296]
-    179e:      	ldr	r3, [sp, #300]
-    17a0:      	ldr	r4, [pc, #536] <$d.4>
-    17a2:      	str	r4, [sp]
-    17a4:      	bl	0x22d8 <core::slice::index::<impl core::ops::index::IndexMut<I> for [T]>::index_mut::h8f173158539a9526> @ imm = #2864
-    17a8:      	str	r0, [sp, #76]
-    17aa:      	str	r1, [sp, #80]
-    17ac:      	b	0x17ba <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x322> @ imm = #10
-    17ae:      	ldr	r0, [pc, #540] <$d.4+0x12>
-    17b0:      	ldr	r2, [pc, #544] <$d.4+0x18>
-    17b2:      	movs	r1, #28
-    17b4:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #28048
-    17b8:      	trap
-    17ba:      	ldr	r2, [sp, #80]
-    17bc:      	ldr	r1, [sp, #76]
-    17be:      	ldr	r0, [sp, #92]
-    17c0:      	bl	0x51ca <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::blocking::spi::Transfer<u8>>::transfer::h705ad216a8f85d03> @ imm = #14854
-    17c4:      	str	r0, [sp, #68]
-    17c6:      	str	r1, [sp, #72]
-    17c8:      	b	0x17ca <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x332> @ imm = #-2
-    17ca:      	ldr	r2, [sp, #72]
-    17cc:      	ldr	r1, [sp, #68]
-    17ce:      	add	r0, sp, #284
-    17d0:      	bl	0x2a8 <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h2f75cf6a7249e271E> @ imm = #-5420
-    17d4:      	b	0x17d6 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x33e> @ imm = #-2
-    17d6:      	add	r0, sp, #272
-    17d8:      	add	r1, sp, #284
-    17da:      	bl	0x4e6 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17hc3644b3e57563e31E> @ imm = #-4856
-    17de:      	b	0x17e0 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x348> @ imm = #-2
-    17e0:      	add	r0, sp, #272
-    17e2:      	ldrb	r0, [r0]
-    17e4:      	lsls	r0, r0, #31
-    17e6:      	cmp	r0, #0
-    17e8:      	beq	0x17f0 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x358> @ imm = #4
-    17ea:      	b	0x17ec <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x354> @ imm = #-2
-    17ec:      	b	0x1808 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x370> @ imm = #24
-    17ee:      	trap
-    17f0:      	ldr	r0, [sp, #152]
-    17f2:      	ldr	r2, [sp, #276]
-    17f4:      	str	r2, [sp, #60]
-    17f6:      	ldr	r1, [sp, #280]
-    17f8:      	str	r1, [sp, #64]
-    17fa:      	str	r2, [sp, #484]
-    17fc:      	str	r1, [sp, #488]
-    17fe:      	str	r2, [sp, #492]
-    1800:      	str	r1, [sp, #496]
-    1802:      	bl	0x1316 <<dummy_pin::dummy::DummyPin<L> as embedded_hal::digital::v2::OutputPin>::set_high::h7185e627752c569a> @ imm = #-1264
-    1806:      	b	0x181e <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x386> @ imm = #20
-    1808:      	add	r0, sp, #272
-    180a:      	ldrb	r0, [r0, #1]
-    180c:      	add	r1, sp, #480
-    180e:      	strb	r0, [r1]
-    1810:      	bl	0x144 <_ZN153_$LT$core..result..Result$LT$T$C$F$GT$$u20$as$u20$core..ops..try_trait..FromResidual$LT$core..result..Result$LT$core..convert..Infallible$C$E$GT$$GT$$GT$13from_residual17hde03a568dc94affdE> @ imm = #-5840
-    1814:      	uxtb	r0, r0
-    1816:      	add	r1, sp, #160
-    1818:      	strb	r0, [r1]
-    181a:      	b	0x181c <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x384> @ imm = #-2
-    181c:      	b	0x15ca <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x132> @ imm = #-598
-    181e:      	bl	0x30a <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h99eb9539e0a1ad8eE> @ imm = #-5400
-    1822:      	uxtb	r0, r0
-    1824:      	str	r0, [sp, #56]
-    1826:      	b	0x1828 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x390> @ imm = #-2
-    1828:      	ldr	r0, [sp, #56]
-    182a:      	bl	0x45c <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h338082970efc5187E> @ imm = #-5074
-    182e:      	uxtb	r0, r0
-    1830:      	add	r1, sp, #304
-    1832:      	strb	r0, [r1]
-    1834:      	b	0x1836 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x39e> @ imm = #-2
-    1836:      	add	r0, sp, #304
-    1838:      	ldrb	r0, [r0]
-    183a:      	subs	r1, r0, #7
-    183c:      	subs	r2, r1, #1
-    183e:      	sbcs	r1, r2
-    1840:      	cmp	r0, #7
-    1842:      	beq	0x184a <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x3b2> @ imm = #4
-    1844:      	b	0x1846 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x3ae> @ imm = #-2
-    1846:      	b	0x1858 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x3c0> @ imm = #14
-    1848:      	trap
-    184a:      	ldr	r1, [sp, #64]
-    184c:      	ldr	r0, [sp, #60]
-    184e:      	bl	0x817c <core::slice::<impl [T]>::iter::hcf5f5b4e98ae1b51> @ imm = #26922
-    1852:      	str	r1, [sp, #312]
-    1854:      	str	r0, [sp, #308]
-    1856:      	b	0x186c <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x3d4> @ imm = #18
-    1858:      	ldr	r0, [sp, #304]
-    185a:      	add	r1, sp, #500
-    185c:      	strb	r0, [r1]
-    185e:      	bl	0x144 <_ZN153_$LT$core..result..Result$LT$T$C$F$GT$$u20$as$u20$core..ops..try_trait..FromResidual$LT$core..result..Result$LT$core..convert..Infallible$C$E$GT$$GT$$GT$13from_residual17hde03a568dc94affdE> @ imm = #-5918
-    1862:      	uxtb	r0, r0
-    1864:      	add	r1, sp, #160
-    1866:      	strb	r0, [r1]
-    1868:      	b	0x186a <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x3d2> @ imm = #-2
-    186a:      	b	0x15ca <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x132> @ imm = #-676
-    186c:      	add	r0, sp, #308
-    186e:      	bl	0x82be <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f> @ imm = #27212
-    1872:      	str	r0, [sp, #52]
-    1874:      	b	0x1876 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x3de> @ imm = #-2
-    1876:      	ldr	r0, [sp, #52]
-    1878:      	ldr	r1, [pc, #324] <$d.4+0x4>
-    187a:      	bl	0x52f4 <core::option::Option<T>::unwrap::hfb7c9ddfaa6dfdbd> @ imm = #14966
-    187e:      	b	0x1880 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x3e8> @ imm = #-2
-    1880:      	ldr	r0, [sp, #156]
-    1882:      	uxtb	r0, r0
-    1884:      	adds	r1, r0, #1
-    1886:      	str	r1, [sp, #48]
-    1888:      	uxtb	r0, r1
-    188a:      	cmp	r0, r1
-    188c:      	bne	0x18a8 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x410> @ imm = #24
-    188e:      	b	0x1890 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x3f8> @ imm = #-2
-    1890:      	ldr	r1, [sp, #48]
-    1892:      	add	r0, sp, #316
-    1894:      	movs	r2, #0
-    1896:      	strb	r2, [r0]
-    1898:      	strb	r1, [r0, #1]
-    189a:      	ldrb	r1, [r0, #1]
-    189c:      	ldr	r0, [sp, #316]
-    189e:      	bl	0x21e4 <<I as core::iter::traits::collect::IntoIterator>::into_iter::h394fa755b7de161a> @ imm = #2370
-    18a2:      	str	r0, [sp, #40]
-    18a4:      	str	r1, [sp, #44]
-    18a6:      	b	0x18b4 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x41c> @ imm = #10
-    18a8:      	ldr	r0, [pc, #288] <$d.4+0x10>
-    18aa:      	ldr	r2, [pc, #292] <$d.4+0x16>
-    18ac:      	movs	r1, #28
-    18ae:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #27798
-    18b2:      	trap
-    18b4:      	ldr	r0, [sp, #44]
-    18b6:      	ldr	r2, [sp, #40]
-    18b8:      	add	r1, sp, #320
-    18ba:      	strb	r2, [r1]
-    18bc:      	strb	r0, [r1, #1]
-    18be:      	b	0x18c0 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x428> @ imm = #-2
-    18c0:      	add	r0, sp, #320
-    18c2:      	bl	0x21c6 <core::iter::range::<impl core::iter::traits::iterator::Iterator for core::ops::range::Range<A>>::next::hdc3d7bd7b0883915> @ imm = #2304
-    18c6:      	mov	r2, r1
-    18c8:      	add	r1, sp, #324
-    18ca:      	strb	r2, [r1, #1]
-    18cc:      	strb	r0, [r1]
-    18ce:      	b	0x18d0 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x438> @ imm = #-2
-    18d0:      	add	r0, sp, #324
-    18d2:      	ldrb	r0, [r0]
-    18d4:      	lsls	r0, r0, #31
-    18d6:      	cmp	r0, #0
-    18d8:      	beq	0x18e8 <$t.3>           @ imm = #12
-    18da:      	b	0x18dc <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x444> @ imm = #-2
-    18dc:      	b	0x18f4 <$t.3+0xc>       @ imm = #20
-    18de:      	trap
-
-000018e0 <$d.2>:
-    18e0:	04 aa 00 00	.word	0x0000aa04
-    18e4:	20 aa 00 00	.word	0x0000aa20
-
-000018e8 <$t.3>:
-    18e8:      	add	r1, sp, #160
-    18ea:      	movs	r0, #0
-    18ec:      	strb	r0, [r1]
-    18ee:      	movs	r0, #7
-    18f0:      	strb	r0, [r1]
-    18f2:      	b	0x15ca <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x132> @ imm = #-812
-    18f4:      	ldr	r0, [sp, #140]
-    18f6:      	add	r1, sp, #324
-    18f8:      	ldrb	r1, [r1, #1]
-    18fa:      	add	r2, sp, #504
-    18fc:      	strb	r1, [r2]
-    18fe:      	add	r2, sp, #508
-    1900:      	strb	r1, [r2]
-    1902:      	bl	0x57cc <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hcb8505d022ea0231> @ imm = #16070
-    1906:      	str	r0, [sp, #36]
-    1908:      	b	0x190a <$t.3+0x22>      @ imm = #-2
-    190a:      	ldr	r0, [sp, #36]
-    190c:      	add	r2, sp, #348
-    190e:      	movs	r1, #3
-    1910:      	strb	r1, [r2]
-    1912:      	ldr	r1, [sp, #348]
-    1914:      	add	r2, sp, #344
-    1916:      	strb	r1, [r2]
-    1918:      	ldr	r1, [sp, #344]
-    191a:      	bl	0xa04 <core::option::Option<T>::ok_or::h5474822a3a86c46c> @ imm = #-3866
-    191e:      	str	r1, [sp, #516]
-    1920:      	str	r0, [sp, #512]
-    1922:      	ldr	r0, [sp, #516]
-    1924:      	str	r0, [sp, #340]
-    1926:      	ldr	r0, [sp, #512]
-    1928:      	str	r0, [sp, #336]
-    192a:      	b	0x192c <$t.3+0x44>      @ imm = #-2
-    192c:      	ldr	r1, [sp, #340]
-    192e:      	ldr	r0, [sp, #336]
-    1930:      	bl	0x49a <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h6af079890abca98aE> @ imm = #-5274
-    1934:      	str	r1, [sp, #524]
-    1936:      	str	r0, [sp, #520]
-    1938:      	ldr	r0, [sp, #524]
-    193a:      	str	r0, [sp, #332]
-    193c:      	ldr	r0, [sp, #520]
-    193e:      	str	r0, [sp, #328]
-    1940:      	b	0x1942 <$t.3+0x5a>      @ imm = #-2
-    1942:      	add	r0, sp, #328
-    1944:      	ldrb	r0, [r0]
-    1946:      	lsls	r0, r0, #31
-    1948:      	cmp	r0, #0
-    194a:      	beq	0x1952 <$t.3+0x6a>      @ imm = #4
-    194c:      	b	0x194e <$t.3+0x66>      @ imm = #-2
-    194e:      	b	0x1964 <$t.3+0x7c>      @ imm = #18
-    1950:      	trap
-    1952:      	ldr	r0, [sp, #332]
-    1954:      	str	r0, [sp, #28]
-    1956:      	str	r0, [sp, #536]
-    1958:      	str	r0, [sp, #540]
-    195a:      	add	r0, sp, #308
-    195c:      	bl	0x82be <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f> @ imm = #26974
-    1960:      	str	r0, [sp, #32]
-    1962:      	b	0x197a <$t.3+0x92>      @ imm = #20
-    1964:      	add	r0, sp, #328
-    1966:      	ldrb	r0, [r0, #1]
-    1968:      	add	r1, sp, #532
-    196a:      	strb	r0, [r1]
-    196c:      	bl	0x144 <_ZN153_$LT$core..result..Result$LT$T$C$F$GT$$u20$as$u20$core..ops..try_trait..FromResidual$LT$core..result..Result$LT$core..convert..Infallible$C$E$GT$$GT$$GT$13from_residual17hde03a568dc94affdE> @ imm = #-6188
-    1970:      	uxtb	r0, r0
-    1972:      	add	r1, sp, #160
-    1974:      	strb	r0, [r1]
-    1976:      	b	0x1978 <$t.3+0x90>      @ imm = #-2
-    1978:      	b	0x15ca <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x132> @ imm = #-946
-    197a:      	ldr	r0, [sp, #32]
-    197c:      	ldr	r1, [pc, #68] <$d.4+0x8>
-    197e:      	bl	0x52f4 <core::option::Option<T>::unwrap::hfb7c9ddfaa6dfdbd> @ imm = #14706
-    1982:      	str	r0, [sp, #24]
-    1984:      	b	0x1986 <$t.3+0x9e>      @ imm = #-2
-    1986:      	ldr	r0, [sp, #24]
-    1988:      	ldrb	r0, [r0]
-    198a:      	lsls	r0, r0, #6
-    198c:      	str	r0, [sp, #20]
-    198e:      	b	0x1990 <$t.3+0xa8>      @ imm = #-2
-    1990:      	add	r0, sp, #308
-    1992:      	bl	0x82be <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f> @ imm = #26920
-    1996:      	str	r0, [sp, #16]
-    1998:      	b	0x199a <$t.3+0xb2>      @ imm = #-2
-    199a:      	ldr	r0, [sp, #16]
-    199c:      	ldr	r1, [pc, #40] <$d.4+0xc>
-    199e:      	bl	0x52f4 <core::option::Option<T>::unwrap::hfb7c9ddfaa6dfdbd> @ imm = #14674
-    19a2:      	str	r0, [sp, #12]
-    19a4:      	b	0x19a6 <$t.3+0xbe>      @ imm = #-2
-    19a6:      	ldr	r0, [sp, #12]
-    19a8:      	ldrb	r0, [r0]
-    19aa:      	lsrs	r0, r0, #2
-    19ac:      	str	r0, [sp, #8]
-    19ae:      	b	0x19b0 <$t.3+0xc8>      @ imm = #-2
-    19b0:      	ldr	r1, [sp, #28]
-    19b2:      	ldr	r2, [sp, #8]
-    19b4:      	ldr	r0, [sp, #20]
-    19b6:      	orrs	r0, r2
-    19b8:      	strh	r0, [r1]
-    19ba:      	b	0x18c0 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d+0x428> @ imm = #-254
-
-000019bc <$d.4>:
-    19bc:	84 aa 00 00	.word	0x0000aa84
-    19c0:	94 aa 00 00	.word	0x0000aa94
-    19c4:	b4 aa 00 00	.word	0x0000aab4
-    19c8:	c4 aa 00 00	.word	0x0000aac4
-    19cc:	20 aa 00 00	.word	0x0000aa20
-    19d0:	a4 aa 00 00	.word	0x0000aaa4
-    19d4:	74 aa 00 00	.word	0x0000aa74
-    19d8:	50 aa 00 00	.word	0x0000aa50
-    19dc:	3c aa 00 00	.word	0x0000aa3c
-
-000019e0 <max116xx_10bit::Max116xx10Bit<SPI,CS>::new::h943c44bd332c47a7>:
-    19e0:      	push	{r4, r5, r6, r7, lr}
-    19e2:      	add	r7, sp, #12
-    19e4:      	sub	sp, #92
-    19e6:      	str	r0, [sp, #4]
-    19e8:      	ldr	r0, [r1, #8]
-    19ea:      	str	r0, [sp, #44]
-    19ec:      	ldr	r0, [r1, #4]
-    19ee:      	str	r0, [sp, #40]
-    19f0:      	ldr	r0, [r1]
-    19f2:      	str	r0, [sp, #36]
-    19f4:      	add	r1, sp, #60
-    19f6:      	movs	r0, #0
-    19f8:      	strb	r0, [r1]
-    19fa:      	ldr	r0, [sp, #60]
-    19fc:      	bl	0x1cbc <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::get_results_len::hd3b62b85ca1163d0> @ imm = #700
-    1a00:      	str	r0, [sp, #8]
-    1a02:      	b	0x1a04 <max116xx_10bit::Max116xx10Bit<SPI,CS>::new::h943c44bd332c47a7+0x24> @ imm = #-2
-    1a04:      	ldr	r0, [sp, #8]
-    1a06:      	add	r1, sp, #48
-    1a08:      	movs	r2, #3
-    1a0a:      	strb	r2, [r1, #4]
-    1a0c:      	movs	r2, #1
-    1a0e:      	strb	r2, [r1, #5]
-    1a10:      	movs	r2, #4
-    1a12:      	strb	r2, [r1, #6]
-    1a14:      	strb	r2, [r1, #7]
-    1a16:      	strb	r0, [r1, #8]
-    1a18:      	movs	r0, #0
-    1a1a:      	str	r0, [sp, #48]
-    1a1c:      	ldr	r1, [sp, #44]
-    1a1e:      	str	r1, [sp, #20]
-    1a20:      	ldr	r1, [sp, #40]
-    1a22:      	str	r1, [sp, #16]
-    1a24:      	ldr	r1, [sp, #36]
-    1a26:      	str	r1, [sp, #12]
-    1a28:      	ldr	r1, [sp, #56]
-    1a2a:      	str	r1, [sp, #32]
-    1a2c:      	ldr	r1, [sp, #52]
-    1a2e:      	str	r1, [sp, #28]
-    1a30:      	ldr	r1, [sp, #48]
-    1a32:      	str	r1, [sp, #24]
-    1a34:      	add	r4, sp, #12
-    1a36:      	add	r3, sp, #64
-    1a38:      	mov	r2, r3
-    1a3a:      	ldm	r4!, {r1, r5, r6}
-    1a3c:      	stm	r2!, {r1, r5, r6}
-    1a3e:      	ldm	r4!, {r1, r5, r6}
-    1a40:      	stm	r2!, {r1, r5, r6}
-    1a42:      	ldr	r1, [sp, #4]
-    1a44:      	adds	r2, r1, #4
-    1a46:      	ldm	r3!, {r4, r5, r6}
-    1a48:      	stm	r2!, {r4, r5, r6}
-    1a4a:      	ldm	r3!, {r4, r5, r6}
-    1a4c:      	stm	r2!, {r4, r5, r6}
-    1a4e:      	strb	r0, [r1]
-    1a50:      	add	sp, #92
-    1a52:      	pop	{r4, r5, r6, r7, pc}
-
-00001a54 <max116xx_10bit::Max116xx10Bit<SPI,CS>::max11619::h108cee7c000e330c>:
-    1a54:      	push	{r7, lr}
-    1a56:      	add	r7, sp, #0
-    1a58:      	sub	sp, #16
-    1a5a:      	ldr	r2, [r1, #8]
-    1a5c:      	str	r2, [sp, #8]
-    1a5e:      	ldr	r2, [r1, #4]
-    1a60:      	str	r2, [sp, #4]
-    1a62:      	ldr	r1, [r1]
-    1a64:      	str	r1, [sp]
-    1a66:      	mov	r1, sp
-    1a68:      	bl	0x19e0 <max116xx_10bit::Max116xx10Bit<SPI,CS>::new::h943c44bd332c47a7> @ imm = #-140
-    1a6c:      	b	0x1a6e <max116xx_10bit::Max116xx10Bit<SPI,CS>::max11619::h108cee7c000e330c+0x1a> @ imm = #-2
-    1a6e:      	add	sp, #16
-    1a70:      	pop	{r7, pc}
-    1a72:      	bmi	0x1a1e <max116xx_10bit::Max116xx10Bit<SPI,CS>::new::h943c44bd332c47a7+0x3e> @ imm = #-88
-
-00001a74 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37>:
-    1a74:      	push	{r7, lr}
-    1a76:      	add	r7, sp, #0
-    1a78:      	sub	sp, #232
-    1a7a:      	str	r0, [sp, #24]
-    1a7c:      	mov	r2, r1
-    1a7e:      	str	r2, [sp, #28]
-    1a80:      	str	r0, [sp, #60]
-    1a82:      	add	r2, sp, #64
-    1a84:      	strb	r1, [r2]
-    1a86:      	add	r2, sp, #56
-    1a88:      	movs	r1, #0
-    1a8a:      	strb	r1, [r2]
-    1a8c:      	bl	0x130e <<dummy_pin::dummy::DummyPin<L> as embedded_hal::digital::v2::OutputPin>::set_low::hb543f757bce9f448> @ imm = #-1922
-    1a90:      	b	0x1a92 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x1e> @ imm = #-2
-    1a92:      	bl	0x30a <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h99eb9539e0a1ad8eE> @ imm = #-6028
-    1a96:      	uxtb	r0, r0
-    1a98:      	str	r0, [sp, #20]
-    1a9a:      	b	0x1a9c <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x28> @ imm = #-2
-    1a9c:      	ldr	r0, [sp, #20]
-    1a9e:      	bl	0x45c <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h338082970efc5187E> @ imm = #-5702
-    1aa2:      	uxtb	r0, r0
-    1aa4:      	add	r1, sp, #36
-    1aa6:      	strb	r0, [r1]
-    1aa8:      	b	0x1aaa <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x36> @ imm = #-2
-    1aaa:      	add	r0, sp, #36
-    1aac:      	ldrb	r0, [r0]
-    1aae:      	subs	r1, r0, #7
-    1ab0:      	subs	r2, r1, #1
-    1ab2:      	sbcs	r1, r2
-    1ab4:      	cmp	r0, #7
-    1ab6:      	beq	0x1abe <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x4a> @ imm = #4
-    1ab8:      	b	0x1aba <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x46> @ imm = #-2
-    1aba:      	b	0x1ac0 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x4c> @ imm = #2
-    1abc:      	trap
-    1abe:      	b	0x1ada <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x66> @ imm = #24
-    1ac0:      	ldr	r0, [sp, #36]
-    1ac2:      	add	r1, sp, #88
-    1ac4:      	strb	r0, [r1]
-    1ac6:      	bl	0x144 <_ZN153_$LT$core..result..Result$LT$T$C$F$GT$$u20$as$u20$core..ops..try_trait..FromResidual$LT$core..result..Result$LT$core..convert..Infallible$C$E$GT$$GT$$GT$13from_residual17hde03a568dc94affdE> @ imm = #-6534
-    1aca:      	uxtb	r0, r0
-    1acc:      	add	r1, sp, #32
-    1ace:      	strb	r0, [r1]
-    1ad0:      	b	0x1ad2 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x5e> @ imm = #-2
-    1ad2:      	b	0x1ad4 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x60> @ imm = #-2
-    1ad4:      	ldr	r0, [sp, #32]
-    1ad6:      	add	sp, #232
-    1ad8:      	pop	{r7, pc}
-    1ada:      	ldr	r0, [sp, #24]
-    1adc:      	ldr	r1, [sp, #28]
-    1ade:      	mov	r2, r0
-    1ae0:      	str	r2, [sp, #16]
-    1ae2:      	add	r2, sp, #100
-    1ae4:      	strb	r1, [r2]
-    1ae6:      	str	r0, [sp, #120]
-    1ae8:      	str	r0, [sp, #124]
-    1aea:      	ldr	r0, [pc, #412] <$d.8+0x2>
-    1aec:      	str	r0, [sp, #172]
-    1aee:      	str	r0, [sp, #176]
-    1af0:      	str	r0, [sp, #180]
-    1af2:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #25978
-    1af6:      	str	r0, [sp, #168]
-    1af8:      	ldr	r0, [sp, #168]
-    1afa:      	str	r0, [sp, #188]
-    1afc:      	str	r0, [sp, #184]
-    1afe:      	ldr	r0, [sp, #184]
-    1b00:      	str	r0, [sp, #112]
-    1b02:      	add	r0, sp, #112
-    1b04:      	str	r0, [sp, #192]
-    1b06:      	str	r0, [sp, #196]
-    1b08:      	ldr	r0, [sp, #112]
-    1b0a:      	lsls	r0, r0, #30
-    1b0c:      	lsrs	r0, r0, #31
-    1b0e:      	add	r1, sp, #204
-    1b10:      	strb	r0, [r1]
-    1b12:      	add	r1, sp, #212
-    1b14:      	strb	r0, [r1]
-    1b16:      	add	r1, sp, #208
-    1b18:      	strb	r0, [r1]
-    1b1a:      	ldr	r0, [sp, #208]
-    1b1c:      	add	r1, sp, #200
-    1b1e:      	strb	r0, [r1]
-    1b20:      	ldr	r1, [sp, #200]
-    1b22:      	add	r0, sp, #108
-    1b24:      	strb	r1, [r0]
-    1b26:      	str	r0, [sp, #216]
-    1b28:      	str	r0, [sp, #224]
-    1b2a:      	str	r0, [sp, #228]
-    1b2c:      	ldrb	r0, [r0]
-    1b2e:      	lsls	r0, r0, #31
-    1b30:      	cmp	r0, #0
-    1b32:      	beq	0x1b7a <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x106> @ imm = #68
-    1b34:      	b	0x1b36 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0xc2> @ imm = #-2
-    1b36:      	ldr	r0, [sp, #16]
-    1b38:      	str	r0, [sp, #220]
-    1b3a:      	add	r0, sp, #100
-    1b3c:      	str	r0, [sp, #116]
-    1b3e:      	ldr	r0, [sp, #116]
-    1b40:      	ldr	r1, [pc, #328] <$d.8+0x4>
-    1b42:      	str	r1, [sp, #8]
-    1b44:      	str	r1, [sp, #140]
-    1b46:      	str	r0, [sp, #144]
-    1b48:      	movs	r1, #0
-    1b4a:      	str	r1, [sp, #12]
-    1b4c:      	str	r1, [sp, #136]
-    1b4e:      	ldr	r1, [sp, #136]
-    1b50:      	str	r1, [sp, #164]
-    1b52:      	str	r1, [sp, #160]
-    1b54:      	ldr	r1, [sp, #160]
-    1b56:      	str	r1, [sp, #132]
-    1b58:      	add	r1, sp, #132
-    1b5a:      	str	r1, [sp, #128]
-    1b5c:      	ldr	r1, [sp, #128]
-    1b5e:      	bl	0x3f28 <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::spi::FullDuplex<u8>>::send::{{closure}}::h1c05d4bbd98f482c> @ imm = #9158
-    1b62:      	mov	r1, r0
-    1b64:      	ldr	r0, [sp, #8]
-    1b66:      	ldr	r1, [r1]
-    1b68:      	str	r0, [sp, #148]
-    1b6a:      	str	r1, [sp, #152]
-    1b6c:      	str	r0, [sp, #156]
-    1b6e:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #25874
-    1b72:      	ldr	r0, [sp, #12]
-    1b74:      	add	r1, sp, #104
-    1b76:      	strb	r0, [r1]
-    1b78:      	b	0x1b82 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x10e> @ imm = #6
-    1b7a:      	add	r1, sp, #104
-    1b7c:      	movs	r0, #1
-    1b7e:      	strb	r0, [r1]
-    1b80:      	b	0x1b82 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x10e> @ imm = #-2
-    1b82:      	ldr	r0, [sp, #104]
-    1b84:      	add	r1, sp, #48
-    1b86:      	strb	r0, [r1]
-    1b88:      	b	0x1b8a <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x116> @ imm = #-2
-    1b8a:      	add	r1, sp, #56
-    1b8c:      	movs	r0, #1
-    1b8e:      	strb	r0, [r1]
-    1b90:      	add	r0, sp, #48
-    1b92:      	ldrb	r0, [r0]
-    1b94:      	lsls	r0, r0, #31
-    1b96:      	cmp	r0, #0
-    1b98:      	beq	0x1ba0 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x12c> @ imm = #4
-    1b9a:      	b	0x1b9c <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x128> @ imm = #-2
-    1b9c:      	b	0x1ba2 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x12e> @ imm = #2
-    1b9e:      	trap
-    1ba0:      	b	0x1bcc <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x158> @ imm = #40
-    1ba2:      	movs	r0, #0
-    1ba4:      	cmp	r0, #0
-    1ba6:      	bne	0x1bac <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x138> @ imm = #2
-    1ba8:      	b	0x1baa <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x136> @ imm = #-2
-    1baa:      	b	0x1bb0 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x13c> @ imm = #2
-    1bac:      	trap
-    1bae:      	b	0x1bcc <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x158> @ imm = #26
-    1bb0:      	add	r0, sp, #48
-    1bb2:      	ldrb	r0, [r0]
-    1bb4:      	lsls	r0, r0, #31
-    1bb6:      	cmp	r0, #0
-    1bb8:      	beq	0x1bc4 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x150> @ imm = #8
-    1bba:      	b	0x1bbc <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x148> @ imm = #-2
-    1bbc:      	add	r1, sp, #56
-    1bbe:      	movs	r0, #0
-    1bc0:      	strb	r0, [r1]
-    1bc2:      	b	0x1bc4 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x150> @ imm = #-2
-    1bc4:      	add	r1, sp, #56
-    1bc6:      	movs	r0, #0
-    1bc8:      	strb	r0, [r1]
-    1bca:      	b	0x1ada <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x66> @ imm = #-244
-    1bcc:      	add	r0, sp, #48
-    1bce:      	ldrb	r0, [r0]
-    1bd0:      	lsls	r0, r0, #31
-    1bd2:      	cmp	r0, #0
-    1bd4:      	beq	0x1be4 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x170> @ imm = #12
-    1bd6:      	b	0x1bd8 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x164> @ imm = #-2
-    1bd8:      	add	r0, sp, #56
-    1bda:      	ldrb	r0, [r0]
-    1bdc:      	lsls	r0, r0, #31
-    1bde:      	cmp	r0, #0
-    1be0:      	bne	0x1bfc <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x188> @ imm = #24
-    1be2:      	b	0x1bf4 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x180> @ imm = #14
-    1be4:      	add	r1, sp, #56
-    1be6:      	movs	r0, #0
-    1be8:      	strb	r0, [r1]
-    1bea:      	bl	0x35c <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17hf0e429eaa3a37c4aE> @ imm = #-6290
-    1bee:      	uxtb	r0, r0
-    1bf0:      	str	r0, [sp, #4]
-    1bf2:      	b	0x1bfe <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x18a> @ imm = #8
-    1bf4:      	add	r1, sp, #56
-    1bf6:      	movs	r0, #0
-    1bf8:      	strb	r0, [r1]
-    1bfa:      	b	0x1be4 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x170> @ imm = #-26
-    1bfc:      	b	0x1bf4 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x180> @ imm = #-12
-    1bfe:      	ldr	r0, [sp, #4]
-    1c00:      	bl	0x45c <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h338082970efc5187E> @ imm = #-6056
-    1c04:      	uxtb	r0, r0
-    1c06:      	add	r1, sp, #40
-    1c08:      	strb	r0, [r1]
-    1c0a:      	b	0x1c0c <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x198> @ imm = #-2
-    1c0c:      	add	r0, sp, #40
-    1c0e:      	ldrb	r0, [r0]
-    1c10:      	subs	r1, r0, #7
-    1c12:      	subs	r2, r1, #1
-    1c14:      	sbcs	r1, r2
-    1c16:      	cmp	r0, #7
-    1c18:      	beq	0x1c20 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x1ac> @ imm = #4
-    1c1a:      	b	0x1c1c <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x1a8> @ imm = #-2
-    1c1c:      	b	0x1c28 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x1b4> @ imm = #8
-    1c1e:      	trap
-    1c20:      	ldr	r0, [sp, #24]
-    1c22:      	bl	0x1316 <<dummy_pin::dummy::DummyPin<L> as embedded_hal::digital::v2::OutputPin>::set_high::h7185e627752c569a> @ imm = #-2320
-    1c26:      	b	0x1c3c <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x1c8> @ imm = #18
-    1c28:      	ldr	r0, [sp, #40]
-    1c2a:      	add	r1, sp, #92
-    1c2c:      	strb	r0, [r1]
-    1c2e:      	bl	0x144 <_ZN153_$LT$core..result..Result$LT$T$C$F$GT$$u20$as$u20$core..ops..try_trait..FromResidual$LT$core..result..Result$LT$core..convert..Infallible$C$E$GT$$GT$$GT$13from_residual17hde03a568dc94affdE> @ imm = #-6894
-    1c32:      	uxtb	r0, r0
-    1c34:      	add	r1, sp, #32
-    1c36:      	strb	r0, [r1]
-    1c38:      	b	0x1c3a <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x1c6> @ imm = #-2
-    1c3a:      	b	0x1ad4 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x60> @ imm = #-362
-    1c3c:      	bl	0x30a <_ZN4core6result19Result$LT$T$C$E$GT$7map_err17h99eb9539e0a1ad8eE> @ imm = #-6454
-    1c40:      	uxtb	r0, r0
-    1c42:      	str	r0, [sp]
-    1c44:      	b	0x1c46 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x1d2> @ imm = #-2
-    1c46:      	ldr	r0, [sp]
-    1c48:      	bl	0x45c <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h338082970efc5187E> @ imm = #-6128
-    1c4c:      	uxtb	r0, r0
-    1c4e:      	add	r1, sp, #52
-    1c50:      	strb	r0, [r1]
-    1c52:      	b	0x1c54 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x1e0> @ imm = #-2
-    1c54:      	add	r0, sp, #52
-    1c56:      	ldrb	r0, [r0]
-    1c58:      	subs	r1, r0, #7
-    1c5a:      	subs	r2, r1, #1
-    1c5c:      	sbcs	r1, r2
-    1c5e:      	cmp	r0, #7
-    1c60:      	beq	0x1c68 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x1f4> @ imm = #4
-    1c62:      	b	0x1c64 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x1f0> @ imm = #-2
-    1c64:      	b	0x1c74 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x200> @ imm = #12
-    1c66:      	trap
-    1c68:      	add	r1, sp, #32
-    1c6a:      	movs	r0, #0
-    1c6c:      	strb	r0, [r1]
-    1c6e:      	movs	r0, #7
-    1c70:      	strb	r0, [r1]
-    1c72:      	b	0x1ad4 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x60> @ imm = #-418
-    1c74:      	ldr	r0, [sp, #52]
-    1c76:      	add	r1, sp, #96
-    1c78:      	strb	r0, [r1]
-    1c7a:      	bl	0x144 <_ZN153_$LT$core..result..Result$LT$T$C$F$GT$$u20$as$u20$core..ops..try_trait..FromResidual$LT$core..result..Result$LT$core..convert..Infallible$C$E$GT$$GT$$GT$13from_residual17hde03a568dc94affdE> @ imm = #-6970
-    1c7e:      	uxtb	r0, r0
-    1c80:      	add	r1, sp, #32
-    1c82:      	strb	r0, [r1]
-    1c84:      	b	0x1c86 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x212> @ imm = #-2
-    1c86:      	b	0x1ad4 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x60> @ imm = #-438
-
-00001c88 <$d.8>:
-    1c88:	0c 10 05 40	.word	0x4005100c
-    1c8c:	08 10 05 40	.word	0x40051008
-
-00001c90 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::get_setup_byte::hb467d2b0075cb186>:
-    1c90:      	sub	sp, #20
-    1c92:      	str	r0, [sp, #8]
-    1c94:      	str	r0, [sp, #16]
-    1c96:      	ldrb	r0, [r0, #16]
-    1c98:      	lsls	r0, r0, #4
-    1c9a:      	str	r0, [sp, #12]
-    1c9c:      	b	0x1c9e <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::get_setup_byte::hb467d2b0075cb186+0xe> @ imm = #-2
-    1c9e:      	ldr	r0, [sp, #8]
-    1ca0:      	ldr	r1, [sp, #12]
-    1ca2:      	movs	r2, #64
-    1ca4:      	orrs	r1, r2
-    1ca6:      	str	r1, [sp]
-    1ca8:      	ldrb	r0, [r0, #17]
-    1caa:      	lsls	r0, r0, #2
-    1cac:      	str	r0, [sp, #4]
-    1cae:      	b	0x1cb0 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::get_setup_byte::hb467d2b0075cb186+0x20> @ imm = #-2
-    1cb0:      	ldr	r1, [sp, #4]
-    1cb2:      	ldr	r0, [sp]
-    1cb4:      	orrs	r0, r1
-    1cb6:      	add	sp, #20
-    1cb8:      	bx	lr
-    1cba:      	bmi	0x1c66 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37+0x1f2> @ imm = #-88
-
-00001cbc <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::get_results_len::hd3b62b85ca1163d0>:
-    1cbc:      	push	{r7, lr}
-    1cbe:      	add	r7, sp, #0
-    1cc0:      	sub	sp, #16
-    1cc2:      	mov	r1, r0
-    1cc4:      	uxtb	r0, r1
-    1cc6:      	add	r2, sp, #12
-    1cc8:      	strb	r1, [r2]
-    1cca:      	adds	r1, r0, #1
-    1ccc:      	str	r1, [sp, #8]
-    1cce:      	uxtb	r0, r1
-    1cd0:      	cmp	r0, r1
-    1cd2:      	bne	0x1ce6 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::get_results_len::hd3b62b85ca1163d0+0x2a> @ imm = #16
-    1cd4:      	b	0x1cd6 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::get_results_len::hd3b62b85ca1163d0+0x1a> @ imm = #-2
-    1cd6:      	ldr	r0, [sp, #8]
-    1cd8:      	uxtb	r0, r0
-    1cda:      	lsls	r0, r0, #2
-    1cdc:      	str	r0, [sp, #4]
-    1cde:      	lsrs	r0, r0, #8
-    1ce0:      	cmp	r0, #0
-    1ce2:      	bne	0x1cf8 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::get_results_len::hd3b62b85ca1163d0+0x3c> @ imm = #18
-    1ce4:      	b	0x1cf2 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::get_results_len::hd3b62b85ca1163d0+0x36> @ imm = #10
-    1ce6:      	ldr	r0, [pc, #36] <$d.11+0xa>
-    1ce8:      	ldr	r2, [pc, #28] <$d.11+0x4>
-    1cea:      	movs	r1, #28
-    1cec:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #26712
-    1cf0:      	trap
-    1cf2:      	ldr	r0, [sp, #4]
-    1cf4:      	add	sp, #16
-    1cf6:      	pop	{r7, pc}
-    1cf8:      	ldr	r0, [pc, #8] <$d.11>
-    1cfa:      	ldr	r2, [pc, #12] <$d.11+0x6>
-    1cfc:      	movs	r1, #33
-    1cfe:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #26694
-    1d02:      	trap
-
-00001d04 <$d.11>:
-    1d04:	50 aa 00 00	.word	0x0000aa50
-    1d08:	d4 aa 00 00	.word	0x0000aad4
-    1d0c:	20 aa 00 00	.word	0x0000aa20
-
-00001d10 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::get_averaging_byte::ha55eaab71c306b31>:
-    1d10:      	sub	sp, #16
-    1d12:      	mov	r2, r1
-    1d14:      	str	r2, [sp]
-    1d16:      	add	r2, sp, #8
-    1d18:      	strb	r0, [r2]
-    1d1a:      	add	r2, sp, #12
-    1d1c:      	strb	r1, [r2]
-    1d1e:      	lsls	r0, r0, #2
-    1d20:      	str	r0, [sp, #4]
-    1d22:      	b	0x1d24 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::get_averaging_byte::ha55eaab71c306b31+0x14> @ imm = #-2
-    1d24:      	ldr	r1, [sp]
-    1d26:      	ldr	r0, [sp, #4]
-    1d28:      	orrs	r0, r1
-    1d2a:      	movs	r1, #32
-    1d2c:      	orrs	r0, r1
-    1d2e:      	add	sp, #16
-    1d30:      	bx	lr
-
-00001d32 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::get_conversion_byte::hb7ec64df4edb09f6>:
-    1d32:      	push	{r4, r6, r7, lr}
-    1d34:      	add	r7, sp, #8
-    1d36:      	sub	sp, #36
-    1d38:      	mov	r3, r1
-    1d3a:      	mov	r1, r0
-    1d3c:      	uxtb	r0, r2
-    1d3e:      	mov	r4, r2
-    1d40:      	str	r4, [sp, #12]
-    1d42:      	mov	r4, r3
-    1d44:      	str	r4, [sp, #16]
-    1d46:      	str	r1, [sp, #24]
-    1d48:      	add	r4, sp, #28
-    1d4a:      	strb	r3, [r4]
-    1d4c:      	add	r3, sp, #32
-    1d4e:      	strb	r2, [r3]
-    1d50:      	ldrb	r1, [r1, #19]
-    1d52:      	cmp	r0, r1
-    1d54:      	bhi	0x1d60 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::get_conversion_byte::hb7ec64df4edb09f6+0x2e> @ imm = #8
-    1d56:      	b	0x1d58 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::get_conversion_byte::hb7ec64df4edb09f6+0x26> @ imm = #-2
-    1d58:      	ldr	r0, [sp, #12]
-    1d5a:      	lsls	r0, r0, #3
-    1d5c:      	str	r0, [sp, #8]
-    1d5e:      	b	0x1d76 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::get_conversion_byte::hb7ec64df4edb09f6+0x44> @ imm = #20
-    1d60:      	add	r1, sp, #20
-    1d62:      	movs	r0, #0
-    1d64:      	strb	r0, [r1, #1]
-    1d66:      	movs	r0, #1
-    1d68:      	strb	r0, [r1]
-    1d6a:      	b	0x1d6c <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::get_conversion_byte::hb7ec64df4edb09f6+0x3a> @ imm = #-2
-    1d6c:      	add	r1, sp, #20
-    1d6e:      	ldrb	r0, [r1]
-    1d70:      	ldrb	r1, [r1, #1]
-    1d72:      	add	sp, #36
-    1d74:      	pop	{r4, r6, r7, pc}
-    1d76:      	ldr	r0, [sp, #16]
-    1d78:      	ldr	r1, [sp, #8]
-    1d7a:      	movs	r2, #127
-    1d7c:      	mvns	r2, r2
-    1d7e:      	orrs	r1, r2
-    1d80:      	str	r1, [sp]
-    1d82:      	lsls	r0, r0, #1
-    1d84:      	str	r0, [sp, #4]
-    1d86:      	b	0x1d88 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::get_conversion_byte::hb7ec64df4edb09f6+0x56> @ imm = #-2
-    1d88:      	ldr	r1, [sp, #4]
-    1d8a:      	ldr	r0, [sp]
-    1d8c:      	orrs	r0, r1
-    1d8e:      	add	r1, sp, #20
-    1d90:      	strb	r0, [r1, #1]
-    1d92:      	movs	r0, #0
-    1d94:      	strb	r0, [r1]
-    1d96:      	b	0x1d6c <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::get_conversion_byte::hb7ec64df4edb09f6+0x3a> @ imm = #-46
-
-00001d98 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::reset::h6445cf02374a70dd>:
-    1d98:      	push	{r7, lr}
-    1d9a:      	add	r7, sp, #0
-    1d9c:      	sub	sp, #24
-    1d9e:      	str	r0, [sp, #8]
-    1da0:      	str	r0, [sp, #16]
-    1da2:      	add	r0, sp, #20
-    1da4:      	strb	r1, [r0]
-    1da6:      	add	r2, sp, #12
-    1da8:      	movs	r0, #16
-    1daa:      	strb	r0, [r2]
-    1dac:      	cmp	r1, #0
-    1dae:      	bne	0x1dc0 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::reset::h6445cf02374a70dd+0x28> @ imm = #14
-    1db0:      	b	0x1db2 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::reset::h6445cf02374a70dd+0x1a> @ imm = #-2
-    1db2:      	ldr	r0, [sp, #8]
-    1db4:      	ldr	r1, [sp, #12]
-    1db6:      	bl	0x1a74 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37> @ imm = #-838
-    1dba:      	uxtb	r0, r0
-    1dbc:      	str	r0, [sp, #4]
-    1dbe:      	b	0x1dcc <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::reset::h6445cf02374a70dd+0x34> @ imm = #10
-    1dc0:      	ldr	r0, [sp, #12]
-    1dc2:      	movs	r1, #8
-    1dc4:      	orrs	r0, r1
-    1dc6:      	add	r1, sp, #12
-    1dc8:      	strb	r0, [r1]
-    1dca:      	b	0x1db2 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::reset::h6445cf02374a70dd+0x1a> @ imm = #-28
-    1dcc:      	ldr	r0, [sp, #4]
-    1dce:      	add	sp, #24
-    1dd0:      	pop	{r7, pc}
-
-00001dd2 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::setup::h2b9af7e788767d10>:
-    1dd2:      	push	{r7, lr}
-    1dd4:      	add	r7, sp, #0
-    1dd6:      	sub	sp, #16
-    1dd8:      	str	r0, [sp, #4]
-    1dda:      	str	r0, [sp, #12]
-    1ddc:      	bl	0x1c90 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::get_setup_byte::hb467d2b0075cb186> @ imm = #-336
-    1de0:      	str	r0, [sp, #8]
-    1de2:      	b	0x1de4 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::setup::h2b9af7e788767d10+0x12> @ imm = #-2
-    1de4:      	ldr	r1, [sp, #8]
-    1de6:      	ldr	r0, [sp, #4]
-    1de8:      	bl	0x1a74 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37> @ imm = #-888
-    1dec:      	uxtb	r0, r0
-    1dee:      	str	r0, [sp]
-    1df0:      	b	0x1df2 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::setup::h2b9af7e788767d10+0x20> @ imm = #-2
-    1df2:      	ldr	r0, [sp]
-    1df4:      	add	sp, #16
-    1df6:      	pop	{r7, pc}
-
-00001df8 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::averaging::hf5140e705eb13cdf>:
-    1df8:      	push	{r7, lr}
-    1dfa:      	add	r7, sp, #0
-    1dfc:      	sub	sp, #40
-    1dfe:      	str	r2, [sp, #8]
-    1e00:      	mov	r2, r0
-    1e02:      	ldr	r0, [sp, #8]
-    1e04:      	str	r2, [sp, #12]
-    1e06:      	mov	r3, r0
-    1e08:      	str	r3, [sp, #16]
-    1e0a:      	mov	r3, r1
-    1e0c:      	str	r3, [sp, #20]
-    1e0e:      	str	r2, [sp, #28]
-    1e10:      	add	r2, sp, #32
-    1e12:      	strb	r1, [r2]
-    1e14:      	add	r1, sp, #36
-    1e16:      	strb	r0, [r1]
-    1e18:      	bl	0x1cbc <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::get_results_len::hd3b62b85ca1163d0> @ imm = #-352
-    1e1c:      	str	r0, [sp, #24]
-    1e1e:      	b	0x1e20 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::averaging::hf5140e705eb13cdf+0x28> @ imm = #-2
-    1e20:      	ldr	r1, [sp, #16]
-    1e22:      	ldr	r0, [sp, #20]
-    1e24:      	ldr	r2, [sp, #24]
-    1e26:      	ldr	r3, [sp, #12]
-    1e28:      	strb	r2, [r3, #20]
-    1e2a:      	bl	0x1d10 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::get_averaging_byte::ha55eaab71c306b31> @ imm = #-286
-    1e2e:      	str	r0, [sp, #4]
-    1e30:      	b	0x1e32 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::averaging::hf5140e705eb13cdf+0x3a> @ imm = #-2
-    1e32:      	ldr	r1, [sp, #4]
-    1e34:      	ldr	r0, [sp, #12]
-    1e36:      	bl	0x1a74 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::send_wrapper::h71d16716f3accb37> @ imm = #-966
-    1e3a:      	uxtb	r0, r0
-    1e3c:      	str	r0, [sp]
-    1e3e:      	b	0x1e40 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::averaging::hf5140e705eb13cdf+0x48> @ imm = #-2
-    1e40:      	ldr	r0, [sp]
-    1e42:      	add	sp, #40
-    1e44:      	pop	{r7, pc}
-
-00001e46 <max116xx_10bit::Error::Pin::ha230803e38a44025>:
-    1e46:      	sub	sp, #8
-    1e48:      	trap
-    1e4a:      	ldr	r0, [sp]
-    1e4c:      	add	sp, #8
-    1e4e:      	bx	lr
-
-00001e50 <max116xx_10bit::Error::Spi::h6e3bbdadc058384b>:
-    1e50:      	sub	sp, #8
-    1e52:      	trap
-    1e54:      	ldr	r0, [sp]
-    1e56:      	add	sp, #8
-    1e58:      	bx	lr
-
-00001e5a <<&T as core::fmt::Debug>::fmt::h0400830098324ac1>:
-    1e5a:      	push	{r7, lr}
-    1e5c:      	add	r7, sp, #0
-    1e5e:      	sub	sp, #16
-    1e60:      	str	r0, [sp, #8]
-    1e62:      	str	r1, [sp, #12]
-    1e64:      	ldr	r0, [r0]
-    1e66:      	bl	0x80a8 <<max116xx_10bit::AdcError as core::fmt::Debug>::fmt::h2591c103d430bfb2> @ imm = #25150
-    1e6a:      	str	r0, [sp, #4]
-    1e6c:      	b	0x1e6e <<&T as core::fmt::Debug>::fmt::h0400830098324ac1+0x14> @ imm = #-2
-    1e6e:      	ldr	r0, [sp, #4]
-    1e70:      	movs	r1, #1
-    1e72:      	ands	r0, r1
-    1e74:      	add	sp, #16
-    1e76:      	pop	{r7, pc}
-
-00001e78 <<T as core::convert::From<T>>::from::hd605e0ee22c7694c>:
-    1e78:      	sub	sp, #4
-    1e7a:      	mov	r1, sp
-    1e7c:      	strb	r0, [r1]
-    1e7e:      	add	sp, #4
-    1e80:      	bx	lr
-    1e82:      	bmi	0x1e2e <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::averaging::hf5140e705eb13cdf+0x36> @ imm = #-88
-
-00001e84 <_ZN77_$LT$max116xx_10bit..Error$LT$SpiE$C$PinE$GT$$u20$as$u20$core..fmt..Debug$GT$3fmt17h6fa82ad19f2456afE>:
-    1e84:      	push	{r7, lr}
-    1e86:      	add	r7, sp, #0
-    1e88:      	sub	sp, #104
-    1e8a:      	str	r1, [sp, #12]
-    1e8c:      	str	r0, [sp, #72]
-    1e8e:      	str	r1, [sp, #76]
-    1e90:      	str	r0, [sp, #20]
-    1e92:      	movs	r0, #1
-    1e94:      	cmp	r0, #0
-    1e96:      	bne	0x1ea6 <_ZN77_$LT$max116xx_10bit..Error$LT$SpiE$C$PinE$GT$$u20$as$u20$core..fmt..Debug$GT$3fmt17h6fa82ad19f2456afE+0x22> @ imm = #12
-    1e98:      	b	0x1e9a <_ZN77_$LT$max116xx_10bit..Error$LT$SpiE$C$PinE$GT$$u20$as$u20$core..fmt..Debug$GT$3fmt17h6fa82ad19f2456afE+0x16> @ imm = #-2
-    1e9a:      	movs	r0, #0
-    1e9c:      	cmp	r0, #0
-    1e9e:      	bne	0x1eba <_ZN77_$LT$max116xx_10bit..Error$LT$SpiE$C$PinE$GT$$u20$as$u20$core..fmt..Debug$GT$3fmt17h6fa82ad19f2456afE+0x36> @ imm = #24
-    1ea0:      	b	0x1ea2 <_ZN77_$LT$max116xx_10bit..Error$LT$SpiE$C$PinE$GT$$u20$as$u20$core..fmt..Debug$GT$3fmt17h6fa82ad19f2456afE+0x1e> @ imm = #-2
-    1ea2:      	b	0x1ece <_ZN77_$LT$max116xx_10bit..Error$LT$SpiE$C$PinE$GT$$u20$as$u20$core..fmt..Debug$GT$3fmt17h6fa82ad19f2456afE+0x4a> @ imm = #40
-    1ea4:      	trap
-    1ea6:      	ldr	r1, [sp, #12]
-    1ea8:      	ldr	r0, [sp, #20]
-    1eaa:      	str	r0, [sp, #8]
-    1eac:      	str	r0, [sp, #96]
-    1eae:      	ldr	r2, [pc, #160] <$d.22+0xe>
-    1eb0:      	add	r0, sp, #24
-    1eb2:      	movs	r3, #3
-    1eb4:      	bl	0x939c <core::fmt::Formatter::debug_tuple::ha4e1a3ea9953bf09> @ imm = #29924
-    1eb8:      	b	0x1f26 <_ZN77_$LT$max116xx_10bit..Error$LT$SpiE$C$PinE$GT$$u20$as$u20$core..fmt..Debug$GT$3fmt17h6fa82ad19f2456afE+0xa2> @ imm = #106
-    1eba:      	ldr	r1, [sp, #12]
-    1ebc:      	ldr	r0, [sp, #20]
-    1ebe:      	str	r0, [sp, #4]
-    1ec0:      	str	r0, [sp, #88]
-    1ec2:      	ldr	r2, [pc, #136] <$d.22+0xa>
-    1ec4:      	add	r0, sp, #40
-    1ec6:      	movs	r3, #3
-    1ec8:      	bl	0x939c <core::fmt::Formatter::debug_tuple::ha4e1a3ea9953bf09> @ imm = #29904
-    1ecc:      	b	0x1f08 <_ZN77_$LT$max116xx_10bit..Error$LT$SpiE$C$PinE$GT$$u20$as$u20$core..fmt..Debug$GT$3fmt17h6fa82ad19f2456afE+0x84> @ imm = #56
-    1ece:      	ldr	r1, [sp, #12]
-    1ed0:      	ldr	r0, [sp, #20]
-    1ed2:      	str	r0, [sp]
-    1ed4:      	str	r0, [sp, #80]
-    1ed6:      	ldr	r2, [pc, #108] <$d.22+0x2>
-    1ed8:      	add	r0, sp, #56
-    1eda:      	movs	r3, #3
-    1edc:      	bl	0x939c <core::fmt::Formatter::debug_tuple::ha4e1a3ea9953bf09> @ imm = #29884
-    1ee0:      	b	0x1ee2 <_ZN77_$LT$max116xx_10bit..Error$LT$SpiE$C$PinE$GT$$u20$as$u20$core..fmt..Debug$GT$3fmt17h6fa82ad19f2456afE+0x5e> @ imm = #-2
-    1ee2:      	ldr	r1, [sp]
-    1ee4:      	add	r0, sp, #56
-    1ee6:      	str	r0, [sp, #84]
-    1ee8:      	str	r1, [sp, #68]
-    1eea:      	ldr	r2, [pc, #92] <$d.22+0x6>
-    1eec:      	add	r1, sp, #68
-    1eee:      	bl	0x88f8 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186> @ imm = #27142
-    1ef2:      	b	0x1ef4 <_ZN77_$LT$max116xx_10bit..Error$LT$SpiE$C$PinE$GT$$u20$as$u20$core..fmt..Debug$GT$3fmt17h6fa82ad19f2456afE+0x70> @ imm = #-2
-    1ef4:      	add	r0, sp, #56
-    1ef6:      	bl	0x89e4 <core::fmt::builders::DebugTuple::finish::h6d0cc63ecbd49307> @ imm = #27370
-    1efa:      	add	r1, sp, #16
-    1efc:      	strb	r0, [r1]
-    1efe:      	b	0x1f00 <_ZN77_$LT$max116xx_10bit..Error$LT$SpiE$C$PinE$GT$$u20$as$u20$core..fmt..Debug$GT$3fmt17h6fa82ad19f2456afE+0x7c> @ imm = #-2
-    1f00:      	add	r0, sp, #16
-    1f02:      	ldrb	r0, [r0]
-    1f04:      	add	sp, #104
-    1f06:      	pop	{r7, pc}
-    1f08:      	ldr	r1, [sp, #4]
-    1f0a:      	add	r0, sp, #40
-    1f0c:      	str	r0, [sp, #92]
-    1f0e:      	str	r1, [sp, #52]
-    1f10:      	ldr	r2, [pc, #52] <$d.22+0x4>
-    1f12:      	add	r1, sp, #52
-    1f14:      	bl	0x88f8 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186> @ imm = #27104
-    1f18:      	b	0x1f1a <_ZN77_$LT$max116xx_10bit..Error$LT$SpiE$C$PinE$GT$$u20$as$u20$core..fmt..Debug$GT$3fmt17h6fa82ad19f2456afE+0x96> @ imm = #-2
-    1f1a:      	add	r0, sp, #40
-    1f1c:      	bl	0x89e4 <core::fmt::builders::DebugTuple::finish::h6d0cc63ecbd49307> @ imm = #27332
-    1f20:      	add	r1, sp, #16
-    1f22:      	strb	r0, [r1]
-    1f24:      	b	0x1f00 <_ZN77_$LT$max116xx_10bit..Error$LT$SpiE$C$PinE$GT$$u20$as$u20$core..fmt..Debug$GT$3fmt17h6fa82ad19f2456afE+0x7c> @ imm = #-40
-    1f26:      	ldr	r1, [sp, #8]
-    1f28:      	add	r0, sp, #24
-    1f2a:      	str	r0, [sp, #100]
-    1f2c:      	str	r1, [sp, #36]
-    1f2e:      	ldr	r2, [pc, #36] <$d.22+0x12>
-    1f30:      	add	r1, sp, #36
-    1f32:      	bl	0x88f8 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186> @ imm = #27074
-    1f36:      	b	0x1f38 <_ZN77_$LT$max116xx_10bit..Error$LT$SpiE$C$PinE$GT$$u20$as$u20$core..fmt..Debug$GT$3fmt17h6fa82ad19f2456afE+0xb4> @ imm = #-2
-    1f38:      	add	r0, sp, #24
-    1f3a:      	bl	0x89e4 <core::fmt::builders::DebugTuple::finish::h6d0cc63ecbd49307> @ imm = #27302
-    1f3e:      	add	r1, sp, #16
-    1f40:      	strb	r0, [r1]
-    1f42:      	b	0x1f00 <_ZN77_$LT$max116xx_10bit..Error$LT$SpiE$C$PinE$GT$$u20$as$u20$core..fmt..Debug$GT$3fmt17h6fa82ad19f2456afE+0x7c> @ imm = #-70
-
-00001f44 <$d.22>:
-    1f44:	e4 aa 00 00	.word	0x0000aae4
-    1f48:	e8 aa 00 00	.word	0x0000aae8
-    1f4c:	f8 aa 00 00	.word	0x0000aaf8
-    1f50:	fb aa 00 00	.word	0x0000aafb
-    1f54:	00 ab 00 00	.word	0x0000ab00
-
-00001f58 <core::ops::function::FnOnce::call_once::h63d663bb20109018>:
-    1f58:      	push	{r7, lr}
-    1f5a:      	add	r7, sp, #0
-    1f5c:      	sub	sp, #16
-    1f5e:      	bl	0x1e46 <max116xx_10bit::Error::Pin::ha230803e38a44025> @ imm = #-284
-    1f62:      	uxtb	r0, r0
-    1f64:      	str	r0, [sp, #4]
-    1f66:      	b	0x1f68 <core::ops::function::FnOnce::call_once::h63d663bb20109018+0x10> @ imm = #-2
-    1f68:      	ldr	r0, [sp, #4]
-    1f6a:      	add	sp, #16
-    1f6c:      	pop	{r7, pc}
-
-00001f6e <core::ops::function::FnOnce::call_once::hfc8883650157a433>:
-    1f6e:      	push	{r7, lr}
-    1f70:      	add	r7, sp, #0
-    1f72:      	sub	sp, #16
-    1f74:      	bl	0x1e50 <max116xx_10bit::Error::Spi::h6e3bbdadc058384b> @ imm = #-296
-    1f78:      	uxtb	r0, r0
-    1f7a:      	str	r0, [sp, #4]
-    1f7c:      	b	0x1f7e <core::ops::function::FnOnce::call_once::hfc8883650157a433+0x10> @ imm = #-2
-    1f7e:      	ldr	r0, [sp, #4]
-    1f80:      	add	sp, #16
-    1f82:      	pop	{r7, pc}
-
-00001f84 <core::ptr::drop_in_place<max116xx_10bit::Error<core::convert::Infallible,core::convert::Infallible>>::hd1e0af9b4b4d3d2c>:
-    1f84:      	sub	sp, #4
-    1f86:      	str	r0, [sp]
-    1f88:      	add	sp, #4
-    1f8a:      	bx	lr
-
-00001f8c <core::ptr::drop_in_place<core::convert::Infallible>::h2a6200a557b04506>:
-    1f8c:      	sub	sp, #4
-    1f8e:      	str	r0, [sp]
-    1f90:      	add	sp, #4
-    1f92:      	bx	lr
-
-00001f94 <core::ptr::drop_in_place<&max116xx_10bit::AdcError>::h7d4fa93f60d8e4f1>:
-    1f94:      	sub	sp, #4
-    1f96:      	str	r0, [sp]
-    1f98:      	add	sp, #4
-    1f9a:      	bx	lr
-
-00001f9c <core::ptr::drop_in_place<&core::convert::Infallible>::h626807ff9e1c9686>:
-    1f9c:      	sub	sp, #4
-    1f9e:      	str	r0, [sp]
-    1fa0:      	add	sp, #4
-    1fa2:      	bx	lr
-
-00001fa4 <cortex_m::peripheral::nvic::<impl cortex_m::peripheral::NVIC>::unmask::hc3067b709618d01d>:
-    1fa4:      	push	{r7, lr}
-    1fa6:      	add	r7, sp, #0
-    1fa8:      	sub	sp, #48
-    1faa:      	mov	r1, r0
-    1fac:      	str	r1, [sp, #12]
-    1fae:      	add	r1, sp, #16
-    1fb0:      	strh	r0, [r1]
-    1fb2:      	add	r1, sp, #24
-    1fb4:      	strh	r0, [r1]
-    1fb6:      	add	r1, sp, #20
-    1fb8:      	strh	r0, [r1]
-    1fba:      	b	0x1fbc <cortex_m::peripheral::nvic::<impl cortex_m::peripheral::NVIC>::unmask::hc3067b709618d01d+0x18> @ imm = #-2
-    1fbc:      	b	0x1fbe <cortex_m::peripheral::nvic::<impl cortex_m::peripheral::NVIC>::unmask::hc3067b709618d01d+0x1a> @ imm = #-2
-    1fbe:      	ldr	r0, [sp, #12]
-    1fc0:      	uxth	r0, r0
-    1fc2:      	lsrs	r0, r0, #5
-    1fc4:      	bl	0x2308 <core::convert::num::<impl core::convert::From<u16> for usize>::from::h28b9c313de79db4d> @ imm = #832
-    1fc8:      	str	r0, [sp, #8]
-    1fca:      	b	0x1fcc <cortex_m::peripheral::nvic::<impl cortex_m::peripheral::NVIC>::unmask::hc3067b709618d01d+0x28> @ imm = #-2
-    1fcc:      	ldr	r0, [sp, #8]
-    1fce:      	cmp	r0, #15
-    1fd0:      	bhi	0x1ff2 <cortex_m::peripheral::nvic::<impl cortex_m::peripheral::NVIC>::unmask::hc3067b709618d01d+0x4e> @ imm = #30
-    1fd2:      	b	0x1fd4 <cortex_m::peripheral::nvic::<impl cortex_m::peripheral::NVIC>::unmask::hc3067b709618d01d+0x30> @ imm = #-2
-    1fd4:      	ldr	r1, [sp, #12]
-    1fd6:      	ldr	r0, [sp, #8]
-    1fd8:      	lsls	r0, r0, #2
-    1fda:      	ldr	r2, [pc, #76] <$d.1+0x6>
-    1fdc:      	adds	r0, r0, r2
-    1fde:      	str	r0, [sp]
-    1fe0:      	movs	r0, #31
-    1fe2:      	ands	r1, r0
-    1fe4:      	movs	r0, #1
-    1fe6:      	lsls	r0, r1
-    1fe8:      	str	r0, [sp, #4]
-    1fea:      	movs	r0, #0
-    1fec:      	cmp	r0, #0
-    1fee:      	bne	0x2012 <cortex_m::peripheral::nvic::<impl cortex_m::peripheral::NVIC>::unmask::hc3067b709618d01d+0x6e> @ imm = #32
-    1ff0:      	b	0x1ffe <cortex_m::peripheral::nvic::<impl cortex_m::peripheral::NVIC>::unmask::hc3067b709618d01d+0x5a> @ imm = #10
-    1ff2:      	ldr	r0, [sp, #8]
-    1ff4:      	ldr	r2, [pc, #44] <$d.1>
-    1ff6:      	movs	r1, #16
-    1ff8:      	bl	0x8574 <core::panicking::panic_bounds_check::h5d2fdbe20d7940cc> @ imm = #25976
-    1ffc:      	trap
-    1ffe:      	ldr	r1, [sp, #4]
-    2000:      	ldr	r0, [sp]
-    2002:      	str	r0, [sp, #28]
-    2004:      	str	r1, [sp, #32]
-    2006:      	str	r0, [sp, #36]
-    2008:      	str	r1, [sp, #40]
-    200a:      	str	r0, [sp, #44]
-    200c:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #24692
-    2010:      	b	0x201e <cortex_m::peripheral::nvic::<impl cortex_m::peripheral::NVIC>::unmask::hc3067b709618d01d+0x7a> @ imm = #10
-    2012:      	ldr	r0, [pc, #24] <$d.1+0xa>
-    2014:      	ldr	r2, [pc, #24] <$d.1+0xc>
-    2016:      	movs	r1, #35
-    2018:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #25900
-    201c:      	trap
-    201e:      	add	sp, #48
-    2020:      	pop	{r7, pc}
-    2022:      	mov	r8, r8
-
-00002024 <$d.1>:
-    2024:	74 ab 00 00	.word	0x0000ab74
-    2028:	00 e1 00 e0	.word	0xe000e100
-    202c:	a0 ab 00 00	.word	0x0000aba0
-    2030:	84 ab 00 00	.word	0x0000ab84
-
-00002034 <core::cmp::PartialEq::ne::h12c2ee69d5902ab8>:
-    2034:      	push	{r7, lr}
-    2036:      	add	r7, sp, #0
-    2038:      	sub	sp, #16
-    203a:      	str	r0, [sp, #8]
-    203c:      	str	r1, [sp, #12]
-    203e:      	bl	0x900 <<va108xx_hal::gpio::dynpins::DynOutput as core::cmp::PartialEq>::eq::hf1273109ef798499> @ imm = #-5954
-    2042:      	str	r0, [sp, #4]
-    2044:      	b	0x2046 <core::cmp::PartialEq::ne::h12c2ee69d5902ab8+0x12> @ imm = #-2
-    2046:      	ldr	r1, [sp, #4]
-    2048:      	movs	r0, #1
-    204a:      	bics	r0, r1
-    204c:      	add	sp, #16
-    204e:      	pop	{r7, pc}
-
-00002050 <core::cmp::PartialEq::ne::h7227460b38c673f8>:
-    2050:      	push	{r7, lr}
-    2052:      	add	r7, sp, #0
-    2054:      	sub	sp, #16
-    2056:      	str	r0, [sp, #8]
-    2058:      	str	r1, [sp, #12]
-    205a:      	bl	0x8d4 <<va108xx_hal::gpio::dynpins::DynInput as core::cmp::PartialEq>::eq::hf566ff60b6aa11fe> @ imm = #-6026
-    205e:      	str	r0, [sp, #4]
-    2060:      	b	0x2062 <core::cmp::PartialEq::ne::h7227460b38c673f8+0x12> @ imm = #-2
-    2062:      	ldr	r1, [sp, #4]
-    2064:      	movs	r0, #1
-    2066:      	bics	r0, r1
-    2068:      	add	sp, #16
-    206a:      	pop	{r7, pc}
-
-0000206c <<T as core::convert::Into<U>>::into::hdd9b7bd64a789ca4>:
-    206c:      	push	{r7, lr}
-    206e:      	add	r7, sp, #0
-    2070:      	sub	sp, #24
-    2072:      	add	r2, sp, #12
-    2074:      	strb	r0, [r2]
-    2076:      	strb	r1, [r2, #1]
-    2078:      	bl	0x1320 <<va108xx_hal::gpio::reg::ModeFields as core::convert::From<va108xx_hal::gpio::dynpins::DynPinMode>>::from::hff894586e60702b8> @ imm = #-3420
-    207c:      	add	r2, sp, #16
-    207e:      	strh	r1, [r2, #4]
-    2080:      	str	r0, [sp, #16]
-    2082:      	ldr	r0, [sp, #20]
-    2084:      	add	r1, sp, #4
-    2086:      	strh	r0, [r1, #4]
-    2088:      	ldr	r0, [sp, #16]
-    208a:      	str	r0, [sp, #4]
-    208c:      	b	0x208e <<T as core::convert::Into<U>>::into::hdd9b7bd64a789ca4+0x22> @ imm = #-2
-    208e:      	add	r1, sp, #4
-    2090:      	ldrb	r2, [r1]
-    2092:      	ldrb	r0, [r1, #1]
-    2094:      	lsls	r0, r0, #8
-    2096:      	adds	r2, r0, r2
-    2098:      	ldrb	r3, [r1, #2]
-    209a:      	ldrb	r0, [r1, #3]
-    209c:      	lsls	r0, r0, #8
-    209e:      	adds	r0, r0, r3
-    20a0:      	lsls	r0, r0, #16
-    20a2:      	adds	r0, r0, r2
-    20a4:      	ldrb	r2, [r1, #4]
-    20a6:      	ldrb	r1, [r1, #5]
-    20a8:      	lsls	r1, r1, #8
-    20aa:      	adds	r1, r1, r2
-    20ac:      	add	sp, #24
-    20ae:      	pop	{r7, pc}
-
-000020b0 <core::cmp::impls::<impl core::cmp::PartialOrd for u8>::lt::h4da20dd262713113>:
-    20b0:      	sub	sp, #20
-    20b2:      	str	r1, [sp]
-    20b4:      	mov	r1, r0
-    20b6:      	ldr	r0, [sp]
-    20b8:      	str	r1, [sp, #12]
-    20ba:      	str	r0, [sp, #16]
-    20bc:      	ldrb	r1, [r1]
-    20be:      	ldrb	r2, [r0]
-    20c0:      	movs	r0, #1
-    20c2:      	movs	r3, #0
-    20c4:      	str	r3, [sp, #4]
-    20c6:      	cmp	r1, r2
-    20c8:      	str	r0, [sp, #8]
-    20ca:      	blo	0x20d0 <core::cmp::impls::<impl core::cmp::PartialOrd for u8>::lt::h4da20dd262713113+0x20> @ imm = #2
-    20cc:      	ldr	r0, [sp, #4]
-    20ce:      	str	r0, [sp, #8]
-    20d0:      	ldr	r0, [sp, #8]
-    20d2:      	add	sp, #20
-    20d4:      	bx	lr
-
-000020d6 <cortex_m::interrupt::free::h8b922df7c3739139>:
-    20d6:      	push	{r7, lr}
-    20d8:      	add	r7, sp, #0
-    20da:      	sub	sp, #32
-    20dc:      	bl	0x2280 <cortex_m::register::primask::read::h57490d8e6c970e58> @ imm = #416
-    20e0:      	mov	r1, r0
-    20e2:      	str	r1, [sp, #8]
-    20e4:      	add	r1, sp, #24
-    20e6:      	strb	r0, [r1]
-    20e8:      	b	0x20ea <cortex_m::interrupt::free::h8b922df7c3739139+0x14> @ imm = #-2
-    20ea:      	bl	0x3f1c <cortex_m::interrupt::disable::h83274fbb50680f02> @ imm = #7726
-    20ee:      	b	0x20f0 <cortex_m::interrupt::free::h8b922df7c3739139+0x1a> @ imm = #-2
-    20f0:      	bl	0x80a4 <bare_metal::CriticalSection::new::h63eca2240f158320> @ imm = #24496
-    20f4:      	b	0x20f6 <cortex_m::interrupt::free::h8b922df7c3739139+0x20> @ imm = #-2
-    20f6:      	add	r0, sp, #16
-    20f8:      	str	r0, [sp, #12]
-    20fa:      	ldr	r0, [sp, #12]
-    20fc:      	bl	0x3e84 <va108xx::Peripherals::take::{{closure}}::hc7ddae64ac1c2daf> @ imm = #7556
-    2100:      	mov	r1, r0
-    2102:      	str	r1, [sp, #4]
-    2104:      	add	r1, sp, #28
-    2106:      	strb	r0, [r1]
-    2108:      	b	0x210a <cortex_m::interrupt::free::h8b922df7c3739139+0x34> @ imm = #-2
-    210a:      	ldr	r0, [sp, #8]
-    210c:      	movs	r1, #1
-    210e:      	ands	r0, r1
-    2110:      	bl	0x22b4 <cortex_m::register::primask::Primask::is_active::hef010744c521d8ca> @ imm = #416
-    2114:      	str	r0, [sp]
-    2116:      	b	0x2118 <cortex_m::interrupt::free::h8b922df7c3739139+0x42> @ imm = #-2
-    2118:      	ldr	r0, [sp]
-    211a:      	lsls	r0, r0, #31
-    211c:      	cmp	r0, #0
-    211e:      	bne	0x212c <cortex_m::interrupt::free::h8b922df7c3739139+0x56> @ imm = #10
-    2120:      	b	0x2122 <cortex_m::interrupt::free::h8b922df7c3739139+0x4c> @ imm = #-2
-    2122:      	ldr	r0, [sp, #4]
-    2124:      	movs	r1, #1
-    2126:      	ands	r0, r1
-    2128:      	add	sp, #32
-    212a:      	pop	{r7, pc}
-    212c:      	bl	0x3f10 <cortex_m::interrupt::enable::heed7eeac13e032d5> @ imm = #7648
-    2130:      	b	0x2122 <cortex_m::interrupt::free::h8b922df7c3739139+0x4c> @ imm = #-18
-
-00002132 <<va108xx_hal::spi::SpiConfig as core::default::Default>::default::h9c3f90f7944ae717>:
-    2132:      	push	{r4, r5, r7, lr}
-    2134:      	add	r7, sp, #8
-    2136:      	sub	sp, #32
-    2138:      	bl	0x578 <<u8 as core::default::Default>::default::hb2792f91b4560cc9> @ imm = #-7108
-    213c:      	str	r0, [sp, #20]
-    213e:      	b	0x2140 <<va108xx_hal::spi::SpiConfig as core::default::Default>::default::h9c3f90f7944ae717+0xe> @ imm = #-2
-    2140:      	bl	0x57c <<bool as core::default::Default>::default::h6ce1fdee60a85673> @ imm = #-7112
-    2144:      	str	r0, [sp, #16]
-    2146:      	b	0x2148 <<va108xx_hal::spi::SpiConfig as core::default::Default>::default::h9c3f90f7944ae717+0x16> @ imm = #-2
-    2148:      	bl	0x57c <<bool as core::default::Default>::default::h6ce1fdee60a85673> @ imm = #-7120
-    214c:      	str	r0, [sp, #12]
-    214e:      	b	0x2150 <<va108xx_hal::spi::SpiConfig as core::default::Default>::default::h9c3f90f7944ae717+0x1e> @ imm = #-2
-    2150:      	bl	0x57c <<bool as core::default::Default>::default::h6ce1fdee60a85673> @ imm = #-7128
-    2154:      	str	r0, [sp, #8]
-    2156:      	b	0x2158 <<va108xx_hal::spi::SpiConfig as core::default::Default>::default::h9c3f90f7944ae717+0x26> @ imm = #-2
-    2158:      	bl	0x57c <<bool as core::default::Default>::default::h6ce1fdee60a85673> @ imm = #-7136
-    215c:      	str	r0, [sp, #4]
-    215e:      	b	0x2160 <<va108xx_hal::spi::SpiConfig as core::default::Default>::default::h9c3f90f7944ae717+0x2e> @ imm = #-2
-    2160:      	ldr	r1, [sp, #4]
-    2162:      	ldr	r3, [sp, #8]
-    2164:      	ldr	r4, [sp, #12]
-    2166:      	ldr	r5, [sp, #16]
-    2168:      	ldr	r2, [sp, #20]
-    216a:      	add	r0, sp, #24
-    216c:      	strb	r2, [r0]
-    216e:      	movs	r2, #1
-    2170:      	ands	r5, r2
-    2172:      	strb	r5, [r0, #1]
-    2174:      	ands	r4, r2
-    2176:      	strb	r4, [r0, #2]
-    2178:      	ands	r3, r2
-    217a:      	strb	r3, [r0, #3]
-    217c:      	ands	r1, r2
-    217e:      	strb	r1, [r0, #4]
-    2180:      	ldrb	r2, [r0]
-    2182:      	ldrb	r1, [r0, #1]
-    2184:      	lsls	r1, r1, #8
-    2186:      	adds	r1, r1, r2
-    2188:      	ldrb	r2, [r0, #2]
-    218a:      	ldrb	r0, [r0, #3]
-    218c:      	lsls	r0, r0, #8
-    218e:      	adds	r0, r0, r2
-    2190:      	lsls	r0, r0, #16
-    2192:      	adds	r0, r0, r1
-    2194:      	ldr	r1, [sp, #28]
-    2196:      	add	sp, #32
-    2198:      	pop	{r4, r5, r7, pc}
-
-0000219a <<va108xx_hal::spi::HwChipSelectId as core::cmp::PartialEq>::eq::hca17dedfe36defa7>:
-    219a:      	sub	sp, #20
-    219c:      	str	r0, [sp, #4]
-    219e:      	str	r1, [sp, #8]
-    21a0:      	ldrb	r0, [r0]
-    21a2:      	str	r0, [sp, #12]
-    21a4:      	ldrb	r1, [r1]
-    21a6:      	str	r1, [sp, #16]
-    21a8:      	cmp	r0, r1
-    21aa:      	beq	0x21b6 <<va108xx_hal::spi::HwChipSelectId as core::cmp::PartialEq>::eq::hca17dedfe36defa7+0x1c> @ imm = #8
-    21ac:      	b	0x21ae <<va108xx_hal::spi::HwChipSelectId as core::cmp::PartialEq>::eq::hca17dedfe36defa7+0x14> @ imm = #-2
-    21ae:      	mov	r1, sp
-    21b0:      	movs	r0, #0
-    21b2:      	strb	r0, [r1]
-    21b4:      	b	0x21be <<va108xx_hal::spi::HwChipSelectId as core::cmp::PartialEq>::eq::hca17dedfe36defa7+0x24> @ imm = #6
-    21b6:      	mov	r1, sp
-    21b8:      	movs	r0, #1
-    21ba:      	strb	r0, [r1]
-    21bc:      	b	0x21be <<va108xx_hal::spi::HwChipSelectId as core::cmp::PartialEq>::eq::hca17dedfe36defa7+0x24> @ imm = #-2
-    21be:      	mov	r0, sp
-    21c0:      	ldrb	r0, [r0]
-    21c2:      	add	sp, #20
-    21c4:      	bx	lr
-
-000021c6 <core::iter::range::<impl core::iter::traits::iterator::Iterator for core::ops::range::Range<A>>::next::hdc3d7bd7b0883915>:
-    21c6:      	push	{r7, lr}
-    21c8:      	add	r7, sp, #0
-    21ca:      	sub	sp, #16
-    21cc:      	str	r0, [sp, #12]
-    21ce:      	bl	0x21f0 <<core::ops::range::Range<T> as core::iter::range::RangeIteratorImpl>::spec_next::hb15978e21b58101f> @ imm = #30
-    21d2:      	str	r0, [sp, #4]
-    21d4:      	str	r1, [sp, #8]
-    21d6:      	b	0x21d8 <core::iter::range::<impl core::iter::traits::iterator::Iterator for core::ops::range::Range<A>>::next::hdc3d7bd7b0883915+0x12> @ imm = #-2
-    21d8:      	ldr	r1, [sp, #8]
-    21da:      	ldr	r0, [sp, #4]
-    21dc:      	movs	r2, #1
-    21de:      	ands	r0, r2
-    21e0:      	add	sp, #16
-    21e2:      	pop	{r7, pc}
-
-000021e4 <<I as core::iter::traits::collect::IntoIterator>::into_iter::h394fa755b7de161a>:
-    21e4:      	sub	sp, #4
-    21e6:      	mov	r2, sp
-    21e8:      	strb	r0, [r2]
-    21ea:      	strb	r1, [r2, #1]
-    21ec:      	add	sp, #4
-    21ee:      	bx	lr
-
-000021f0 <<core::ops::range::Range<T> as core::iter::range::RangeIteratorImpl>::spec_next::hb15978e21b58101f>:
-    21f0:      	push	{r7, lr}
-    21f2:      	add	r7, sp, #0
-    21f4:      	sub	sp, #32
-    21f6:      	str	r0, [sp, #12]
-    21f8:      	str	r0, [sp, #24]
-    21fa:      	adds	r1, r0, #1
-    21fc:      	bl	0x20b0 <core::cmp::impls::<impl core::cmp::PartialOrd for u8>::lt::h4da20dd262713113> @ imm = #-336
-    2200:      	str	r0, [sp, #16]
-    2202:      	b	0x2204 <<core::ops::range::Range<T> as core::iter::range::RangeIteratorImpl>::spec_next::hb15978e21b58101f+0x14> @ imm = #-2
-    2204:      	ldr	r0, [sp, #16]
-    2206:      	lsls	r0, r0, #31
-    2208:      	cmp	r0, #0
-    220a:      	bne	0x2216 <<core::ops::range::Range<T> as core::iter::range::RangeIteratorImpl>::spec_next::hb15978e21b58101f+0x26> @ imm = #8
-    220c:      	b	0x220e <<core::ops::range::Range<T> as core::iter::range::RangeIteratorImpl>::spec_next::hb15978e21b58101f+0x1e> @ imm = #-2
-    220e:      	add	r1, sp, #20
-    2210:      	movs	r0, #0
-    2212:      	strb	r0, [r1]
-    2214:      	b	0x224a <<core::ops::range::Range<T> as core::iter::range::RangeIteratorImpl>::spec_next::hb15978e21b58101f+0x5a> @ imm = #50
-    2216:      	ldr	r0, [sp, #12]
-    2218:      	bl	0x291c <core::clone::impls::<impl core::clone::Clone for u8>::clone::h6bb3d3aae05167fd> @ imm = #1792
-    221c:      	str	r0, [sp, #8]
-    221e:      	b	0x2220 <<core::ops::range::Range<T> as core::iter::range::RangeIteratorImpl>::spec_next::hb15978e21b58101f+0x30> @ imm = #-2
-    2220:      	ldr	r0, [sp, #8]
-    2222:      	movs	r1, #1
-    2224:      	bl	0x2926 <<u8 as core::iter::range::Step>::forward_unchecked::ha7089e5e9cd111a0> @ imm = #1790
-    2228:      	mov	r1, r0
-    222a:      	str	r1, [sp, #4]
-    222c:      	add	r1, sp, #28
-    222e:      	strb	r0, [r1]
-    2230:      	b	0x2232 <<core::ops::range::Range<T> as core::iter::range::RangeIteratorImpl>::spec_next::hb15978e21b58101f+0x42> @ imm = #-2
-    2232:      	ldr	r1, [sp, #4]
-    2234:      	ldr	r0, [sp, #12]
-    2236:      	bl	0x2948 <core::mem::replace::hb90d3e73a8380ea5> @ imm = #1806
-    223a:      	str	r0, [sp]
-    223c:      	b	0x223e <<core::ops::range::Range<T> as core::iter::range::RangeIteratorImpl>::spec_next::hb15978e21b58101f+0x4e> @ imm = #-2
-    223e:      	ldr	r0, [sp]
-    2240:      	add	r1, sp, #20
-    2242:      	strb	r0, [r1, #1]
-    2244:      	movs	r0, #1
-    2246:      	strb	r0, [r1]
-    2248:      	b	0x224a <<core::ops::range::Range<T> as core::iter::range::RangeIteratorImpl>::spec_next::hb15978e21b58101f+0x5a> @ imm = #-2
-    224a:      	add	r1, sp, #20
-    224c:      	ldrb	r0, [r1]
-    224e:      	ldrb	r1, [r1, #1]
-    2250:      	add	sp, #32
-    2252:      	pop	{r7, pc}
-
-00002254 <<cortex_m::register::primask::Primask as core::cmp::PartialEq>::eq::h4e5c808e3efd1572>:
-    2254:      	sub	sp, #20
-    2256:      	str	r0, [sp, #4]
-    2258:      	str	r1, [sp, #8]
-    225a:      	ldrb	r0, [r0]
-    225c:      	str	r0, [sp, #12]
-    225e:      	ldrb	r1, [r1]
-    2260:      	str	r1, [sp, #16]
-    2262:      	cmp	r0, r1
-    2264:      	beq	0x2270 <<cortex_m::register::primask::Primask as core::cmp::PartialEq>::eq::h4e5c808e3efd1572+0x1c> @ imm = #8
-    2266:      	b	0x2268 <<cortex_m::register::primask::Primask as core::cmp::PartialEq>::eq::h4e5c808e3efd1572+0x14> @ imm = #-2
-    2268:      	mov	r1, sp
-    226a:      	movs	r0, #0
-    226c:      	strb	r0, [r1]
-    226e:      	b	0x2278 <<cortex_m::register::primask::Primask as core::cmp::PartialEq>::eq::h4e5c808e3efd1572+0x24> @ imm = #6
-    2270:      	mov	r1, sp
-    2272:      	movs	r0, #1
-    2274:      	strb	r0, [r1]
-    2276:      	b	0x2278 <<cortex_m::register::primask::Primask as core::cmp::PartialEq>::eq::h4e5c808e3efd1572+0x24> @ imm = #-2
-    2278:      	mov	r0, sp
-    227a:      	ldrb	r0, [r0]
-    227c:      	add	sp, #20
-    227e:      	bx	lr
-
-00002280 <cortex_m::register::primask::read::h57490d8e6c970e58>:
-    2280:      	push	{r7, lr}
-    2282:      	add	r7, sp, #0
-    2284:      	sub	sp, #16
-    2286:      	bl	0x809e <__primask_r>    @ imm = #24084
-    228a:      	mov	r1, r0
-    228c:      	str	r1, [sp, #4]
-    228e:      	str	r0, [sp, #12]
-    2290:      	b	0x2292 <cortex_m::register::primask::read::h57490d8e6c970e58+0x12> @ imm = #-2
-    2292:      	ldr	r0, [sp, #4]
-    2294:      	lsls	r0, r0, #31
-    2296:      	cmp	r0, #0
-    2298:      	bne	0x22a4 <cortex_m::register::primask::read::h57490d8e6c970e58+0x24> @ imm = #8
-    229a:      	b	0x229c <cortex_m::register::primask::read::h57490d8e6c970e58+0x1c> @ imm = #-2
-    229c:      	add	r1, sp, #8
-    229e:      	movs	r0, #0
-    22a0:      	strb	r0, [r1]
-    22a2:      	b	0x22ac <cortex_m::register::primask::read::h57490d8e6c970e58+0x2c> @ imm = #6
-    22a4:      	add	r1, sp, #8
-    22a6:      	movs	r0, #1
-    22a8:      	strb	r0, [r1]
-    22aa:      	b	0x22ac <cortex_m::register::primask::read::h57490d8e6c970e58+0x2c> @ imm = #-2
-    22ac:      	add	r0, sp, #8
-    22ae:      	ldrb	r0, [r0]
-    22b0:      	add	sp, #16
-    22b2:      	pop	{r7, pc}
-
-000022b4 <cortex_m::register::primask::Primask::is_active::hef010744c521d8ca>:
-    22b4:      	push	{r7, lr}
-    22b6:      	add	r7, sp, #0
-    22b8:      	sub	sp, #8
-    22ba:      	mov	r1, r0
-    22bc:      	add	r0, sp, #4
-    22be:      	strb	r1, [r0]
-    22c0:      	ldr	r1, [pc, #16] <$d.3>
-    22c2:      	bl	0x2254 <<cortex_m::register::primask::Primask as core::cmp::PartialEq>::eq::h4e5c808e3efd1572> @ imm = #-114
-    22c6:      	str	r0, [sp]
-    22c8:      	b	0x22ca <cortex_m::register::primask::Primask::is_active::hef010744c521d8ca+0x16> @ imm = #-2
-    22ca:      	ldr	r0, [sp]
-    22cc:      	movs	r1, #1
-    22ce:      	ands	r0, r1
-    22d0:      	add	sp, #8
-    22d2:      	pop	{r7, pc}
-
-000022d4 <$d.3>:
-    22d4:	c3 ab 00 00	.word	0x0000abc3
-
-000022d8 <core::slice::index::<impl core::ops::index::IndexMut<I> for [T]>::index_mut::h8f173158539a9526>:
-    22d8:      	push	{r4, r6, r7, lr}
-    22da:      	add	r7, sp, #8
-    22dc:      	sub	sp, #40
-    22de:      	str	r3, [sp, #8]
-    22e0:      	str	r2, [sp, #12]
-    22e2:      	mov	r3, r1
-    22e4:      	ldr	r1, [sp, #8]
-    22e6:      	mov	r2, r0
-    22e8:      	ldr	r0, [sp, #12]
-    22ea:      	ldr	r4, [r7, #8]
-    22ec:      	str	r2, [sp, #24]
-    22ee:      	str	r3, [sp, #28]
-    22f0:      	str	r0, [sp, #32]
-    22f2:      	str	r1, [sp, #36]
-    22f4:      	str	r4, [sp]
-    22f6:      	bl	0x7756 <<core::ops::range::Range<usize> as core::slice::index::SliceIndex<[T]>>::index_mut::hfef3f1dc8e845709> @ imm = #21596
-    22fa:      	str	r0, [sp, #16]
-    22fc:      	str	r1, [sp, #20]
-    22fe:      	b	0x2300 <core::slice::index::<impl core::ops::index::IndexMut<I> for [T]>::index_mut::h8f173158539a9526+0x28> @ imm = #-2
-    2300:      	ldr	r1, [sp, #20]
-    2302:      	ldr	r0, [sp, #16]
-    2304:      	add	sp, #40
-    2306:      	pop	{r4, r6, r7, pc}
-
-00002308 <core::convert::num::<impl core::convert::From<u16> for usize>::from::h28b9c313de79db4d>:
-    2308:      	sub	sp, #4
-    230a:      	mov	r1, sp
-    230c:      	strh	r0, [r1]
-    230e:      	uxth	r0, r0
-    2310:      	add	sp, #4
-    2312:      	bx	lr
-
-00002314 <va108xx::Peripherals::take::ha92527e0578e324a>:
-    2314:      	push	{r7, lr}
-    2316:      	add	r7, sp, #0
-    2318:      	sub	sp, #8
-    231a:      	bl	0x20d6 <cortex_m::interrupt::free::h8b922df7c3739139> @ imm = #-584
-    231e:      	str	r0, [sp, #4]
-    2320:      	b	0x2322 <va108xx::Peripherals::take::ha92527e0578e324a+0xe> @ imm = #-2
-    2322:      	ldr	r0, [sp, #4]
-    2324:      	movs	r1, #1
-    2326:      	ands	r0, r1
-    2328:      	add	sp, #8
-    232a:      	pop	{r7, pc}
-
-0000232c <va108xx::Peripherals::steal::he31672b3c4cae35f>:
-    232c:      	ldr	r1, [pc, #4] <$d.2>
-    232e:      	movs	r0, #1
-    2330:      	strb	r0, [r1]
-    2332:      	bx	lr
-
-00002334 <$d.2>:
-    2334:	34 04 00 10	.word	0x10000434
-
-00002338 <max11619_adc::spi_example_externally_clocked::h15806214a6134de1>:
-    2338:      	push	{r7, lr}
-    233a:      	add	r7, sp, #0
-    233c:      	sub	sp, #208
-    233e:      	str	r1, [sp, #36]
-    2340:      	ldr	r1, [r0, #8]
-    2342:      	str	r1, [sp, #100]
-    2344:      	ldr	r1, [r0, #4]
-    2346:      	str	r1, [sp, #96]
-    2348:      	ldr	r0, [r0]
-    234a:      	str	r0, [sp, #92]
-    234c:      	add	r0, sp, #64
-    234e:      	add	r1, sp, #92
-    2350:      	bl	0x604 <vorago_reb1::max11619::max11619_externally_clocked_no_wakeup::hbb67f13da68fa3e6> @ imm = #-7504
-    2354:      	b	0x2356 <max11619_adc::spi_example_externally_clocked::h15806214a6134de1+0x1e> @ imm = #-2
-    2356:      	ldr	r0, [pc, #268] <$d.1+0x2>
-    2358:      	str	r0, [sp]
-    235a:      	ldr	r2, [pc, #268] <$d.1+0x6>
-    235c:      	add	r0, sp, #40
-    235e:      	add	r1, sp, #64
-    2360:      	movs	r3, #50
-    2362:      	bl	0x254 <_ZN4core6result19Result$LT$T$C$E$GT$6expect17h8e7426d0ee999988E> @ imm = #-8466
-    2366:      	b	0x2368 <max11619_adc::spi_example_externally_clocked::h15806214a6134de1+0x30> @ imm = #-2
-    2368:      	ldr	r0, [pc, #256] <$d.1+0x8>
-    236a:      	ldr	r1, [pc, #260] <$d.1+0xe>
-    236c:      	bl	0x25ac <<max11619_adc::ReadMode as core::cmp::PartialEq>::eq::hcdd6ae1c48283f6e> @ imm = #572
-    2370:      	str	r0, [sp, #32]
-    2372:      	b	0x2374 <max11619_adc::spi_example_externally_clocked::h15806214a6134de1+0x3c> @ imm = #-2
-    2374:      	ldr	r0, [sp, #32]
-    2376:      	lsls	r0, r0, #31
-    2378:      	cmp	r0, #0
-    237a:      	bne	0x2396 <max11619_adc::spi_example_externally_clocked::h15806214a6134de1+0x5e> @ imm = #24
-    237c:      	b	0x237e <max11619_adc::spi_example_externally_clocked::h15806214a6134de1+0x46> @ imm = #-2
-    237e:      	movs	r0, #0
-    2380:      	str	r0, [sp, #28]
-    2382:      	str	r0, [sp, #140]
-    2384:      	str	r0, [sp, #136]
-    2386:      	str	r0, [sp, #132]
-    2388:      	str	r0, [sp, #128]
-    238a:      	str	r0, [sp, #124]
-    238c:      	str	r0, [sp, #120]
-    238e:      	str	r0, [sp, #116]
-    2390:      	str	r0, [sp, #112]
-    2392:      	str	r0, [sp, #144]
-    2394:      	b	0x23c0 <max11619_adc::spi_example_externally_clocked::h15806214a6134de1+0x88> @ imm = #40
-    2396:      	add	r1, sp, #104
-    2398:      	movs	r0, #4
-    239a:      	strb	r0, [r1]
-    239c:      	add	r1, sp, #108
-    239e:      	movs	r0, #0
-    23a0:      	strb	r0, [r1]
-    23a2:      	ldr	r2, [sp, #108]
-    23a4:      	ldr	r1, [sp, #104]
-    23a6:      	add	r0, sp, #40
-    23a8:      	bl	0x1df8 <max116xx_10bit::Max116xx10Bit<SPI,CS,CLOCKED,WAKEUP>::averaging::hf5140e705eb13cdf> @ imm = #-1460
-    23ac:      	uxtb	r0, r0
-    23ae:      	str	r0, [sp, #24]
-    23b0:      	b	0x23b2 <max11619_adc::spi_example_externally_clocked::h15806214a6134de1+0x7a> @ imm = #-2
-    23b2:      	ldr	r0, [sp, #24]
-    23b4:      	ldr	r1, [pc, #188] <$d.1+0x10>
-    23b6:      	ldr	r3, [pc, #192] <$d.1+0x16>
-    23b8:      	movs	r2, #35
-    23ba:      	bl	0x1d4 <_ZN4core6result19Result$LT$T$C$E$GT$6expect17h72221175f5037eceE> @ imm = #-8682
-    23be:      	b	0x237e <max11619_adc::spi_example_externally_clocked::h15806214a6134de1+0x46> @ imm = #-68
-    23c0:      	add	r0, sp, #144
-    23c2:      	str	r0, [sp, #180]
-    23c4:      	ldr	r0, [sp, #180]
-    23c6:      	str	r0, [sp, #204]
-    23c8:      	ldr	r1, [pc, #176] <$d.1+0x18>
-    23ca:      	bl	0x3ee6 <core::fmt::ArgumentV1::new::ha424a5ef5705fb6b> @ imm = #6936
-    23ce:      	str	r0, [sp, #16]
-    23d0:      	str	r1, [sp, #20]
-    23d2:      	b	0x23d4 <max11619_adc::spi_example_externally_clocked::h15806214a6134de1+0x9c> @ imm = #-2
-    23d4:      	ldr	r0, [sp, #20]
-    23d6:      	ldr	r1, [sp, #16]
-    23d8:      	str	r1, [sp, #172]
-    23da:      	str	r0, [sp, #176]
-    23dc:      	movs	r0, #1
-    23de:      	str	r0, [sp]
-    23e0:      	ldr	r1, [pc, #156] <$d.1+0x1c>
-    23e2:      	add	r0, sp, #148
-    23e4:      	movs	r2, #2
-    23e6:      	add	r3, sp, #172
-    23e8:      	bl	0x848 <core::fmt::Arguments::new_v1::h2fca5f745a17c9bb> @ imm = #-7076
-    23ec:      	b	0x23ee <max11619_adc::spi_example_externally_clocked::h15806214a6134de1+0xb6> @ imm = #-2
-    23ee:      	movs	r0, #0
-    23f0:      	add	r1, sp, #148
-    23f2:      	bl	0x7d8e <rtt_target::print::print_impl::write_fmt::h2608b8473bd2efde> @ imm = #22936
-    23f6:      	b	0x23f8 <max11619_adc::spi_example_externally_clocked::h15806214a6134de1+0xc0> @ imm = #-2
-    23f8:      	movs	r0, #0
-    23fa:      	str	r0, [sp, #188]
-    23fc:      	str	r0, [sp, #184]
-    23fe:      	add	r0, sp, #112
-    2400:      	str	r0, [sp, #12]
-    2402:      	add	r0, sp, #184
-    2404:      	movs	r1, #4
-    2406:      	bl	0x64e4 <core::slice::<impl [T]>::iter_mut::h62d5d54f7427be8c> @ imm = #16602
-    240a:      	str	r1, [sp, #196]
-    240c:      	str	r0, [sp, #192]
-    240e:      	b	0x2410 <max11619_adc::spi_example_externally_clocked::h15806214a6134de1+0xd8> @ imm = #-2
-    2410:      	ldr	r1, [sp, #12]
-    2412:      	movs	r0, #3
-    2414:      	str	r0, [sp]
-    2416:      	add	r0, sp, #40
-    2418:      	movs	r2, #32
-    241a:      	add	r3, sp, #192
-    241c:      	bl	0x1498 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::h95ec57d91a5a773d> @ imm = #-3976
-    2420:      	uxtb	r0, r0
-    2422:      	str	r0, [sp, #8]
-    2424:      	b	0x2426 <max11619_adc::spi_example_externally_clocked::h15806214a6134de1+0xee> @ imm = #-2
-    2426:      	ldr	r0, [sp, #8]
-    2428:      	ldr	r1, [pc, #88] <$d.1+0x20>
-    242a:      	ldr	r3, [pc, #92] <$d.1+0x26>
-    242c:      	movs	r2, #25
-    242e:      	bl	0x1d4 <_ZN4core6result19Result$LT$T$C$E$GT$6expect17h72221175f5037eceE> @ imm = #-8798
-    2432:      	b	0x2434 <max11619_adc::spi_example_externally_clocked::h15806214a6134de1+0xfc> @ imm = #-2
-    2434:      	add	r0, sp, #184
-    2436:      	bl	0x2494 <max11619_adc::print_res_buf::h4d44be5e2b1708fc> @ imm = #90
-    243a:      	b	0x243c <max11619_adc::spi_example_externally_clocked::h15806214a6134de1+0x104> @ imm = #-2
-    243c:      	ldr	r1, [sp, #144]
-    243e:      	adds	r0, r1, #1
-    2440:      	str	r0, [sp, #4]
-    2442:      	cmp	r0, r1
-    2444:      	bvs	0x2458 <max11619_adc::spi_example_externally_clocked::h15806214a6134de1+0x120> @ imm = #16
-    2446:      	b	0x2448 <max11619_adc::spi_example_externally_clocked::h15806214a6134de1+0x110> @ imm = #-2
-    2448:      	ldr	r0, [sp, #36]
-    244a:      	ldr	r1, [sp, #4]
-    244c:      	str	r1, [sp, #144]
-    244e:      	movs	r1, #125
-    2450:      	lsls	r1, r1, #2
-    2452:      	bl	0x5f40 <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h1970e35c5cf06a9d> @ imm = #15082
-    2456:      	b	0x23c0 <max11619_adc::spi_example_externally_clocked::h15806214a6134de1+0x88> @ imm = #-154
-    2458:      	ldr	r0, [pc, #48] <$d.1+0x28>
-    245a:      	ldr	r2, [pc, #52] <$d.1+0x2e>
-    245c:      	movs	r1, #28
-    245e:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #24806
-    2462:      	trap
-
-00002464 <$d.1>:
-    2464:	20 ac 00 00	.word	0x0000ac20
-    2468:	c4 ab 00 00	.word	0x0000abc4
-    246c:	30 ac 00 00	.word	0x0000ac30
-    2470:	31 ac 00 00	.word	0x0000ac31
-    2474:	32 ac 00 00	.word	0x0000ac32
-    2478:	58 ac 00 00	.word	0x0000ac58
-    247c:	81 a0 00 00	.word	0x0000a081
-    2480:	88 ac 00 00	.word	0x0000ac88
-    2484:	98 ac 00 00	.word	0x0000ac98
-    2488:	b4 ac 00 00	.word	0x0000acb4
-    248c:	e0 ac 00 00	.word	0x0000ace0
-    2490:	c4 ac 00 00	.word	0x0000acc4
-
-00002494 <max11619_adc::print_res_buf::h4d44be5e2b1708fc>:
-    2494:      	push	{r7, lr}
-    2496:      	add	r7, sp, #0
-    2498:      	sub	sp, #208
-    249a:      	str	r0, [sp, #40]
-    249c:      	str	r0, [sp, #188]
-    249e:      	ldr	r1, [pc, #244] <$d.3+0x2>
-    24a0:      	movs	r0, #0
-    24a2:      	movs	r2, #32
-    24a4:      	bl	0x7d3c <rtt_target::print::print_impl::write_str::hd99d580f704d1205> @ imm = #22676
-    24a8:      	b	0x24aa <max11619_adc::print_res_buf::h4d44be5e2b1708fc+0x16> @ imm = #-2
-    24aa:      	ldr	r0, [sp, #40]
-    24ac:      	str	r0, [sp, #76]
-    24ae:      	ldr	r0, [sp, #76]
-    24b0:      	str	r0, [sp, #192]
-    24b2:      	ldr	r1, [pc, #228] <$d.3+0x6>
-    24b4:      	bl	0x3ebc <core::fmt::ArgumentV1::new::h5ff66f722db734a4> @ imm = #6660
-    24b8:      	str	r0, [sp, #32]
-    24ba:      	str	r1, [sp, #36]
-    24bc:      	b	0x24be <max11619_adc::print_res_buf::h4d44be5e2b1708fc+0x2a> @ imm = #-2
-    24be:      	ldr	r0, [sp, #36]
-    24c0:      	ldr	r1, [sp, #32]
-    24c2:      	str	r1, [sp, #68]
-    24c4:      	str	r0, [sp, #72]
-    24c6:      	movs	r0, #1
-    24c8:      	str	r0, [sp]
-    24ca:      	ldr	r1, [pc, #208] <$d.3+0xa>
-    24cc:      	add	r0, sp, #44
-    24ce:      	movs	r2, #2
-    24d0:      	add	r3, sp, #68
-    24d2:      	bl	0x848 <core::fmt::Arguments::new_v1::h2fca5f745a17c9bb> @ imm = #-7310
-    24d6:      	b	0x24d8 <max11619_adc::print_res_buf::h4d44be5e2b1708fc+0x44> @ imm = #-2
-    24d8:      	movs	r0, #0
-    24da:      	add	r1, sp, #44
-    24dc:      	bl	0x7d8e <rtt_target::print::print_impl::write_fmt::h2608b8473bd2efde> @ imm = #22702
-    24e0:      	b	0x24e2 <max11619_adc::print_res_buf::h4d44be5e2b1708fc+0x4e> @ imm = #-2
-    24e2:      	ldr	r0, [sp, #40]
-    24e4:      	adds	r0, r0, #2
-    24e6:      	str	r0, [sp, #112]
-    24e8:      	ldr	r0, [sp, #112]
-    24ea:      	str	r0, [sp, #196]
-    24ec:      	ldr	r1, [pc, #168] <$d.3+0x4>
-    24ee:      	bl	0x3ebc <core::fmt::ArgumentV1::new::h5ff66f722db734a4> @ imm = #6602
-    24f2:      	str	r0, [sp, #24]
-    24f4:      	str	r1, [sp, #28]
-    24f6:      	b	0x24f8 <max11619_adc::print_res_buf::h4d44be5e2b1708fc+0x64> @ imm = #-2
-    24f8:      	ldr	r0, [sp, #28]
-    24fa:      	ldr	r1, [sp, #24]
-    24fc:      	str	r1, [sp, #104]
-    24fe:      	str	r0, [sp, #108]
-    2500:      	movs	r0, #1
-    2502:      	str	r0, [sp]
-    2504:      	ldr	r1, [pc, #152] <$d.3+0xc>
-    2506:      	add	r0, sp, #80
-    2508:      	movs	r2, #2
-    250a:      	add	r3, sp, #104
-    250c:      	bl	0x848 <core::fmt::Arguments::new_v1::h2fca5f745a17c9bb> @ imm = #-7368
-    2510:      	b	0x2512 <max11619_adc::print_res_buf::h4d44be5e2b1708fc+0x7e> @ imm = #-2
-    2512:      	movs	r0, #0
-    2514:      	add	r1, sp, #80
-    2516:      	bl	0x7d8e <rtt_target::print::print_impl::write_fmt::h2608b8473bd2efde> @ imm = #22644
-    251a:      	b	0x251c <max11619_adc::print_res_buf::h4d44be5e2b1708fc+0x88> @ imm = #-2
-    251c:      	ldr	r0, [sp, #40]
-    251e:      	adds	r0, r0, #4
-    2520:      	str	r0, [sp, #148]
-    2522:      	ldr	r0, [sp, #148]
-    2524:      	str	r0, [sp, #200]
-    2526:      	ldr	r1, [pc, #112] <$d.3+0x6>
-    2528:      	bl	0x3ebc <core::fmt::ArgumentV1::new::h5ff66f722db734a4> @ imm = #6544
-    252c:      	str	r0, [sp, #16]
-    252e:      	str	r1, [sp, #20]
-    2530:      	b	0x2532 <max11619_adc::print_res_buf::h4d44be5e2b1708fc+0x9e> @ imm = #-2
-    2532:      	ldr	r0, [sp, #20]
-    2534:      	ldr	r1, [sp, #16]
-    2536:      	str	r1, [sp, #140]
-    2538:      	str	r0, [sp, #144]
-    253a:      	movs	r0, #1
-    253c:      	str	r0, [sp]
-    253e:      	ldr	r1, [pc, #100] <$d.3+0x12>
-    2540:      	add	r0, sp, #116
-    2542:      	movs	r2, #2
-    2544:      	add	r3, sp, #140
-    2546:      	bl	0x848 <core::fmt::Arguments::new_v1::h2fca5f745a17c9bb> @ imm = #-7426
-    254a:      	b	0x254c <max11619_adc::print_res_buf::h4d44be5e2b1708fc+0xb8> @ imm = #-2
-    254c:      	movs	r0, #0
-    254e:      	add	r1, sp, #116
-    2550:      	bl	0x7d8e <rtt_target::print::print_impl::write_fmt::h2608b8473bd2efde> @ imm = #22586
-    2554:      	b	0x2556 <max11619_adc::print_res_buf::h4d44be5e2b1708fc+0xc2> @ imm = #-2
-    2556:      	ldr	r0, [sp, #40]
-    2558:      	adds	r0, r0, #6
-    255a:      	str	r0, [sp, #184]
-    255c:      	ldr	r0, [sp, #184]
-    255e:      	str	r0, [sp, #204]
-    2560:      	ldr	r1, [pc, #52] <$d.3+0x4>
-    2562:      	bl	0x3ebc <core::fmt::ArgumentV1::new::h5ff66f722db734a4> @ imm = #6486
-    2566:      	str	r0, [sp, #8]
-    2568:      	str	r1, [sp, #12]
-    256a:      	b	0x256c <max11619_adc::print_res_buf::h4d44be5e2b1708fc+0xd8> @ imm = #-2
-    256c:      	ldr	r0, [sp, #12]
-    256e:      	ldr	r1, [sp, #8]
-    2570:      	str	r1, [sp, #176]
-    2572:      	str	r0, [sp, #180]
-    2574:      	movs	r0, #1
-    2576:      	str	r0, [sp]
-    2578:      	ldr	r1, [pc, #44] <$d.3+0x14>
-    257a:      	add	r0, sp, #152
-    257c:      	movs	r2, #2
-    257e:      	add	r3, sp, #176
-    2580:      	bl	0x848 <core::fmt::Arguments::new_v1::h2fca5f745a17c9bb> @ imm = #-7484
-    2584:      	b	0x2586 <max11619_adc::print_res_buf::h4d44be5e2b1708fc+0xf2> @ imm = #-2
-    2586:      	movs	r0, #0
-    2588:      	add	r1, sp, #152
-    258a:      	bl	0x7d8e <rtt_target::print::print_impl::write_fmt::h2608b8473bd2efde> @ imm = #22528
-    258e:      	b	0x2590 <max11619_adc::print_res_buf::h4d44be5e2b1708fc+0xfc> @ imm = #-2
-    2590:      	add	sp, #208
-    2592:      	pop	{r7, pc}
-
-00002594 <$d.3>:
-    2594:	3c ad 00 00	.word	0x0000ad3c
-    2598:	a5 9f 00 00	.word	0x00009fa5
-    259c:	8c ad 00 00	.word	0x0000ad8c
-    25a0:	a8 ad 00 00	.word	0x0000ada8
-    25a4:	c4 ad 00 00	.word	0x0000adc4
-    25a8:	f0 ad 00 00	.word	0x0000adf0
-
-000025ac <<max11619_adc::ReadMode as core::cmp::PartialEq>::eq::hcdd6ae1c48283f6e>:
-    25ac:      	sub	sp, #20
-    25ae:      	str	r0, [sp, #4]
-    25b0:      	str	r1, [sp, #8]
-    25b2:      	ldrb	r0, [r0]
-    25b4:      	str	r0, [sp, #12]
-    25b6:      	ldrb	r1, [r1]
-    25b8:      	str	r1, [sp, #16]
-    25ba:      	cmp	r0, r1
-    25bc:      	beq	0x25c8 <<max11619_adc::ReadMode as core::cmp::PartialEq>::eq::hcdd6ae1c48283f6e+0x1c> @ imm = #8
-    25be:      	b	0x25c0 <<max11619_adc::ReadMode as core::cmp::PartialEq>::eq::hcdd6ae1c48283f6e+0x14> @ imm = #-2
-    25c0:      	mov	r1, sp
-    25c2:      	movs	r0, #0
-    25c4:      	strb	r0, [r1]
-    25c6:      	b	0x25d0 <<max11619_adc::ReadMode as core::cmp::PartialEq>::eq::hcdd6ae1c48283f6e+0x24> @ imm = #6
-    25c8:      	mov	r1, sp
-    25ca:      	movs	r0, #1
-    25cc:      	strb	r0, [r1]
-    25ce:      	b	0x25d0 <<max11619_adc::ReadMode as core::cmp::PartialEq>::eq::hcdd6ae1c48283f6e+0x24> @ imm = #-2
-    25d0:      	mov	r0, sp
-    25d2:      	ldrb	r0, [r0]
-    25d4:      	add	sp, #20
-    25d6:      	bx	lr
-
-000025d8 <<max11619_adc::MuxMode as core::cmp::PartialEq>::eq::h006170e8ec71acde>:
-    25d8:      	sub	sp, #20
-    25da:      	str	r0, [sp, #4]
-    25dc:      	str	r1, [sp, #8]
-    25de:      	ldrb	r0, [r0]
-    25e0:      	str	r0, [sp, #12]
-    25e2:      	ldrb	r1, [r1]
-    25e4:      	str	r1, [sp, #16]
-    25e6:      	cmp	r0, r1
-    25e8:      	beq	0x25f4 <<max11619_adc::MuxMode as core::cmp::PartialEq>::eq::h006170e8ec71acde+0x1c> @ imm = #8
-    25ea:      	b	0x25ec <<max11619_adc::MuxMode as core::cmp::PartialEq>::eq::h006170e8ec71acde+0x14> @ imm = #-2
-    25ec:      	mov	r1, sp
-    25ee:      	movs	r0, #0
-    25f0:      	strb	r0, [r1]
-    25f2:      	b	0x25fc <<max11619_adc::MuxMode as core::cmp::PartialEq>::eq::h006170e8ec71acde+0x24> @ imm = #6
-    25f4:      	mov	r1, sp
-    25f6:      	movs	r0, #1
-    25f8:      	strb	r0, [r1]
-    25fa:      	b	0x25fc <<max11619_adc::MuxMode as core::cmp::PartialEq>::eq::h006170e8ec71acde+0x24> @ imm = #-2
-    25fc:      	mov	r0, sp
-    25fe:      	ldrb	r0, [r0]
-    2600:      	add	sp, #20
-    2602:      	bx	lr
-
-00002604 <main>:
-    2604:      	push	{r7, lr}
-    2606:      	add	r7, sp, #0
-    2608:      	bl	0x2610 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f> @ imm = #4
-    260c:      	trap
-    260e:      	bmi	0x25ba <<max11619_adc::ReadMode as core::cmp::PartialEq>::eq::hcdd6ae1c48283f6e+0xe> @ imm = #-88
-
-00002610 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f>:
-    2610:      	push	{r7, lr}
-    2612:      	add	r7, sp, #0
-    2614:      	sub	sp, #416
-    2616:      	ldr	r0, [pc, #712] <$d.8+0x2>
-    2618:      	str	r0, [sp, #388]
-    261a:      	b	0x261c <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0xc> @ imm = #-2
-    261c:      	ldr	r0, [pc, #704] <$d.8>
-    261e:      	movs	r1, #0
-    2620:      	movs	r2, #1
-    2622:      	bl	0x580 <core::intrinsics::write_bytes::he9556dc6ad4a2fb1> @ imm = #-8358
-    2626:      	b	0x2628 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x18> @ imm = #-2
-    2628:      	ldr	r0, [pc, #692] <$d.8>
-    262a:      	str	r0, [sp, #392]
-    262c:      	b	0x262e <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x1e> @ imm = #-2
-    262e:      	ldr	r0, [pc, #688] <$d.8+0x2>
-    2630:      	str	r0, [sp, #368]
-    2632:      	movs	r0, #0
-    2634:      	str	r0, [sp, #92]
-    2636:      	b	0x2638 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x28> @ imm = #-2
-    2638:      	ldr	r1, [pc, #680] <$d.8+0x4>
-    263a:      	str	r1, [sp, #400]
-    263c:      	movs	r0, #9
-    263e:      	str	r0, [sp, #404]
-    2640:      	str	r1, [sp, #408]
-    2642:      	str	r0, [sp, #412]
-    2644:      	ldr	r0, [sp, #408]
-    2646:      	str	r0, [sp, #80]
-    2648:      	ldr	r0, [sp, #412]
-    264a:      	str	r0, [sp, #84]
-    264c:      	b	0x264e <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x3e> @ imm = #-2
-    264e:      	ldr	r1, [sp, #84]
-    2650:      	ldr	r0, [sp, #80]
-    2652:      	bl	0x8198 <core::slice::<impl [T]>::as_ptr::had785fb836f3ca27> @ imm = #23362
-    2656:      	str	r0, [sp, #76]
-    2658:      	b	0x265a <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x4a> @ imm = #-2
-    265a:      	ldr	r0, [sp, #76]
-    265c:      	str	r0, [sp, #92]
-    265e:      	movs	r0, #0
-    2660:      	str	r0, [sp, #96]
-    2662:      	ldr	r0, [pc, #636] <$d.8+0x2>
-    2664:      	adds	r0, #24
-    2666:      	str	r0, [sp, #64]
-    2668:      	ldr	r0, [sp, #92]
-    266a:      	str	r0, [sp, #68]
-    266c:      	ldr	r0, [sp, #96]
-    266e:      	str	r0, [sp, #72]
-    2670:      	ldr	r0, [pc, #628] <$d.8+0x8>
-    2672:      	str	r0, [sp, #396]
-    2674:      	b	0x2676 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x66> @ imm = #-2
-    2676:      	ldr	r2, [sp, #72]
-    2678:      	ldr	r1, [sp, #68]
-    267a:      	ldr	r0, [sp, #64]
-    267c:      	ldr	r3, [pc, #616] <$d.8+0x8>
-    267e:      	movs	r4, #1
-    2680:      	lsls	r4, r4, #10
-    2682:      	str	r4, [sp]
-    2684:      	bl	0x67aa <rtt_target::rtt::RttChannel::init::hfbd2ce9862242f9a> @ imm = #16674
-    2688:      	b	0x268a <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x7a> @ imm = #-2
-    268a:      	ldr	r0, [pc, #596] <$d.8+0x2>
-    268c:      	movs	r1, #1
-    268e:      	movs	r2, #0
-    2690:      	bl	0x6720 <rtt_target::rtt::RttHeader::init::haebaef83091ee026> @ imm = #16524
-    2694:      	b	0x2696 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x86> @ imm = #-2
-    2696:      	ldr	r0, [pc, #584] <$d.8+0x2>
-    2698:      	adds	r0, #24
-    269a:      	bl	0x73a0 <rtt_target::UpChannel::new::hd7d8c3674c76046c> @ imm = #19714
-    269e:      	str	r0, [sp, #60]
-    26a0:      	b	0x26a2 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x92> @ imm = #-2
-    26a2:      	ldr	r0, [sp, #60]
-    26a4:      	str	r0, [sp, #100]
-    26a6:      	ldr	r0, [sp, #100]
-    26a8:      	str	r0, [sp, #88]
-    26aa:      	ldr	r0, [sp, #88]
-    26ac:      	bl	0x7088 <rtt_target::print::set_print_channel::h74df2f304ed931f0> @ imm = #18904
-    26b0:      	b	0x26b2 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0xa2> @ imm = #-2
-    26b2:      	ldr	r1, [pc, #568] <$d.8+0xe>
-    26b4:      	movs	r0, #0
-    26b6:      	movs	r2, #25
-    26b8:      	bl	0x7d3c <rtt_target::print::print_impl::write_str::hd99d580f704d1205> @ imm = #22144
-    26bc:      	b	0x26be <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0xae> @ imm = #-2
-    26be:      	bl	0x2314 <va108xx::Peripherals::take::ha92527e0578e324a> @ imm = #-942
-    26c2:      	str	r0, [sp, #56]
-    26c4:      	b	0x26c6 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0xb6> @ imm = #-2
-    26c6:      	ldr	r0, [sp, #56]
-    26c8:      	movs	r1, #1
-    26ca:      	ands	r0, r1
-    26cc:      	ldr	r1, [pc, #544] <$d.8+0x10>
-    26ce:      	bl	0xac0 <core::option::Option<T>::unwrap::h4a61a13bc106e812> @ imm = #-7186
-    26d2:      	b	0x26d4 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0xc4> @ imm = #-2
-    26d4:      	add	r0, sp, #104
-    26d6:      	str	r0, [sp, #44]
-    26d8:      	str	r0, [sp, #48]
-    26da:      	movs	r0, #50
-    26dc:      	bl	0x5440 <<u32 as va108xx_hal::time::U32Ext>::mhz::ha624057da36f1de9> @ imm = #11616
-    26e0:      	str	r0, [sp, #52]
-    26e2:      	b	0x26e4 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0xd4> @ imm = #-2
-    26e4:      	ldr	r0, [sp, #52]
-    26e6:      	bl	0x108 <<T as core::convert::Into<U>>::into::hc185e8b6b339f934> @ imm = #-9698
-    26ea:      	str	r0, [sp, #40]
-    26ec:      	b	0x26ee <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0xde> @ imm = #-2
-    26ee:      	ldr	r3, [sp, #40]
-    26f0:      	ldr	r2, [sp, #44]
-    26f2:      	ldr	r1, [sp, #48]
-    26f4:      	add	r4, sp, #128
-    26f6:      	movs	r0, #0
-    26f8:      	strh	r0, [r4]
-    26fa:      	ldr	r0, [sp, #128]
-    26fc:      	str	r0, [sp]
-    26fe:      	add	r0, sp, #108
-    2700:      	bl	0x5e24 <va108xx_hal::timer::set_up_ms_timer::h5f530a05457f7283> @ imm = #14112
-    2704:      	b	0x2706 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0xf6> @ imm = #-2
-    2706:      	add	r2, sp, #108
-    2708:      	add	r1, sp, #152
-    270a:      	mov	r0, r1
-    270c:      	ldm	r2!, {r3, r4}
-    270e:      	stm	r0!, {r3, r4}
-    2710:      	ldm	r2!, {r3, r4, r5}
-    2712:      	stm	r0!, {r3, r4, r5}
-    2714:      	add	r0, sp, #132
-    2716:      	bl	0x5f20 <va108xx_hal::timer::Delay::new::hd4c264914bb7202d> @ imm = #14342
-    271a:      	b	0x271c <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x10c> @ imm = #-2
-    271c:      	add	r1, sp, #172
-    271e:      	movs	r0, #0
-    2720:      	strh	r0, [r1]
-    2722:      	ldr	r0, [sp, #172]
-    2724:      	bl	0x1fa4 <cortex_m::peripheral::nvic::<impl cortex_m::peripheral::NVIC>::unmask::hc3067b709618d01d> @ imm = #-1924
-    2728:      	b	0x272a <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x11a> @ imm = #-2
-    272a:      	add	r0, sp, #176
-    272c:      	movs	r1, #0
-    272e:      	strb	r1, [r0]
-    2730:      	ldrb	r1, [r0]
-    2732:      	add	r0, sp, #104
-    2734:      	bl	0x714 <va108xx_hal::gpio::pins::PinsA::new::h2626fe2f1b4e3e70> @ imm = #-8228
-    2738:      	add	r1, sp, #372
-    273a:      	strb	r0, [r1]
-    273c:      	b	0x273e <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x12e> @ imm = #-2
-    273e:      	bl	0x2132 <<va108xx_hal::spi::SpiConfig as core::default::Default>::default::h9c3f90f7944ae717> @ imm = #-1552
-    2742:      	add	r2, sp, #376
-    2744:      	strb	r1, [r2, #4]
-    2746:      	str	r0, [sp, #376]
-    2748:      	ldr	r0, [sp, #380]
-    274a:      	add	r1, sp, #180
-    274c:      	strb	r0, [r1, #4]
-    274e:      	ldr	r0, [sp, #376]
-    2750:      	str	r0, [sp, #180]
-    2752:      	b	0x2754 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x144> @ imm = #-2
-    2754:      	bl	0x39ac <va108xx_hal::gpio::pins::Pin<I,M>::into_funsel_2::hb3502de63b7504d6> @ imm = #4692
-    2758:      	b	0x275a <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x14a> @ imm = #-2
-    275a:      	bl	0x39bc <va108xx_hal::gpio::pins::Pin<I,M>::into_funsel_2::hb6b6f05d866f4280> @ imm = #4702
-    275e:      	b	0x2760 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x150> @ imm = #-2
-    2760:      	bl	0x39cc <va108xx_hal::gpio::pins::Pin<I,M>::into_funsel_2::hc536568bbe92e143> @ imm = #4712
-    2764:      	b	0x2766 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x156> @ imm = #-2
-    2766:      	ldr	r1, [pc, #396] <$d.8+0x16>
-    2768:      	mov	r0, r1
-    276a:      	bl	0x25d8 <<max11619_adc::MuxMode as core::cmp::PartialEq>::eq::h006170e8ec71acde> @ imm = #-406
-    276e:      	str	r0, [sp, #36]
-    2770:      	b	0x2772 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x162> @ imm = #-2
-    2772:      	ldr	r0, [sp, #36]
-    2774:      	lsls	r0, r0, #31
-    2776:      	cmp	r0, #0
-    2778:      	bne	0x2782 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x172> @ imm = #6
-    277a:      	b	0x277c <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x16c> @ imm = #-2
-    277c:      	bl	0x39dc <va108xx_hal::gpio::pins::Pin<I,M>::into_push_pull_output::h8f79fda99918b686> @ imm = #4700
-    2780:      	b	0x2812 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x202> @ imm = #142
-    2782:      	add	r0, sp, #188
-    2784:      	movs	r1, #1
-    2786:      	strb	r1, [r0]
-    2788:      	add	r2, sp, #192
-    278a:      	strb	r1, [r2]
-    278c:      	ldrb	r1, [r0]
-    278e:      	ldr	r3, [sp, #192]
-    2790:      	add	r0, sp, #104
-    2792:      	movs	r2, #19
-    2794:      	bl	0x5fec <va108xx_hal::utility::port_mux::hcf39c081d82efd23> @ imm = #14420
-    2798:      	uxtb	r0, r0
-    279a:      	str	r0, [sp, #32]
-    279c:      	b	0x279e <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x18e> @ imm = #-2
-    279e:      	ldr	r0, [sp, #32]
-    27a0:      	bl	0x194 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h03f43d67c30d745bE> @ imm = #-9744
-    27a4:      	b	0x27a6 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x196> @ imm = #-2
-    27a6:      	add	r0, sp, #196
-    27a8:      	movs	r1, #1
-    27aa:      	strb	r1, [r0]
-    27ac:      	add	r2, sp, #200
-    27ae:      	strb	r1, [r2]
-    27b0:      	ldrb	r1, [r0]
-    27b2:      	ldr	r3, [sp, #200]
-    27b4:      	add	r0, sp, #104
-    27b6:      	movs	r2, #18
-    27b8:      	bl	0x5fec <va108xx_hal::utility::port_mux::hcf39c081d82efd23> @ imm = #14384
-    27bc:      	uxtb	r0, r0
-    27be:      	str	r0, [sp, #28]
-    27c0:      	b	0x27c2 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x1b2> @ imm = #-2
-    27c2:      	ldr	r0, [sp, #28]
-    27c4:      	bl	0x194 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h03f43d67c30d745bE> @ imm = #-9780
-    27c8:      	b	0x27ca <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x1ba> @ imm = #-2
-    27ca:      	add	r0, sp, #204
-    27cc:      	movs	r1, #1
-    27ce:      	strb	r1, [r0]
-    27d0:      	add	r2, sp, #208
-    27d2:      	strb	r1, [r2]
-    27d4:      	ldrb	r1, [r0]
-    27d6:      	ldr	r3, [sp, #208]
-    27d8:      	add	r0, sp, #104
-    27da:      	movs	r2, #17
-    27dc:      	bl	0x5fec <va108xx_hal::utility::port_mux::hcf39c081d82efd23> @ imm = #14348
-    27e0:      	uxtb	r0, r0
-    27e2:      	str	r0, [sp, #24]
-    27e4:      	b	0x27e6 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x1d6> @ imm = #-2
-    27e6:      	ldr	r0, [sp, #24]
-    27e8:      	bl	0x194 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h03f43d67c30d745bE> @ imm = #-9816
-    27ec:      	b	0x27ee <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x1de> @ imm = #-2
-    27ee:      	add	r0, sp, #212
-    27f0:      	movs	r1, #1
-    27f2:      	strb	r1, [r0]
-    27f4:      	add	r2, sp, #216
-    27f6:      	strb	r1, [r2]
-    27f8:      	ldrb	r1, [r0]
-    27fa:      	ldr	r3, [sp, #216]
-    27fc:      	add	r0, sp, #104
-    27fe:      	movs	r2, #16
-    2800:      	bl	0x5fec <va108xx_hal::utility::port_mux::hcf39c081d82efd23> @ imm = #14312
-    2804:      	uxtb	r0, r0
-    2806:      	str	r0, [sp, #20]
-    2808:      	b	0x280a <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x1fa> @ imm = #-2
-    280a:      	ldr	r0, [sp, #20]
-    280c:      	bl	0x194 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h03f43d67c30d745bE> @ imm = #-9852
-    2810:      	b	0x277c <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x16c> @ imm = #-152
-    2812:      	add	r0, sp, #220
-    2814:      	bl	0x3e72 <<va108xx_hal::gpio::pins::Pin<I,va108xx_hal::gpio::pins::Output<C>> as embedded_hal::digital::v2::OutputPin>::set_high::hca697fb28037f9ea> @ imm = #5722
-    2818:      	b	0x281a <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x20a> @ imm = #-2
-    281a:      	ldr	r0, [pc, #220] <$d.8+0x1a>
-    281c:      	ldr	r2, [pc, #220] <$d.8+0x1c>
-    281e:      	movs	r1, #45
-    2820:      	bl	0x21c <_ZN4core6result19Result$LT$T$C$E$GT$6expect17h8e33f6808ace1129E> @ imm = #-9736
-    2824:      	b	0x2826 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x216> @ imm = #-2
-    2826:      	movs	r0, #3
-    2828:      	bl	0x5440 <<u32 as va108xx_hal::time::U32Ext>::mhz::ha624057da36f1de9> @ imm = #11284
-    282c:      	str	r0, [sp, #16]
-    282e:      	b	0x2830 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x220> @ imm = #-2
-    2830:      	bl	0x399c <va108xx_hal::gpio::pins::Pin<I,M>::into_funsel_2::h7d104a8eaae16b6a> @ imm = #4456
-    2834:      	b	0x2836 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x226> @ imm = #-2
-    2836:      	ldr	r1, [sp, #16]
-    2838:      	add	r0, sp, #236
-    283a:      	movs	r4, #1
-    283c:      	strb	r4, [r0]
-    283e:      	ldr	r3, [pc, #192] <$d.8+0x22>
-    2840:      	ldrb	r2, [r3]
-    2842:      	ldrb	r3, [r3, #1]
-    2844:      	ldrb	r0, [r0]
-    2846:      	movs	r5, #0
-    2848:      	str	r5, [sp, #8]
-    284a:      	str	r4, [sp, #4]
-    284c:      	str	r0, [sp]
-    284e:      	add	r0, sp, #224
-    2850:      	bl	0x3f4a <va108xx_hal::spi::TransferConfig<HWCS>::new::h6daede787576f8d4> @ imm = #5878
-    2854:      	b	0x2856 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x246> @ imm = #-2
-    2856:      	movs	r0, #50
-    2858:      	bl	0x5440 <<u32 as va108xx_hal::time::U32Ext>::mhz::ha624057da36f1de9> @ imm = #11236
-    285c:      	str	r0, [sp, #12]
-    285e:      	b	0x2860 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x250> @ imm = #-2
-    2860:      	ldr	r0, [sp, #184]
-    2862:      	add	r1, sp, #264
-    2864:      	strb	r0, [r1, #4]
-    2866:      	ldr	r0, [sp, #180]
-    2868:      	str	r0, [sp, #264]
-    286a:      	add	r0, sp, #104
-    286c:      	str	r0, [sp, #272]
-    286e:      	ldr	r0, [sp, #232]
-    2870:      	str	r0, [sp, #300]
-    2872:      	ldr	r0, [sp, #228]
-    2874:      	str	r0, [sp, #296]
-    2876:      	ldr	r0, [sp, #224]
-    2878:      	str	r0, [sp, #292]
-    287a:      	add	r0, sp, #280
-    287c:      	add	r1, sp, #292
-    287e:      	bl	0x3fb6 <va108xx_hal::spi::TransferConfig<HWCS>::downgrade::h7fd0909ba9bfa2de> @ imm = #5940
-    2882:      	b	0x2884 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x274> @ imm = #-2
-    2884:      	ldr	r1, [sp, #12]
-    2886:      	add	r0, sp, #280
-    2888:      	str	r0, [sp, #276]
-    288a:      	add	r0, sp, #264
-    288c:      	ldrb	r3, [r0]
-    288e:      	ldrb	r2, [r0, #1]
-    2890:      	lsls	r2, r2, #8
-    2892:      	adds	r2, r2, r3
-    2894:      	ldrb	r3, [r0, #2]
-    2896:      	ldrb	r0, [r0, #3]
-    2898:      	lsls	r0, r0, #8
-    289a:      	adds	r0, r0, r3
-    289c:      	lsls	r0, r0, #16
-    289e:      	adds	r2, r0, r2
-    28a0:      	ldr	r3, [sp, #268]
-    28a2:      	ldr	r0, [sp, #272]
-    28a4:      	ldr	r4, [sp, #276]
-    28a6:      	str	r4, [sp, #4]
-    28a8:      	str	r0, [sp]
-    28aa:      	add	r0, sp, #252
-    28ac:      	bl	0x3fe0 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347> @ imm = #5936
-    28b0:      	b	0x28b2 <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x2a2> @ imm = #-2
-    28b2:      	add	r0, sp, #240
-    28b4:      	add	r1, sp, #252
-    28b6:      	bl	0x45e2 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::downgrade::h87d3ddb98067055e> @ imm = #7464
-    28ba:      	b	0x28bc <max11619_adc::__cortex_m_rt_main::hb2207f3934bf995f+0x2ac> @ imm = #-2
-    28bc:      	ldr	r0, [sp, #248]
-    28be:      	str	r0, [sp, #312]
-    28c0:      	ldr	r0, [sp, #244]
-    28c2:      	str	r0, [sp, #308]
-    28c4:      	ldr	r0, [sp, #240]
-    28c6:      	str	r0, [sp, #304]
-    28c8:      	add	r2, sp, #132
-    28ca:      	add	r1, sp, #316
-    28cc:      	mov	r0, r1
-    28ce:      	ldm	r2!, {r3, r4}
-    28d0:      	stm	r0!, {r3, r4}
-    28d2:      	ldm	r2!, {r3, r4, r5}
-    28d4:      	stm	r0!, {r3, r4, r5}
-    28d6:      	add	r0, sp, #304
-    28d8:      	bl	0x2338 <max11619_adc::spi_example_externally_clocked::h15806214a6134de1> @ imm = #-1444
-    28dc:      	trap
-    28de:      	mov	r8, r8
-
-000028e0 <$d.8>:
-    28e0:	00 00 00 10	.word	0x10000000
-    28e4:	00 ae 00 00	.word	0x0000ae00
-    28e8:	30 00 00 10	.word	0x10000030
-    28ec:	09 ae 00 00	.word	0x0000ae09
-    28f0:	24 ae 00 00	.word	0x0000ae24
-    28f4:	30 ac 00 00	.word	0x0000ac30
-    28f8:	34 ae 00 00	.word	0x0000ae34
-    28fc:	64 ae 00 00	.word	0x0000ae64
-    2900:	74 ae 00 00	.word	0x0000ae74
-
-00002904 <OC0>:
-    2904:      	push	{r7, lr}
-    2906:      	add	r7, sp, #0
-    2908:      	bl	0x2910 <max11619_adc::__cortex_m_rt_OC0::hb153170f82435ec8> @ imm = #4
-    290c:      	b	0x290e <OC0+0xa>        @ imm = #-2
-    290e:      	pop	{r7, pc}
-
-00002910 <max11619_adc::__cortex_m_rt_OC0::hb153170f82435ec8>:
-    2910:      	push	{r7, lr}
-    2912:      	add	r7, sp, #0
-    2914:      	bl	0x5e72 <va108xx_hal::timer::default_ms_irq_handler::h04184af176254ced> @ imm = #13658
-    2918:      	b	0x291a <max11619_adc::__cortex_m_rt_OC0::hb153170f82435ec8+0xa> @ imm = #-2
-    291a:      	pop	{r7, pc}
-
-0000291c <core::clone::impls::<impl core::clone::Clone for u8>::clone::h6bb3d3aae05167fd>:
-    291c:      	sub	sp, #4
-    291e:      	str	r0, [sp]
-    2920:      	ldrb	r0, [r0]
-    2922:      	add	sp, #4
-    2924:      	bx	lr
-
-00002926 <<u8 as core::iter::range::Step>::forward_unchecked::ha7089e5e9cd111a0>:
-    2926:      	sub	sp, #24
-    2928:      	add	r2, sp, #4
-    292a:      	strb	r0, [r2]
-    292c:      	str	r1, [sp, #8]
-    292e:      	add	r2, sp, #12
-    2930:      	strb	r0, [r2]
-    2932:      	add	r2, sp, #16
-    2934:      	strb	r1, [r2]
-    2936:      	adds	r1, r0, r1
-    2938:      	add	r0, sp, #20
-    293a:      	strb	r1, [r0]
-    293c:      	ldrb	r0, [r0]
-    293e:      	str	r0, [sp]
-    2940:      	b	0x2942 <<u8 as core::iter::range::Step>::forward_unchecked::ha7089e5e9cd111a0+0x1c> @ imm = #-2
-    2942:      	ldr	r0, [sp]
-    2944:      	add	sp, #24
-    2946:      	bx	lr
-
-00002948 <core::mem::replace::hb90d3e73a8380ea5>:
-    2948:      	push	{r7, lr}
-    294a:      	add	r7, sp, #0
-    294c:      	sub	sp, #24
-    294e:      	str	r0, [sp]
-    2950:      	mov	r2, r1
-    2952:      	str	r2, [sp, #4]
-    2954:      	str	r0, [sp, #12]
-    2956:      	add	r2, sp, #16
-    2958:      	strb	r1, [r2]
-    295a:      	bl	0x5a2 <core::ptr::read::h5948e98be177969d> @ imm = #-9148
-    295e:      	mov	r1, r0
-    2960:      	str	r1, [sp, #8]
-    2962:      	add	r1, sp, #20
-    2964:      	strb	r0, [r1]
-    2966:      	b	0x2968 <core::mem::replace::hb90d3e73a8380ea5+0x20> @ imm = #-2
-    2968:      	ldr	r1, [sp, #4]
-    296a:      	ldr	r0, [sp]
-    296c:      	bl	0x5d2 <core::ptr::write::hf9047898b6b9eddf> @ imm = #-9118
-    2970:      	b	0x2972 <core::mem::replace::hb90d3e73a8380ea5+0x2a> @ imm = #-2
-    2972:      	ldr	r0, [sp, #8]
-    2974:      	add	sp, #24
-    2976:      	pop	{r7, pc}
-
-00002978 <<&T as core::fmt::Debug>::fmt::h58fb3698555b9895>:
-    2978:      	push	{r7, lr}
-    297a:      	add	r7, sp, #0
-    297c:      	sub	sp, #16
-    297e:      	str	r0, [sp, #8]
-    2980:      	str	r1, [sp, #12]
-    2982:      	ldr	r0, [r0]
-    2984:      	bl	0x93c6 <<core::convert::Infallible as core::fmt::Display>::fmt::h7dd09e474324225f> @ imm = #27198
-    2988:      	str	r0, [sp, #4]
-    298a:      	b	0x298c <<&T as core::fmt::Debug>::fmt::h58fb3698555b9895+0x14> @ imm = #-2
-    298c:      	ldr	r0, [sp, #4]
-    298e:      	movs	r1, #1
-    2990:      	ands	r0, r1
-    2992:      	add	sp, #16
-    2994:      	pop	{r7, pc}
-    2996:      	bmi	0x2942 <<u8 as core::iter::range::Step>::forward_unchecked::ha7089e5e9cd111a0+0x1c> @ imm = #-88
-
-00002998 <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::h066f9e7ad0c8ecba>:
-    2998:      	sub	sp, #4
-    299a:      	str	r0, [sp]
-    299c:      	ldr	r1, [pc, #8] <$d.1>
-    299e:      	ldrb	r0, [r1]
-    29a0:      	ldrb	r1, [r1, #1]
-    29a2:      	add	sp, #4
-    29a4:      	bx	lr
-    29a6:      	mov	r8, r8
-
-000029a8 <$d.1>:
-    29a8:	76 ae 00 00	.word	0x0000ae76
-
-000029ac <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::h14b68e4b2d1cc8db>:
-    29ac:      	sub	sp, #4
-    29ae:      	str	r0, [sp]
-    29b0:      	ldr	r1, [pc, #8] <$d.3>
-    29b2:      	ldrb	r0, [r1]
-    29b4:      	ldrb	r1, [r1, #1]
-    29b6:      	add	sp, #4
-    29b8:      	bx	lr
-    29ba:      	mov	r8, r8
-
-000029bc <$d.3>:
-    29bc:	78 ae 00 00	.word	0x0000ae78
-
-000029c0 <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::h52eddb5fb8f994a8>:
-    29c0:      	sub	sp, #4
-    29c2:      	str	r0, [sp]
-    29c4:      	ldr	r1, [pc, #8] <$d.5>
-    29c6:      	ldrb	r0, [r1]
-    29c8:      	ldrb	r1, [r1, #1]
-    29ca:      	add	sp, #4
-    29cc:      	bx	lr
-    29ce:      	mov	r8, r8
-
-000029d0 <$d.5>:
-    29d0:	7a ae 00 00	.word	0x0000ae7a
-
-000029d4 <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::hcb9eccc5e62522bf>:
-    29d4:      	sub	sp, #4
-    29d6:      	str	r0, [sp]
-    29d8:      	ldr	r1, [pc, #8] <$d.7>
-    29da:      	ldrb	r0, [r1]
-    29dc:      	ldrb	r1, [r1, #1]
-    29de:      	add	sp, #4
-    29e0:      	bx	lr
-    29e2:      	mov	r8, r8
-
-000029e4 <$d.7>:
-    29e4:	7c ae 00 00	.word	0x0000ae7c
-
-000029e8 <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::hd4074274e345a5df>:
-    29e8:      	sub	sp, #4
-    29ea:      	str	r0, [sp]
-    29ec:      	ldr	r1, [pc, #8] <$d.9>
-    29ee:      	ldrb	r0, [r1]
-    29f0:      	ldrb	r1, [r1, #1]
-    29f2:      	add	sp, #4
-    29f4:      	bx	lr
-    29f6:      	mov	r8, r8
-
-000029f8 <$d.9>:
-    29f8:	7e ae 00 00	.word	0x0000ae7e
-
-000029fc <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h030cc23f76f2f18f>:
-    29fc:      	push	{r7, lr}
-    29fe:      	add	r7, sp, #0
-    2a00:      	sub	sp, #40
-    2a02:      	str	r0, [sp, #16]
-    2a04:      	bl	0x29c0 <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::h52eddb5fb8f994a8> @ imm = #-72
-    2a08:      	mov	r2, r1
-    2a0a:      	add	r1, sp, #12
-    2a0c:      	strb	r2, [r1, #1]
-    2a0e:      	strb	r0, [r1]
-    2a10:      	b	0x2a12 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h030cc23f76f2f18f+0x16> @ imm = #-2
-    2a12:      	add	r0, sp, #12
-    2a14:      	ldrb	r0, [r0]
-    2a16:      	lsls	r0, r0, #31
-    2a18:      	cmp	r0, #0
-    2a1a:      	beq	0x2a22 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h030cc23f76f2f18f+0x26> @ imm = #4
-    2a1c:      	b	0x2a1e <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h030cc23f76f2f18f+0x22> @ imm = #-2
-    2a1e:      	b	0x2a28 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h030cc23f76f2f18f+0x2c> @ imm = #6
-    2a20:      	trap
-    2a22:      	ldr	r0, [pc, #40] <$d.11+0x2>
-    2a24:      	str	r0, [sp, #8]
-    2a26:      	b	0x2a44 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h030cc23f76f2f18f+0x48> @ imm = #26
-    2a28:      	ldr	r1, [pc, #32] <$d.11>
-    2a2a:      	str	r1, [sp, #20]
-    2a2c:      	movs	r0, #1
-    2a2e:      	str	r0, [sp, #24]
-    2a30:      	str	r1, [sp, #28]
-    2a32:      	str	r0, [sp, #32]
-    2a34:      	ldr	r0, [pc, #24] <$d.11+0x4>
-    2a36:      	str	r0, [sp, #36]
-    2a38:      	ldr	r0, [sp, #36]
-    2a3a:      	str	r0, [sp, #4]
-    2a3c:      	b	0x2a3e <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h030cc23f76f2f18f+0x42> @ imm = #-2
-    2a3e:      	ldr	r0, [sp, #4]
-    2a40:      	str	r0, [sp, #8]
-    2a42:      	b	0x2a44 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h030cc23f76f2f18f+0x48> @ imm = #-2
-    2a44:      	ldr	r0, [sp, #8]
-    2a46:      	add	sp, #40
-    2a48:      	pop	{r7, pc}
-    2a4a:      	mov	r8, r8
-
-00002a4c <$d.11>:
-    2a4c:	00 20 00 40	.word	0x40002000
-    2a50:	80 20 00 40	.word	0x40002080
-
-00002a54 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h331bdde0b20bc0a8>:
-    2a54:      	push	{r7, lr}
-    2a56:      	add	r7, sp, #0
-    2a58:      	sub	sp, #40
-    2a5a:      	str	r0, [sp, #16]
-    2a5c:      	bl	0x2998 <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::h066f9e7ad0c8ecba> @ imm = #-200
-    2a60:      	mov	r2, r1
-    2a62:      	add	r1, sp, #12
-    2a64:      	strb	r2, [r1, #1]
-    2a66:      	strb	r0, [r1]
-    2a68:      	b	0x2a6a <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h331bdde0b20bc0a8+0x16> @ imm = #-2
-    2a6a:      	add	r0, sp, #12
-    2a6c:      	ldrb	r0, [r0]
-    2a6e:      	lsls	r0, r0, #31
-    2a70:      	cmp	r0, #0
-    2a72:      	beq	0x2a7a <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h331bdde0b20bc0a8+0x26> @ imm = #4
-    2a74:      	b	0x2a76 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h331bdde0b20bc0a8+0x22> @ imm = #-2
-    2a76:      	b	0x2a80 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h331bdde0b20bc0a8+0x2c> @ imm = #6
-    2a78:      	trap
-    2a7a:      	ldr	r0, [pc, #40] <$d.13+0x2>
-    2a7c:      	str	r0, [sp, #8]
-    2a7e:      	b	0x2a9c <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h331bdde0b20bc0a8+0x48> @ imm = #26
-    2a80:      	ldr	r1, [pc, #32] <$d.13>
-    2a82:      	str	r1, [sp, #20]
-    2a84:      	movs	r0, #1
-    2a86:      	str	r0, [sp, #24]
-    2a88:      	str	r1, [sp, #28]
-    2a8a:      	str	r0, [sp, #32]
-    2a8c:      	ldr	r0, [pc, #24] <$d.13+0x4>
-    2a8e:      	str	r0, [sp, #36]
-    2a90:      	ldr	r0, [sp, #36]
-    2a92:      	str	r0, [sp, #4]
-    2a94:      	b	0x2a96 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h331bdde0b20bc0a8+0x42> @ imm = #-2
-    2a96:      	ldr	r0, [sp, #4]
-    2a98:      	str	r0, [sp, #8]
-    2a9a:      	b	0x2a9c <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h331bdde0b20bc0a8+0x48> @ imm = #-2
-    2a9c:      	ldr	r0, [sp, #8]
-    2a9e:      	add	sp, #40
-    2aa0:      	pop	{r7, pc}
-    2aa2:      	mov	r8, r8
-
-00002aa4 <$d.13>:
-    2aa4:	00 20 00 40	.word	0x40002000
-    2aa8:	80 20 00 40	.word	0x40002080
-
-00002aac <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h367bbd44317e9780>:
-    2aac:      	push	{r7, lr}
-    2aae:      	add	r7, sp, #0
-    2ab0:      	sub	sp, #40
-    2ab2:      	str	r0, [sp, #16]
-    2ab4:      	bl	0x29ac <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::h14b68e4b2d1cc8db> @ imm = #-268
-    2ab8:      	mov	r2, r1
-    2aba:      	add	r1, sp, #12
-    2abc:      	strb	r2, [r1, #1]
-    2abe:      	strb	r0, [r1]
-    2ac0:      	b	0x2ac2 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h367bbd44317e9780+0x16> @ imm = #-2
-    2ac2:      	add	r0, sp, #12
-    2ac4:      	ldrb	r0, [r0]
-    2ac6:      	lsls	r0, r0, #31
-    2ac8:      	cmp	r0, #0
-    2aca:      	beq	0x2ad2 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h367bbd44317e9780+0x26> @ imm = #4
-    2acc:      	b	0x2ace <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h367bbd44317e9780+0x22> @ imm = #-2
-    2ace:      	b	0x2ad8 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h367bbd44317e9780+0x2c> @ imm = #6
-    2ad0:      	trap
-    2ad2:      	ldr	r0, [pc, #40] <$d.15+0x2>
-    2ad4:      	str	r0, [sp, #8]
-    2ad6:      	b	0x2af4 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h367bbd44317e9780+0x48> @ imm = #26
-    2ad8:      	ldr	r1, [pc, #32] <$d.15>
-    2ada:      	str	r1, [sp, #20]
-    2adc:      	movs	r0, #1
-    2ade:      	str	r0, [sp, #24]
-    2ae0:      	str	r1, [sp, #28]
-    2ae2:      	str	r0, [sp, #32]
-    2ae4:      	ldr	r0, [pc, #24] <$d.15+0x4>
-    2ae6:      	str	r0, [sp, #36]
-    2ae8:      	ldr	r0, [sp, #36]
-    2aea:      	str	r0, [sp, #4]
-    2aec:      	b	0x2aee <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h367bbd44317e9780+0x42> @ imm = #-2
-    2aee:      	ldr	r0, [sp, #4]
-    2af0:      	str	r0, [sp, #8]
-    2af2:      	b	0x2af4 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h367bbd44317e9780+0x48> @ imm = #-2
-    2af4:      	ldr	r0, [sp, #8]
-    2af6:      	add	sp, #40
-    2af8:      	pop	{r7, pc}
-    2afa:      	mov	r8, r8
-
-00002afc <$d.15>:
-    2afc:	00 20 00 40	.word	0x40002000
-    2b00:	80 20 00 40	.word	0x40002080
-
-00002b04 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h7557ffc5152f194d>:
-    2b04:      	push	{r7, lr}
-    2b06:      	add	r7, sp, #0
-    2b08:      	sub	sp, #40
-    2b0a:      	str	r0, [sp, #16]
-    2b0c:      	bl	0x29d4 <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::hcb9eccc5e62522bf> @ imm = #-316
-    2b10:      	mov	r2, r1
-    2b12:      	add	r1, sp, #12
-    2b14:      	strb	r2, [r1, #1]
-    2b16:      	strb	r0, [r1]
-    2b18:      	b	0x2b1a <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h7557ffc5152f194d+0x16> @ imm = #-2
-    2b1a:      	add	r0, sp, #12
-    2b1c:      	ldrb	r0, [r0]
-    2b1e:      	lsls	r0, r0, #31
-    2b20:      	cmp	r0, #0
-    2b22:      	beq	0x2b2a <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h7557ffc5152f194d+0x26> @ imm = #4
-    2b24:      	b	0x2b26 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h7557ffc5152f194d+0x22> @ imm = #-2
-    2b26:      	b	0x2b30 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h7557ffc5152f194d+0x2c> @ imm = #6
-    2b28:      	trap
-    2b2a:      	ldr	r0, [pc, #40] <$d.17+0x2>
-    2b2c:      	str	r0, [sp, #8]
-    2b2e:      	b	0x2b4c <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h7557ffc5152f194d+0x48> @ imm = #26
-    2b30:      	ldr	r1, [pc, #32] <$d.17>
-    2b32:      	str	r1, [sp, #20]
-    2b34:      	movs	r0, #1
-    2b36:      	str	r0, [sp, #24]
-    2b38:      	str	r1, [sp, #28]
-    2b3a:      	str	r0, [sp, #32]
-    2b3c:      	ldr	r0, [pc, #24] <$d.17+0x4>
-    2b3e:      	str	r0, [sp, #36]
-    2b40:      	ldr	r0, [sp, #36]
-    2b42:      	str	r0, [sp, #4]
-    2b44:      	b	0x2b46 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h7557ffc5152f194d+0x42> @ imm = #-2
-    2b46:      	ldr	r0, [sp, #4]
-    2b48:      	str	r0, [sp, #8]
-    2b4a:      	b	0x2b4c <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h7557ffc5152f194d+0x48> @ imm = #-2
-    2b4c:      	ldr	r0, [sp, #8]
-    2b4e:      	add	sp, #40
-    2b50:      	pop	{r7, pc}
-    2b52:      	mov	r8, r8
-
-00002b54 <$d.17>:
-    2b54:	00 20 00 40	.word	0x40002000
-    2b58:	80 20 00 40	.word	0x40002080
-
-00002b5c <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::ha8841b3417ed3afd>:
-    2b5c:      	push	{r7, lr}
-    2b5e:      	add	r7, sp, #0
-    2b60:      	sub	sp, #40
-    2b62:      	str	r0, [sp, #16]
-    2b64:      	bl	0x29e8 <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::hd4074274e345a5df> @ imm = #-384
-    2b68:      	mov	r2, r1
-    2b6a:      	add	r1, sp, #12
-    2b6c:      	strb	r2, [r1, #1]
-    2b6e:      	strb	r0, [r1]
-    2b70:      	b	0x2b72 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::ha8841b3417ed3afd+0x16> @ imm = #-2
-    2b72:      	add	r0, sp, #12
-    2b74:      	ldrb	r0, [r0]
-    2b76:      	lsls	r0, r0, #31
-    2b78:      	cmp	r0, #0
-    2b7a:      	beq	0x2b82 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::ha8841b3417ed3afd+0x26> @ imm = #4
-    2b7c:      	b	0x2b7e <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::ha8841b3417ed3afd+0x22> @ imm = #-2
-    2b7e:      	b	0x2b88 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::ha8841b3417ed3afd+0x2c> @ imm = #6
-    2b80:      	trap
-    2b82:      	ldr	r0, [pc, #40] <$d.19+0x2>
-    2b84:      	str	r0, [sp, #8]
-    2b86:      	b	0x2ba4 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::ha8841b3417ed3afd+0x48> @ imm = #26
-    2b88:      	ldr	r1, [pc, #32] <$d.19>
-    2b8a:      	str	r1, [sp, #20]
-    2b8c:      	movs	r0, #1
-    2b8e:      	str	r0, [sp, #24]
-    2b90:      	str	r1, [sp, #28]
-    2b92:      	str	r0, [sp, #32]
-    2b94:      	ldr	r0, [pc, #24] <$d.19+0x4>
-    2b96:      	str	r0, [sp, #36]
-    2b98:      	ldr	r0, [sp, #36]
-    2b9a:      	str	r0, [sp, #4]
-    2b9c:      	b	0x2b9e <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::ha8841b3417ed3afd+0x42> @ imm = #-2
-    2b9e:      	ldr	r0, [sp, #4]
-    2ba0:      	str	r0, [sp, #8]
-    2ba2:      	b	0x2ba4 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::ha8841b3417ed3afd+0x48> @ imm = #-2
-    2ba4:      	ldr	r0, [sp, #8]
-    2ba6:      	add	sp, #40
-    2ba8:      	pop	{r7, pc}
-    2baa:      	mov	r8, r8
-
-00002bac <$d.19>:
-    2bac:	00 20 00 40	.word	0x40002000
-    2bb0:	80 20 00 40	.word	0x40002080
-
-00002bb4 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h874e14d1678b0a8f>:
-    2bb4:      	push	{r4, r5, r7, lr}
-    2bb6:      	add	r7, sp, #8
-    2bb8:      	sub	sp, #480
-    2bba:      	str	r2, [sp, #52]
-    2bbc:      	mov	r2, r1
-    2bbe:      	ldr	r1, [sp, #52]
-    2bc0:      	str	r2, [sp, #56]
-    2bc2:      	mov	r2, r0
-    2bc4:      	ldr	r0, [sp, #56]
-    2bc6:      	str	r2, [sp, #60]
-    2bc8:      	str	r2, [sp, #136]
-    2bca:      	add	r2, sp, #140
-    2bcc:      	strb	r0, [r2]
-    2bce:      	strb	r1, [r2, #1]
-    2bd0:      	bl	0x206c <<T as core::convert::Into<U>>::into::hdd9b7bd64a789ca4> @ imm = #-2920
-    2bd4:      	add	r2, sp, #144
-    2bd6:      	strh	r1, [r2, #4]
-    2bd8:      	str	r0, [sp, #144]
-    2bda:      	ldr	r0, [sp, #148]
-    2bdc:      	add	r1, sp, #84
-    2bde:      	strh	r0, [r1, #4]
-    2be0:      	ldr	r0, [sp, #144]
-    2be2:      	str	r0, [sp, #84]
-    2be4:      	b	0x2be6 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h874e14d1678b0a8f+0x32> @ imm = #-2
-    2be6:      	ldr	r0, [sp, #60]
-    2be8:      	ldr	r1, [sp, #84]
-    2bea:      	str	r1, [sp, #44]
-    2bec:      	add	r2, sp, #156
-    2bee:      	strb	r1, [r2]
-    2bf0:      	ldr	r1, [sp, #88]
-    2bf2:      	add	r2, sp, #64
-    2bf4:      	strb	r1, [r2]
-    2bf6:      	add	r1, sp, #84
-    2bf8:      	ldrb	r2, [r1, #1]
-    2bfa:      	add	r3, sp, #68
-    2bfc:      	strb	r2, [r3]
-    2bfe:      	ldrb	r2, [r1, #3]
-    2c00:      	add	r3, sp, #72
-    2c02:      	strb	r2, [r3]
-    2c04:      	ldrb	r2, [r1, #2]
-    2c06:      	add	r3, sp, #76
-    2c08:      	strb	r2, [r3]
-    2c0a:      	ldrb	r1, [r1, #5]
-    2c0c:      	add	r2, sp, #80
-    2c0e:      	strb	r1, [r2]
-    2c10:      	bl	0x395c <va108xx_hal::gpio::reg::RegisterInterface::port_reg::hec9bdcb18bf2ab1f> @ imm = #3400
-    2c14:      	str	r0, [sp, #48]
-    2c16:      	b	0x2c18 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h874e14d1678b0a8f+0x64> @ imm = #-2
-    2c18:      	ldr	r0, [sp, #60]
-    2c1a:      	bl	0x2aac <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h367bbd44317e9780> @ imm = #-370
-    2c1e:      	str	r0, [sp, #40]
-    2c20:      	b	0x2c22 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h874e14d1678b0a8f+0x6e> @ imm = #-2
-    2c22:      	ldr	r0, [sp, #60]
-    2c24:      	ldr	r1, [sp, #40]
-    2c26:      	ldr	r2, [sp, #48]
-    2c28:      	str	r2, [sp, #92]
-    2c2a:      	str	r1, [sp, #96]
-    2c2c:      	ldr	r1, [sp, #92]
-    2c2e:      	str	r1, [sp, #28]
-    2c30:      	str	r1, [sp, #160]
-    2c32:      	ldr	r1, [sp, #96]
-    2c34:      	str	r1, [sp, #32]
-    2c36:      	str	r1, [sp, #164]
-    2c38:      	bl	0x29ac <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::h14b68e4b2d1cc8db> @ imm = #-656
-    2c3c:      	str	r1, [sp, #36]
-    2c3e:      	b	0x2c40 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h874e14d1678b0a8f+0x8c> @ imm = #-2
-    2c40:      	ldr	r0, [sp, #36]
-    2c42:      	uxtb	r0, r0
-    2c44:      	str	r0, [sp, #24]
-    2c46:      	cmp	r0, #31
-    2c48:      	bhi	0x2ca4 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h874e14d1678b0a8f+0xf0> @ imm = #88
-    2c4a:      	b	0x2c4c <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h874e14d1678b0a8f+0x98> @ imm = #-2
-    2c4c:      	ldr	r0, [sp, #32]
-    2c4e:      	ldr	r1, [sp, #24]
-    2c50:      	lsls	r1, r1, #2
-    2c52:      	adds	r0, r0, r1
-    2c54:      	str	r0, [sp, #20]
-    2c56:      	add	r1, sp, #68
-    2c58:      	str	r1, [sp, #100]
-    2c5a:      	add	r1, sp, #76
-    2c5c:      	str	r1, [sp, #104]
-    2c5e:      	add	r1, sp, #72
-    2c60:      	str	r1, [sp, #108]
-    2c62:      	add	r1, sp, #80
-    2c64:      	str	r1, [sp, #112]
-    2c66:      	add	r1, sp, #64
-    2c68:      	str	r1, [sp, #116]
-    2c6a:      	str	r0, [sp, #200]
-    2c6c:      	add	r2, sp, #100
-    2c6e:      	add	r0, sp, #168
-    2c70:      	mov	r1, r0
-    2c72:      	ldm	r2!, {r3, r4}
-    2c74:      	stm	r1!, {r3, r4}
-    2c76:      	ldm	r2!, {r3, r4, r5}
-    2c78:      	stm	r1!, {r3, r4, r5}
-    2c7a:      	movs	r1, #0
-    2c7c:      	str	r1, [sp, #196]
-    2c7e:      	ldr	r1, [sp, #196]
-    2c80:      	str	r1, [sp, #220]
-    2c82:      	str	r1, [sp, #216]
-    2c84:      	ldr	r1, [sp, #216]
-    2c86:      	str	r1, [sp, #192]
-    2c88:      	add	r1, sp, #192
-    2c8a:      	str	r1, [sp, #188]
-    2c8c:      	ldr	r1, [sp, #188]
-    2c8e:      	bl	0xbee <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h2b7975d046532670> @ imm = #-8356
-    2c92:      	mov	r1, r0
-    2c94:      	ldr	r0, [sp, #20]
-    2c96:      	ldr	r1, [r1]
-    2c98:      	str	r0, [sp, #204]
-    2c9a:      	str	r1, [sp, #208]
-    2c9c:      	str	r0, [sp, #212]
-    2c9e:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #21474
-    2ca2:      	b	0x2cb0 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h874e14d1678b0a8f+0xfc> @ imm = #10
-    2ca4:      	ldr	r0, [sp, #24]
-    2ca6:      	ldr	r2, [pc, #332] <$d.21+0x2>
-    2ca8:      	movs	r1, #32
-    2caa:      	bl	0x8574 <core::panicking::panic_bounds_check::h5d2fdbe20d7940cc> @ imm = #22726
-    2cae:      	trap
-    2cb0:      	ldr	r0, [sp, #60]
-    2cb2:      	bl	0x3790 <va108xx_hal::gpio::reg::RegisterInterface::mask_32::h8a718548d138d583> @ imm = #2778
-    2cb6:      	str	r0, [sp, #120]
-    2cb8:      	b	0x2cba <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h874e14d1678b0a8f+0x106> @ imm = #-2
-    2cba:      	ldr	r0, [sp, #44]
-    2cbc:      	lsls	r0, r0, #31
-    2cbe:      	cmp	r0, #0
-    2cc0:      	bne	0x2cdc <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h874e14d1678b0a8f+0x128> @ imm = #24
-    2cc2:      	b	0x2cc4 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h874e14d1678b0a8f+0x110> @ imm = #-2
-    2cc4:      	ldr	r0, [sp, #28]
-    2cc6:      	str	r0, [sp, #224]
-    2cc8:      	str	r0, [sp, #228]
-    2cca:      	movs	r1, #32
-    2ccc:      	str	r1, [sp, #232]
-    2cce:      	str	r0, [sp, #236]
-    2cd0:      	str	r1, [sp, #240]
-    2cd2:      	adds	r0, #32
-    2cd4:      	str	r0, [sp, #244]
-    2cd6:      	ldr	r0, [sp, #244]
-    2cd8:      	str	r0, [sp, #16]
-    2cda:      	b	0x2d9c <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h874e14d1678b0a8f+0x1e8> @ imm = #190
-    2cdc:      	ldr	r0, [sp, #28]
-    2cde:      	str	r0, [sp, #248]
-    2ce0:      	str	r0, [sp, #252]
-    2ce2:      	movs	r1, #32
-    2ce4:      	str	r1, [sp, #256]
-    2ce6:      	str	r0, [sp, #260]
-    2ce8:      	str	r1, [sp, #264]
-    2cea:      	adds	r0, #32
-    2cec:      	str	r0, [sp, #268]
-    2cee:      	ldr	r0, [sp, #268]
-    2cf0:      	str	r0, [sp, #12]
-    2cf2:      	b	0x2cf4 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h874e14d1678b0a8f+0x140> @ imm = #-2
-    2cf4:      	ldr	r0, [sp, #12]
-    2cf6:      	add	r1, sp, #120
-    2cf8:      	str	r1, [sp, #124]
-    2cfa:      	ldr	r1, [sp, #124]
-    2cfc:      	str	r1, [sp, #8]
-    2cfe:      	str	r0, [sp, #368]
-    2d00:      	str	r1, [sp, #372]
-    2d02:      	str	r0, [sp, #380]
-    2d04:      	str	r0, [sp, #384]
-    2d06:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #21350
-    2d0a:      	mov	r1, r0
-    2d0c:      	ldr	r0, [sp, #8]
-    2d0e:      	str	r1, [sp, #376]
-    2d10:      	str	r1, [sp, #356]
-    2d12:      	ldr	r2, [sp, #356]
-    2d14:      	str	r2, [sp, #392]
-    2d16:      	str	r2, [sp, #388]
-    2d18:      	ldr	r2, [sp, #388]
-    2d1a:      	str	r2, [sp, #352]
-    2d1c:      	str	r1, [sp, #364]
-    2d1e:      	ldr	r1, [sp, #364]
-    2d20:      	str	r1, [sp, #412]
-    2d22:      	str	r1, [sp, #408]
-    2d24:      	ldr	r1, [sp, #408]
-    2d26:      	str	r1, [sp, #360]
-    2d28:      	add	r1, sp, #352
-    2d2a:      	str	r1, [sp, #344]
-    2d2c:      	add	r1, sp, #360
-    2d2e:      	str	r1, [sp, #348]
-    2d30:      	ldr	r1, [sp, #344]
-    2d32:      	ldr	r2, [sp, #348]
-    2d34:      	bl	0xb50 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h1dbb3ecca469fca4> @ imm = #-8680
-    2d38:      	mov	r1, r0
-    2d3a:      	ldr	r0, [sp, #12]
-    2d3c:      	ldr	r1, [r1]
-    2d3e:      	str	r0, [sp, #396]
-    2d40:      	str	r1, [sp, #400]
-    2d42:      	str	r0, [sp, #404]
-    2d44:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #21308
-    2d48:      	b	0x2d4a <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h874e14d1678b0a8f+0x196> @ imm = #-2
-    2d4a:      	ldr	r0, [sp, #28]
-    2d4c:      	str	r0, [sp, #416]
-    2d4e:      	str	r0, [sp, #420]
-    2d50:      	movs	r1, #20
-    2d52:      	str	r1, [sp, #424]
-    2d54:      	str	r0, [sp, #428]
-    2d56:      	str	r1, [sp, #432]
-    2d58:      	adds	r0, #20
-    2d5a:      	str	r0, [sp, #436]
-    2d5c:      	ldr	r0, [sp, #436]
-    2d5e:      	str	r0, [sp, #4]
-    2d60:      	b	0x2d62 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h874e14d1678b0a8f+0x1ae> @ imm = #-2
-    2d62:      	ldr	r1, [sp, #4]
-    2d64:      	add	r0, sp, #120
-    2d66:      	str	r0, [sp, #128]
-    2d68:      	ldr	r0, [sp, #128]
-    2d6a:      	str	r1, [sp, #452]
-    2d6c:      	str	r0, [sp, #456]
-    2d6e:      	movs	r1, #0
-    2d70:      	str	r1, [sp, #448]
-    2d72:      	ldr	r1, [sp, #448]
-    2d74:      	str	r1, [sp, #476]
-    2d76:      	str	r1, [sp, #472]
-    2d78:      	ldr	r1, [sp, #472]
-    2d7a:      	str	r1, [sp, #444]
-    2d7c:      	add	r1, sp, #444
-    2d7e:      	str	r1, [sp, #440]
-    2d80:      	ldr	r1, [sp, #440]
-    2d82:      	bl	0xb8e <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h2a2e7ae71d5d4391> @ imm = #-8696
-    2d86:      	mov	r1, r0
-    2d88:      	ldr	r0, [sp, #4]
-    2d8a:      	ldr	r1, [r1]
-    2d8c:      	str	r0, [sp, #460]
-    2d8e:      	str	r1, [sp, #464]
-    2d90:      	str	r0, [sp, #468]
-    2d92:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #21230
-    2d96:      	b	0x2d98 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h874e14d1678b0a8f+0x1e4> @ imm = #-2
-    2d98:      	add	sp, #480
-    2d9a:      	pop	{r4, r5, r7, pc}
-    2d9c:      	ldr	r0, [sp, #16]
-    2d9e:      	add	r1, sp, #120
-    2da0:      	str	r1, [sp, #132]
-    2da2:      	ldr	r1, [sp, #132]
-    2da4:      	str	r1, [sp]
-    2da6:      	str	r0, [sp, #296]
-    2da8:      	str	r1, [sp, #300]
-    2daa:      	str	r0, [sp, #308]
-    2dac:      	str	r0, [sp, #312]
-    2dae:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #21182
-    2db2:      	mov	r1, r0
-    2db4:      	ldr	r0, [sp]
-    2db6:      	str	r1, [sp, #304]
-    2db8:      	str	r1, [sp, #284]
-    2dba:      	ldr	r2, [sp, #284]
-    2dbc:      	str	r2, [sp, #320]
-    2dbe:      	str	r2, [sp, #316]
-    2dc0:      	ldr	r2, [sp, #316]
-    2dc2:      	str	r2, [sp, #280]
-    2dc4:      	str	r1, [sp, #292]
-    2dc6:      	ldr	r1, [sp, #292]
-    2dc8:      	str	r1, [sp, #340]
-    2dca:      	str	r1, [sp, #336]
-    2dcc:      	ldr	r1, [sp, #336]
-    2dce:      	str	r1, [sp, #288]
-    2dd0:      	add	r1, sp, #280
-    2dd2:      	str	r1, [sp, #272]
-    2dd4:      	add	r1, sp, #288
-    2dd6:      	str	r1, [sp, #276]
-    2dd8:      	ldr	r1, [sp, #272]
-    2dda:      	ldr	r2, [sp, #276]
-    2ddc:      	bl	0x1202 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hcb4c105b78483c5c> @ imm = #-7134
-    2de0:      	mov	r1, r0
-    2de2:      	ldr	r0, [sp, #16]
-    2de4:      	ldr	r1, [r1]
-    2de6:      	str	r0, [sp, #324]
-    2de8:      	str	r1, [sp, #328]
-    2dea:      	str	r0, [sp, #332]
-    2dec:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #21140
-    2df0:      	b	0x2d98 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h874e14d1678b0a8f+0x1e4> @ imm = #-92
-    2df2:      	mov	r8, r8
-
-00002df4 <$d.21>:
-    2df4:	e0 ae 00 00	.word	0x0000aee0
-
-00002df8 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h994fef27fe514dca>:
-    2df8:      	push	{r4, r5, r7, lr}
-    2dfa:      	add	r7, sp, #8
-    2dfc:      	sub	sp, #480
-    2dfe:      	str	r2, [sp, #52]
-    2e00:      	mov	r2, r1
-    2e02:      	ldr	r1, [sp, #52]
-    2e04:      	str	r2, [sp, #56]
-    2e06:      	mov	r2, r0
-    2e08:      	ldr	r0, [sp, #56]
-    2e0a:      	str	r2, [sp, #60]
-    2e0c:      	str	r2, [sp, #136]
-    2e0e:      	add	r2, sp, #140
-    2e10:      	strb	r0, [r2]
-    2e12:      	strb	r1, [r2, #1]
-    2e14:      	bl	0x206c <<T as core::convert::Into<U>>::into::hdd9b7bd64a789ca4> @ imm = #-3500
-    2e18:      	add	r2, sp, #144
-    2e1a:      	strh	r1, [r2, #4]
-    2e1c:      	str	r0, [sp, #144]
-    2e1e:      	ldr	r0, [sp, #148]
-    2e20:      	add	r1, sp, #84
-    2e22:      	strh	r0, [r1, #4]
-    2e24:      	ldr	r0, [sp, #144]
-    2e26:      	str	r0, [sp, #84]
-    2e28:      	b	0x2e2a <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h994fef27fe514dca+0x32> @ imm = #-2
-    2e2a:      	ldr	r0, [sp, #60]
-    2e2c:      	ldr	r1, [sp, #84]
-    2e2e:      	str	r1, [sp, #44]
-    2e30:      	add	r2, sp, #156
-    2e32:      	strb	r1, [r2]
-    2e34:      	ldr	r1, [sp, #88]
-    2e36:      	add	r2, sp, #64
-    2e38:      	strb	r1, [r2]
-    2e3a:      	add	r1, sp, #84
-    2e3c:      	ldrb	r2, [r1, #1]
-    2e3e:      	add	r3, sp, #68
-    2e40:      	strb	r2, [r3]
-    2e42:      	ldrb	r2, [r1, #3]
-    2e44:      	add	r3, sp, #72
-    2e46:      	strb	r2, [r3]
-    2e48:      	ldrb	r2, [r1, #2]
-    2e4a:      	add	r3, sp, #76
-    2e4c:      	strb	r2, [r3]
-    2e4e:      	ldrb	r1, [r1, #5]
-    2e50:      	add	r2, sp, #80
-    2e52:      	strb	r1, [r2]
-    2e54:      	bl	0x385c <va108xx_hal::gpio::reg::RegisterInterface::port_reg::h0a1bb866cbaf7b19> @ imm = #2564
-    2e58:      	str	r0, [sp, #48]
-    2e5a:      	b	0x2e5c <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h994fef27fe514dca+0x64> @ imm = #-2
-    2e5c:      	ldr	r0, [sp, #60]
-    2e5e:      	bl	0x2a54 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h331bdde0b20bc0a8> @ imm = #-1038
-    2e62:      	str	r0, [sp, #40]
-    2e64:      	b	0x2e66 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h994fef27fe514dca+0x6e> @ imm = #-2
-    2e66:      	ldr	r0, [sp, #60]
-    2e68:      	ldr	r1, [sp, #40]
-    2e6a:      	ldr	r2, [sp, #48]
-    2e6c:      	str	r2, [sp, #92]
-    2e6e:      	str	r1, [sp, #96]
-    2e70:      	ldr	r1, [sp, #92]
-    2e72:      	str	r1, [sp, #28]
-    2e74:      	str	r1, [sp, #160]
-    2e76:      	ldr	r1, [sp, #96]
-    2e78:      	str	r1, [sp, #32]
-    2e7a:      	str	r1, [sp, #164]
-    2e7c:      	bl	0x2998 <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::h066f9e7ad0c8ecba> @ imm = #-1256
-    2e80:      	str	r1, [sp, #36]
-    2e82:      	b	0x2e84 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h994fef27fe514dca+0x8c> @ imm = #-2
-    2e84:      	ldr	r0, [sp, #36]
-    2e86:      	uxtb	r0, r0
-    2e88:      	str	r0, [sp, #24]
-    2e8a:      	cmp	r0, #31
-    2e8c:      	bhi	0x2ee8 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h994fef27fe514dca+0xf0> @ imm = #88
-    2e8e:      	b	0x2e90 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h994fef27fe514dca+0x98> @ imm = #-2
-    2e90:      	ldr	r0, [sp, #32]
-    2e92:      	ldr	r1, [sp, #24]
-    2e94:      	lsls	r1, r1, #2
-    2e96:      	adds	r0, r0, r1
-    2e98:      	str	r0, [sp, #20]
-    2e9a:      	add	r1, sp, #68
-    2e9c:      	str	r1, [sp, #100]
-    2e9e:      	add	r1, sp, #76
-    2ea0:      	str	r1, [sp, #104]
-    2ea2:      	add	r1, sp, #72
-    2ea4:      	str	r1, [sp, #108]
-    2ea6:      	add	r1, sp, #80
-    2ea8:      	str	r1, [sp, #112]
-    2eaa:      	add	r1, sp, #64
-    2eac:      	str	r1, [sp, #116]
-    2eae:      	str	r0, [sp, #200]
-    2eb0:      	add	r2, sp, #100
-    2eb2:      	add	r0, sp, #168
-    2eb4:      	mov	r1, r0
-    2eb6:      	ldm	r2!, {r3, r4}
-    2eb8:      	stm	r1!, {r3, r4}
-    2eba:      	ldm	r2!, {r3, r4, r5}
-    2ebc:      	stm	r1!, {r3, r4, r5}
-    2ebe:      	movs	r1, #0
-    2ec0:      	str	r1, [sp, #196]
-    2ec2:      	ldr	r1, [sp, #196]
-    2ec4:      	str	r1, [sp, #220]
-    2ec6:      	str	r1, [sp, #216]
-    2ec8:      	ldr	r1, [sp, #216]
-    2eca:      	str	r1, [sp, #192]
-    2ecc:      	add	r1, sp, #192
-    2ece:      	str	r1, [sp, #188]
-    2ed0:      	ldr	r1, [sp, #188]
-    2ed2:      	bl	0x10cc <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hc973b045d09c06ea> @ imm = #-7690
-    2ed6:      	mov	r1, r0
-    2ed8:      	ldr	r0, [sp, #20]
-    2eda:      	ldr	r1, [r1]
-    2edc:      	str	r0, [sp, #204]
-    2ede:      	str	r1, [sp, #208]
-    2ee0:      	str	r0, [sp, #212]
-    2ee2:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #20894
-    2ee6:      	b	0x2ef4 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h994fef27fe514dca+0xfc> @ imm = #10
-    2ee8:      	ldr	r0, [sp, #24]
-    2eea:      	ldr	r2, [pc, #332] <$d.23+0x2>
-    2eec:      	movs	r1, #32
-    2eee:      	bl	0x8574 <core::panicking::panic_bounds_check::h5d2fdbe20d7940cc> @ imm = #22146
-    2ef2:      	trap
-    2ef4:      	ldr	r0, [sp, #60]
-    2ef6:      	bl	0x374c <va108xx_hal::gpio::reg::RegisterInterface::mask_32::h850e6d41973af99d> @ imm = #2130
-    2efa:      	str	r0, [sp, #120]
-    2efc:      	b	0x2efe <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h994fef27fe514dca+0x106> @ imm = #-2
-    2efe:      	ldr	r0, [sp, #44]
-    2f00:      	lsls	r0, r0, #31
-    2f02:      	cmp	r0, #0
-    2f04:      	bne	0x2f20 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h994fef27fe514dca+0x128> @ imm = #24
-    2f06:      	b	0x2f08 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h994fef27fe514dca+0x110> @ imm = #-2
-    2f08:      	ldr	r0, [sp, #28]
-    2f0a:      	str	r0, [sp, #224]
-    2f0c:      	str	r0, [sp, #228]
-    2f0e:      	movs	r1, #32
-    2f10:      	str	r1, [sp, #232]
-    2f12:      	str	r0, [sp, #236]
-    2f14:      	str	r1, [sp, #240]
-    2f16:      	adds	r0, #32
-    2f18:      	str	r0, [sp, #244]
-    2f1a:      	ldr	r0, [sp, #244]
-    2f1c:      	str	r0, [sp, #16]
-    2f1e:      	b	0x2fe0 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h994fef27fe514dca+0x1e8> @ imm = #190
-    2f20:      	ldr	r0, [sp, #28]
-    2f22:      	str	r0, [sp, #248]
-    2f24:      	str	r0, [sp, #252]
-    2f26:      	movs	r1, #32
-    2f28:      	str	r1, [sp, #256]
-    2f2a:      	str	r0, [sp, #260]
-    2f2c:      	str	r1, [sp, #264]
-    2f2e:      	adds	r0, #32
-    2f30:      	str	r0, [sp, #268]
-    2f32:      	ldr	r0, [sp, #268]
-    2f34:      	str	r0, [sp, #12]
-    2f36:      	b	0x2f38 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h994fef27fe514dca+0x140> @ imm = #-2
-    2f38:      	ldr	r0, [sp, #12]
-    2f3a:      	add	r1, sp, #120
-    2f3c:      	str	r1, [sp, #124]
-    2f3e:      	ldr	r1, [sp, #124]
-    2f40:      	str	r1, [sp, #8]
-    2f42:      	str	r0, [sp, #368]
-    2f44:      	str	r1, [sp, #372]
-    2f46:      	str	r0, [sp, #380]
-    2f48:      	str	r0, [sp, #384]
-    2f4a:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #20770
-    2f4e:      	mov	r1, r0
-    2f50:      	ldr	r0, [sp, #8]
-    2f52:      	str	r1, [sp, #376]
-    2f54:      	str	r1, [sp, #356]
-    2f56:      	ldr	r2, [sp, #356]
-    2f58:      	str	r2, [sp, #392]
-    2f5a:      	str	r2, [sp, #388]
-    2f5c:      	ldr	r2, [sp, #388]
-    2f5e:      	str	r2, [sp, #352]
-    2f60:      	str	r1, [sp, #364]
-    2f62:      	ldr	r1, [sp, #364]
-    2f64:      	str	r1, [sp, #412]
-    2f66:      	str	r1, [sp, #408]
-    2f68:      	ldr	r1, [sp, #408]
-    2f6a:      	str	r1, [sp, #360]
-    2f6c:      	add	r1, sp, #352
-    2f6e:      	str	r1, [sp, #344]
-    2f70:      	add	r1, sp, #360
-    2f72:      	str	r1, [sp, #348]
-    2f74:      	ldr	r1, [sp, #344]
-    2f76:      	ldr	r2, [sp, #348]
-    2f78:      	bl	0xd2a <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h65afbe282fc9a675> @ imm = #-8786
-    2f7c:      	mov	r1, r0
-    2f7e:      	ldr	r0, [sp, #12]
-    2f80:      	ldr	r1, [r1]
-    2f82:      	str	r0, [sp, #396]
-    2f84:      	str	r1, [sp, #400]
-    2f86:      	str	r0, [sp, #404]
-    2f88:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #20728
-    2f8c:      	b	0x2f8e <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h994fef27fe514dca+0x196> @ imm = #-2
-    2f8e:      	ldr	r0, [sp, #28]
-    2f90:      	str	r0, [sp, #416]
-    2f92:      	str	r0, [sp, #420]
-    2f94:      	movs	r1, #20
-    2f96:      	str	r1, [sp, #424]
-    2f98:      	str	r0, [sp, #428]
-    2f9a:      	str	r1, [sp, #432]
-    2f9c:      	adds	r0, #20
-    2f9e:      	str	r0, [sp, #436]
-    2fa0:      	ldr	r0, [sp, #436]
-    2fa2:      	str	r0, [sp, #4]
-    2fa4:      	b	0x2fa6 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h994fef27fe514dca+0x1ae> @ imm = #-2
-    2fa6:      	ldr	r1, [sp, #4]
-    2fa8:      	add	r0, sp, #120
-    2faa:      	str	r0, [sp, #128]
-    2fac:      	ldr	r0, [sp, #128]
-    2fae:      	str	r1, [sp, #452]
-    2fb0:      	str	r0, [sp, #456]
-    2fb2:      	movs	r1, #0
-    2fb4:      	str	r1, [sp, #448]
-    2fb6:      	ldr	r1, [sp, #448]
-    2fb8:      	str	r1, [sp, #476]
-    2fba:      	str	r1, [sp, #472]
-    2fbc:      	ldr	r1, [sp, #472]
-    2fbe:      	str	r1, [sp, #444]
-    2fc0:      	add	r1, sp, #444
-    2fc2:      	str	r1, [sp, #440]
-    2fc4:      	ldr	r1, [sp, #440]
-    2fc6:      	bl	0xaf0 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h0749be06a56a00e3> @ imm = #-9434
-    2fca:      	mov	r1, r0
-    2fcc:      	ldr	r0, [sp, #4]
-    2fce:      	ldr	r1, [r1]
-    2fd0:      	str	r0, [sp, #460]
-    2fd2:      	str	r1, [sp, #464]
-    2fd4:      	str	r0, [sp, #468]
-    2fd6:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #20650
-    2fda:      	b	0x2fdc <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h994fef27fe514dca+0x1e4> @ imm = #-2
-    2fdc:      	add	sp, #480
-    2fde:      	pop	{r4, r5, r7, pc}
-    2fe0:      	ldr	r0, [sp, #16]
-    2fe2:      	add	r1, sp, #120
-    2fe4:      	str	r1, [sp, #132]
-    2fe6:      	ldr	r1, [sp, #132]
-    2fe8:      	str	r1, [sp]
-    2fea:      	str	r0, [sp, #296]
-    2fec:      	str	r1, [sp, #300]
-    2fee:      	str	r0, [sp, #308]
-    2ff0:      	str	r0, [sp, #312]
-    2ff2:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #20602
-    2ff6:      	mov	r1, r0
-    2ff8:      	ldr	r0, [sp]
-    2ffa:      	str	r1, [sp, #304]
-    2ffc:      	str	r1, [sp, #284]
-    2ffe:      	ldr	r2, [sp, #284]
-    3000:      	str	r2, [sp, #320]
-    3002:      	str	r2, [sp, #316]
-    3004:      	ldr	r2, [sp, #316]
-    3006:      	str	r2, [sp, #280]
-    3008:      	str	r1, [sp, #292]
-    300a:      	ldr	r1, [sp, #292]
-    300c:      	str	r1, [sp, #340]
-    300e:      	str	r1, [sp, #336]
-    3010:      	ldr	r1, [sp, #336]
-    3012:      	str	r1, [sp, #288]
-    3014:      	add	r1, sp, #280
-    3016:      	str	r1, [sp, #272]
-    3018:      	add	r1, sp, #288
-    301a:      	str	r1, [sp, #276]
-    301c:      	ldr	r1, [sp, #272]
-    301e:      	ldr	r2, [sp, #276]
-    3020:      	bl	0xbb0 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h2a85ec3a68a3780a> @ imm = #-9332
-    3024:      	mov	r1, r0
-    3026:      	ldr	r0, [sp, #16]
-    3028:      	ldr	r1, [r1]
-    302a:      	str	r0, [sp, #324]
-    302c:      	str	r1, [sp, #328]
-    302e:      	str	r0, [sp, #332]
-    3030:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #20560
-    3034:      	b	0x2fdc <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h994fef27fe514dca+0x1e4> @ imm = #-92
-    3036:      	mov	r8, r8
-
-00003038 <$d.23>:
-    3038:	e0 ae 00 00	.word	0x0000aee0
-
-0000303c <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h9bee270fe5589929>:
-    303c:      	push	{r4, r5, r7, lr}
-    303e:      	add	r7, sp, #8
-    3040:      	sub	sp, #480
-    3042:      	str	r2, [sp, #52]
-    3044:      	mov	r2, r1
-    3046:      	ldr	r1, [sp, #52]
-    3048:      	str	r2, [sp, #56]
-    304a:      	mov	r2, r0
-    304c:      	ldr	r0, [sp, #56]
-    304e:      	str	r2, [sp, #60]
-    3050:      	str	r2, [sp, #136]
-    3052:      	add	r2, sp, #140
-    3054:      	strb	r0, [r2]
-    3056:      	strb	r1, [r2, #1]
-    3058:      	bl	0x206c <<T as core::convert::Into<U>>::into::hdd9b7bd64a789ca4> @ imm = #-4080
-    305c:      	add	r2, sp, #144
-    305e:      	strh	r1, [r2, #4]
-    3060:      	str	r0, [sp, #144]
-    3062:      	ldr	r0, [sp, #148]
-    3064:      	add	r1, sp, #84
-    3066:      	strh	r0, [r1, #4]
-    3068:      	ldr	r0, [sp, #144]
-    306a:      	str	r0, [sp, #84]
-    306c:      	b	0x306e <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h9bee270fe5589929+0x32> @ imm = #-2
-    306e:      	ldr	r0, [sp, #60]
-    3070:      	ldr	r1, [sp, #84]
-    3072:      	str	r1, [sp, #44]
-    3074:      	add	r2, sp, #156
-    3076:      	strb	r1, [r2]
-    3078:      	ldr	r1, [sp, #88]
-    307a:      	add	r2, sp, #64
-    307c:      	strb	r1, [r2]
-    307e:      	add	r1, sp, #84
-    3080:      	ldrb	r2, [r1, #1]
-    3082:      	add	r3, sp, #68
-    3084:      	strb	r2, [r3]
-    3086:      	ldrb	r2, [r1, #3]
-    3088:      	add	r3, sp, #72
-    308a:      	strb	r2, [r3]
-    308c:      	ldrb	r2, [r1, #2]
-    308e:      	add	r3, sp, #76
-    3090:      	strb	r2, [r3]
-    3092:      	ldrb	r1, [r1, #5]
-    3094:      	add	r2, sp, #80
-    3096:      	strb	r1, [r2]
-    3098:      	bl	0x389c <va108xx_hal::gpio::reg::RegisterInterface::port_reg::h14c83a8d64a8cbf2> @ imm = #2048
-    309c:      	str	r0, [sp, #48]
-    309e:      	b	0x30a0 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h9bee270fe5589929+0x64> @ imm = #-2
-    30a0:      	ldr	r0, [sp, #60]
-    30a2:      	bl	0x29fc <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h030cc23f76f2f18f> @ imm = #-1706
-    30a6:      	str	r0, [sp, #40]
-    30a8:      	b	0x30aa <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h9bee270fe5589929+0x6e> @ imm = #-2
-    30aa:      	ldr	r0, [sp, #60]
-    30ac:      	ldr	r1, [sp, #40]
-    30ae:      	ldr	r2, [sp, #48]
-    30b0:      	str	r2, [sp, #92]
-    30b2:      	str	r1, [sp, #96]
-    30b4:      	ldr	r1, [sp, #92]
-    30b6:      	str	r1, [sp, #28]
-    30b8:      	str	r1, [sp, #160]
-    30ba:      	ldr	r1, [sp, #96]
-    30bc:      	str	r1, [sp, #32]
-    30be:      	str	r1, [sp, #164]
-    30c0:      	bl	0x29c0 <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::h52eddb5fb8f994a8> @ imm = #-1796
-    30c4:      	str	r1, [sp, #36]
-    30c6:      	b	0x30c8 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h9bee270fe5589929+0x8c> @ imm = #-2
-    30c8:      	ldr	r0, [sp, #36]
-    30ca:      	uxtb	r0, r0
-    30cc:      	str	r0, [sp, #24]
-    30ce:      	cmp	r0, #31
-    30d0:      	bhi	0x312c <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h9bee270fe5589929+0xf0> @ imm = #88
-    30d2:      	b	0x30d4 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h9bee270fe5589929+0x98> @ imm = #-2
-    30d4:      	ldr	r0, [sp, #32]
-    30d6:      	ldr	r1, [sp, #24]
-    30d8:      	lsls	r1, r1, #2
-    30da:      	adds	r0, r0, r1
-    30dc:      	str	r0, [sp, #20]
-    30de:      	add	r1, sp, #68
-    30e0:      	str	r1, [sp, #100]
-    30e2:      	add	r1, sp, #76
-    30e4:      	str	r1, [sp, #104]
-    30e6:      	add	r1, sp, #72
-    30e8:      	str	r1, [sp, #108]
-    30ea:      	add	r1, sp, #80
-    30ec:      	str	r1, [sp, #112]
-    30ee:      	add	r1, sp, #64
-    30f0:      	str	r1, [sp, #116]
-    30f2:      	str	r0, [sp, #200]
-    30f4:      	add	r2, sp, #100
-    30f6:      	add	r0, sp, #168
-    30f8:      	mov	r1, r0
-    30fa:      	ldm	r2!, {r3, r4}
-    30fc:      	stm	r1!, {r3, r4}
-    30fe:      	ldm	r2!, {r3, r4, r5}
-    3100:      	stm	r1!, {r3, r4, r5}
-    3102:      	movs	r1, #0
-    3104:      	str	r1, [sp, #196]
-    3106:      	ldr	r1, [sp, #196]
-    3108:      	str	r1, [sp, #220]
-    310a:      	str	r1, [sp, #216]
-    310c:      	ldr	r1, [sp, #216]
-    310e:      	str	r1, [sp, #192]
-    3110:      	add	r1, sp, #192
-    3112:      	str	r1, [sp, #188]
-    3114:      	ldr	r1, [sp, #188]
-    3116:      	bl	0xe9e <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h89bc1eccc2486d81> @ imm = #-8828
-    311a:      	mov	r1, r0
-    311c:      	ldr	r0, [sp, #20]
-    311e:      	ldr	r1, [r1]
-    3120:      	str	r0, [sp, #204]
-    3122:      	str	r1, [sp, #208]
-    3124:      	str	r0, [sp, #212]
-    3126:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #20314
-    312a:      	b	0x3138 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h9bee270fe5589929+0xfc> @ imm = #10
-    312c:      	ldr	r0, [sp, #24]
-    312e:      	ldr	r2, [pc, #332] <$d.25+0x2>
-    3130:      	movs	r1, #32
-    3132:      	bl	0x8574 <core::panicking::panic_bounds_check::h5d2fdbe20d7940cc> @ imm = #21566
-    3136:      	trap
-    3138:      	ldr	r0, [sp, #60]
-    313a:      	bl	0x3818 <va108xx_hal::gpio::reg::RegisterInterface::mask_32::hfa3d202990172a8a> @ imm = #1754
-    313e:      	str	r0, [sp, #120]
-    3140:      	b	0x3142 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h9bee270fe5589929+0x106> @ imm = #-2
-    3142:      	ldr	r0, [sp, #44]
-    3144:      	lsls	r0, r0, #31
-    3146:      	cmp	r0, #0
-    3148:      	bne	0x3164 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h9bee270fe5589929+0x128> @ imm = #24
-    314a:      	b	0x314c <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h9bee270fe5589929+0x110> @ imm = #-2
-    314c:      	ldr	r0, [sp, #28]
-    314e:      	str	r0, [sp, #224]
-    3150:      	str	r0, [sp, #228]
-    3152:      	movs	r1, #32
-    3154:      	str	r1, [sp, #232]
-    3156:      	str	r0, [sp, #236]
-    3158:      	str	r1, [sp, #240]
-    315a:      	adds	r0, #32
-    315c:      	str	r0, [sp, #244]
-    315e:      	ldr	r0, [sp, #244]
-    3160:      	str	r0, [sp, #16]
-    3162:      	b	0x3224 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h9bee270fe5589929+0x1e8> @ imm = #190
-    3164:      	ldr	r0, [sp, #28]
-    3166:      	str	r0, [sp, #248]
-    3168:      	str	r0, [sp, #252]
-    316a:      	movs	r1, #32
-    316c:      	str	r1, [sp, #256]
-    316e:      	str	r0, [sp, #260]
-    3170:      	str	r1, [sp, #264]
-    3172:      	adds	r0, #32
-    3174:      	str	r0, [sp, #268]
-    3176:      	ldr	r0, [sp, #268]
-    3178:      	str	r0, [sp, #12]
-    317a:      	b	0x317c <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h9bee270fe5589929+0x140> @ imm = #-2
-    317c:      	ldr	r0, [sp, #12]
-    317e:      	add	r1, sp, #120
-    3180:      	str	r1, [sp, #124]
-    3182:      	ldr	r1, [sp, #124]
-    3184:      	str	r1, [sp, #8]
-    3186:      	str	r0, [sp, #368]
-    3188:      	str	r1, [sp, #372]
-    318a:      	str	r0, [sp, #380]
-    318c:      	str	r0, [sp, #384]
-    318e:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #20190
-    3192:      	mov	r1, r0
-    3194:      	ldr	r0, [sp, #8]
-    3196:      	str	r1, [sp, #376]
-    3198:      	str	r1, [sp, #356]
-    319a:      	ldr	r2, [sp, #356]
-    319c:      	str	r2, [sp, #392]
-    319e:      	str	r2, [sp, #388]
-    31a0:      	ldr	r2, [sp, #388]
-    31a2:      	str	r2, [sp, #352]
-    31a4:      	str	r1, [sp, #364]
-    31a6:      	ldr	r1, [sp, #364]
-    31a8:      	str	r1, [sp, #412]
-    31aa:      	str	r1, [sp, #408]
-    31ac:      	ldr	r1, [sp, #408]
-    31ae:      	str	r1, [sp, #360]
-    31b0:      	add	r1, sp, #352
-    31b2:      	str	r1, [sp, #344]
-    31b4:      	add	r1, sp, #360
-    31b6:      	str	r1, [sp, #348]
-    31b8:      	ldr	r1, [sp, #344]
-    31ba:      	ldr	r2, [sp, #348]
-    31bc:      	bl	0xb12 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h1da809e59f2f513d> @ imm = #-9902
-    31c0:      	mov	r1, r0
-    31c2:      	ldr	r0, [sp, #12]
-    31c4:      	ldr	r1, [r1]
-    31c6:      	str	r0, [sp, #396]
-    31c8:      	str	r1, [sp, #400]
-    31ca:      	str	r0, [sp, #404]
-    31cc:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #20148
-    31d0:      	b	0x31d2 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h9bee270fe5589929+0x196> @ imm = #-2
-    31d2:      	ldr	r0, [sp, #28]
-    31d4:      	str	r0, [sp, #416]
-    31d6:      	str	r0, [sp, #420]
-    31d8:      	movs	r1, #20
-    31da:      	str	r1, [sp, #424]
-    31dc:      	str	r0, [sp, #428]
-    31de:      	str	r1, [sp, #432]
-    31e0:      	adds	r0, #20
-    31e2:      	str	r0, [sp, #436]
-    31e4:      	ldr	r0, [sp, #436]
-    31e6:      	str	r0, [sp, #4]
-    31e8:      	b	0x31ea <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h9bee270fe5589929+0x1ae> @ imm = #-2
-    31ea:      	ldr	r1, [sp, #4]
-    31ec:      	add	r0, sp, #120
-    31ee:      	str	r0, [sp, #128]
-    31f0:      	ldr	r0, [sp, #128]
-    31f2:      	str	r1, [sp, #452]
-    31f4:      	str	r0, [sp, #456]
-    31f6:      	movs	r1, #0
-    31f8:      	str	r1, [sp, #448]
-    31fa:      	ldr	r1, [sp, #448]
-    31fc:      	str	r1, [sp, #476]
-    31fe:      	str	r1, [sp, #472]
-    3200:      	ldr	r1, [sp, #472]
-    3202:      	str	r1, [sp, #444]
-    3204:      	add	r1, sp, #444
-    3206:      	str	r1, [sp, #440]
-    3208:      	ldr	r1, [sp, #440]
-    320a:      	bl	0x12bc <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hf1632c7badd66729> @ imm = #-8018
-    320e:      	mov	r1, r0
-    3210:      	ldr	r0, [sp, #4]
-    3212:      	ldr	r1, [r1]
-    3214:      	str	r0, [sp, #460]
-    3216:      	str	r1, [sp, #464]
-    3218:      	str	r0, [sp, #468]
-    321a:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #20070
-    321e:      	b	0x3220 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h9bee270fe5589929+0x1e4> @ imm = #-2
-    3220:      	add	sp, #480
-    3222:      	pop	{r4, r5, r7, pc}
-    3224:      	ldr	r0, [sp, #16]
-    3226:      	add	r1, sp, #120
-    3228:      	str	r1, [sp, #132]
-    322a:      	ldr	r1, [sp, #132]
-    322c:      	str	r1, [sp]
-    322e:      	str	r0, [sp, #296]
-    3230:      	str	r1, [sp, #300]
-    3232:      	str	r0, [sp, #308]
-    3234:      	str	r0, [sp, #312]
-    3236:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #20022
-    323a:      	mov	r1, r0
-    323c:      	ldr	r0, [sp]
-    323e:      	str	r1, [sp, #304]
-    3240:      	str	r1, [sp, #284]
-    3242:      	ldr	r2, [sp, #284]
-    3244:      	str	r2, [sp, #320]
-    3246:      	str	r2, [sp, #316]
-    3248:      	ldr	r2, [sp, #316]
-    324a:      	str	r2, [sp, #280]
-    324c:      	str	r1, [sp, #292]
-    324e:      	ldr	r1, [sp, #292]
-    3250:      	str	r1, [sp, #340]
-    3252:      	str	r1, [sp, #336]
-    3254:      	ldr	r1, [sp, #336]
-    3256:      	str	r1, [sp, #288]
-    3258:      	add	r1, sp, #280
-    325a:      	str	r1, [sp, #272]
-    325c:      	add	r1, sp, #288
-    325e:      	str	r1, [sp, #276]
-    3260:      	ldr	r1, [sp, #272]
-    3262:      	ldr	r2, [sp, #276]
-    3264:      	bl	0x1240 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hd4d34508588b5aab> @ imm = #-8232
-    3268:      	mov	r1, r0
-    326a:      	ldr	r0, [sp, #16]
-    326c:      	ldr	r1, [r1]
-    326e:      	str	r0, [sp, #324]
-    3270:      	str	r1, [sp, #328]
-    3272:      	str	r0, [sp, #332]
-    3274:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #19980
-    3278:      	b	0x3220 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h9bee270fe5589929+0x1e4> @ imm = #-92
-    327a:      	mov	r8, r8
-
-0000327c <$d.25>:
-    327c:	e0 ae 00 00	.word	0x0000aee0
-
-00003280 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd4703b18b9deaafa>:
-    3280:      	push	{r4, r5, r7, lr}
-    3282:      	add	r7, sp, #8
-    3284:      	sub	sp, #480
-    3286:      	str	r2, [sp, #52]
-    3288:      	mov	r2, r1
-    328a:      	ldr	r1, [sp, #52]
-    328c:      	str	r2, [sp, #56]
-    328e:      	mov	r2, r0
-    3290:      	ldr	r0, [sp, #56]
-    3292:      	str	r2, [sp, #60]
-    3294:      	str	r2, [sp, #136]
-    3296:      	add	r2, sp, #140
-    3298:      	strb	r0, [r2]
-    329a:      	strb	r1, [r2, #1]
-    329c:      	bl	0x206c <<T as core::convert::Into<U>>::into::hdd9b7bd64a789ca4> @ imm = #-4660
-    32a0:      	add	r2, sp, #144
-    32a2:      	strh	r1, [r2, #4]
-    32a4:      	str	r0, [sp, #144]
-    32a6:      	ldr	r0, [sp, #148]
-    32a8:      	add	r1, sp, #84
-    32aa:      	strh	r0, [r1, #4]
-    32ac:      	ldr	r0, [sp, #144]
-    32ae:      	str	r0, [sp, #84]
-    32b0:      	b	0x32b2 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd4703b18b9deaafa+0x32> @ imm = #-2
-    32b2:      	ldr	r0, [sp, #60]
-    32b4:      	ldr	r1, [sp, #84]
-    32b6:      	str	r1, [sp, #44]
-    32b8:      	add	r2, sp, #156
-    32ba:      	strb	r1, [r2]
-    32bc:      	ldr	r1, [sp, #88]
-    32be:      	add	r2, sp, #64
-    32c0:      	strb	r1, [r2]
-    32c2:      	add	r1, sp, #84
-    32c4:      	ldrb	r2, [r1, #1]
-    32c6:      	add	r3, sp, #68
-    32c8:      	strb	r2, [r3]
-    32ca:      	ldrb	r2, [r1, #3]
-    32cc:      	add	r3, sp, #72
-    32ce:      	strb	r2, [r3]
-    32d0:      	ldrb	r2, [r1, #2]
-    32d2:      	add	r3, sp, #76
-    32d4:      	strb	r2, [r3]
-    32d6:      	ldrb	r1, [r1, #5]
-    32d8:      	add	r2, sp, #80
-    32da:      	strb	r1, [r2]
-    32dc:      	bl	0x38dc <va108xx_hal::gpio::reg::RegisterInterface::port_reg::hafceca2e50e58a72> @ imm = #1532
-    32e0:      	str	r0, [sp, #48]
-    32e2:      	b	0x32e4 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd4703b18b9deaafa+0x64> @ imm = #-2
-    32e4:      	ldr	r0, [sp, #60]
-    32e6:      	bl	0x2b5c <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::ha8841b3417ed3afd> @ imm = #-1934
-    32ea:      	str	r0, [sp, #40]
-    32ec:      	b	0x32ee <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd4703b18b9deaafa+0x6e> @ imm = #-2
-    32ee:      	ldr	r0, [sp, #60]
-    32f0:      	ldr	r1, [sp, #40]
-    32f2:      	ldr	r2, [sp, #48]
-    32f4:      	str	r2, [sp, #92]
-    32f6:      	str	r1, [sp, #96]
-    32f8:      	ldr	r1, [sp, #92]
-    32fa:      	str	r1, [sp, #28]
-    32fc:      	str	r1, [sp, #160]
-    32fe:      	ldr	r1, [sp, #96]
-    3300:      	str	r1, [sp, #32]
-    3302:      	str	r1, [sp, #164]
-    3304:      	bl	0x29e8 <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::hd4074274e345a5df> @ imm = #-2336
-    3308:      	str	r1, [sp, #36]
-    330a:      	b	0x330c <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd4703b18b9deaafa+0x8c> @ imm = #-2
-    330c:      	ldr	r0, [sp, #36]
-    330e:      	uxtb	r0, r0
-    3310:      	str	r0, [sp, #24]
-    3312:      	cmp	r0, #31
-    3314:      	bhi	0x3370 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd4703b18b9deaafa+0xf0> @ imm = #88
-    3316:      	b	0x3318 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd4703b18b9deaafa+0x98> @ imm = #-2
-    3318:      	ldr	r0, [sp, #32]
-    331a:      	ldr	r1, [sp, #24]
-    331c:      	lsls	r1, r1, #2
-    331e:      	adds	r0, r0, r1
-    3320:      	str	r0, [sp, #20]
-    3322:      	add	r1, sp, #68
-    3324:      	str	r1, [sp, #100]
-    3326:      	add	r1, sp, #76
-    3328:      	str	r1, [sp, #104]
-    332a:      	add	r1, sp, #72
-    332c:      	str	r1, [sp, #108]
-    332e:      	add	r1, sp, #80
-    3330:      	str	r1, [sp, #112]
-    3332:      	add	r1, sp, #64
-    3334:      	str	r1, [sp, #116]
-    3336:      	str	r0, [sp, #200]
-    3338:      	add	r2, sp, #100
-    333a:      	add	r0, sp, #168
-    333c:      	mov	r1, r0
-    333e:      	ldm	r2!, {r3, r4}
-    3340:      	stm	r1!, {r3, r4}
-    3342:      	ldm	r2!, {r3, r4, r5}
-    3344:      	stm	r1!, {r3, r4, r5}
-    3346:      	movs	r1, #0
-    3348:      	str	r1, [sp, #196]
-    334a:      	ldr	r1, [sp, #196]
-    334c:      	str	r1, [sp, #220]
-    334e:      	str	r1, [sp, #216]
-    3350:      	ldr	r1, [sp, #216]
-    3352:      	str	r1, [sp, #192]
-    3354:      	add	r1, sp, #192
-    3356:      	str	r1, [sp, #188]
-    3358:      	ldr	r1, [sp, #188]
-    335a:      	bl	0xda6 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h79f484a6be3139a3> @ imm = #-9656
-    335e:      	mov	r1, r0
-    3360:      	ldr	r0, [sp, #20]
-    3362:      	ldr	r1, [r1]
-    3364:      	str	r0, [sp, #204]
-    3366:      	str	r1, [sp, #208]
-    3368:      	str	r0, [sp, #212]
-    336a:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #19734
-    336e:      	b	0x337c <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd4703b18b9deaafa+0xfc> @ imm = #10
-    3370:      	ldr	r0, [sp, #24]
-    3372:      	ldr	r2, [pc, #332] <$d.27+0x2>
-    3374:      	movs	r1, #32
-    3376:      	bl	0x8574 <core::panicking::panic_bounds_check::h5d2fdbe20d7940cc> @ imm = #20986
-    337a:      	trap
-    337c:      	ldr	r0, [sp, #60]
-    337e:      	bl	0x37d4 <va108xx_hal::gpio::reg::RegisterInterface::mask_32::h96a18d1555422167> @ imm = #1106
-    3382:      	str	r0, [sp, #120]
-    3384:      	b	0x3386 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd4703b18b9deaafa+0x106> @ imm = #-2
-    3386:      	ldr	r0, [sp, #44]
-    3388:      	lsls	r0, r0, #31
-    338a:      	cmp	r0, #0
-    338c:      	bne	0x33a8 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd4703b18b9deaafa+0x128> @ imm = #24
-    338e:      	b	0x3390 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd4703b18b9deaafa+0x110> @ imm = #-2
-    3390:      	ldr	r0, [sp, #28]
-    3392:      	str	r0, [sp, #224]
-    3394:      	str	r0, [sp, #228]
-    3396:      	movs	r1, #32
-    3398:      	str	r1, [sp, #232]
-    339a:      	str	r0, [sp, #236]
-    339c:      	str	r1, [sp, #240]
-    339e:      	adds	r0, #32
-    33a0:      	str	r0, [sp, #244]
-    33a2:      	ldr	r0, [sp, #244]
-    33a4:      	str	r0, [sp, #16]
-    33a6:      	b	0x3468 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd4703b18b9deaafa+0x1e8> @ imm = #190
-    33a8:      	ldr	r0, [sp, #28]
-    33aa:      	str	r0, [sp, #248]
-    33ac:      	str	r0, [sp, #252]
-    33ae:      	movs	r1, #32
-    33b0:      	str	r1, [sp, #256]
-    33b2:      	str	r0, [sp, #260]
-    33b4:      	str	r1, [sp, #264]
-    33b6:      	adds	r0, #32
-    33b8:      	str	r0, [sp, #268]
-    33ba:      	ldr	r0, [sp, #268]
-    33bc:      	str	r0, [sp, #12]
-    33be:      	b	0x33c0 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd4703b18b9deaafa+0x140> @ imm = #-2
-    33c0:      	ldr	r0, [sp, #12]
-    33c2:      	add	r1, sp, #120
-    33c4:      	str	r1, [sp, #124]
-    33c6:      	ldr	r1, [sp, #124]
-    33c8:      	str	r1, [sp, #8]
-    33ca:      	str	r0, [sp, #368]
-    33cc:      	str	r1, [sp, #372]
-    33ce:      	str	r0, [sp, #380]
-    33d0:      	str	r0, [sp, #384]
-    33d2:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #19610
-    33d6:      	mov	r1, r0
-    33d8:      	ldr	r0, [sp, #8]
-    33da:      	str	r1, [sp, #376]
-    33dc:      	str	r1, [sp, #356]
-    33de:      	ldr	r2, [sp, #356]
-    33e0:      	str	r2, [sp, #392]
-    33e2:      	str	r2, [sp, #388]
-    33e4:      	ldr	r2, [sp, #388]
-    33e6:      	str	r2, [sp, #352]
-    33e8:      	str	r1, [sp, #364]
-    33ea:      	ldr	r1, [sp, #364]
-    33ec:      	str	r1, [sp, #412]
-    33ee:      	str	r1, [sp, #408]
-    33f0:      	ldr	r1, [sp, #408]
-    33f2:      	str	r1, [sp, #360]
-    33f4:      	add	r1, sp, #352
-    33f6:      	str	r1, [sp, #344]
-    33f8:      	add	r1, sp, #360
-    33fa:      	str	r1, [sp, #348]
-    33fc:      	ldr	r1, [sp, #344]
-    33fe:      	ldr	r2, [sp, #348]
-    3400:      	bl	0xd68 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h71331b163ae8c41a> @ imm = #-9884
-    3404:      	mov	r1, r0
-    3406:      	ldr	r0, [sp, #12]
-    3408:      	ldr	r1, [r1]
-    340a:      	str	r0, [sp, #396]
-    340c:      	str	r1, [sp, #400]
-    340e:      	str	r0, [sp, #404]
-    3410:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #19568
-    3414:      	b	0x3416 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd4703b18b9deaafa+0x196> @ imm = #-2
-    3416:      	ldr	r0, [sp, #28]
-    3418:      	str	r0, [sp, #416]
-    341a:      	str	r0, [sp, #420]
-    341c:      	movs	r1, #20
-    341e:      	str	r1, [sp, #424]
-    3420:      	str	r0, [sp, #428]
-    3422:      	str	r1, [sp, #432]
-    3424:      	adds	r0, #20
-    3426:      	str	r0, [sp, #436]
-    3428:      	ldr	r0, [sp, #436]
-    342a:      	str	r0, [sp, #4]
-    342c:      	b	0x342e <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd4703b18b9deaafa+0x1ae> @ imm = #-2
-    342e:      	ldr	r1, [sp, #4]
-    3430:      	add	r0, sp, #120
-    3432:      	str	r0, [sp, #128]
-    3434:      	ldr	r0, [sp, #128]
-    3436:      	str	r1, [sp, #452]
-    3438:      	str	r0, [sp, #456]
-    343a:      	movs	r1, #0
-    343c:      	str	r1, [sp, #448]
-    343e:      	ldr	r1, [sp, #448]
-    3440:      	str	r1, [sp, #476]
-    3442:      	str	r1, [sp, #472]
-    3444:      	ldr	r1, [sp, #472]
-    3446:      	str	r1, [sp, #444]
-    3448:      	add	r1, sp, #444
-    344a:      	str	r1, [sp, #440]
-    344c:      	ldr	r1, [sp, #440]
-    344e:      	bl	0xd08 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h596b187473cdcc6a> @ imm = #-10058
-    3452:      	mov	r1, r0
-    3454:      	ldr	r0, [sp, #4]
-    3456:      	ldr	r1, [r1]
-    3458:      	str	r0, [sp, #460]
-    345a:      	str	r1, [sp, #464]
-    345c:      	str	r0, [sp, #468]
-    345e:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #19490
-    3462:      	b	0x3464 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd4703b18b9deaafa+0x1e4> @ imm = #-2
-    3464:      	add	sp, #480
-    3466:      	pop	{r4, r5, r7, pc}
-    3468:      	ldr	r0, [sp, #16]
-    346a:      	add	r1, sp, #120
-    346c:      	str	r1, [sp, #132]
-    346e:      	ldr	r1, [sp, #132]
-    3470:      	str	r1, [sp]
-    3472:      	str	r0, [sp, #296]
-    3474:      	str	r1, [sp, #300]
-    3476:      	str	r0, [sp, #308]
-    3478:      	str	r0, [sp, #312]
-    347a:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #19442
-    347e:      	mov	r1, r0
-    3480:      	ldr	r0, [sp]
-    3482:      	str	r1, [sp, #304]
-    3484:      	str	r1, [sp, #284]
-    3486:      	ldr	r2, [sp, #284]
-    3488:      	str	r2, [sp, #320]
-    348a:      	str	r2, [sp, #316]
-    348c:      	ldr	r2, [sp, #316]
-    348e:      	str	r2, [sp, #280]
-    3490:      	str	r1, [sp, #292]
-    3492:      	ldr	r1, [sp, #292]
-    3494:      	str	r1, [sp, #340]
-    3496:      	str	r1, [sp, #336]
-    3498:      	ldr	r1, [sp, #336]
-    349a:      	str	r1, [sp, #288]
-    349c:      	add	r1, sp, #280
-    349e:      	str	r1, [sp, #272]
-    34a0:      	add	r1, sp, #288
-    34a2:      	str	r1, [sp, #276]
-    34a4:      	ldr	r1, [sp, #272]
-    34a6:      	ldr	r2, [sp, #276]
-    34a8:      	bl	0x108e <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::haa49f5997c16baa2> @ imm = #-9246
-    34ac:      	mov	r1, r0
-    34ae:      	ldr	r0, [sp, #16]
-    34b0:      	ldr	r1, [r1]
-    34b2:      	str	r0, [sp, #324]
-    34b4:      	str	r1, [sp, #328]
-    34b6:      	str	r0, [sp, #332]
-    34b8:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #19400
-    34bc:      	b	0x3464 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd4703b18b9deaafa+0x1e4> @ imm = #-92
-    34be:      	mov	r8, r8
-
-000034c0 <$d.27>:
-    34c0:	e0 ae 00 00	.word	0x0000aee0
-
-000034c4 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd8f1767fa05895a9>:
-    34c4:      	push	{r4, r5, r7, lr}
-    34c6:      	add	r7, sp, #8
-    34c8:      	sub	sp, #480
-    34ca:      	str	r2, [sp, #52]
-    34cc:      	mov	r2, r1
-    34ce:      	ldr	r1, [sp, #52]
-    34d0:      	str	r2, [sp, #56]
-    34d2:      	mov	r2, r0
-    34d4:      	ldr	r0, [sp, #56]
-    34d6:      	str	r2, [sp, #60]
-    34d8:      	str	r2, [sp, #136]
-    34da:      	add	r2, sp, #140
-    34dc:      	strb	r0, [r2]
-    34de:      	strb	r1, [r2, #1]
-    34e0:      	bl	0x206c <<T as core::convert::Into<U>>::into::hdd9b7bd64a789ca4> @ imm = #-5240
-    34e4:      	add	r2, sp, #144
-    34e6:      	strh	r1, [r2, #4]
-    34e8:      	str	r0, [sp, #144]
-    34ea:      	ldr	r0, [sp, #148]
-    34ec:      	add	r1, sp, #84
-    34ee:      	strh	r0, [r1, #4]
-    34f0:      	ldr	r0, [sp, #144]
-    34f2:      	str	r0, [sp, #84]
-    34f4:      	b	0x34f6 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd8f1767fa05895a9+0x32> @ imm = #-2
-    34f6:      	ldr	r0, [sp, #60]
-    34f8:      	ldr	r1, [sp, #84]
-    34fa:      	str	r1, [sp, #44]
-    34fc:      	add	r2, sp, #156
-    34fe:      	strb	r1, [r2]
-    3500:      	ldr	r1, [sp, #88]
-    3502:      	add	r2, sp, #64
-    3504:      	strb	r1, [r2]
-    3506:      	add	r1, sp, #84
-    3508:      	ldrb	r2, [r1, #1]
-    350a:      	add	r3, sp, #68
-    350c:      	strb	r2, [r3]
-    350e:      	ldrb	r2, [r1, #3]
-    3510:      	add	r3, sp, #72
-    3512:      	strb	r2, [r3]
-    3514:      	ldrb	r2, [r1, #2]
-    3516:      	add	r3, sp, #76
-    3518:      	strb	r2, [r3]
-    351a:      	ldrb	r1, [r1, #5]
-    351c:      	add	r2, sp, #80
-    351e:      	strb	r1, [r2]
-    3520:      	bl	0x391c <va108xx_hal::gpio::reg::RegisterInterface::port_reg::he5ea5e97918943ff> @ imm = #1016
-    3524:      	str	r0, [sp, #48]
-    3526:      	b	0x3528 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd8f1767fa05895a9+0x64> @ imm = #-2
-    3528:      	ldr	r0, [sp, #60]
-    352a:      	bl	0x2b04 <va108xx_hal::gpio::reg::RegisterInterface::iocfg_port::h7557ffc5152f194d> @ imm = #-2602
-    352e:      	str	r0, [sp, #40]
-    3530:      	b	0x3532 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd8f1767fa05895a9+0x6e> @ imm = #-2
-    3532:      	ldr	r0, [sp, #60]
-    3534:      	ldr	r1, [sp, #40]
-    3536:      	ldr	r2, [sp, #48]
-    3538:      	str	r2, [sp, #92]
-    353a:      	str	r1, [sp, #96]
-    353c:      	ldr	r1, [sp, #92]
-    353e:      	str	r1, [sp, #28]
-    3540:      	str	r1, [sp, #160]
-    3542:      	ldr	r1, [sp, #96]
-    3544:      	str	r1, [sp, #32]
-    3546:      	str	r1, [sp, #164]
-    3548:      	bl	0x29d4 <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::hcb9eccc5e62522bf> @ imm = #-2936
-    354c:      	str	r1, [sp, #36]
-    354e:      	b	0x3550 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd8f1767fa05895a9+0x8c> @ imm = #-2
-    3550:      	ldr	r0, [sp, #36]
-    3552:      	uxtb	r0, r0
-    3554:      	str	r0, [sp, #24]
-    3556:      	cmp	r0, #31
-    3558:      	bhi	0x35b4 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd8f1767fa05895a9+0xf0> @ imm = #88
-    355a:      	b	0x355c <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd8f1767fa05895a9+0x98> @ imm = #-2
-    355c:      	ldr	r0, [sp, #32]
-    355e:      	ldr	r1, [sp, #24]
-    3560:      	lsls	r1, r1, #2
-    3562:      	adds	r0, r0, r1
-    3564:      	str	r0, [sp, #20]
-    3566:      	add	r1, sp, #68
-    3568:      	str	r1, [sp, #100]
-    356a:      	add	r1, sp, #76
-    356c:      	str	r1, [sp, #104]
-    356e:      	add	r1, sp, #72
-    3570:      	str	r1, [sp, #108]
-    3572:      	add	r1, sp, #80
-    3574:      	str	r1, [sp, #112]
-    3576:      	add	r1, sp, #64
-    3578:      	str	r1, [sp, #116]
-    357a:      	str	r0, [sp, #200]
-    357c:      	add	r2, sp, #100
-    357e:      	add	r0, sp, #168
-    3580:      	mov	r1, r0
-    3582:      	ldm	r2!, {r3, r4}
-    3584:      	stm	r1!, {r3, r4}
-    3586:      	ldm	r2!, {r3, r4, r5}
-    3588:      	stm	r1!, {r3, r4, r5}
-    358a:      	movs	r1, #0
-    358c:      	str	r1, [sp, #196]
-    358e:      	ldr	r1, [sp, #196]
-    3590:      	str	r1, [sp, #220]
-    3592:      	str	r1, [sp, #216]
-    3594:      	ldr	r1, [sp, #216]
-    3596:      	str	r1, [sp, #192]
-    3598:      	add	r1, sp, #192
-    359a:      	str	r1, [sp, #188]
-    359c:      	ldr	r1, [sp, #188]
-    359e:      	bl	0xf96 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h9d2e25fa09987069> @ imm = #-9740
-    35a2:      	mov	r1, r0
-    35a4:      	ldr	r0, [sp, #20]
-    35a6:      	ldr	r1, [r1]
-    35a8:      	str	r0, [sp, #204]
-    35aa:      	str	r1, [sp, #208]
-    35ac:      	str	r0, [sp, #212]
-    35ae:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #19154
-    35b2:      	b	0x35c0 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd8f1767fa05895a9+0xfc> @ imm = #10
-    35b4:      	ldr	r0, [sp, #24]
-    35b6:      	ldr	r2, [pc, #332] <$d.29+0x2>
-    35b8:      	movs	r1, #32
-    35ba:      	bl	0x8574 <core::panicking::panic_bounds_check::h5d2fdbe20d7940cc> @ imm = #20406
-    35be:      	trap
-    35c0:      	ldr	r0, [sp, #60]
-    35c2:      	bl	0x3708 <va108xx_hal::gpio::reg::RegisterInterface::mask_32::h08079642aee3618d> @ imm = #322
-    35c6:      	str	r0, [sp, #120]
-    35c8:      	b	0x35ca <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd8f1767fa05895a9+0x106> @ imm = #-2
-    35ca:      	ldr	r0, [sp, #44]
-    35cc:      	lsls	r0, r0, #31
-    35ce:      	cmp	r0, #0
-    35d0:      	bne	0x35ec <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd8f1767fa05895a9+0x128> @ imm = #24
-    35d2:      	b	0x35d4 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd8f1767fa05895a9+0x110> @ imm = #-2
-    35d4:      	ldr	r0, [sp, #28]
-    35d6:      	str	r0, [sp, #224]
-    35d8:      	str	r0, [sp, #228]
-    35da:      	movs	r1, #32
-    35dc:      	str	r1, [sp, #232]
-    35de:      	str	r0, [sp, #236]
-    35e0:      	str	r1, [sp, #240]
-    35e2:      	adds	r0, #32
-    35e4:      	str	r0, [sp, #244]
-    35e6:      	ldr	r0, [sp, #244]
-    35e8:      	str	r0, [sp, #16]
-    35ea:      	b	0x36ac <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd8f1767fa05895a9+0x1e8> @ imm = #190
-    35ec:      	ldr	r0, [sp, #28]
-    35ee:      	str	r0, [sp, #248]
-    35f0:      	str	r0, [sp, #252]
-    35f2:      	movs	r1, #32
-    35f4:      	str	r1, [sp, #256]
-    35f6:      	str	r0, [sp, #260]
-    35f8:      	str	r1, [sp, #264]
-    35fa:      	adds	r0, #32
-    35fc:      	str	r0, [sp, #268]
-    35fe:      	ldr	r0, [sp, #268]
-    3600:      	str	r0, [sp, #12]
-    3602:      	b	0x3604 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd8f1767fa05895a9+0x140> @ imm = #-2
-    3604:      	ldr	r0, [sp, #12]
-    3606:      	add	r1, sp, #120
-    3608:      	str	r1, [sp, #124]
-    360a:      	ldr	r1, [sp, #124]
-    360c:      	str	r1, [sp, #8]
-    360e:      	str	r0, [sp, #368]
-    3610:      	str	r1, [sp, #372]
-    3612:      	str	r0, [sp, #380]
-    3614:      	str	r0, [sp, #384]
-    3616:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #19030
-    361a:      	mov	r1, r0
-    361c:      	ldr	r0, [sp, #8]
-    361e:      	str	r1, [sp, #376]
-    3620:      	str	r1, [sp, #356]
-    3622:      	ldr	r2, [sp, #356]
-    3624:      	str	r2, [sp, #392]
-    3626:      	str	r2, [sp, #388]
-    3628:      	ldr	r2, [sp, #388]
-    362a:      	str	r2, [sp, #352]
-    362c:      	str	r1, [sp, #364]
-    362e:      	ldr	r1, [sp, #364]
-    3630:      	str	r1, [sp, #412]
-    3632:      	str	r1, [sp, #408]
-    3634:      	ldr	r1, [sp, #408]
-    3636:      	str	r1, [sp, #360]
-    3638:      	add	r1, sp, #352
-    363a:      	str	r1, [sp, #344]
-    363c:      	add	r1, sp, #360
-    363e:      	str	r1, [sp, #348]
-    3640:      	ldr	r1, [sp, #344]
-    3642:      	ldr	r2, [sp, #348]
-    3644:      	bl	0x127e <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hdf2551c38320ba25> @ imm = #-9162
-    3648:      	mov	r1, r0
-    364a:      	ldr	r0, [sp, #12]
-    364c:      	ldr	r1, [r1]
-    364e:      	str	r0, [sp, #396]
-    3650:      	str	r1, [sp, #400]
-    3652:      	str	r0, [sp, #404]
-    3654:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #18988
-    3658:      	b	0x365a <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd8f1767fa05895a9+0x196> @ imm = #-2
-    365a:      	ldr	r0, [sp, #28]
-    365c:      	str	r0, [sp, #416]
-    365e:      	str	r0, [sp, #420]
-    3660:      	movs	r1, #20
-    3662:      	str	r1, [sp, #424]
-    3664:      	str	r0, [sp, #428]
-    3666:      	str	r1, [sp, #432]
-    3668:      	adds	r0, #20
-    366a:      	str	r0, [sp, #436]
-    366c:      	ldr	r0, [sp, #436]
-    366e:      	str	r0, [sp, #4]
-    3670:      	b	0x3672 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd8f1767fa05895a9+0x1ae> @ imm = #-2
-    3672:      	ldr	r1, [sp, #4]
-    3674:      	add	r0, sp, #120
-    3676:      	str	r0, [sp, #128]
-    3678:      	ldr	r0, [sp, #128]
-    367a:      	str	r1, [sp, #452]
-    367c:      	str	r0, [sp, #456]
-    367e:      	movs	r1, #0
-    3680:      	str	r1, [sp, #448]
-    3682:      	ldr	r1, [sp, #448]
-    3684:      	str	r1, [sp, #476]
-    3686:      	str	r1, [sp, #472]
-    3688:      	ldr	r1, [sp, #472]
-    368a:      	str	r1, [sp, #444]
-    368c:      	add	r1, sp, #444
-    368e:      	str	r1, [sp, #440]
-    3690:      	ldr	r1, [sp, #440]
-    3692:      	bl	0xce6 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::h508745a5edd80e9e> @ imm = #-10672
-    3696:      	mov	r1, r0
-    3698:      	ldr	r0, [sp, #4]
-    369a:      	ldr	r1, [r1]
-    369c:      	str	r0, [sp, #460]
-    369e:      	str	r1, [sp, #464]
-    36a0:      	str	r0, [sp, #468]
-    36a2:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #18910
-    36a6:      	b	0x36a8 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd8f1767fa05895a9+0x1e4> @ imm = #-2
-    36a8:      	add	sp, #480
-    36aa:      	pop	{r4, r5, r7, pc}
-    36ac:      	ldr	r0, [sp, #16]
-    36ae:      	add	r1, sp, #120
-    36b0:      	str	r1, [sp, #132]
-    36b2:      	ldr	r1, [sp, #132]
-    36b4:      	str	r1, [sp]
-    36b6:      	str	r0, [sp, #296]
-    36b8:      	str	r1, [sp, #300]
-    36ba:      	str	r0, [sp, #308]
-    36bc:      	str	r0, [sp, #312]
-    36be:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #18862
-    36c2:      	mov	r1, r0
-    36c4:      	ldr	r0, [sp]
-    36c6:      	str	r1, [sp, #304]
-    36c8:      	str	r1, [sp, #284]
-    36ca:      	ldr	r2, [sp, #284]
-    36cc:      	str	r2, [sp, #320]
-    36ce:      	str	r2, [sp, #316]
-    36d0:      	ldr	r2, [sp, #316]
-    36d2:      	str	r2, [sp, #280]
-    36d4:      	str	r1, [sp, #292]
-    36d6:      	ldr	r1, [sp, #292]
-    36d8:      	str	r1, [sp, #340]
-    36da:      	str	r1, [sp, #336]
-    36dc:      	ldr	r1, [sp, #336]
-    36de:      	str	r1, [sp, #288]
-    36e0:      	add	r1, sp, #280
-    36e2:      	str	r1, [sp, #272]
-    36e4:      	add	r1, sp, #288
-    36e6:      	str	r1, [sp, #276]
-    36e8:      	ldr	r1, [sp, #272]
-    36ea:      	ldr	r2, [sp, #276]
-    36ec:      	bl	0x11c4 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::{{closure}}::hca9233633cf4eef3> @ imm = #-9516
-    36f0:      	mov	r1, r0
-    36f2:      	ldr	r0, [sp, #16]
-    36f4:      	ldr	r1, [r1]
-    36f6:      	str	r0, [sp, #324]
-    36f8:      	str	r1, [sp, #328]
-    36fa:      	str	r0, [sp, #332]
-    36fc:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #18820
-    3700:      	b	0x36a8 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd8f1767fa05895a9+0x1e4> @ imm = #-92
-    3702:      	mov	r8, r8
-
-00003704 <$d.29>:
-    3704:	e0 ae 00 00	.word	0x0000aee0
-
-00003708 <va108xx_hal::gpio::reg::RegisterInterface::mask_32::h08079642aee3618d>:
-    3708:      	push	{r7, lr}
-    370a:      	add	r7, sp, #0
-    370c:      	sub	sp, #16
-    370e:      	str	r0, [sp, #12]
-    3710:      	bl	0x29d4 <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::hcb9eccc5e62522bf> @ imm = #-3392
-    3714:      	str	r1, [sp, #8]
-    3716:      	b	0x3718 <va108xx_hal::gpio::reg::RegisterInterface::mask_32::h08079642aee3618d+0x10> @ imm = #-2
-    3718:      	ldr	r0, [sp, #8]
-    371a:      	movs	r1, #31
-    371c:      	mov	r2, r0
-    371e:      	ands	r2, r1
-    3720:      	movs	r1, #1
-    3722:      	lsls	r1, r2
-    3724:      	str	r1, [sp, #4]
-    3726:      	lsls	r0, r0, #24
-    3728:      	lsrs	r0, r0, #29
-    372a:      	cmp	r0, #0
-    372c:      	bne	0x3736 <va108xx_hal::gpio::reg::RegisterInterface::mask_32::h08079642aee3618d+0x2e> @ imm = #6
-    372e:      	b	0x3730 <va108xx_hal::gpio::reg::RegisterInterface::mask_32::h08079642aee3618d+0x28> @ imm = #-2
-    3730:      	ldr	r0, [sp, #4]
-    3732:      	add	sp, #16
-    3734:      	pop	{r7, pc}
-    3736:      	ldr	r0, [pc, #12] <$d.31+0x2>
-    3738:      	ldr	r2, [pc, #12] <$d.31+0x4>
-    373a:      	movs	r1, #35
-    373c:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #19976
-    3740:      	trap
-    3742:      	mov	r8, r8
-
-00003744 <$d.31>:
-    3744:	00 af 00 00	.word	0x0000af00
-    3748:	f0 ae 00 00	.word	0x0000aef0
-
-0000374c <va108xx_hal::gpio::reg::RegisterInterface::mask_32::h850e6d41973af99d>:
-    374c:      	push	{r7, lr}
-    374e:      	add	r7, sp, #0
-    3750:      	sub	sp, #16
-    3752:      	str	r0, [sp, #12]
-    3754:      	bl	0x2998 <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::h066f9e7ad0c8ecba> @ imm = #-3520
-    3758:      	str	r1, [sp, #8]
-    375a:      	b	0x375c <va108xx_hal::gpio::reg::RegisterInterface::mask_32::h850e6d41973af99d+0x10> @ imm = #-2
-    375c:      	ldr	r0, [sp, #8]
-    375e:      	movs	r1, #31
-    3760:      	mov	r2, r0
-    3762:      	ands	r2, r1
-    3764:      	movs	r1, #1
-    3766:      	lsls	r1, r2
-    3768:      	str	r1, [sp, #4]
-    376a:      	lsls	r0, r0, #24
-    376c:      	lsrs	r0, r0, #29
-    376e:      	cmp	r0, #0
-    3770:      	bne	0x377a <va108xx_hal::gpio::reg::RegisterInterface::mask_32::h850e6d41973af99d+0x2e> @ imm = #6
-    3772:      	b	0x3774 <va108xx_hal::gpio::reg::RegisterInterface::mask_32::h850e6d41973af99d+0x28> @ imm = #-2
-    3774:      	ldr	r0, [sp, #4]
-    3776:      	add	sp, #16
-    3778:      	pop	{r7, pc}
-    377a:      	ldr	r0, [pc, #12] <$d.33+0x2>
-    377c:      	ldr	r2, [pc, #12] <$d.33+0x4>
-    377e:      	movs	r1, #35
-    3780:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #19908
-    3784:      	trap
-    3786:      	mov	r8, r8
-
-00003788 <$d.33>:
-    3788:	00 af 00 00	.word	0x0000af00
-    378c:	f0 ae 00 00	.word	0x0000aef0
-
-00003790 <va108xx_hal::gpio::reg::RegisterInterface::mask_32::h8a718548d138d583>:
-    3790:      	push	{r7, lr}
-    3792:      	add	r7, sp, #0
-    3794:      	sub	sp, #16
-    3796:      	str	r0, [sp, #12]
-    3798:      	bl	0x29ac <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::h14b68e4b2d1cc8db> @ imm = #-3568
-    379c:      	str	r1, [sp, #8]
-    379e:      	b	0x37a0 <va108xx_hal::gpio::reg::RegisterInterface::mask_32::h8a718548d138d583+0x10> @ imm = #-2
-    37a0:      	ldr	r0, [sp, #8]
-    37a2:      	movs	r1, #31
-    37a4:      	mov	r2, r0
-    37a6:      	ands	r2, r1
-    37a8:      	movs	r1, #1
-    37aa:      	lsls	r1, r2
-    37ac:      	str	r1, [sp, #4]
-    37ae:      	lsls	r0, r0, #24
-    37b0:      	lsrs	r0, r0, #29
-    37b2:      	cmp	r0, #0
-    37b4:      	bne	0x37be <va108xx_hal::gpio::reg::RegisterInterface::mask_32::h8a718548d138d583+0x2e> @ imm = #6
-    37b6:      	b	0x37b8 <va108xx_hal::gpio::reg::RegisterInterface::mask_32::h8a718548d138d583+0x28> @ imm = #-2
-    37b8:      	ldr	r0, [sp, #4]
-    37ba:      	add	sp, #16
-    37bc:      	pop	{r7, pc}
-    37be:      	ldr	r0, [pc, #12] <$d.35+0x2>
-    37c0:      	ldr	r2, [pc, #12] <$d.35+0x4>
-    37c2:      	movs	r1, #35
-    37c4:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #19840
-    37c8:      	trap
-    37ca:      	mov	r8, r8
-
-000037cc <$d.35>:
-    37cc:	00 af 00 00	.word	0x0000af00
-    37d0:	f0 ae 00 00	.word	0x0000aef0
-
-000037d4 <va108xx_hal::gpio::reg::RegisterInterface::mask_32::h96a18d1555422167>:
-    37d4:      	push	{r7, lr}
-    37d6:      	add	r7, sp, #0
-    37d8:      	sub	sp, #16
-    37da:      	str	r0, [sp, #12]
-    37dc:      	bl	0x29e8 <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::hd4074274e345a5df> @ imm = #-3576
-    37e0:      	str	r1, [sp, #8]
-    37e2:      	b	0x37e4 <va108xx_hal::gpio::reg::RegisterInterface::mask_32::h96a18d1555422167+0x10> @ imm = #-2
-    37e4:      	ldr	r0, [sp, #8]
-    37e6:      	movs	r1, #31
-    37e8:      	mov	r2, r0
-    37ea:      	ands	r2, r1
-    37ec:      	movs	r1, #1
-    37ee:      	lsls	r1, r2
-    37f0:      	str	r1, [sp, #4]
-    37f2:      	lsls	r0, r0, #24
-    37f4:      	lsrs	r0, r0, #29
-    37f6:      	cmp	r0, #0
-    37f8:      	bne	0x3802 <va108xx_hal::gpio::reg::RegisterInterface::mask_32::h96a18d1555422167+0x2e> @ imm = #6
-    37fa:      	b	0x37fc <va108xx_hal::gpio::reg::RegisterInterface::mask_32::h96a18d1555422167+0x28> @ imm = #-2
-    37fc:      	ldr	r0, [sp, #4]
-    37fe:      	add	sp, #16
-    3800:      	pop	{r7, pc}
-    3802:      	ldr	r0, [pc, #12] <$d.37+0x2>
-    3804:      	ldr	r2, [pc, #12] <$d.37+0x4>
-    3806:      	movs	r1, #35
-    3808:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #19772
-    380c:      	trap
-    380e:      	mov	r8, r8
-
-00003810 <$d.37>:
-    3810:	00 af 00 00	.word	0x0000af00
-    3814:	f0 ae 00 00	.word	0x0000aef0
-
-00003818 <va108xx_hal::gpio::reg::RegisterInterface::mask_32::hfa3d202990172a8a>:
-    3818:      	push	{r7, lr}
-    381a:      	add	r7, sp, #0
-    381c:      	sub	sp, #16
-    381e:      	str	r0, [sp, #12]
-    3820:      	bl	0x29c0 <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::h52eddb5fb8f994a8> @ imm = #-3684
-    3824:      	str	r1, [sp, #8]
-    3826:      	b	0x3828 <va108xx_hal::gpio::reg::RegisterInterface::mask_32::hfa3d202990172a8a+0x10> @ imm = #-2
-    3828:      	ldr	r0, [sp, #8]
-    382a:      	movs	r1, #31
-    382c:      	mov	r2, r0
-    382e:      	ands	r2, r1
-    3830:      	movs	r1, #1
-    3832:      	lsls	r1, r2
-    3834:      	str	r1, [sp, #4]
-    3836:      	lsls	r0, r0, #24
-    3838:      	lsrs	r0, r0, #29
-    383a:      	cmp	r0, #0
-    383c:      	bne	0x3846 <va108xx_hal::gpio::reg::RegisterInterface::mask_32::hfa3d202990172a8a+0x2e> @ imm = #6
-    383e:      	b	0x3840 <va108xx_hal::gpio::reg::RegisterInterface::mask_32::hfa3d202990172a8a+0x28> @ imm = #-2
-    3840:      	ldr	r0, [sp, #4]
-    3842:      	add	sp, #16
-    3844:      	pop	{r7, pc}
-    3846:      	ldr	r0, [pc, #12] <$d.39+0x2>
-    3848:      	ldr	r2, [pc, #12] <$d.39+0x4>
-    384a:      	movs	r1, #35
-    384c:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #19704
-    3850:      	trap
-    3852:      	mov	r8, r8
-
-00003854 <$d.39>:
-    3854:	00 af 00 00	.word	0x0000af00
-    3858:	f0 ae 00 00	.word	0x0000aef0
-
-0000385c <va108xx_hal::gpio::reg::RegisterInterface::port_reg::h0a1bb866cbaf7b19>:
-    385c:      	push	{r7, lr}
-    385e:      	add	r7, sp, #0
-    3860:      	sub	sp, #16
-    3862:      	str	r0, [sp, #12]
-    3864:      	bl	0x2998 <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::h066f9e7ad0c8ecba> @ imm = #-3792
-    3868:      	mov	r2, r1
-    386a:      	add	r1, sp, #8
-    386c:      	strb	r2, [r1, #1]
-    386e:      	strb	r0, [r1]
-    3870:      	b	0x3872 <va108xx_hal::gpio::reg::RegisterInterface::port_reg::h0a1bb866cbaf7b19+0x16> @ imm = #-2
-    3872:      	add	r0, sp, #8
-    3874:      	ldrb	r0, [r0]
-    3876:      	lsls	r0, r0, #31
-    3878:      	cmp	r0, #0
-    387a:      	beq	0x3882 <va108xx_hal::gpio::reg::RegisterInterface::port_reg::h0a1bb866cbaf7b19+0x26> @ imm = #4
-    387c:      	b	0x387e <va108xx_hal::gpio::reg::RegisterInterface::port_reg::h0a1bb866cbaf7b19+0x22> @ imm = #-2
-    387e:      	b	0x388a <va108xx_hal::gpio::reg::RegisterInterface::port_reg::h0a1bb866cbaf7b19+0x2e> @ imm = #8
-    3880:      	trap
-    3882:      	movs	r0, #5
-    3884:      	lsls	r0, r0, #28
-    3886:      	str	r0, [sp, #4]
-    3888:      	b	0x3890 <va108xx_hal::gpio::reg::RegisterInterface::port_reg::h0a1bb866cbaf7b19+0x34> @ imm = #4
-    388a:      	ldr	r0, [pc, #12] <$d.41+0x2>
-    388c:      	str	r0, [sp, #4]
-    388e:      	b	0x3890 <va108xx_hal::gpio::reg::RegisterInterface::port_reg::h0a1bb866cbaf7b19+0x34> @ imm = #-2
-    3890:      	ldr	r0, [sp, #4]
-    3892:      	add	sp, #16
-    3894:      	pop	{r7, pc}
-    3896:      	mov	r8, r8
-
-00003898 <$d.41>:
-    3898:	00 10 00 50	.word	0x50001000
-
-0000389c <va108xx_hal::gpio::reg::RegisterInterface::port_reg::h14c83a8d64a8cbf2>:
-    389c:      	push	{r7, lr}
-    389e:      	add	r7, sp, #0
-    38a0:      	sub	sp, #16
-    38a2:      	str	r0, [sp, #12]
-    38a4:      	bl	0x29c0 <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::h52eddb5fb8f994a8> @ imm = #-3816
-    38a8:      	mov	r2, r1
-    38aa:      	add	r1, sp, #8
-    38ac:      	strb	r2, [r1, #1]
-    38ae:      	strb	r0, [r1]
-    38b0:      	b	0x38b2 <va108xx_hal::gpio::reg::RegisterInterface::port_reg::h14c83a8d64a8cbf2+0x16> @ imm = #-2
-    38b2:      	add	r0, sp, #8
-    38b4:      	ldrb	r0, [r0]
-    38b6:      	lsls	r0, r0, #31
-    38b8:      	cmp	r0, #0
-    38ba:      	beq	0x38c2 <va108xx_hal::gpio::reg::RegisterInterface::port_reg::h14c83a8d64a8cbf2+0x26> @ imm = #4
-    38bc:      	b	0x38be <va108xx_hal::gpio::reg::RegisterInterface::port_reg::h14c83a8d64a8cbf2+0x22> @ imm = #-2
-    38be:      	b	0x38ca <va108xx_hal::gpio::reg::RegisterInterface::port_reg::h14c83a8d64a8cbf2+0x2e> @ imm = #8
-    38c0:      	trap
-    38c2:      	movs	r0, #5
-    38c4:      	lsls	r0, r0, #28
-    38c6:      	str	r0, [sp, #4]
-    38c8:      	b	0x38d0 <va108xx_hal::gpio::reg::RegisterInterface::port_reg::h14c83a8d64a8cbf2+0x34> @ imm = #4
-    38ca:      	ldr	r0, [pc, #12] <$d.43+0x2>
-    38cc:      	str	r0, [sp, #4]
-    38ce:      	b	0x38d0 <va108xx_hal::gpio::reg::RegisterInterface::port_reg::h14c83a8d64a8cbf2+0x34> @ imm = #-2
-    38d0:      	ldr	r0, [sp, #4]
-    38d2:      	add	sp, #16
-    38d4:      	pop	{r7, pc}
-    38d6:      	mov	r8, r8
-
-000038d8 <$d.43>:
-    38d8:	00 10 00 50	.word	0x50001000
-
-000038dc <va108xx_hal::gpio::reg::RegisterInterface::port_reg::hafceca2e50e58a72>:
-    38dc:      	push	{r7, lr}
-    38de:      	add	r7, sp, #0
-    38e0:      	sub	sp, #16
-    38e2:      	str	r0, [sp, #12]
-    38e4:      	bl	0x29e8 <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::hd4074274e345a5df> @ imm = #-3840
-    38e8:      	mov	r2, r1
-    38ea:      	add	r1, sp, #8
-    38ec:      	strb	r2, [r1, #1]
-    38ee:      	strb	r0, [r1]
-    38f0:      	b	0x38f2 <va108xx_hal::gpio::reg::RegisterInterface::port_reg::hafceca2e50e58a72+0x16> @ imm = #-2
-    38f2:      	add	r0, sp, #8
-    38f4:      	ldrb	r0, [r0]
-    38f6:      	lsls	r0, r0, #31
-    38f8:      	cmp	r0, #0
-    38fa:      	beq	0x3902 <va108xx_hal::gpio::reg::RegisterInterface::port_reg::hafceca2e50e58a72+0x26> @ imm = #4
-    38fc:      	b	0x38fe <va108xx_hal::gpio::reg::RegisterInterface::port_reg::hafceca2e50e58a72+0x22> @ imm = #-2
-    38fe:      	b	0x390a <va108xx_hal::gpio::reg::RegisterInterface::port_reg::hafceca2e50e58a72+0x2e> @ imm = #8
-    3900:      	trap
-    3902:      	movs	r0, #5
-    3904:      	lsls	r0, r0, #28
-    3906:      	str	r0, [sp, #4]
-    3908:      	b	0x3910 <va108xx_hal::gpio::reg::RegisterInterface::port_reg::hafceca2e50e58a72+0x34> @ imm = #4
-    390a:      	ldr	r0, [pc, #12] <$d.45+0x2>
-    390c:      	str	r0, [sp, #4]
-    390e:      	b	0x3910 <va108xx_hal::gpio::reg::RegisterInterface::port_reg::hafceca2e50e58a72+0x34> @ imm = #-2
-    3910:      	ldr	r0, [sp, #4]
-    3912:      	add	sp, #16
-    3914:      	pop	{r7, pc}
-    3916:      	mov	r8, r8
-
-00003918 <$d.45>:
-    3918:	00 10 00 50	.word	0x50001000
-
-0000391c <va108xx_hal::gpio::reg::RegisterInterface::port_reg::he5ea5e97918943ff>:
-    391c:      	push	{r7, lr}
-    391e:      	add	r7, sp, #0
-    3920:      	sub	sp, #16
-    3922:      	str	r0, [sp, #12]
-    3924:      	bl	0x29d4 <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::hcb9eccc5e62522bf> @ imm = #-3924
-    3928:      	mov	r2, r1
-    392a:      	add	r1, sp, #8
-    392c:      	strb	r2, [r1, #1]
-    392e:      	strb	r0, [r1]
-    3930:      	b	0x3932 <va108xx_hal::gpio::reg::RegisterInterface::port_reg::he5ea5e97918943ff+0x16> @ imm = #-2
-    3932:      	add	r0, sp, #8
-    3934:      	ldrb	r0, [r0]
-    3936:      	lsls	r0, r0, #31
-    3938:      	cmp	r0, #0
-    393a:      	beq	0x3942 <va108xx_hal::gpio::reg::RegisterInterface::port_reg::he5ea5e97918943ff+0x26> @ imm = #4
-    393c:      	b	0x393e <va108xx_hal::gpio::reg::RegisterInterface::port_reg::he5ea5e97918943ff+0x22> @ imm = #-2
-    393e:      	b	0x394a <va108xx_hal::gpio::reg::RegisterInterface::port_reg::he5ea5e97918943ff+0x2e> @ imm = #8
-    3940:      	trap
-    3942:      	movs	r0, #5
-    3944:      	lsls	r0, r0, #28
-    3946:      	str	r0, [sp, #4]
-    3948:      	b	0x3950 <va108xx_hal::gpio::reg::RegisterInterface::port_reg::he5ea5e97918943ff+0x34> @ imm = #4
-    394a:      	ldr	r0, [pc, #12] <$d.47+0x2>
-    394c:      	str	r0, [sp, #4]
-    394e:      	b	0x3950 <va108xx_hal::gpio::reg::RegisterInterface::port_reg::he5ea5e97918943ff+0x34> @ imm = #-2
-    3950:      	ldr	r0, [sp, #4]
-    3952:      	add	sp, #16
-    3954:      	pop	{r7, pc}
-    3956:      	mov	r8, r8
-
-00003958 <$d.47>:
-    3958:	00 10 00 50	.word	0x50001000
-
-0000395c <va108xx_hal::gpio::reg::RegisterInterface::port_reg::hec9bdcb18bf2ab1f>:
-    395c:      	push	{r7, lr}
-    395e:      	add	r7, sp, #0
-    3960:      	sub	sp, #16
-    3962:      	str	r0, [sp, #12]
-    3964:      	bl	0x29ac <<va108xx_hal::gpio::pins::Registers<I> as va108xx_hal::gpio::reg::RegisterInterface>::id::h14b68e4b2d1cc8db> @ imm = #-4028
-    3968:      	mov	r2, r1
-    396a:      	add	r1, sp, #8
-    396c:      	strb	r2, [r1, #1]
-    396e:      	strb	r0, [r1]
-    3970:      	b	0x3972 <va108xx_hal::gpio::reg::RegisterInterface::port_reg::hec9bdcb18bf2ab1f+0x16> @ imm = #-2
-    3972:      	add	r0, sp, #8
-    3974:      	ldrb	r0, [r0]
-    3976:      	lsls	r0, r0, #31
-    3978:      	cmp	r0, #0
-    397a:      	beq	0x3982 <va108xx_hal::gpio::reg::RegisterInterface::port_reg::hec9bdcb18bf2ab1f+0x26> @ imm = #4
-    397c:      	b	0x397e <va108xx_hal::gpio::reg::RegisterInterface::port_reg::hec9bdcb18bf2ab1f+0x22> @ imm = #-2
-    397e:      	b	0x398a <va108xx_hal::gpio::reg::RegisterInterface::port_reg::hec9bdcb18bf2ab1f+0x2e> @ imm = #8
-    3980:      	trap
-    3982:      	movs	r0, #5
-    3984:      	lsls	r0, r0, #28
-    3986:      	str	r0, [sp, #4]
-    3988:      	b	0x3990 <va108xx_hal::gpio::reg::RegisterInterface::port_reg::hec9bdcb18bf2ab1f+0x34> @ imm = #4
-    398a:      	ldr	r0, [pc, #12] <$d.49+0x2>
-    398c:      	str	r0, [sp, #4]
-    398e:      	b	0x3990 <va108xx_hal::gpio::reg::RegisterInterface::port_reg::hec9bdcb18bf2ab1f+0x34> @ imm = #-2
-    3990:      	ldr	r0, [sp, #4]
-    3992:      	add	sp, #16
-    3994:      	pop	{r7, pc}
-    3996:      	mov	r8, r8
-
-00003998 <$d.49>:
-    3998:	00 10 00 50	.word	0x50001000
-
-0000399c <va108xx_hal::gpio::pins::Pin<I,M>::into_funsel_2::h7d104a8eaae16b6a>:
-    399c:      	push	{r7, lr}
-    399e:      	add	r7, sp, #0
-    39a0:      	sub	sp, #8
-    39a2:      	bl	0x3cec <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::hf6ea6c7b2d1b9558> @ imm = #838
-    39a6:      	b	0x39a8 <va108xx_hal::gpio::pins::Pin<I,M>::into_funsel_2::h7d104a8eaae16b6a+0xc> @ imm = #-2
-    39a8:      	add	sp, #8
-    39aa:      	pop	{r7, pc}
-
-000039ac <va108xx_hal::gpio::pins::Pin<I,M>::into_funsel_2::hb3502de63b7504d6>:
-    39ac:      	push	{r7, lr}
-    39ae:      	add	r7, sp, #0
-    39b0:      	sub	sp, #8
-    39b2:      	bl	0x3c0c <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::h0526ea26b755205a> @ imm = #598
-    39b6:      	b	0x39b8 <va108xx_hal::gpio::pins::Pin<I,M>::into_funsel_2::hb3502de63b7504d6+0xc> @ imm = #-2
-    39b8:      	add	sp, #8
-    39ba:      	pop	{r7, pc}
-
-000039bc <va108xx_hal::gpio::pins::Pin<I,M>::into_funsel_2::hb6b6f05d866f4280>:
-    39bc:      	push	{r7, lr}
-    39be:      	add	r7, sp, #0
-    39c0:      	sub	sp, #8
-    39c2:      	bl	0x3cb4 <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::he506b794a825eb71> @ imm = #750
-    39c6:      	b	0x39c8 <va108xx_hal::gpio::pins::Pin<I,M>::into_funsel_2::hb6b6f05d866f4280+0xc> @ imm = #-2
-    39c8:      	add	sp, #8
-    39ca:      	pop	{r7, pc}
-
-000039cc <va108xx_hal::gpio::pins::Pin<I,M>::into_funsel_2::hc536568bbe92e143>:
-    39cc:      	push	{r7, lr}
-    39ce:      	add	r7, sp, #0
-    39d0:      	sub	sp, #8
-    39d2:      	bl	0x3c44 <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::hacc592b634ad9c3e> @ imm = #622
-    39d6:      	b	0x39d8 <va108xx_hal::gpio::pins::Pin<I,M>::into_funsel_2::hc536568bbe92e143+0xc> @ imm = #-2
-    39d8:      	add	sp, #8
-    39da:      	pop	{r7, pc}
-
-000039dc <va108xx_hal::gpio::pins::Pin<I,M>::into_push_pull_output::h8f79fda99918b686>:
-    39dc:      	push	{r7, lr}
-    39de:      	add	r7, sp, #0
-    39e0:      	sub	sp, #8
-    39e2:      	bl	0x3c7c <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::hbd3650966d4e8515> @ imm = #662
-    39e6:      	b	0x39e8 <va108xx_hal::gpio::pins::Pin<I,M>::into_push_pull_output::h8f79fda99918b686+0xc> @ imm = #-2
-    39e8:      	add	sp, #8
-    39ea:      	pop	{r7, pc}
-
-000039ec <va108xx_hal::gpio::pins::Pin<I,M>::new::h008411e9a786d7bd>:
-    39ec:      	push	{r7, lr}
-    39ee:      	add	r7, sp, #0
-    39f0:      	bl	0x3dbc <va108xx_hal::gpio::pins::Registers<I>::new::h2fcc7655f855f123> @ imm = #968
-    39f4:      	b	0x39f6 <va108xx_hal::gpio::pins::Pin<I,M>::new::h008411e9a786d7bd+0xa> @ imm = #-2
-    39f6:      	pop	{r7, pc}
-
-000039f8 <va108xx_hal::gpio::pins::Pin<I,M>::new::h0e947d8f70a5c4ee>:
-    39f8:      	push	{r7, lr}
-    39fa:      	add	r7, sp, #0
-    39fc:      	bl	0x3dbc <va108xx_hal::gpio::pins::Registers<I>::new::h2fcc7655f855f123> @ imm = #956
-    3a00:      	b	0x3a02 <va108xx_hal::gpio::pins::Pin<I,M>::new::h0e947d8f70a5c4ee+0xa> @ imm = #-2
-    3a02:      	pop	{r7, pc}
-
-00003a04 <va108xx_hal::gpio::pins::Pin<I,M>::new::h16b6ab272313a98c>:
-    3a04:      	push	{r7, lr}
-    3a06:      	add	r7, sp, #0
-    3a08:      	bl	0x3de4 <va108xx_hal::gpio::pins::Registers<I>::new::hf2aa7779c4dfaf85> @ imm = #984
-    3a0c:      	b	0x3a0e <va108xx_hal::gpio::pins::Pin<I,M>::new::h16b6ab272313a98c+0xa> @ imm = #-2
-    3a0e:      	pop	{r7, pc}
-
-00003a10 <va108xx_hal::gpio::pins::Pin<I,M>::new::h18eb5f607c4e3b6a>:
-    3a10:      	push	{r7, lr}
-    3a12:      	add	r7, sp, #0
-    3a14:      	bl	0x3dec <va108xx_hal::gpio::pins::Registers<I>::new::hfcff2606c73ee67e> @ imm = #980
-    3a18:      	b	0x3a1a <va108xx_hal::gpio::pins::Pin<I,M>::new::h18eb5f607c4e3b6a+0xa> @ imm = #-2
-    3a1a:      	pop	{r7, pc}
-
-00003a1c <va108xx_hal::gpio::pins::Pin<I,M>::new::h1cb8688bb646f501>:
-    3a1c:      	push	{r7, lr}
-    3a1e:      	add	r7, sp, #0
-    3a20:      	bl	0x3dee <va108xx_hal::gpio::pins::Registers<I>::new::hfdec84ebe42a5070> @ imm = #970
-    3a24:      	b	0x3a26 <va108xx_hal::gpio::pins::Pin<I,M>::new::h1cb8688bb646f501+0xa> @ imm = #-2
-    3a26:      	pop	{r7, pc}
-
-00003a28 <va108xx_hal::gpio::pins::Pin<I,M>::new::h2396cd2530aebe96>:
-    3a28:      	push	{r7, lr}
-    3a2a:      	add	r7, sp, #0
-    3a2c:      	bl	0x3dc6 <va108xx_hal::gpio::pins::Registers<I>::new::h597215db57d8d8ae> @ imm = #918
-    3a30:      	b	0x3a32 <va108xx_hal::gpio::pins::Pin<I,M>::new::h2396cd2530aebe96+0xa> @ imm = #-2
-    3a32:      	pop	{r7, pc}
-
-00003a34 <va108xx_hal::gpio::pins::Pin<I,M>::new::h3a848f637e0dd407>:
-    3a34:      	push	{r7, lr}
-    3a36:      	add	r7, sp, #0
-    3a38:      	bl	0x3dd6 <va108xx_hal::gpio::pins::Registers<I>::new::ha2b88643cb1ddcdf> @ imm = #922
-    3a3c:      	b	0x3a3e <va108xx_hal::gpio::pins::Pin<I,M>::new::h3a848f637e0dd407+0xa> @ imm = #-2
-    3a3e:      	pop	{r7, pc}
-
-00003a40 <va108xx_hal::gpio::pins::Pin<I,M>::new::h45e011f5ea5d3bdc>:
-    3a40:      	push	{r7, lr}
-    3a42:      	add	r7, sp, #0
-    3a44:      	bl	0x3dd0 <va108xx_hal::gpio::pins::Registers<I>::new::h851843ac46755d5b> @ imm = #904
-    3a48:      	b	0x3a4a <va108xx_hal::gpio::pins::Pin<I,M>::new::h45e011f5ea5d3bdc+0xa> @ imm = #-2
-    3a4a:      	pop	{r7, pc}
-
-00003a4c <va108xx_hal::gpio::pins::Pin<I,M>::new::h58edf0006af20877>:
-    3a4c:      	push	{r7, lr}
-    3a4e:      	add	r7, sp, #0
-    3a50:      	bl	0x3db4 <va108xx_hal::gpio::pins::Registers<I>::new::h0ef74e669939c302> @ imm = #864
-    3a54:      	b	0x3a56 <va108xx_hal::gpio::pins::Pin<I,M>::new::h58edf0006af20877+0xa> @ imm = #-2
-    3a56:      	pop	{r7, pc}
-
-00003a58 <va108xx_hal::gpio::pins::Pin<I,M>::new::h64715132fd133831>:
-    3a58:      	push	{r7, lr}
-    3a5a:      	add	r7, sp, #0
-    3a5c:      	bl	0x3dd4 <va108xx_hal::gpio::pins::Registers<I>::new::h9db3e1b4f02e2995> @ imm = #884
-    3a60:      	b	0x3a62 <va108xx_hal::gpio::pins::Pin<I,M>::new::h64715132fd133831+0xa> @ imm = #-2
-    3a62:      	pop	{r7, pc}
-
-00003a64 <va108xx_hal::gpio::pins::Pin<I,M>::new::h650c37744f8489ae>:
-    3a64:      	push	{r7, lr}
-    3a66:      	add	r7, sp, #0
-    3a68:      	bl	0x3dd8 <va108xx_hal::gpio::pins::Registers<I>::new::ha3b198568c0d595b> @ imm = #876
-    3a6c:      	b	0x3a6e <va108xx_hal::gpio::pins::Pin<I,M>::new::h650c37744f8489ae+0xa> @ imm = #-2
-    3a6e:      	pop	{r7, pc}
-
-00003a70 <va108xx_hal::gpio::pins::Pin<I,M>::new::h69a28e0f07999afb>:
-    3a70:      	push	{r7, lr}
-    3a72:      	add	r7, sp, #0
-    3a74:      	bl	0x3dca <va108xx_hal::gpio::pins::Registers<I>::new::h784cc0af2b638f3d> @ imm = #850
-    3a78:      	b	0x3a7a <va108xx_hal::gpio::pins::Pin<I,M>::new::h69a28e0f07999afb+0xa> @ imm = #-2
-    3a7a:      	pop	{r7, pc}
-
-00003a7c <va108xx_hal::gpio::pins::Pin<I,M>::new::h7201b256be9742a4>:
-    3a7c:      	push	{r7, lr}
-    3a7e:      	add	r7, sp, #0
-    3a80:      	bl	0x3dc2 <va108xx_hal::gpio::pins::Registers<I>::new::h4ed2f578377d0904> @ imm = #830
-    3a84:      	b	0x3a86 <va108xx_hal::gpio::pins::Pin<I,M>::new::h7201b256be9742a4+0xa> @ imm = #-2
-    3a86:      	pop	{r7, pc}
-
-00003a88 <va108xx_hal::gpio::pins::Pin<I,M>::new::h7aa3553f211620ac>:
-    3a88:      	push	{r7, lr}
-    3a8a:      	add	r7, sp, #0
-    3a8c:      	bl	0x3de0 <va108xx_hal::gpio::pins::Registers<I>::new::he5cc32a872a12059> @ imm = #848
-    3a90:      	b	0x3a92 <va108xx_hal::gpio::pins::Pin<I,M>::new::h7aa3553f211620ac+0xa> @ imm = #-2
-    3a92:      	pop	{r7, pc}
-
-00003a94 <va108xx_hal::gpio::pins::Pin<I,M>::new::h7d51278e7f56056d>:
-    3a94:      	push	{r7, lr}
-    3a96:      	add	r7, sp, #0
-    3a98:      	bl	0x3dc4 <va108xx_hal::gpio::pins::Registers<I>::new::h54f070ced4ab90dd> @ imm = #808
-    3a9c:      	b	0x3a9e <va108xx_hal::gpio::pins::Pin<I,M>::new::h7d51278e7f56056d+0xa> @ imm = #-2
-    3a9e:      	pop	{r7, pc}
-
-00003aa0 <va108xx_hal::gpio::pins::Pin<I,M>::new::h8275ab7bcbb6a54a>:
-    3aa0:      	push	{r7, lr}
-    3aa2:      	add	r7, sp, #0
-    3aa4:      	bl	0x3dc8 <va108xx_hal::gpio::pins::Registers<I>::new::h702b85d4aad66677> @ imm = #800
-    3aa8:      	b	0x3aaa <va108xx_hal::gpio::pins::Pin<I,M>::new::h8275ab7bcbb6a54a+0xa> @ imm = #-2
-    3aaa:      	pop	{r7, pc}
-
-00003aac <va108xx_hal::gpio::pins::Pin<I,M>::new::h89205fae5478f36f>:
-    3aac:      	push	{r7, lr}
-    3aae:      	add	r7, sp, #0
-    3ab0:      	bl	0x3de4 <va108xx_hal::gpio::pins::Registers<I>::new::hf2aa7779c4dfaf85> @ imm = #816
-    3ab4:      	b	0x3ab6 <va108xx_hal::gpio::pins::Pin<I,M>::new::h89205fae5478f36f+0xa> @ imm = #-2
-    3ab6:      	pop	{r7, pc}
-
-00003ab8 <va108xx_hal::gpio::pins::Pin<I,M>::new::h8ac20cd1a54d8729>:
-    3ab8:      	push	{r7, lr}
-    3aba:      	add	r7, sp, #0
-    3abc:      	bl	0x3dee <va108xx_hal::gpio::pins::Registers<I>::new::hfdec84ebe42a5070> @ imm = #814
-    3ac0:      	b	0x3ac2 <va108xx_hal::gpio::pins::Pin<I,M>::new::h8ac20cd1a54d8729+0xa> @ imm = #-2
-    3ac2:      	pop	{r7, pc}
-
-00003ac4 <va108xx_hal::gpio::pins::Pin<I,M>::new::h8b80fc4d66623596>:
-    3ac4:      	push	{r7, lr}
-    3ac6:      	add	r7, sp, #0
-    3ac8:      	bl	0x3dda <va108xx_hal::gpio::pins::Registers<I>::new::hbfaea23b6f3cffd8> @ imm = #782
-    3acc:      	b	0x3ace <va108xx_hal::gpio::pins::Pin<I,M>::new::h8b80fc4d66623596+0xa> @ imm = #-2
-    3ace:      	pop	{r7, pc}
-
-00003ad0 <va108xx_hal::gpio::pins::Pin<I,M>::new::h908f3b669f15dfdf>:
-    3ad0:      	push	{r7, lr}
-    3ad2:      	add	r7, sp, #0
-    3ad4:      	bl	0x3de2 <va108xx_hal::gpio::pins::Registers<I>::new::he8f515438f81ca16> @ imm = #778
-    3ad8:      	b	0x3ada <va108xx_hal::gpio::pins::Pin<I,M>::new::h908f3b669f15dfdf+0xa> @ imm = #-2
-    3ada:      	pop	{r7, pc}
-
-00003adc <va108xx_hal::gpio::pins::Pin<I,M>::new::h9afd2bd61f6c7977>:
-    3adc:      	push	{r7, lr}
-    3ade:      	add	r7, sp, #0
-    3ae0:      	bl	0x3dcc <va108xx_hal::gpio::pins::Registers<I>::new::h7a0db51e4ad16626> @ imm = #744
-    3ae4:      	b	0x3ae6 <va108xx_hal::gpio::pins::Pin<I,M>::new::h9afd2bd61f6c7977+0xa> @ imm = #-2
-    3ae6:      	pop	{r7, pc}
-
-00003ae8 <va108xx_hal::gpio::pins::Pin<I,M>::new::h9cf26ae7ed0ab65c>:
-    3ae8:      	push	{r7, lr}
-    3aea:      	add	r7, sp, #0
-    3aec:      	bl	0x3ddc <va108xx_hal::gpio::pins::Registers<I>::new::hc73c06a146e75def> @ imm = #748
-    3af0:      	b	0x3af2 <va108xx_hal::gpio::pins::Pin<I,M>::new::h9cf26ae7ed0ab65c+0xa> @ imm = #-2
-    3af2:      	pop	{r7, pc}
-
-00003af4 <va108xx_hal::gpio::pins::Pin<I,M>::new::ha0b449f7fbf71e3d>:
-    3af4:      	push	{r7, lr}
-    3af6:      	add	r7, sp, #0
-    3af8:      	bl	0x3dd2 <va108xx_hal::gpio::pins::Registers<I>::new::h8a4770c5c823fe37> @ imm = #726
-    3afc:      	b	0x3afe <va108xx_hal::gpio::pins::Pin<I,M>::new::ha0b449f7fbf71e3d+0xa> @ imm = #-2
-    3afe:      	pop	{r7, pc}
-
-00003b00 <va108xx_hal::gpio::pins::Pin<I,M>::new::hacc9324338c5cd42>:
-    3b00:      	push	{r7, lr}
-    3b02:      	add	r7, sp, #0
-    3b04:      	bl	0x3dc2 <va108xx_hal::gpio::pins::Registers<I>::new::h4ed2f578377d0904> @ imm = #698
-    3b08:      	b	0x3b0a <va108xx_hal::gpio::pins::Pin<I,M>::new::hacc9324338c5cd42+0xa> @ imm = #-2
-    3b0a:      	pop	{r7, pc}
-
-00003b0c <va108xx_hal::gpio::pins::Pin<I,M>::new::hbf033e46699cdbbc>:
-    3b0c:      	push	{r7, lr}
-    3b0e:      	add	r7, sp, #0
-    3b10:      	bl	0x3dde <va108xx_hal::gpio::pins::Registers<I>::new::hda141e8abeb8673c> @ imm = #714
-    3b14:      	b	0x3b16 <va108xx_hal::gpio::pins::Pin<I,M>::new::hbf033e46699cdbbc+0xa> @ imm = #-2
-    3b16:      	pop	{r7, pc}
-
-00003b18 <va108xx_hal::gpio::pins::Pin<I,M>::new::hc1b8b25c992f8f59>:
-    3b18:      	push	{r7, lr}
-    3b1a:      	add	r7, sp, #0
-    3b1c:      	bl	0x3db8 <va108xx_hal::gpio::pins::Registers<I>::new::h28799231d38fafcd> @ imm = #664
-    3b20:      	b	0x3b22 <va108xx_hal::gpio::pins::Pin<I,M>::new::hc1b8b25c992f8f59+0xa> @ imm = #-2
-    3b22:      	pop	{r7, pc}
-
-00003b24 <va108xx_hal::gpio::pins::Pin<I,M>::new::hc56534f9bc4f5f98>:
-    3b24:      	push	{r7, lr}
-    3b26:      	add	r7, sp, #0
-    3b28:      	bl	0x3dea <va108xx_hal::gpio::pins::Registers<I>::new::hfa7748cfcb6c8f18> @ imm = #702
-    3b2c:      	b	0x3b2e <va108xx_hal::gpio::pins::Pin<I,M>::new::hc56534f9bc4f5f98+0xa> @ imm = #-2
-    3b2e:      	pop	{r7, pc}
-
-00003b30 <va108xx_hal::gpio::pins::Pin<I,M>::new::hc700a86ca7326b11>:
-    3b30:      	push	{r7, lr}
-    3b32:      	add	r7, sp, #0
-    3b34:      	bl	0x3dba <va108xx_hal::gpio::pins::Registers<I>::new::h2c751c2407c56dc2> @ imm = #642
-    3b38:      	b	0x3b3a <va108xx_hal::gpio::pins::Pin<I,M>::new::hc700a86ca7326b11+0xa> @ imm = #-2
-    3b3a:      	pop	{r7, pc}
-
-00003b3c <va108xx_hal::gpio::pins::Pin<I,M>::new::hccaa9b3f205c4166>:
-    3b3c:      	push	{r7, lr}
-    3b3e:      	add	r7, sp, #0
-    3b40:      	bl	0x3de8 <va108xx_hal::gpio::pins::Registers<I>::new::hf94d46f3c8284158> @ imm = #676
-    3b44:      	b	0x3b46 <va108xx_hal::gpio::pins::Pin<I,M>::new::hccaa9b3f205c4166+0xa> @ imm = #-2
-    3b46:      	pop	{r7, pc}
-
-00003b48 <va108xx_hal::gpio::pins::Pin<I,M>::new::hd22393e3b7f5ef05>:
-    3b48:      	push	{r7, lr}
-    3b4a:      	add	r7, sp, #0
-    3b4c:      	bl	0x3db2 <va108xx_hal::gpio::pins::Registers<I>::new::h0b120c48c97b229a> @ imm = #610
-    3b50:      	b	0x3b52 <va108xx_hal::gpio::pins::Pin<I,M>::new::hd22393e3b7f5ef05+0xa> @ imm = #-2
-    3b52:      	pop	{r7, pc}
-
-00003b54 <va108xx_hal::gpio::pins::Pin<I,M>::new::hd3eadb3b051279a3>:
-    3b54:      	push	{r7, lr}
-    3b56:      	add	r7, sp, #0
-    3b58:      	bl	0x3dc0 <va108xx_hal::gpio::pins::Registers<I>::new::h40ac17ccc588ce5e> @ imm = #612
-    3b5c:      	b	0x3b5e <va108xx_hal::gpio::pins::Pin<I,M>::new::hd3eadb3b051279a3+0xa> @ imm = #-2
-    3b5e:      	pop	{r7, pc}
-
-00003b60 <va108xx_hal::gpio::pins::Pin<I,M>::new::hd6ad579ade87ada7>:
-    3b60:      	push	{r7, lr}
-    3b62:      	add	r7, sp, #0
-    3b64:      	bl	0x3db6 <va108xx_hal::gpio::pins::Registers<I>::new::h1f1be6d091e51b43> @ imm = #590
-    3b68:      	b	0x3b6a <va108xx_hal::gpio::pins::Pin<I,M>::new::hd6ad579ade87ada7+0xa> @ imm = #-2
-    3b6a:      	pop	{r7, pc}
-
-00003b6c <va108xx_hal::gpio::pins::Pin<I,M>::new::hda10b6a26e856d16>:
-    3b6c:      	push	{r7, lr}
-    3b6e:      	add	r7, sp, #0
-    3b70:      	bl	0x3dce <va108xx_hal::gpio::pins::Registers<I>::new::h7f5b29d133b4ece9> @ imm = #602
-    3b74:      	b	0x3b76 <va108xx_hal::gpio::pins::Pin<I,M>::new::hda10b6a26e856d16+0xa> @ imm = #-2
-    3b76:      	pop	{r7, pc}
-
-00003b78 <va108xx_hal::gpio::pins::Pin<I,M>::new::he19b1ce5ac8003d5>:
-    3b78:      	push	{r7, lr}
-    3b7a:      	add	r7, sp, #0
-    3b7c:      	bl	0x3dbe <va108xx_hal::gpio::pins::Registers<I>::new::h361d4c16a4db026d> @ imm = #574
-    3b80:      	b	0x3b82 <va108xx_hal::gpio::pins::Pin<I,M>::new::he19b1ce5ac8003d5+0xa> @ imm = #-2
-    3b82:      	pop	{r7, pc}
-
-00003b84 <va108xx_hal::gpio::pins::Pin<I,M>::new::he1b9d5f2ef973f75>:
-    3b84:      	push	{r7, lr}
-    3b86:      	add	r7, sp, #0
-    3b88:      	bl	0x3db0 <va108xx_hal::gpio::pins::Registers<I>::new::h00d4a0be4c91a2e2> @ imm = #548
-    3b8c:      	b	0x3b8e <va108xx_hal::gpio::pins::Pin<I,M>::new::he1b9d5f2ef973f75+0xa> @ imm = #-2
-    3b8e:      	pop	{r7, pc}
-
-00003b90 <va108xx_hal::gpio::pins::Pin<I,M>::new::he84e64ea67df4581>:
-    3b90:      	push	{r7, lr}
-    3b92:      	add	r7, sp, #0
-    3b94:      	bl	0x3dc8 <va108xx_hal::gpio::pins::Registers<I>::new::h702b85d4aad66677> @ imm = #560
-    3b98:      	b	0x3b9a <va108xx_hal::gpio::pins::Pin<I,M>::new::he84e64ea67df4581+0xa> @ imm = #-2
-    3b9a:      	pop	{r7, pc}
-
-00003b9c <va108xx_hal::gpio::pins::Pin<I,M>::new::hf528d82e2890ec98>:
-    3b9c:      	push	{r7, lr}
-    3b9e:      	add	r7, sp, #0
-    3ba0:      	bl	0x3de6 <va108xx_hal::gpio::pins::Registers<I>::new::hf2aad119f80e1448> @ imm = #578
-    3ba4:      	b	0x3ba6 <va108xx_hal::gpio::pins::Pin<I,M>::new::hf528d82e2890ec98+0xa> @ imm = #-2
-    3ba6:      	pop	{r7, pc}
-
-00003ba8 <va108xx_hal::gpio::pins::Pin<I,M>::_set_high::h110b27943ca6297d>:
-    3ba8:      	push	{r7, lr}
-    3baa:      	add	r7, sp, #0
-    3bac:      	sub	sp, #88
-    3bae:      	str	r0, [sp]
-    3bb0:      	str	r0, [sp, #8]
-    3bb2:      	str	r0, [sp, #16]
-    3bb4:      	add	r2, sp, #20
-    3bb6:      	movs	r1, #1
-    3bb8:      	strb	r1, [r2]
-    3bba:      	bl	0x395c <va108xx_hal::gpio::reg::RegisterInterface::port_reg::hec9bdcb18bf2ab1f> @ imm = #-610
-    3bbe:      	mov	r1, r0
-    3bc0:      	ldr	r0, [sp]
-    3bc2:      	str	r1, [sp, #24]
-    3bc4:      	str	r1, [sp, #28]
-    3bc6:      	movs	r2, #16
-    3bc8:      	str	r2, [sp, #32]
-    3bca:      	str	r1, [sp, #36]
-    3bcc:      	str	r2, [sp, #40]
-    3bce:      	adds	r1, #16
-    3bd0:      	str	r1, [sp, #44]
-    3bd2:      	ldr	r1, [sp, #44]
-    3bd4:      	str	r1, [sp, #4]
-    3bd6:      	str	r0, [sp, #12]
-    3bd8:      	ldr	r0, [sp, #12]
-    3bda:      	str	r1, [sp, #60]
-    3bdc:      	str	r0, [sp, #64]
-    3bde:      	movs	r1, #0
-    3be0:      	str	r1, [sp, #56]
-    3be2:      	ldr	r1, [sp, #56]
-    3be4:      	str	r1, [sp, #84]
-    3be6:      	str	r1, [sp, #80]
-    3be8:      	ldr	r1, [sp, #80]
-    3bea:      	str	r1, [sp, #52]
-    3bec:      	add	r1, sp, #52
-    3bee:      	str	r1, [sp, #48]
-    3bf0:      	ldr	r1, [sp, #48]
-    3bf2:      	bl	0x12de <va108xx_hal::gpio::reg::RegisterInterface::write_pin::{{closure}}::hc5bf496c3e19651b> @ imm = #-10520
-    3bf6:      	mov	r1, r0
-    3bf8:      	ldr	r0, [sp, #4]
-    3bfa:      	ldr	r1, [r1]
-    3bfc:      	str	r0, [sp, #68]
-    3bfe:      	str	r1, [sp, #72]
-    3c00:      	str	r0, [sp, #76]
-    3c02:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #17534
-    3c06:      	b	0x3c08 <va108xx_hal::gpio::pins::Pin<I,M>::_set_high::h110b27943ca6297d+0x60> @ imm = #-2
-    3c08:      	add	sp, #88
-    3c0a:      	pop	{r7, pc}
-
-00003c0c <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::h0526ea26b755205a>:
-    3c0c:      	push	{r7, lr}
-    3c0e:      	add	r7, sp, #0
-    3c10:      	sub	sp, #8
-    3c12:      	ldr	r0, [pc, #40] <$d.94+0x2>
-    3c14:      	ldr	r1, [pc, #40] <$d.94+0x4>
-    3c16:      	bl	0x92c <<va108xx_hal::gpio::dynpins::DynPinMode as core::cmp::PartialEq>::ne::h9557062a1ebbf52d> @ imm = #-13038
-    3c1a:      	str	r0, [sp]
-    3c1c:      	b	0x3c1e <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::h0526ea26b755205a+0x12> @ imm = #-2
-    3c1e:      	ldr	r0, [sp]
-    3c20:      	lsls	r0, r0, #31
-    3c22:      	cmp	r0, #0
-    3c24:      	bne	0x3c2e <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::h0526ea26b755205a+0x22> @ imm = #6
-    3c26:      	b	0x3c28 <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::h0526ea26b755205a+0x1c> @ imm = #-2
-    3c28:      	bl	0x3b00 <va108xx_hal::gpio::pins::Pin<I,M>::new::hacc9324338c5cd42> @ imm = #-300
-    3c2c:      	b	0x3c36 <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::h0526ea26b755205a+0x2a> @ imm = #6
-    3c2e:      	add	r0, sp, #4
-    3c30:      	bl	0x3d40 <va108xx_hal::gpio::pins::Registers<I>::change_mode::h7db00079f3ccc735> @ imm = #268
-    3c34:      	b	0x3c28 <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::h0526ea26b755205a+0x1c> @ imm = #-16
-    3c36:      	add	sp, #8
-    3c38:      	pop	{r7, pc}
-    3c3a:      	mov	r8, r8
-
-00003c3c <$d.94>:
-    3c3c:	23 af 00 00	.word	0x0000af23
-    3c40:	25 af 00 00	.word	0x0000af25
-
-00003c44 <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::hacc592b634ad9c3e>:
-    3c44:      	push	{r7, lr}
-    3c46:      	add	r7, sp, #0
-    3c48:      	sub	sp, #8
-    3c4a:      	ldr	r0, [pc, #40] <$d.96+0x2>
-    3c4c:      	ldr	r1, [pc, #40] <$d.96+0x4>
-    3c4e:      	bl	0x92c <<va108xx_hal::gpio::dynpins::DynPinMode as core::cmp::PartialEq>::ne::h9557062a1ebbf52d> @ imm = #-13094
-    3c52:      	str	r0, [sp]
-    3c54:      	b	0x3c56 <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::hacc592b634ad9c3e+0x12> @ imm = #-2
-    3c56:      	ldr	r0, [sp]
-    3c58:      	lsls	r0, r0, #31
-    3c5a:      	cmp	r0, #0
-    3c5c:      	bne	0x3c66 <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::hacc592b634ad9c3e+0x22> @ imm = #6
-    3c5e:      	b	0x3c60 <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::hacc592b634ad9c3e+0x1c> @ imm = #-2
-    3c60:      	bl	0x3a04 <va108xx_hal::gpio::pins::Pin<I,M>::new::h16b6ab272313a98c> @ imm = #-608
-    3c64:      	b	0x3c6e <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::hacc592b634ad9c3e+0x2a> @ imm = #6
-    3c66:      	add	r0, sp, #4
-    3c68:      	bl	0x3d24 <va108xx_hal::gpio::pins::Registers<I>::change_mode::h52613698b8f75f04> @ imm = #184
-    3c6c:      	b	0x3c60 <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::hacc592b634ad9c3e+0x1c> @ imm = #-16
-    3c6e:      	add	sp, #8
-    3c70:      	pop	{r7, pc}
-    3c72:      	mov	r8, r8
-
-00003c74 <$d.96>:
-    3c74:	23 af 00 00	.word	0x0000af23
-    3c78:	25 af 00 00	.word	0x0000af25
-
-00003c7c <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::hbd3650966d4e8515>:
-    3c7c:      	push	{r7, lr}
-    3c7e:      	add	r7, sp, #0
-    3c80:      	sub	sp, #8
-    3c82:      	ldr	r0, [pc, #40] <$d.98+0x2>
-    3c84:      	ldr	r1, [pc, #40] <$d.98+0x4>
-    3c86:      	bl	0x92c <<va108xx_hal::gpio::dynpins::DynPinMode as core::cmp::PartialEq>::ne::h9557062a1ebbf52d> @ imm = #-13150
-    3c8a:      	str	r0, [sp]
-    3c8c:      	b	0x3c8e <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::hbd3650966d4e8515+0x12> @ imm = #-2
-    3c8e:      	ldr	r0, [sp]
-    3c90:      	lsls	r0, r0, #31
-    3c92:      	cmp	r0, #0
-    3c94:      	bne	0x3c9e <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::hbd3650966d4e8515+0x22> @ imm = #6
-    3c96:      	b	0x3c98 <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::hbd3650966d4e8515+0x1c> @ imm = #-2
-    3c98:      	bl	0x39ec <va108xx_hal::gpio::pins::Pin<I,M>::new::h008411e9a786d7bd> @ imm = #-688
-    3c9c:      	b	0x3ca6 <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::hbd3650966d4e8515+0x2a> @ imm = #6
-    3c9e:      	add	r0, sp, #4
-    3ca0:      	bl	0x3d78 <va108xx_hal::gpio::pins::Registers<I>::change_mode::hf001aeeac3fab709> @ imm = #212
-    3ca4:      	b	0x3c98 <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::hbd3650966d4e8515+0x1c> @ imm = #-16
-    3ca6:      	add	sp, #8
-    3ca8:      	pop	{r7, pc}
-    3caa:      	mov	r8, r8
-
-00003cac <$d.98>:
-    3cac:	27 af 00 00	.word	0x0000af27
-    3cb0:	25 af 00 00	.word	0x0000af25
-
-00003cb4 <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::he506b794a825eb71>:
-    3cb4:      	push	{r7, lr}
-    3cb6:      	add	r7, sp, #0
-    3cb8:      	sub	sp, #8
-    3cba:      	ldr	r0, [pc, #40] <$d.100+0x2>
-    3cbc:      	ldr	r1, [pc, #40] <$d.100+0x4>
-    3cbe:      	bl	0x92c <<va108xx_hal::gpio::dynpins::DynPinMode as core::cmp::PartialEq>::ne::h9557062a1ebbf52d> @ imm = #-13206
-    3cc2:      	str	r0, [sp]
-    3cc4:      	b	0x3cc6 <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::he506b794a825eb71+0x12> @ imm = #-2
-    3cc6:      	ldr	r0, [sp]
-    3cc8:      	lsls	r0, r0, #31
-    3cca:      	cmp	r0, #0
-    3ccc:      	bne	0x3cd6 <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::he506b794a825eb71+0x22> @ imm = #6
-    3cce:      	b	0x3cd0 <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::he506b794a825eb71+0x1c> @ imm = #-2
-    3cd0:      	bl	0x3b90 <va108xx_hal::gpio::pins::Pin<I,M>::new::he84e64ea67df4581> @ imm = #-324
-    3cd4:      	b	0x3cde <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::he506b794a825eb71+0x2a> @ imm = #6
-    3cd6:      	add	r0, sp, #4
-    3cd8:      	bl	0x3d5c <va108xx_hal::gpio::pins::Registers<I>::change_mode::hb9640c66cf22a971> @ imm = #128
-    3cdc:      	b	0x3cd0 <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::he506b794a825eb71+0x1c> @ imm = #-16
-    3cde:      	add	sp, #8
-    3ce0:      	pop	{r7, pc}
-    3ce2:      	mov	r8, r8
-
-00003ce4 <$d.100>:
-    3ce4:	23 af 00 00	.word	0x0000af23
-    3ce8:	25 af 00 00	.word	0x0000af25
-
-00003cec <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::hf6ea6c7b2d1b9558>:
-    3cec:      	push	{r7, lr}
-    3cee:      	add	r7, sp, #0
-    3cf0:      	sub	sp, #8
-    3cf2:      	ldr	r0, [pc, #40] <$d.102+0x2>
-    3cf4:      	ldr	r1, [pc, #40] <$d.102+0x4>
-    3cf6:      	bl	0x92c <<va108xx_hal::gpio::dynpins::DynPinMode as core::cmp::PartialEq>::ne::h9557062a1ebbf52d> @ imm = #-13262
-    3cfa:      	str	r0, [sp]
-    3cfc:      	b	0x3cfe <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::hf6ea6c7b2d1b9558+0x12> @ imm = #-2
-    3cfe:      	ldr	r0, [sp]
-    3d00:      	lsls	r0, r0, #31
-    3d02:      	cmp	r0, #0
-    3d04:      	bne	0x3d0e <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::hf6ea6c7b2d1b9558+0x22> @ imm = #6
-    3d06:      	b	0x3d08 <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::hf6ea6c7b2d1b9558+0x1c> @ imm = #-2
-    3d08:      	bl	0x3ab8 <va108xx_hal::gpio::pins::Pin<I,M>::new::h8ac20cd1a54d8729> @ imm = #-596
-    3d0c:      	b	0x3d16 <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::hf6ea6c7b2d1b9558+0x2a> @ imm = #6
-    3d0e:      	add	r0, sp, #4
-    3d10:      	bl	0x3d94 <va108xx_hal::gpio::pins::Registers<I>::change_mode::hf3b1a2ccff93f404> @ imm = #128
-    3d14:      	b	0x3d08 <va108xx_hal::gpio::pins::Pin<I,M>::into_mode::hf6ea6c7b2d1b9558+0x1c> @ imm = #-16
-    3d16:      	add	sp, #8
-    3d18:      	pop	{r7, pc}
-    3d1a:      	mov	r8, r8
-
-00003d1c <$d.102>:
-    3d1c:	23 af 00 00	.word	0x0000af23
-    3d20:	25 af 00 00	.word	0x0000af25
-
-00003d24 <va108xx_hal::gpio::pins::Registers<I>::change_mode::h52613698b8f75f04>:
-    3d24:      	push	{r7, lr}
-    3d26:      	add	r7, sp, #0
-    3d28:      	sub	sp, #8
-    3d2a:      	str	r0, [sp, #4]
-    3d2c:      	ldr	r1, [pc, #12] <$d.104>
-    3d2e:      	ldrb	r2, [r1, #1]
-    3d30:      	ldrb	r1, [r1]
-    3d32:      	bl	0x3280 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd4703b18b9deaafa> @ imm = #-2742
-    3d36:      	b	0x3d38 <va108xx_hal::gpio::pins::Registers<I>::change_mode::h52613698b8f75f04+0x14> @ imm = #-2
-    3d38:      	add	sp, #8
-    3d3a:      	pop	{r7, pc}
-
-00003d3c <$d.104>:
-    3d3c:	23 af 00 00	.word	0x0000af23
-
-00003d40 <va108xx_hal::gpio::pins::Registers<I>::change_mode::h7db00079f3ccc735>:
-    3d40:      	push	{r7, lr}
-    3d42:      	add	r7, sp, #0
-    3d44:      	sub	sp, #8
-    3d46:      	str	r0, [sp, #4]
-    3d48:      	ldr	r1, [pc, #12] <$d.106>
-    3d4a:      	ldrb	r2, [r1, #1]
-    3d4c:      	ldrb	r1, [r1]
-    3d4e:      	bl	0x2df8 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h994fef27fe514dca> @ imm = #-3930
-    3d52:      	b	0x3d54 <va108xx_hal::gpio::pins::Registers<I>::change_mode::h7db00079f3ccc735+0x14> @ imm = #-2
-    3d54:      	add	sp, #8
-    3d56:      	pop	{r7, pc}
-
-00003d58 <$d.106>:
-    3d58:	23 af 00 00	.word	0x0000af23
-
-00003d5c <va108xx_hal::gpio::pins::Registers<I>::change_mode::hb9640c66cf22a971>:
-    3d5c:      	push	{r7, lr}
-    3d5e:      	add	r7, sp, #0
-    3d60:      	sub	sp, #8
-    3d62:      	str	r0, [sp, #4]
-    3d64:      	ldr	r1, [pc, #12] <$d.108>
-    3d66:      	ldrb	r2, [r1, #1]
-    3d68:      	ldrb	r1, [r1]
-    3d6a:      	bl	0x303c <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h9bee270fe5589929> @ imm = #-3378
-    3d6e:      	b	0x3d70 <va108xx_hal::gpio::pins::Registers<I>::change_mode::hb9640c66cf22a971+0x14> @ imm = #-2
-    3d70:      	add	sp, #8
-    3d72:      	pop	{r7, pc}
-
-00003d74 <$d.108>:
-    3d74:	23 af 00 00	.word	0x0000af23
-
-00003d78 <va108xx_hal::gpio::pins::Registers<I>::change_mode::hf001aeeac3fab709>:
-    3d78:      	push	{r7, lr}
-    3d7a:      	add	r7, sp, #0
-    3d7c:      	sub	sp, #8
-    3d7e:      	str	r0, [sp, #4]
-    3d80:      	ldr	r1, [pc, #12] <$d.110>
-    3d82:      	ldrb	r2, [r1, #1]
-    3d84:      	ldrb	r1, [r1]
-    3d86:      	bl	0x2bb4 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::h874e14d1678b0a8f> @ imm = #-4566
-    3d8a:      	b	0x3d8c <va108xx_hal::gpio::pins::Registers<I>::change_mode::hf001aeeac3fab709+0x14> @ imm = #-2
-    3d8c:      	add	sp, #8
-    3d8e:      	pop	{r7, pc}
-
-00003d90 <$d.110>:
-    3d90:	27 af 00 00	.word	0x0000af27
-
-00003d94 <va108xx_hal::gpio::pins::Registers<I>::change_mode::hf3b1a2ccff93f404>:
-    3d94:      	push	{r7, lr}
-    3d96:      	add	r7, sp, #0
-    3d98:      	sub	sp, #8
-    3d9a:      	str	r0, [sp, #4]
-    3d9c:      	ldr	r1, [pc, #12] <$d.112>
-    3d9e:      	ldrb	r2, [r1, #1]
-    3da0:      	ldrb	r1, [r1]
-    3da2:      	bl	0x34c4 <va108xx_hal::gpio::reg::RegisterInterface::change_mode::hd8f1767fa05895a9> @ imm = #-2274
-    3da6:      	b	0x3da8 <va108xx_hal::gpio::pins::Registers<I>::change_mode::hf3b1a2ccff93f404+0x14> @ imm = #-2
-    3da8:      	add	sp, #8
-    3daa:      	pop	{r7, pc}
-
-00003dac <$d.112>:
-    3dac:	23 af 00 00	.word	0x0000af23
-
-00003db0 <va108xx_hal::gpio::pins::Registers<I>::new::h00d4a0be4c91a2e2>:
-    3db0:      	bx	lr
-
-00003db2 <va108xx_hal::gpio::pins::Registers<I>::new::h0b120c48c97b229a>:
-    3db2:      	bx	lr
-
-00003db4 <va108xx_hal::gpio::pins::Registers<I>::new::h0ef74e669939c302>:
-    3db4:      	bx	lr
-
-00003db6 <va108xx_hal::gpio::pins::Registers<I>::new::h1f1be6d091e51b43>:
-    3db6:      	bx	lr
-
-00003db8 <va108xx_hal::gpio::pins::Registers<I>::new::h28799231d38fafcd>:
-    3db8:      	bx	lr
-
-00003dba <va108xx_hal::gpio::pins::Registers<I>::new::h2c751c2407c56dc2>:
-    3dba:      	bx	lr
-
-00003dbc <va108xx_hal::gpio::pins::Registers<I>::new::h2fcc7655f855f123>:
-    3dbc:      	bx	lr
-
-00003dbe <va108xx_hal::gpio::pins::Registers<I>::new::h361d4c16a4db026d>:
-    3dbe:      	bx	lr
-
-00003dc0 <va108xx_hal::gpio::pins::Registers<I>::new::h40ac17ccc588ce5e>:
-    3dc0:      	bx	lr
-
-00003dc2 <va108xx_hal::gpio::pins::Registers<I>::new::h4ed2f578377d0904>:
-    3dc2:      	bx	lr
-
-00003dc4 <va108xx_hal::gpio::pins::Registers<I>::new::h54f070ced4ab90dd>:
-    3dc4:      	bx	lr
-
-00003dc6 <va108xx_hal::gpio::pins::Registers<I>::new::h597215db57d8d8ae>:
-    3dc6:      	bx	lr
-
-00003dc8 <va108xx_hal::gpio::pins::Registers<I>::new::h702b85d4aad66677>:
-    3dc8:      	bx	lr
-
-00003dca <va108xx_hal::gpio::pins::Registers<I>::new::h784cc0af2b638f3d>:
-    3dca:      	bx	lr
-
-00003dcc <va108xx_hal::gpio::pins::Registers<I>::new::h7a0db51e4ad16626>:
-    3dcc:      	bx	lr
-
-00003dce <va108xx_hal::gpio::pins::Registers<I>::new::h7f5b29d133b4ece9>:
-    3dce:      	bx	lr
-
-00003dd0 <va108xx_hal::gpio::pins::Registers<I>::new::h851843ac46755d5b>:
-    3dd0:      	bx	lr
-
-00003dd2 <va108xx_hal::gpio::pins::Registers<I>::new::h8a4770c5c823fe37>:
-    3dd2:      	bx	lr
-
-00003dd4 <va108xx_hal::gpio::pins::Registers<I>::new::h9db3e1b4f02e2995>:
-    3dd4:      	bx	lr
-
-00003dd6 <va108xx_hal::gpio::pins::Registers<I>::new::ha2b88643cb1ddcdf>:
-    3dd6:      	bx	lr
-
-00003dd8 <va108xx_hal::gpio::pins::Registers<I>::new::ha3b198568c0d595b>:
-    3dd8:      	bx	lr
-
-00003dda <va108xx_hal::gpio::pins::Registers<I>::new::hbfaea23b6f3cffd8>:
-    3dda:      	bx	lr
-
-00003ddc <va108xx_hal::gpio::pins::Registers<I>::new::hc73c06a146e75def>:
-    3ddc:      	bx	lr
-
-00003dde <va108xx_hal::gpio::pins::Registers<I>::new::hda141e8abeb8673c>:
-    3dde:      	bx	lr
-
-00003de0 <va108xx_hal::gpio::pins::Registers<I>::new::he5cc32a872a12059>:
-    3de0:      	bx	lr
-
-00003de2 <va108xx_hal::gpio::pins::Registers<I>::new::he8f515438f81ca16>:
-    3de2:      	bx	lr
-
-00003de4 <va108xx_hal::gpio::pins::Registers<I>::new::hf2aa7779c4dfaf85>:
-    3de4:      	bx	lr
-
-00003de6 <va108xx_hal::gpio::pins::Registers<I>::new::hf2aad119f80e1448>:
-    3de6:      	bx	lr
-
-00003de8 <va108xx_hal::gpio::pins::Registers<I>::new::hf94d46f3c8284158>:
-    3de8:      	bx	lr
-
-00003dea <va108xx_hal::gpio::pins::Registers<I>::new::hfa7748cfcb6c8f18>:
-    3dea:      	bx	lr
-
-00003dec <va108xx_hal::gpio::pins::Registers<I>::new::hfcff2606c73ee67e>:
-    3dec:      	bx	lr
-
-00003dee <va108xx_hal::gpio::pins::Registers<I>::new::hfdec84ebe42a5070>:
-    3dee:      	bx	lr
-
-00003df0 <va108xx_hal::gpio::pins::PinsA::new::{{closure}}::hf626c193cc0edba5>:
-    3df0:      	sub	sp, #116
-    3df2:      	str	r1, [sp, #8]
-    3df4:      	str	r0, [sp, #20]
-    3df6:      	str	r1, [sp, #24]
-    3df8:      	str	r1, [sp, #32]
-    3dfa:      	str	r1, [sp, #28]
-    3dfc:      	ldr	r0, [sp, #28]
-    3dfe:      	str	r0, [sp, #12]
-    3e00:      	b	0x3e02 <va108xx_hal::gpio::pins::PinsA::new::{{closure}}::hf626c193cc0edba5+0x12> @ imm = #-2
-    3e02:      	ldr	r1, [sp, #12]
-    3e04:      	str	r1, [sp, #96]
-    3e06:      	str	r1, [sp, #100]
-    3e08:      	add	r0, sp, #104
-    3e0a:      	movs	r2, #1
-    3e0c:      	strb	r2, [r0]
-    3e0e:      	str	r1, [sp, #108]
-    3e10:      	ldr	r0, [r1]
-    3e12:      	str	r1, [sp, #112]
-    3e14:      	orrs	r0, r2
-    3e16:      	str	r0, [r1]
-    3e18:      	b	0x3e1a <va108xx_hal::gpio::pins::PinsA::new::{{closure}}::hf626c193cc0edba5+0x2a> @ imm = #-2
-    3e1a:      	ldr	r0, [sp, #8]
-    3e1c:      	str	r0, [sp, #92]
-    3e1e:      	str	r0, [sp, #88]
-    3e20:      	ldr	r0, [sp, #88]
-    3e22:      	str	r0, [sp, #4]
-    3e24:      	b	0x3e26 <va108xx_hal::gpio::pins::PinsA::new::{{closure}}::hf626c193cc0edba5+0x36> @ imm = #-2
-    3e26:      	ldr	r1, [sp, #4]
-    3e28:      	str	r1, [sp, #68]
-    3e2a:      	str	r1, [sp, #72]
-    3e2c:      	add	r0, sp, #76
-    3e2e:      	movs	r2, #1
-    3e30:      	strb	r2, [r0]
-    3e32:      	str	r1, [sp, #80]
-    3e34:      	ldr	r0, [r1]
-    3e36:      	str	r1, [sp, #84]
-    3e38:      	lsls	r2, r2, #24
-    3e3a:      	orrs	r0, r2
-    3e3c:      	str	r0, [r1]
-    3e3e:      	b	0x3e40 <va108xx_hal::gpio::pins::PinsA::new::{{closure}}::hf626c193cc0edba5+0x50> @ imm = #-2
-    3e40:      	ldr	r0, [sp, #8]
-    3e42:      	str	r0, [sp, #64]
-    3e44:      	str	r0, [sp, #60]
-    3e46:      	ldr	r0, [sp, #60]
-    3e48:      	str	r0, [sp]
-    3e4a:      	b	0x3e4c <va108xx_hal::gpio::pins::PinsA::new::{{closure}}::hf626c193cc0edba5+0x5c> @ imm = #-2
-    3e4c:      	ldr	r1, [sp]
-    3e4e:      	str	r1, [sp, #40]
-    3e50:      	str	r1, [sp, #44]
-    3e52:      	add	r0, sp, #48
-    3e54:      	movs	r2, #1
-    3e56:      	strb	r2, [r0]
-    3e58:      	str	r1, [sp, #52]
-    3e5a:      	ldr	r0, [r1]
-    3e5c:      	str	r1, [sp, #56]
-    3e5e:      	lsls	r2, r2, #22
-    3e60:      	orrs	r0, r2
-    3e62:      	str	r0, [r1]
-    3e64:      	b	0x3e66 <va108xx_hal::gpio::pins::PinsA::new::{{closure}}::hf626c193cc0edba5+0x76> @ imm = #-2
-    3e66:      	ldr	r0, [sp]
-    3e68:      	str	r0, [sp, #36]
-    3e6a:      	b	0x3e6c <va108xx_hal::gpio::pins::PinsA::new::{{closure}}::hf626c193cc0edba5+0x7c> @ imm = #-2
-    3e6c:      	ldr	r0, [sp]
-    3e6e:      	add	sp, #116
-    3e70:      	bx	lr
-
-00003e72 <<va108xx_hal::gpio::pins::Pin<I,va108xx_hal::gpio::pins::Output<C>> as embedded_hal::digital::v2::OutputPin>::set_high::hca697fb28037f9ea>:
-    3e72:      	push	{r7, lr}
-    3e74:      	add	r7, sp, #0
-    3e76:      	sub	sp, #8
-    3e78:      	str	r0, [sp, #4]
-    3e7a:      	bl	0x3ba8 <va108xx_hal::gpio::pins::Pin<I,M>::_set_high::h110b27943ca6297d> @ imm = #-726
-    3e7e:      	b	0x3e80 <<va108xx_hal::gpio::pins::Pin<I,va108xx_hal::gpio::pins::Output<C>> as embedded_hal::digital::v2::OutputPin>::set_high::hca697fb28037f9ea+0xe> @ imm = #-2
-    3e80:      	add	sp, #8
-    3e82:      	pop	{r7, pc}
-
-00003e84 <va108xx::Peripherals::take::{{closure}}::hc7ddae64ac1c2daf>:
-    3e84:      	push	{r7, lr}
-    3e86:      	add	r7, sp, #0
-    3e88:      	sub	sp, #16
-    3e8a:      	str	r0, [sp, #12]
-    3e8c:      	ldr	r0, [pc, #40] <$d.1>
-    3e8e:      	ldrb	r0, [r0]
-    3e90:      	lsls	r0, r0, #31
-    3e92:      	cmp	r0, #0
-    3e94:      	bne	0x3e9e <va108xx::Peripherals::take::{{closure}}::hc7ddae64ac1c2daf+0x1a> @ imm = #6
-    3e96:      	b	0x3e98 <va108xx::Peripherals::take::{{closure}}::hc7ddae64ac1c2daf+0x14> @ imm = #-2
-    3e98:      	bl	0x232c <va108xx::Peripherals::steal::he31672b3c4cae35f> @ imm = #-7024
-    3e9c:      	b	0x3eae <va108xx::Peripherals::take::{{closure}}::hc7ddae64ac1c2daf+0x2a> @ imm = #14
-    3e9e:      	add	r1, sp, #4
-    3ea0:      	movs	r0, #0
-    3ea2:      	strb	r0, [r1]
-    3ea4:      	b	0x3ea6 <va108xx::Peripherals::take::{{closure}}::hc7ddae64ac1c2daf+0x22> @ imm = #-2
-    3ea6:      	add	r0, sp, #4
-    3ea8:      	ldrb	r0, [r0]
-    3eaa:      	add	sp, #16
-    3eac:      	pop	{r7, pc}
-    3eae:      	add	r1, sp, #4
-    3eb0:      	movs	r0, #1
-    3eb2:      	strb	r0, [r1]
-    3eb4:      	b	0x3ea6 <va108xx::Peripherals::take::{{closure}}::hc7ddae64ac1c2daf+0x22> @ imm = #-18
-    3eb6:      	mov	r8, r8
-
-00003eb8 <$d.1>:
-    3eb8:	34 04 00 10	.word	0x10000434
-
-00003ebc <core::fmt::ArgumentV1::new::h5ff66f722db734a4>:
-    3ebc:      	sub	sp, #36
-    3ebe:      	str	r0, [sp, #4]
-    3ec0:      	str	r0, [sp, #20]
-    3ec2:      	str	r1, [sp, #24]
-    3ec4:      	str	r1, [sp, #28]
-    3ec6:      	ldr	r0, [sp, #28]
-    3ec8:      	str	r0, [sp, #8]
-    3eca:      	b	0x3ecc <core::fmt::ArgumentV1::new::h5ff66f722db734a4+0x10> @ imm = #-2
-    3ecc:      	ldr	r0, [sp, #4]
-    3ece:      	str	r0, [sp, #32]
-    3ed0:      	ldr	r0, [sp, #32]
-    3ed2:      	str	r0, [sp]
-    3ed4:      	b	0x3ed6 <core::fmt::ArgumentV1::new::h5ff66f722db734a4+0x1a> @ imm = #-2
-    3ed6:      	ldr	r0, [sp, #8]
-    3ed8:      	ldr	r1, [sp]
-    3eda:      	str	r1, [sp, #12]
-    3edc:      	str	r0, [sp, #16]
-    3ede:      	ldr	r0, [sp, #12]
-    3ee0:      	ldr	r1, [sp, #16]
-    3ee2:      	add	sp, #36
-    3ee4:      	bx	lr
-
-00003ee6 <core::fmt::ArgumentV1::new::ha424a5ef5705fb6b>:
-    3ee6:      	sub	sp, #36
-    3ee8:      	str	r0, [sp, #4]
-    3eea:      	str	r0, [sp, #20]
-    3eec:      	str	r1, [sp, #24]
-    3eee:      	str	r1, [sp, #28]
-    3ef0:      	ldr	r0, [sp, #28]
-    3ef2:      	str	r0, [sp, #8]
-    3ef4:      	b	0x3ef6 <core::fmt::ArgumentV1::new::ha424a5ef5705fb6b+0x10> @ imm = #-2
-    3ef6:      	ldr	r0, [sp, #4]
-    3ef8:      	str	r0, [sp, #32]
-    3efa:      	ldr	r0, [sp, #32]
-    3efc:      	str	r0, [sp]
-    3efe:      	b	0x3f00 <core::fmt::ArgumentV1::new::ha424a5ef5705fb6b+0x1a> @ imm = #-2
-    3f00:      	ldr	r0, [sp, #8]
-    3f02:      	ldr	r1, [sp]
-    3f04:      	str	r1, [sp, #12]
-    3f06:      	str	r0, [sp, #16]
-    3f08:      	ldr	r0, [sp, #12]
-    3f0a:      	ldr	r1, [sp, #16]
-    3f0c:      	add	sp, #36
-    3f0e:      	bx	lr
-
-00003f10 <cortex_m::interrupt::enable::heed7eeac13e032d5>:
-    3f10:      	push	{r7, lr}
-    3f12:      	add	r7, sp, #0
-    3f14:      	bl	0x8096 <__cpsie>        @ imm = #16766
-    3f18:      	b	0x3f1a <cortex_m::interrupt::enable::heed7eeac13e032d5+0xa> @ imm = #-2
-    3f1a:      	pop	{r7, pc}
-
-00003f1c <cortex_m::interrupt::disable::h83274fbb50680f02>:
-    3f1c:      	push	{r7, lr}
-    3f1e:      	add	r7, sp, #0
-    3f20:      	bl	0x8092 <__cpsid>        @ imm = #16750
-    3f24:      	b	0x3f26 <cortex_m::interrupt::disable::h83274fbb50680f02+0xa> @ imm = #-2
-    3f26:      	pop	{r7, pc}
-
-00003f28 <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::spi::FullDuplex<u8>>::send::{{closure}}::h1c05d4bbd98f482c>:
-    3f28:      	sub	sp, #32
-    3f2a:      	str	r1, [sp]
-    3f2c:      	str	r0, [sp, #4]
-    3f2e:      	str	r1, [sp, #8]
-    3f30:      	ldrb	r0, [r0]
-    3f32:      	str	r1, [sp, #12]
-    3f34:      	str	r0, [sp, #16]
-    3f36:      	str	r1, [sp, #20]
-    3f38:      	str	r0, [sp, #24]
-    3f3a:      	str	r0, [r1]
-    3f3c:      	b	0x3f3e <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::spi::FullDuplex<u8>>::send::{{closure}}::h1c05d4bbd98f482c+0x16> @ imm = #-2
-    3f3e:      	ldr	r0, [sp]
-    3f40:      	str	r0, [sp, #28]
-    3f42:      	b	0x3f44 <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::spi::FullDuplex<u8>>::send::{{closure}}::h1c05d4bbd98f482c+0x1c> @ imm = #-2
-    3f44:      	ldr	r0, [sp]
-    3f46:      	add	sp, #32
-    3f48:      	bx	lr
-
-00003f4a <va108xx_hal::spi::TransferConfig<HWCS>::new::h6daede787576f8d4>:
-    3f4a:      	push	{r4, r5, r6, r7, lr}
-    3f4c:      	add	r7, sp, #12
-    3f4e:      	sub	sp, #52
-    3f50:      	mov	r4, r3
-    3f52:      	mov	r6, r2
-    3f54:      	str	r1, [sp]
-    3f56:      	mov	r1, r0
-    3f58:      	ldr	r0, [sp]
-    3f5a:      	str	r1, [sp, #4]
-    3f5c:      	ldr	r1, [r7, #16]
-    3f5e:      	str	r1, [sp, #8]
-    3f60:      	ldr	r2, [r7, #12]
-    3f62:      	str	r2, [sp, #12]
-    3f64:      	ldr	r3, [r7, #8]
-    3f66:      	str	r3, [sp, #16]
-    3f68:      	mov	r5, r4
-    3f6a:      	str	r5, [sp, #20]
-    3f6c:      	mov	r5, r6
-    3f6e:      	str	r5, [sp, #24]
-    3f70:      	str	r0, [sp, #32]
-    3f72:      	add	r5, sp, #36
-    3f74:      	strb	r6, [r5]
-    3f76:      	strb	r4, [r5, #1]
-    3f78:      	add	r4, sp, #40
-    3f7a:      	strb	r3, [r4]
-    3f7c:      	add	r3, sp, #44
-    3f7e:      	strb	r2, [r3]
-    3f80:      	add	r2, sp, #48
-    3f82:      	strb	r1, [r2]
-    3f84:      	bl	0x108 <<T as core::convert::Into<U>>::into::hc185e8b6b339f934> @ imm = #-16000
-    3f88:      	str	r0, [sp, #28]
-    3f8a:      	b	0x3f8c <va108xx_hal::spi::TransferConfig<HWCS>::new::h6daede787576f8d4+0x42> @ imm = #-2
-    3f8c:      	ldr	r1, [sp, #4]
-    3f8e:      	ldr	r0, [sp, #12]
-    3f90:      	ldr	r3, [sp, #8]
-    3f92:      	ldr	r4, [sp, #16]
-    3f94:      	ldr	r5, [sp, #20]
-    3f96:      	ldr	r6, [sp, #24]
-    3f98:      	ldr	r2, [sp, #28]
-    3f9a:      	str	r2, [r1]
-    3f9c:      	movs	r2, #1
-    3f9e:      	ands	r6, r2
-    3fa0:      	strb	r6, [r1, #4]
-    3fa2:      	ands	r5, r2
-    3fa4:      	strb	r5, [r1, #5]
-    3fa6:      	ands	r4, r2
-    3fa8:      	strb	r4, [r1, #6]
-    3faa:      	ands	r3, r2
-    3fac:      	strb	r3, [r1, #7]
-    3fae:      	ands	r0, r2
-    3fb0:      	strb	r0, [r1, #8]
-    3fb2:      	add	sp, #52
-    3fb4:      	pop	{r4, r5, r6, r7, pc}
-
-00003fb6 <va108xx_hal::spi::TransferConfig<HWCS>::downgrade::h7fd0909ba9bfa2de>:
-    3fb6:      	push	{r4, r5, r7, lr}
-    3fb8:      	add	r7, sp, #8
-    3fba:      	sub	sp, #4
-    3fbc:      	str	r1, [sp]
-    3fbe:      	mov	r1, r0
-    3fc0:      	ldr	r0, [sp]
-    3fc2:      	ldr	r5, [r0]
-    3fc4:      	ldrb	r4, [r0, #4]
-    3fc6:      	ldrb	r3, [r0, #5]
-    3fc8:      	ldrb	r2, [r0, #7]
-    3fca:      	ldrb	r0, [r0, #8]
-    3fcc:      	str	r5, [r1]
-    3fce:      	strb	r4, [r1, #4]
-    3fd0:      	strb	r3, [r1, #5]
-    3fd2:      	strb	r2, [r1, #6]
-    3fd4:      	strb	r0, [r1, #7]
-    3fd6:      	movs	r0, #0
-    3fd8:      	strb	r0, [r1, #8]
-    3fda:      	b	0x3fdc <va108xx_hal::spi::TransferConfig<HWCS>::downgrade::h7fd0909ba9bfa2de+0x26> @ imm = #-2
-    3fdc:      	add	sp, #4
-    3fde:      	pop	{r4, r5, r7, pc}
-
-00003fe0 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347>:
-    3fe0:      	push	{r4, r5, r7, lr}
-    3fe2:      	add	r7, sp, #8
-    3fe4:      	sub	sp, #488
-    3fe6:      	str	r1, [sp, #60]
-    3fe8:      	str	r0, [sp, #64]
-    3fea:      	ldr	r0, [r7, #12]
-    3fec:      	ldr	r0, [r7, #8]
-    3fee:      	add	r0, sp, #80
-    3ff0:      	strb	r3, [r0, #4]
-    3ff2:      	str	r2, [sp, #80]
-    3ff4:      	ldr	r0, [sp, #84]
-    3ff6:      	add	r2, sp, #72
-    3ff8:      	strb	r0, [r2, #4]
-    3ffa:      	ldr	r0, [sp, #80]
-    3ffc:      	str	r0, [sp, #72]
-    3ffe:      	str	r1, [sp, #204]
-    4000:      	ldr	r0, [r7, #8]
-    4002:      	cmp	r0, #0
-    4004:      	beq	0x401a <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x3a> @ imm = #18
-    4006:      	b	0x4008 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x28> @ imm = #-2
-    4008:      	ldr	r0, [r7, #8]
-    400a:      	str	r0, [sp, #208]
-    400c:      	add	r2, sp, #88
-    400e:      	movs	r1, #5
-    4010:      	strb	r1, [r2]
-    4012:      	ldr	r1, [sp, #88]
-    4014:      	bl	0x6370 <va108xx_hal::clock::enable_peripheral_clock::hd69be02d59fbba63> @ imm = #9048
-    4018:      	b	0x401a <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x3a> @ imm = #-2
-    401a:      	ldr	r0, [sp, #72]
-    401c:      	add	r1, sp, #92
-    401e:      	strb	r0, [r1]
-    4020:      	add	r0, sp, #72
-    4022:      	ldrb	r1, [r0, #1]
-    4024:      	add	r2, sp, #96
-    4026:      	strb	r1, [r2]
-    4028:      	ldrb	r1, [r0, #2]
-    402a:      	add	r2, sp, #100
-    402c:      	strb	r1, [r2]
-    402e:      	ldrb	r0, [r0, #3]
-    4030:      	add	r1, sp, #104
-    4032:      	strb	r0, [r1]
-    4034:      	ldr	r0, [sp, #76]
-    4036:      	add	r1, sp, #108
-    4038:      	strb	r0, [r1]
-    403a:      	ldr	r0, [pc, #740] <$d.4+0x2>
-    403c:      	ldrb	r2, [r0]
-    403e:      	ldrb	r0, [r0, #1]
-    4040:      	add	r1, sp, #112
-    4042:      	strb	r2, [r1]
-    4044:      	strb	r0, [r1, #1]
-    4046:      	movs	r0, #2
-    4048:      	str	r0, [sp, #116]
-    404a:      	add	r1, sp, #120
-    404c:      	movs	r0, #0
-    404e:      	strb	r0, [r1]
-    4050:      	add	r1, sp, #124
-    4052:      	strb	r0, [r1]
-    4054:      	ldr	r0, [r7, #12]
-    4056:      	cmp	r0, #0
-    4058:      	beq	0x4076 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x96> @ imm = #26
-    405a:      	b	0x405c <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x7c> @ imm = #-2
-    405c:      	ldr	r0, [sp, #60]
-    405e:      	ldr	r1, [r7, #12]
-    4060:      	str	r1, [sp, #52]
-    4062:      	str	r1, [sp, #212]
-    4064:      	ldrb	r3, [r1, #4]
-    4066:      	ldrb	r1, [r1, #5]
-    4068:      	add	r2, sp, #112
-    406a:      	strb	r3, [r2]
-    406c:      	strb	r1, [r2, #1]
-    406e:      	bl	0x108 <<T as core::convert::Into<U>>::into::hc185e8b6b339f934> @ imm = #-16234
-    4072:      	str	r0, [sp, #56]
-    4074:      	b	0x4084 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0xa4> @ imm = #12
-    4076:      	add	r0, sp, #112
-    4078:      	ldrb	r0, [r0]
-    407a:      	lsls	r0, r0, #31
-    407c:      	cmp	r0, #0
-    407e:      	beq	0x4118 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x138> @ imm = #150
-    4080:      	b	0x4082 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0xa2> @ imm = #-2
-    4082:      	b	0x4126 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x146> @ imm = #160
-    4084:      	ldr	r0, [sp, #52]
-    4086:      	ldr	r0, [r0]
-    4088:      	str	r0, [sp, #44]
-    408a:      	add	r0, sp, #92
-    408c:      	ldrb	r0, [r0]
-    408e:      	adds	r0, r0, #1
-    4090:      	str	r0, [sp, #48]
-    4092:      	movs	r0, #0
-    4094:      	cmp	r0, #0
-    4096:      	bne	0x40b2 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0xd2> @ imm = #24
-    4098:      	b	0x409a <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0xba> @ imm = #-2
-    409a:      	ldr	r2, [sp, #48]
-    409c:      	ldr	r0, [sp, #44]
-    409e:      	movs	r3, #0
-    40a0:      	mov	r1, r3
-    40a2:      	bl	0xa566 <__aeabi_lmul>   @ imm = #25792
-    40a6:      	subs	r2, r1, #1
-    40a8:      	sbcs	r1, r2
-    40aa:      	str	r0, [sp, #40]
-    40ac:      	cmp	r1, #0
-    40ae:      	bne	0x40c6 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0xe6> @ imm = #20
-    40b0:      	b	0x40be <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0xde> @ imm = #10
-    40b2:      	ldr	r0, [pc, #656] <$d.4+0x26>
-    40b4:      	ldr	r2, [pc, #644] <$d.4+0x1c>
-    40b6:      	movs	r1, #28
-    40b8:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #17548
-    40bc:      	trap
-    40be:      	ldr	r0, [sp, #40]
-    40c0:      	cmp	r0, #0
-    40c2:      	beq	0x40ec <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x10c> @ imm = #38
-    40c4:      	b	0x40d2 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0xf2> @ imm = #10
-    40c6:      	ldr	r0, [pc, #632] <$d.4+0x22>
-    40c8:      	ldr	r2, [pc, #624] <$d.4+0x1c>
-    40ca:      	movs	r1, #33
-    40cc:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #17528
-    40d0:      	trap
-    40d2:      	ldr	r1, [sp, #40]
-    40d4:      	ldr	r0, [sp, #56]
-    40d6:      	bl	0xa5b6 <__aeabi_uidiv>  @ imm = #25820
-    40da:      	mov	r1, r0
-    40dc:      	ldr	r0, [sp, #52]
-    40de:      	str	r1, [sp, #116]
-    40e0:      	adds	r0, #8
-    40e2:      	ldr	r1, [pc, #576] <$d.4+0x6>
-    40e4:      	bl	0x45fc <core::cmp::PartialEq::ne::hea6843426e94b4ab> @ imm = #1300
-    40e8:      	str	r0, [sp, #36]
-    40ea:      	b	0x40f8 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x118> @ imm = #10
-    40ec:      	ldr	r0, [pc, #584] <$d.4+0x18>
-    40ee:      	ldr	r2, [pc, #588] <$d.4+0x1e>
-    40f0:      	movs	r1, #25
-    40f2:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #17490
-    40f6:      	trap
-    40f8:      	ldr	r0, [sp, #36]
-    40fa:      	lsls	r0, r0, #31
-    40fc:      	cmp	r0, #0
-    40fe:      	bne	0x410c <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x12c> @ imm = #10
-    4100:      	b	0x4102 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x122> @ imm = #-2
-    4102:      	ldr	r0, [sp, #52]
-    4104:      	ldrb	r0, [r0, #7]
-    4106:      	add	r1, sp, #124
-    4108:      	strb	r0, [r1]
-    410a:      	b	0x4076 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x96> @ imm = #-152
-    410c:      	ldr	r0, [sp, #52]
-    410e:      	ldrb	r0, [r0, #8]
-    4110:      	add	r1, sp, #120
-    4112:      	strb	r0, [r1]
-    4114:      	b	0x4102 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x122> @ imm = #-22
-    4116:      	trap
-    4118:      	add	r0, sp, #112
-    411a:      	ldrb	r0, [r0, #1]
-    411c:      	lsls	r0, r0, #31
-    411e:      	cmp	r0, #0
-    4120:      	beq	0x415e <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x17e> @ imm = #58
-    4122:      	b	0x4124 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x144> @ imm = #-2
-    4124:      	b	0x4168 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x188> @ imm = #64
-    4126:      	add	r0, sp, #112
-    4128:      	ldrb	r0, [r0, #1]
-    412a:      	lsls	r0, r0, #31
-    412c:      	cmp	r0, #0
-    412e:      	beq	0x4134 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x154> @ imm = #2
-    4130:      	b	0x4132 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x152> @ imm = #-2
-    4132:      	b	0x4140 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x160> @ imm = #10
-    4134:      	add	r1, sp, #136
-    4136:      	movs	r0, #1
-    4138:      	strb	r0, [r1]
-    413a:      	movs	r0, #0
-    413c:      	strb	r0, [r1, #1]
-    413e:      	b	0x414a <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x16a> @ imm = #8
-    4140:      	add	r1, sp, #136
-    4142:      	movs	r0, #1
-    4144:      	strb	r0, [r1]
-    4146:      	strb	r0, [r1, #1]
-    4148:      	b	0x414a <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x16a> @ imm = #-2
-    414a:      	ldr	r0, [sp, #136]
-    414c:      	add	r1, sp, #128
-    414e:      	strb	r0, [r1]
-    4150:      	add	r0, sp, #136
-    4152:      	ldrb	r0, [r0, #1]
-    4154:      	add	r1, sp, #132
-    4156:      	strb	r0, [r1]
-    4158:      	add	r0, sp, #68
-    415a:      	str	r0, [sp, #216]
-    415c:      	b	0x4174 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x194> @ imm = #20
-    415e:      	add	r1, sp, #136
-    4160:      	movs	r0, #0
-    4162:      	strb	r0, [r1]
-    4164:      	strb	r0, [r1, #1]
-    4166:      	b	0x414a <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x16a> @ imm = #-32
-    4168:      	add	r1, sp, #136
-    416a:      	movs	r0, #0
-    416c:      	strb	r0, [r1]
-    416e:      	movs	r0, #1
-    4170:      	strb	r0, [r1, #1]
-    4172:      	b	0x414a <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x16a> @ imm = #-44
-    4174:      	add	r0, sp, #92
-    4176:      	str	r0, [sp, #140]
-    4178:      	add	r0, sp, #128
-    417a:      	str	r0, [sp, #144]
-    417c:      	add	r0, sp, #132
-    417e:      	str	r0, [sp, #148]
-    4180:      	ldr	r0, [pc, #420] <$d.4+0x8>
-    4182:      	str	r0, [sp, #32]
-    4184:      	str	r0, [sp, #312]
-    4186:      	ldr	r0, [sp, #148]
-    4188:      	str	r0, [sp, #296]
-    418a:      	ldr	r0, [sp, #144]
-    418c:      	str	r0, [sp, #292]
-    418e:      	ldr	r0, [sp, #140]
-    4190:      	str	r0, [sp, #288]
-    4192:      	movs	r0, #0
-    4194:      	str	r0, [sp, #308]
-    4196:      	ldr	r0, [sp, #308]
-    4198:      	str	r0, [sp, #332]
-    419a:      	str	r0, [sp, #328]
-    419c:      	ldr	r0, [sp, #328]
-    419e:      	str	r0, [sp, #304]
-    41a0:      	add	r0, sp, #304
-    41a2:      	str	r0, [sp, #300]
-    41a4:      	ldr	r1, [sp, #300]
-    41a6:      	add	r0, sp, #288
-    41a8:      	bl	0x4348 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h11d79ed94efc284e> @ imm = #412
-    41ac:      	mov	r1, r0
-    41ae:      	ldr	r0, [sp, #32]
-    41b0:      	ldr	r1, [r1]
-    41b2:      	str	r0, [sp, #316]
-    41b4:      	str	r1, [sp, #320]
-    41b6:      	str	r0, [sp, #324]
-    41b8:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #16072
-    41bc:      	b	0x41be <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x1de> @ imm = #-2
-    41be:      	add	r0, sp, #68
-    41c0:      	str	r0, [sp, #336]
-    41c2:      	b	0x41c4 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x1e4> @ imm = #-2
-    41c4:      	add	r0, sp, #104
-    41c6:      	str	r0, [sp, #152]
-    41c8:      	add	r0, sp, #100
-    41ca:      	str	r0, [sp, #156]
-    41cc:      	add	r0, sp, #96
-    41ce:      	str	r0, [sp, #160]
-    41d0:      	add	r0, sp, #108
-    41d2:      	str	r0, [sp, #164]
-    41d4:      	add	r0, sp, #124
-    41d6:      	str	r0, [sp, #168]
-    41d8:      	add	r0, sp, #120
-    41da:      	str	r0, [sp, #172]
-    41dc:      	ldr	r0, [pc, #332] <$d.4+0xc>
-    41de:      	str	r0, [sp, #28]
-    41e0:      	str	r0, [sp, #376]
-    41e2:      	add	r2, sp, #152
-    41e4:      	add	r0, sp, #340
-    41e6:      	mov	r1, r0
-    41e8:      	ldm	r2!, {r3, r4, r5}
-    41ea:      	stm	r1!, {r3, r4, r5}
-    41ec:      	ldm	r2!, {r3, r4, r5}
-    41ee:      	stm	r1!, {r3, r4, r5}
-    41f0:      	movs	r1, #0
-    41f2:      	str	r1, [sp, #372]
-    41f4:      	ldr	r1, [sp, #372]
-    41f6:      	str	r1, [sp, #396]
-    41f8:      	str	r1, [sp, #392]
-    41fa:      	ldr	r1, [sp, #392]
-    41fc:      	str	r1, [sp, #368]
-    41fe:      	add	r1, sp, #368
-    4200:      	str	r1, [sp, #364]
-    4202:      	ldr	r1, [sp, #364]
-    4204:      	bl	0x44c6 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::hc943805811a0188a> @ imm = #702
-    4208:      	mov	r1, r0
-    420a:      	ldr	r0, [sp, #28]
-    420c:      	ldr	r1, [r1]
-    420e:      	str	r0, [sp, #380]
-    4210:      	str	r1, [sp, #384]
-    4212:      	str	r0, [sp, #388]
-    4214:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #15980
-    4218:      	b	0x421a <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x23a> @ imm = #-2
-    421a:      	add	r0, sp, #68
-    421c:      	str	r0, [sp, #400]
-    421e:      	b	0x4220 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x240> @ imm = #-2
-    4220:      	ldr	r0, [pc, #268] <$d.4+0x10>
-    4222:      	str	r0, [sp, #24]
-    4224:      	str	r0, [sp, #416]
-    4226:      	movs	r0, #0
-    4228:      	str	r0, [sp, #412]
-    422a:      	ldr	r0, [sp, #412]
-    422c:      	str	r0, [sp, #436]
-    422e:      	str	r0, [sp, #432]
-    4230:      	ldr	r0, [sp, #432]
-    4232:      	str	r0, [sp, #408]
-    4234:      	add	r0, sp, #408
-    4236:      	str	r0, [sp, #404]
-    4238:      	ldr	r0, [sp, #404]
-    423a:      	bl	0x4414 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h11e8ab357a0c5e0f> @ imm = #470
-    423e:      	mov	r1, r0
-    4240:      	ldr	r0, [sp, #24]
-    4242:      	ldr	r1, [r1]
-    4244:      	str	r0, [sp, #420]
-    4246:      	str	r1, [sp, #424]
-    4248:      	str	r0, [sp, #428]
-    424a:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #15926
-    424e:      	b	0x4250 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x270> @ imm = #-2
-    4250:      	add	r0, sp, #68
-    4252:      	str	r0, [sp, #440]
-    4254:      	b	0x4256 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x276> @ imm = #-2
-    4256:      	add	r0, sp, #116
-    4258:      	str	r0, [sp, #176]
-    425a:      	ldr	r0, [sp, #176]
-    425c:      	ldr	r1, [pc, #212] <$d.4+0x14>
-    425e:      	str	r1, [sp, #20]
-    4260:      	str	r1, [sp, #456]
-    4262:      	str	r0, [sp, #460]
-    4264:      	movs	r1, #0
-    4266:      	str	r1, [sp, #452]
-    4268:      	ldr	r1, [sp, #452]
-    426a:      	str	r1, [sp, #480]
-    426c:      	str	r1, [sp, #476]
-    426e:      	ldr	r1, [sp, #476]
-    4270:      	str	r1, [sp, #448]
-    4272:      	add	r1, sp, #448
-    4274:      	str	r1, [sp, #444]
-    4276:      	ldr	r1, [sp, #444]
-    4278:      	bl	0x44a4 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::haa997a2aad1e2fd1> @ imm = #552
-    427c:      	mov	r1, r0
-    427e:      	ldr	r0, [sp, #20]
-    4280:      	ldr	r1, [r1]
-    4282:      	str	r0, [sp, #464]
-    4284:      	str	r1, [sp, #468]
-    4286:      	str	r0, [sp, #472]
-    4288:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #15864
-    428c:      	b	0x428e <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x2ae> @ imm = #-2
-    428e:      	add	r0, sp, #68
-    4290:      	str	r0, [sp, #484]
-    4292:      	b	0x4294 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x2b4> @ imm = #-2
-    4294:      	ldr	r0, [pc, #148] <$d.4+0xc>
-    4296:      	str	r0, [sp, #16]
-    4298:      	str	r0, [sp, #244]
-    429a:      	str	r0, [sp, #252]
-    429c:      	str	r0, [sp, #256]
-    429e:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #15822
-    42a2:      	str	r0, [sp, #248]
-    42a4:      	str	r0, [sp, #232]
-    42a6:      	ldr	r1, [sp, #232]
-    42a8:      	str	r1, [sp, #264]
-    42aa:      	str	r1, [sp, #260]
-    42ac:      	ldr	r1, [sp, #260]
-    42ae:      	str	r1, [sp, #228]
-    42b0:      	str	r0, [sp, #240]
-    42b2:      	ldr	r0, [sp, #240]
-    42b4:      	str	r0, [sp, #284]
-    42b6:      	str	r0, [sp, #280]
-    42b8:      	ldr	r0, [sp, #280]
-    42ba:      	str	r0, [sp, #236]
-    42bc:      	add	r0, sp, #228
-    42be:      	str	r0, [sp, #220]
-    42c0:      	add	r0, sp, #236
-    42c2:      	str	r0, [sp, #224]
-    42c4:      	ldr	r0, [sp, #220]
-    42c6:      	ldr	r1, [sp, #224]
-    42c8:      	bl	0x446e <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h30b83cdc8f1fa185> @ imm = #418
-    42cc:      	mov	r1, r0
-    42ce:      	ldr	r0, [sp, #16]
-    42d0:      	ldr	r1, [r1]
-    42d2:      	str	r0, [sp, #268]
-    42d4:      	str	r1, [sp, #272]
-    42d6:      	str	r0, [sp, #276]
-    42d8:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #15784
-    42dc:      	b	0x42de <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x2fe> @ imm = #-2
-    42de:      	ldr	r0, [sp, #60]
-    42e0:      	ldr	r1, [sp, #76]
-    42e2:      	add	r2, sp, #192
-    42e4:      	strb	r1, [r2, #4]
-    42e6:      	ldr	r1, [sp, #72]
-    42e8:      	str	r1, [sp, #192]
-    42ea:      	bl	0x108 <<T as core::convert::Into<U>>::into::hc185e8b6b339f934> @ imm = #-16870
-    42ee:      	str	r0, [sp, #12]
-    42f0:      	b	0x42f2 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::hb14a1420312f5347+0x312> @ imm = #-2
-    42f2:      	ldr	r0, [sp, #124]
-    42f4:      	str	r0, [sp, #8]
-    42f6:      	add	r0, sp, #180
-    42f8:      	str	r0, [sp, #4]
-    42fa:      	adds	r0, r0, #4
-    42fc:      	add	r1, sp, #192
-    42fe:      	movs	r2, #5
-    4300:      	bl	0xa65e <__aeabi_memcpy> @ imm = #25434
-    4304:      	ldr	r3, [sp, #12]
-    4306:      	ldr	r2, [sp, #4]
-    4308:      	ldr	r1, [sp, #64]
-    430a:      	ldr	r0, [sp, #8]
-    430c:      	str	r3, [sp, #180]
-    430e:      	strb	r0, [r2, #9]
-    4310:      	ldr	r0, [sp, #188]
-    4312:      	str	r0, [r1, #8]
-    4314:      	ldr	r0, [sp, #184]
-    4316:      	str	r0, [r1, #4]
-    4318:      	ldr	r0, [sp, #180]
-    431a:      	str	r0, [r1]
-    431c:      	add	sp, #488
-    431e:      	pop	{r4, r5, r7, pc}
-
-00004320 <$d.4>:
-    4320:	29 af 00 00	.word	0x0000af29
-    4324:	09 b0 00 00	.word	0x0000b009
-    4328:	00 10 05 40	.word	0x40051000
-    432c:	04 10 05 40	.word	0x40051004
-    4330:	2c 10 05 40	.word	0x4005102c
-    4334:	10 10 05 40	.word	0x40051010
-    4338:	f0 af 00 00	.word	0x0000aff0
-    433c:	88 af 00 00	.word	0x0000af88
-    4340:	c0 af 00 00	.word	0x0000afc0
-    4344:	a0 af 00 00	.word	0x0000afa0
-
-00004348 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h11d79ed94efc284e>:
-    4348:      	push	{r7, lr}
-    434a:      	add	r7, sp, #0
-    434c:      	sub	sp, #136
-    434e:      	str	r1, [sp, #20]
-    4350:      	str	r0, [sp, #24]
-    4352:      	str	r1, [sp, #32]
-    4354:      	str	r1, [sp, #40]
-    4356:      	str	r1, [sp, #36]
-    4358:      	ldr	r0, [sp, #36]
-    435a:      	str	r0, [sp, #28]
-    435c:      	b	0x435e <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h11d79ed94efc284e+0x16> @ imm = #-2
-    435e:      	bl	0x461a <<u8 as va108xx_hal::spi::Word>::word_reg::h330cee0d31d1007d> @ imm = #696
-    4362:      	str	r0, [sp, #16]
-    4364:      	b	0x4366 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h11d79ed94efc284e+0x1e> @ imm = #-2
-    4366:      	ldr	r1, [sp, #28]
-    4368:      	ldr	r2, [sp, #16]
-    436a:      	str	r1, [sp, #120]
-    436c:      	add	r0, sp, #124
-    436e:      	strb	r2, [r0]
-    4370:      	str	r1, [sp, #128]
-    4372:      	ldr	r0, [r1]
-    4374:      	movs	r3, #15
-    4376:      	bics	r0, r3
-    4378:      	ands	r2, r3
-    437a:      	str	r1, [sp, #132]
-    437c:      	adds	r0, r0, r2
-    437e:      	str	r0, [r1]
-    4380:      	b	0x4382 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h11d79ed94efc284e+0x3a> @ imm = #-2
-    4382:      	ldr	r0, [sp, #20]
-    4384:      	str	r0, [sp, #116]
-    4386:      	str	r0, [sp, #112]
-    4388:      	ldr	r0, [sp, #112]
-    438a:      	str	r0, [sp, #12]
-    438c:      	b	0x438e <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h11d79ed94efc284e+0x46> @ imm = #-2
-    438e:      	ldr	r1, [sp, #12]
-    4390:      	ldr	r0, [sp, #24]
-    4392:      	ldr	r0, [r0]
-    4394:      	ldrb	r2, [r0]
-    4396:      	str	r1, [sp, #96]
-    4398:      	add	r0, sp, #100
-    439a:      	strb	r2, [r0]
-    439c:      	str	r1, [sp, #104]
-    439e:      	ldr	r0, [r1]
-    43a0:      	movs	r3, #255
-    43a2:      	lsls	r3, r3, #8
-    43a4:      	bics	r0, r3
-    43a6:      	lsls	r2, r2, #8
-    43a8:      	str	r1, [sp, #108]
-    43aa:      	adds	r0, r0, r2
-    43ac:      	str	r0, [r1]
-    43ae:      	b	0x43b0 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h11d79ed94efc284e+0x68> @ imm = #-2
-    43b0:      	ldr	r0, [sp, #20]
-    43b2:      	str	r0, [sp, #92]
-    43b4:      	str	r0, [sp, #88]
-    43b6:      	ldr	r0, [sp, #88]
-    43b8:      	str	r0, [sp, #8]
-    43ba:      	b	0x43bc <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h11d79ed94efc284e+0x74> @ imm = #-2
-    43bc:      	ldr	r1, [sp, #8]
-    43be:      	ldr	r0, [sp, #24]
-    43c0:      	ldr	r0, [r0, #4]
-    43c2:      	ldrb	r2, [r0]
-    43c4:      	str	r1, [sp, #72]
-    43c6:      	add	r0, sp, #76
-    43c8:      	strb	r2, [r0]
-    43ca:      	str	r1, [sp, #80]
-    43cc:      	ldr	r0, [r1]
-    43ce:      	movs	r3, #64
-    43d0:      	bics	r0, r3
-    43d2:      	lsls	r2, r2, #6
-    43d4:      	str	r1, [sp, #84]
-    43d6:      	orrs	r0, r2
-    43d8:      	str	r0, [r1]
-    43da:      	b	0x43dc <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h11d79ed94efc284e+0x94> @ imm = #-2
-    43dc:      	ldr	r0, [sp, #20]
-    43de:      	str	r0, [sp, #68]
-    43e0:      	str	r0, [sp, #64]
-    43e2:      	ldr	r0, [sp, #64]
-    43e4:      	str	r0, [sp, #4]
-    43e6:      	b	0x43e8 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h11d79ed94efc284e+0xa0> @ imm = #-2
-    43e8:      	ldr	r1, [sp, #4]
-    43ea:      	ldr	r0, [sp, #24]
-    43ec:      	ldr	r0, [r0, #8]
-    43ee:      	ldrb	r2, [r0]
-    43f0:      	str	r1, [sp, #48]
-    43f2:      	add	r0, sp, #52
-    43f4:      	strb	r2, [r0]
-    43f6:      	str	r1, [sp, #56]
-    43f8:      	ldr	r0, [r1]
-    43fa:      	movs	r3, #128
-    43fc:      	bics	r0, r3
-    43fe:      	lsls	r2, r2, #7
-    4400:      	str	r1, [sp, #60]
-    4402:      	orrs	r0, r2
-    4404:      	str	r0, [r1]
-    4406:      	b	0x4408 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h11d79ed94efc284e+0xc0> @ imm = #-2
-    4408:      	ldr	r0, [sp, #4]
-    440a:      	str	r0, [sp, #44]
-    440c:      	b	0x440e <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h11d79ed94efc284e+0xc6> @ imm = #-2
-    440e:      	ldr	r0, [sp, #4]
-    4410:      	add	sp, #136
-    4412:      	pop	{r7, pc}
-
-00004414 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h11e8ab357a0c5e0f>:
-    4414:      	sub	sp, #80
-    4416:      	str	r0, [sp, #4]
-    4418:      	str	r0, [sp, #16]
-    441a:      	str	r0, [sp, #24]
-    441c:      	str	r0, [sp, #20]
-    441e:      	ldr	r0, [sp, #20]
-    4420:      	str	r0, [sp, #8]
-    4422:      	b	0x4424 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h11e8ab357a0c5e0f+0x10> @ imm = #-2
-    4424:      	ldr	r1, [sp, #8]
-    4426:      	str	r1, [sp, #60]
-    4428:      	str	r1, [sp, #64]
-    442a:      	add	r0, sp, #68
-    442c:      	movs	r2, #1
-    442e:      	strb	r2, [r0]
-    4430:      	str	r1, [sp, #72]
-    4432:      	ldr	r0, [r1]
-    4434:      	str	r1, [sp, #76]
-    4436:      	orrs	r0, r2
-    4438:      	str	r0, [r1]
-    443a:      	b	0x443c <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h11e8ab357a0c5e0f+0x28> @ imm = #-2
-    443c:      	ldr	r0, [sp, #4]
-    443e:      	str	r0, [sp, #56]
-    4440:      	str	r0, [sp, #52]
-    4442:      	ldr	r0, [sp, #52]
-    4444:      	str	r0, [sp]
-    4446:      	b	0x4448 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h11e8ab357a0c5e0f+0x34> @ imm = #-2
-    4448:      	ldr	r1, [sp]
-    444a:      	str	r1, [sp, #32]
-    444c:      	str	r1, [sp, #36]
-    444e:      	add	r2, sp, #40
-    4450:      	movs	r0, #1
-    4452:      	strb	r0, [r2]
-    4454:      	str	r1, [sp, #44]
-    4456:      	ldr	r0, [r1]
-    4458:      	str	r1, [sp, #48]
-    445a:      	movs	r2, #2
-    445c:      	orrs	r0, r2
-    445e:      	str	r0, [r1]
-    4460:      	b	0x4462 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h11e8ab357a0c5e0f+0x4e> @ imm = #-2
-    4462:      	ldr	r0, [sp]
-    4464:      	str	r0, [sp, #28]
-    4466:      	b	0x4468 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h11e8ab357a0c5e0f+0x54> @ imm = #-2
-    4468:      	ldr	r0, [sp]
-    446a:      	add	sp, #80
-    446c:      	bx	lr
-
-0000446e <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h30b83cdc8f1fa185>:
-    446e:      	sub	sp, #48
-    4470:      	str	r0, [sp, #8]
-    4472:      	str	r1, [sp, #12]
-    4474:      	str	r1, [sp, #20]
-    4476:      	str	r1, [sp, #16]
-    4478:      	ldr	r0, [sp, #16]
-    447a:      	str	r0, [sp]
-    447c:      	b	0x447e <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h30b83cdc8f1fa185+0x10> @ imm = #-2
-    447e:      	ldr	r1, [sp]
-    4480:      	str	r1, [sp, #28]
-    4482:      	str	r1, [sp, #32]
-    4484:      	add	r2, sp, #36
-    4486:      	movs	r0, #1
-    4488:      	strb	r0, [r2]
-    448a:      	str	r1, [sp, #40]
-    448c:      	ldr	r0, [r1]
-    448e:      	str	r1, [sp, #44]
-    4490:      	movs	r2, #2
-    4492:      	orrs	r0, r2
-    4494:      	str	r0, [r1]
-    4496:      	b	0x4498 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h30b83cdc8f1fa185+0x2a> @ imm = #-2
-    4498:      	ldr	r0, [sp]
-    449a:      	str	r0, [sp, #24]
-    449c:      	b	0x449e <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::h30b83cdc8f1fa185+0x30> @ imm = #-2
-    449e:      	ldr	r0, [sp]
-    44a0:      	add	sp, #48
-    44a2:      	bx	lr
-
-000044a4 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::haa997a2aad1e2fd1>:
-    44a4:      	sub	sp, #32
-    44a6:      	str	r1, [sp]
-    44a8:      	str	r0, [sp, #4]
-    44aa:      	str	r1, [sp, #8]
-    44ac:      	ldr	r0, [r0]
-    44ae:      	str	r1, [sp, #12]
-    44b0:      	str	r0, [sp, #16]
-    44b2:      	str	r1, [sp, #20]
-    44b4:      	str	r0, [sp, #24]
-    44b6:      	str	r0, [r1]
-    44b8:      	b	0x44ba <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::haa997a2aad1e2fd1+0x16> @ imm = #-2
-    44ba:      	ldr	r0, [sp]
-    44bc:      	str	r0, [sp, #28]
-    44be:      	b	0x44c0 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::haa997a2aad1e2fd1+0x1c> @ imm = #-2
-    44c0:      	ldr	r0, [sp]
-    44c2:      	add	sp, #32
-    44c4:      	bx	lr
-
-000044c6 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::hc943805811a0188a>:
-    44c6:      	sub	sp, #184
-    44c8:      	str	r1, [sp, #20]
-    44ca:      	str	r0, [sp, #24]
-    44cc:      	str	r1, [sp, #32]
-    44ce:      	str	r1, [sp, #40]
-    44d0:      	str	r1, [sp, #36]
-    44d2:      	ldr	r0, [sp, #36]
-    44d4:      	str	r0, [sp, #28]
-    44d6:      	b	0x44d8 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::hc943805811a0188a+0x12> @ imm = #-2
-    44d8:      	ldr	r1, [sp, #28]
-    44da:      	ldr	r0, [sp, #24]
-    44dc:      	ldr	r0, [r0]
-    44de:      	ldrb	r2, [r0]
-    44e0:      	str	r1, [sp, #168]
-    44e2:      	add	r0, sp, #172
-    44e4:      	strb	r2, [r0]
-    44e6:      	str	r1, [sp, #176]
-    44e8:      	ldr	r0, [r1]
-    44ea:      	movs	r3, #1
-    44ec:      	bics	r0, r3
-    44ee:      	str	r1, [sp, #180]
-    44f0:      	orrs	r0, r2
-    44f2:      	str	r0, [r1]
-    44f4:      	b	0x44f6 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::hc943805811a0188a+0x30> @ imm = #-2
-    44f6:      	ldr	r0, [sp, #20]
-    44f8:      	str	r0, [sp, #164]
-    44fa:      	str	r0, [sp, #160]
-    44fc:      	ldr	r0, [sp, #160]
-    44fe:      	str	r0, [sp, #16]
-    4500:      	b	0x4502 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::hc943805811a0188a+0x3c> @ imm = #-2
-    4502:      	ldr	r1, [sp, #16]
-    4504:      	ldr	r0, [sp, #24]
-    4506:      	ldr	r0, [r0, #4]
-    4508:      	ldrb	r2, [r0]
-    450a:      	str	r1, [sp, #144]
-    450c:      	add	r0, sp, #148
-    450e:      	strb	r2, [r0]
-    4510:      	str	r1, [sp, #152]
-    4512:      	ldr	r0, [r1]
-    4514:      	movs	r3, #8
-    4516:      	bics	r0, r3
-    4518:      	lsls	r2, r2, #3
-    451a:      	str	r1, [sp, #156]
-    451c:      	orrs	r0, r2
-    451e:      	str	r0, [r1]
-    4520:      	b	0x4522 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::hc943805811a0188a+0x5c> @ imm = #-2
-    4522:      	ldr	r0, [sp, #20]
-    4524:      	str	r0, [sp, #140]
-    4526:      	str	r0, [sp, #136]
-    4528:      	ldr	r0, [sp, #136]
-    452a:      	str	r0, [sp, #12]
-    452c:      	b	0x452e <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::hc943805811a0188a+0x68> @ imm = #-2
-    452e:      	ldr	r1, [sp, #12]
-    4530:      	ldr	r0, [sp, #24]
-    4532:      	ldr	r0, [r0, #8]
-    4534:      	ldrb	r2, [r0]
-    4536:      	str	r1, [sp, #120]
-    4538:      	add	r0, sp, #124
-    453a:      	strb	r2, [r0]
-    453c:      	str	r1, [sp, #128]
-    453e:      	ldr	r0, [r1]
-    4540:      	movs	r3, #4
-    4542:      	bics	r0, r3
-    4544:      	lsls	r2, r2, #2
-    4546:      	str	r1, [sp, #132]
-    4548:      	orrs	r0, r2
-    454a:      	str	r0, [r1]
-    454c:      	b	0x454e <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::hc943805811a0188a+0x88> @ imm = #-2
-    454e:      	ldr	r0, [sp, #20]
-    4550:      	str	r0, [sp, #116]
-    4552:      	str	r0, [sp, #112]
-    4554:      	ldr	r0, [sp, #112]
-    4556:      	str	r0, [sp, #8]
-    4558:      	b	0x455a <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::hc943805811a0188a+0x94> @ imm = #-2
-    455a:      	ldr	r1, [sp, #8]
-    455c:      	ldr	r0, [sp, #24]
-    455e:      	ldr	r0, [r0, #12]
-    4560:      	ldrb	r2, [r0]
-    4562:      	str	r1, [sp, #96]
-    4564:      	add	r0, sp, #100
-    4566:      	strb	r2, [r0]
-    4568:      	str	r1, [sp, #104]
-    456a:      	ldr	r0, [r1]
-    456c:      	movs	r3, #1
-    456e:      	lsls	r3, r3, #10
-    4570:      	bics	r0, r3
-    4572:      	lsls	r2, r2, #10
-    4574:      	str	r1, [sp, #108]
-    4576:      	orrs	r0, r2
-    4578:      	str	r0, [r1]
-    457a:      	b	0x457c <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::hc943805811a0188a+0xb6> @ imm = #-2
-    457c:      	ldr	r0, [sp, #20]
-    457e:      	str	r0, [sp, #92]
-    4580:      	str	r0, [sp, #88]
-    4582:      	ldr	r0, [sp, #88]
-    4584:      	str	r0, [sp, #4]
-    4586:      	b	0x4588 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::hc943805811a0188a+0xc2> @ imm = #-2
-    4588:      	ldr	r1, [sp, #4]
-    458a:      	ldr	r0, [sp, #24]
-    458c:      	ldr	r0, [r0, #16]
-    458e:      	ldrb	r2, [r0]
-    4590:      	str	r1, [sp, #72]
-    4592:      	add	r0, sp, #76
-    4594:      	strb	r2, [r0]
-    4596:      	str	r1, [sp, #80]
-    4598:      	ldr	r0, [r1]
-    459a:      	movs	r3, #128
-    459c:      	bics	r0, r3
-    459e:      	lsls	r2, r2, #7
-    45a0:      	str	r1, [sp, #84]
-    45a2:      	orrs	r0, r2
-    45a4:      	str	r0, [r1]
-    45a6:      	b	0x45a8 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::hc943805811a0188a+0xe2> @ imm = #-2
-    45a8:      	ldr	r0, [sp, #20]
-    45aa:      	str	r0, [sp, #68]
-    45ac:      	str	r0, [sp, #64]
-    45ae:      	ldr	r0, [sp, #64]
-    45b0:      	str	r0, [sp]
-    45b2:      	b	0x45b4 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::hc943805811a0188a+0xee> @ imm = #-2
-    45b4:      	ldr	r1, [sp]
-    45b6:      	ldr	r0, [sp, #24]
-    45b8:      	ldr	r0, [r0, #20]
-    45ba:      	ldrb	r2, [r0]
-    45bc:      	str	r1, [sp, #48]
-    45be:      	add	r0, sp, #52
-    45c0:      	strb	r2, [r0]
-    45c2:      	str	r1, [sp, #56]
-    45c4:      	ldr	r0, [r1]
-    45c6:      	movs	r3, #112
-    45c8:      	bics	r0, r3
-    45ca:      	lsls	r2, r2, #29
-    45cc:      	lsrs	r2, r2, #25
-    45ce:      	str	r1, [sp, #60]
-    45d0:      	adds	r0, r0, r2
-    45d2:      	str	r0, [r1]
-    45d4:      	b	0x45d6 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::hc943805811a0188a+0x110> @ imm = #-2
-    45d6:      	ldr	r0, [sp]
-    45d8:      	str	r0, [sp, #44]
-    45da:      	b	0x45dc <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::hc943805811a0188a+0x116> @ imm = #-2
-    45dc:      	ldr	r0, [sp]
-    45de:      	add	sp, #184
-    45e0:      	bx	lr
-
-000045e2 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::downgrade::h87d3ddb98067055e>:
-    45e2:      	sub	sp, #4
-    45e4:      	str	r1, [sp]
-    45e6:      	mov	r1, r0
-    45e8:      	ldr	r0, [sp]
-    45ea:      	ldr	r2, [r0, #8]
-    45ec:      	str	r2, [r1, #8]
-    45ee:      	ldr	r2, [r0, #4]
-    45f0:      	str	r2, [r1, #4]
-    45f2:      	ldr	r0, [r0]
-    45f4:      	str	r0, [r1]
-    45f6:      	b	0x45f8 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::downgrade::h87d3ddb98067055e+0x16> @ imm = #-2
-    45f8:      	add	sp, #4
-    45fa:      	bx	lr
-
-000045fc <core::cmp::PartialEq::ne::hea6843426e94b4ab>:
-    45fc:      	push	{r7, lr}
-    45fe:      	add	r7, sp, #0
-    4600:      	sub	sp, #16
-    4602:      	str	r0, [sp, #8]
-    4604:      	str	r1, [sp, #12]
-    4606:      	bl	0x219a <<va108xx_hal::spi::HwChipSelectId as core::cmp::PartialEq>::eq::hca17dedfe36defa7> @ imm = #-9328
-    460a:      	str	r0, [sp, #4]
-    460c:      	b	0x460e <core::cmp::PartialEq::ne::hea6843426e94b4ab+0x12> @ imm = #-2
-    460e:      	ldr	r1, [sp, #4]
-    4610:      	movs	r0, #1
-    4612:      	bics	r0, r1
-    4614:      	add	sp, #16
-    4616:      	pop	{r7, pc}
-
-00004618 <dummy_pin::dummy::DummyPin::new_low::h44eb1aac66c84527>:
-    4618:      	bx	lr
-
-0000461a <<u8 as va108xx_hal::spi::Word>::word_reg::h330cee0d31d1007d>:
-    461a:      	movs	r0, #7
-    461c:      	bx	lr
-    461e:      	bmi	0x45ca <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::{{closure}}::hc943805811a0188a+0x104> @ imm = #-88
-
-00004620 <va108xx_hal::spi::SpiBase<va108xx::SPIB,WORD>::clear_tx_fifo::h3332735f15c233c0>:
-    4620:      	push	{r7, lr}
-    4622:      	add	r7, sp, #0
-    4624:      	sub	sp, #48
-    4626:      	str	r0, [sp, #4]
-    4628:      	str	r0, [sp, #8]
-    462a:      	b	0x462c <va108xx_hal::spi::SpiBase<va108xx::SPIB,WORD>::clear_tx_fifo::h3332735f15c233c0+0xc> @ imm = #-2
-    462c:      	ldr	r0, [pc, #48] <$d.46>
-    462e:      	str	r0, [sp]
-    4630:      	str	r0, [sp, #24]
-    4632:      	movs	r0, #0
-    4634:      	str	r0, [sp, #20]
-    4636:      	ldr	r0, [sp, #20]
-    4638:      	str	r0, [sp, #44]
-    463a:      	str	r0, [sp, #40]
-    463c:      	ldr	r0, [sp, #40]
-    463e:      	str	r0, [sp, #16]
-    4640:      	add	r0, sp, #16
-    4642:      	str	r0, [sp, #12]
-    4644:      	ldr	r0, [sp, #12]
-    4646:      	bl	0x4664 <va108xx_hal::spi::SpiBase<va108xx::SPIB,WORD>::clear_tx_fifo::{{closure}}::h2508f4115cf3e218> @ imm = #26
-    464a:      	mov	r1, r0
-    464c:      	ldr	r0, [sp]
-    464e:      	ldr	r1, [r1]
-    4650:      	str	r0, [sp, #28]
-    4652:      	str	r1, [sp, #32]
-    4654:      	str	r0, [sp, #36]
-    4656:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #14890
-    465a:      	b	0x465c <va108xx_hal::spi::SpiBase<va108xx::SPIB,WORD>::clear_tx_fifo::h3332735f15c233c0+0x3c> @ imm = #-2
-    465c:      	add	sp, #48
-    465e:      	pop	{r7, pc}
-
-00004660 <$d.46>:
-    4660:	2c 10 05 40	.word	0x4005102c
-
-00004664 <va108xx_hal::spi::SpiBase<va108xx::SPIB,WORD>::clear_tx_fifo::{{closure}}::h2508f4115cf3e218>:
-    4664:      	sub	sp, #44
-    4666:      	str	r0, [sp, #8]
-    4668:      	str	r0, [sp, #16]
-    466a:      	str	r0, [sp, #12]
-    466c:      	ldr	r0, [sp, #12]
-    466e:      	str	r0, [sp]
-    4670:      	b	0x4672 <va108xx_hal::spi::SpiBase<va108xx::SPIB,WORD>::clear_tx_fifo::{{closure}}::h2508f4115cf3e218+0xe> @ imm = #-2
-    4672:      	ldr	r1, [sp]
-    4674:      	str	r1, [sp, #24]
-    4676:      	str	r1, [sp, #28]
-    4678:      	add	r2, sp, #32
-    467a:      	movs	r0, #1
-    467c:      	strb	r0, [r2]
-    467e:      	str	r1, [sp, #36]
-    4680:      	ldr	r0, [r1]
-    4682:      	str	r1, [sp, #40]
-    4684:      	movs	r2, #2
-    4686:      	orrs	r0, r2
-    4688:      	str	r0, [r1]
-    468a:      	b	0x468c <va108xx_hal::spi::SpiBase<va108xx::SPIB,WORD>::clear_tx_fifo::{{closure}}::h2508f4115cf3e218+0x28> @ imm = #-2
-    468c:      	ldr	r0, [sp]
-    468e:      	str	r0, [sp, #20]
-    4690:      	b	0x4692 <va108xx_hal::spi::SpiBase<va108xx::SPIB,WORD>::clear_tx_fifo::{{closure}}::h2508f4115cf3e218+0x2e> @ imm = #-2
-    4692:      	ldr	r0, [sp]
-    4694:      	add	sp, #44
-    4696:      	bx	lr
-
-00004698 <va108xx_hal::spi::SpiBase<va108xx::SPIB,WORD>::clear_rx_fifo::hc38495e98f6a9fa7>:
-    4698:      	push	{r7, lr}
-    469a:      	add	r7, sp, #0
-    469c:      	sub	sp, #48
-    469e:      	str	r0, [sp, #4]
-    46a0:      	str	r0, [sp, #8]
-    46a2:      	b	0x46a4 <va108xx_hal::spi::SpiBase<va108xx::SPIB,WORD>::clear_rx_fifo::hc38495e98f6a9fa7+0xc> @ imm = #-2
-    46a4:      	ldr	r0, [pc, #48] <$d.52>
-    46a6:      	str	r0, [sp]
-    46a8:      	str	r0, [sp, #24]
-    46aa:      	movs	r0, #0
-    46ac:      	str	r0, [sp, #20]
-    46ae:      	ldr	r0, [sp, #20]
-    46b0:      	str	r0, [sp, #44]
-    46b2:      	str	r0, [sp, #40]
-    46b4:      	ldr	r0, [sp, #40]
-    46b6:      	str	r0, [sp, #16]
-    46b8:      	add	r0, sp, #16
-    46ba:      	str	r0, [sp, #12]
-    46bc:      	ldr	r0, [sp, #12]
-    46be:      	bl	0x46dc <va108xx_hal::spi::SpiBase<va108xx::SPIB,WORD>::clear_rx_fifo::{{closure}}::h22918c1f7874b86f> @ imm = #26
-    46c2:      	mov	r1, r0
-    46c4:      	ldr	r0, [sp]
-    46c6:      	ldr	r1, [r1]
-    46c8:      	str	r0, [sp, #28]
-    46ca:      	str	r1, [sp, #32]
-    46cc:      	str	r0, [sp, #36]
-    46ce:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #14770
-    46d2:      	b	0x46d4 <va108xx_hal::spi::SpiBase<va108xx::SPIB,WORD>::clear_rx_fifo::hc38495e98f6a9fa7+0x3c> @ imm = #-2
-    46d4:      	add	sp, #48
-    46d6:      	pop	{r7, pc}
-
-000046d8 <$d.52>:
-    46d8:	2c 10 05 40	.word	0x4005102c
-
-000046dc <va108xx_hal::spi::SpiBase<va108xx::SPIB,WORD>::clear_rx_fifo::{{closure}}::h22918c1f7874b86f>:
-    46dc:      	sub	sp, #44
-    46de:      	str	r0, [sp, #8]
-    46e0:      	str	r0, [sp, #16]
-    46e2:      	str	r0, [sp, #12]
-    46e4:      	ldr	r0, [sp, #12]
-    46e6:      	str	r0, [sp]
-    46e8:      	b	0x46ea <va108xx_hal::spi::SpiBase<va108xx::SPIB,WORD>::clear_rx_fifo::{{closure}}::h22918c1f7874b86f+0xe> @ imm = #-2
-    46ea:      	ldr	r1, [sp]
-    46ec:      	str	r1, [sp, #24]
-    46ee:      	str	r1, [sp, #28]
-    46f0:      	add	r0, sp, #32
-    46f2:      	movs	r2, #1
-    46f4:      	strb	r2, [r0]
-    46f6:      	str	r1, [sp, #36]
-    46f8:      	ldr	r0, [r1]
-    46fa:      	str	r1, [sp, #40]
-    46fc:      	orrs	r0, r2
-    46fe:      	str	r0, [r1]
-    4700:      	b	0x4702 <va108xx_hal::spi::SpiBase<va108xx::SPIB,WORD>::clear_rx_fifo::{{closure}}::h22918c1f7874b86f+0x26> @ imm = #-2
-    4702:      	ldr	r0, [sp]
-    4704:      	str	r0, [sp, #20]
-    4706:      	b	0x4708 <va108xx_hal::spi::SpiBase<va108xx::SPIB,WORD>::clear_rx_fifo::{{closure}}::h22918c1f7874b86f+0x2c> @ imm = #-2
-    4708:      	ldr	r0, [sp]
-    470a:      	add	sp, #44
-    470c:      	bx	lr
-
-0000470e <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::spi::FullDuplex<u8>>::send::{{closure}}::hc4dcbfdec692fb09>:
-    470e:      	sub	sp, #32
-    4710:      	str	r1, [sp]
-    4712:      	str	r0, [sp, #4]
-    4714:      	str	r1, [sp, #8]
-    4716:      	ldrb	r0, [r0]
-    4718:      	str	r1, [sp, #12]
-    471a:      	str	r0, [sp, #16]
-    471c:      	str	r1, [sp, #20]
-    471e:      	str	r0, [sp, #24]
-    4720:      	str	r0, [r1]
-    4722:      	b	0x4724 <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::spi::FullDuplex<u8>>::send::{{closure}}::hc4dcbfdec692fb09+0x16> @ imm = #-2
-    4724:      	ldr	r0, [sp]
-    4726:      	str	r0, [sp, #28]
-    4728:      	b	0x472a <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::spi::FullDuplex<u8>>::send::{{closure}}::hc4dcbfdec692fb09+0x1c> @ imm = #-2
-    472a:      	ldr	r0, [sp]
-    472c:      	add	sp, #32
-    472e:      	bx	lr
-
-00004730 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435>:
-    4730:      	push	{r4, r6, r7, lr}
-    4732:      	add	r7, sp, #8
-    4734:      	sub	sp, #508
-    4736:      	sub	sp, #508
-    4738:      	sub	sp, #496
-    473a:      	ldr	r4, [pc, #884] <$d.59+0x2>
-    473c:      	add	r4, sp, r4
-    473e:      	str	r4, [sp, #164]
-    4740:      	ldr	r4, [pc, #880] <$d.59+0x4>
-    4742:      	add	r4, sp, r4
-    4744:      	str	r4, [sp, #168]
-    4746:      	add	r4, sp, #1020
-    4748:      	adds	r4, #196
-    474a:      	str	r4, [sp, #172]
-    474c:      	add	r4, sp, #1020
-    474e:      	adds	r4, #68
-    4750:      	str	r4, [sp, #176]
-    4752:      	mov	r4, r3
-    4754:      	str	r2, [sp, #180]
-    4756:      	str	r1, [sp, #184]
-    4758:      	str	r0, [sp, #188]
-    475a:      	ldr	r3, [r7, #8]
-    475c:      	str	r4, [sp, #192]
-    475e:      	str	r3, [sp, #196]
-    4760:      	str	r0, [sp, #360]
-    4762:      	str	r1, [sp, #364]
-    4764:      	str	r2, [sp, #368]
-    4766:      	bl	0x4620 <va108xx_hal::spi::SpiBase<va108xx::SPIB,WORD>::clear_tx_fifo::h3332735f15c233c0> @ imm = #-330
-    476a:      	b	0x476c <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x3c> @ imm = #-2
-    476c:      	ldr	r0, [sp, #188]
-    476e:      	bl	0x4698 <va108xx_hal::spi::SpiBase<va108xx::SPIB,WORD>::clear_rx_fifo::hc38495e98f6a9fa7> @ imm = #-218
-    4772:      	b	0x4774 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x44> @ imm = #-2
-    4774:      	ldr	r0, [sp, #188]
-    4776:      	ldrb	r0, [r0, #9]
-    4778:      	lsls	r0, r0, #31
-    477a:      	cmp	r0, #0
-    477c:      	bne	0x4790 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x60> @ imm = #16
-    477e:      	b	0x4780 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x50> @ imm = #-2
-    4780:      	ldr	r1, [sp, #180]
-    4782:      	ldr	r0, [sp, #184]
-    4784:      	str	r1, [sp, #412]
-    4786:      	bl	0x817c <core::slice::<impl [T]>::iter::hcf5f5b4e98ae1b51> @ imm = #14834
-    478a:      	str	r1, [sp, #208]
-    478c:      	str	r0, [sp, #204]
-    478e:      	b	0x47e0 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0xb0> @ imm = #78
-    4790:      	ldr	r0, [sp, #188]
-    4792:      	str	r0, [sp, #492]
-    4794:      	b	0x4796 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x66> @ imm = #-2
-    4796:      	ldr	r0, [pc, #800] <$d.59+0xa>
-    4798:      	str	r0, [sp, #160]
-    479a:      	str	r0, [sp, #640]
-    479c:      	str	r0, [sp, #648]
-    479e:      	str	r0, [sp, #652]
-    47a0:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #14540
-    47a4:      	str	r0, [sp, #644]
-    47a6:      	str	r0, [sp, #628]
-    47a8:      	ldr	r1, [sp, #628]
-    47aa:      	str	r1, [sp, #660]
-    47ac:      	str	r1, [sp, #656]
-    47ae:      	ldr	r1, [sp, #656]
-    47b0:      	str	r1, [sp, #624]
-    47b2:      	str	r0, [sp, #636]
-    47b4:      	ldr	r0, [sp, #636]
-    47b6:      	str	r0, [sp, #680]
-    47b8:      	str	r0, [sp, #676]
-    47ba:      	ldr	r0, [sp, #676]
-    47bc:      	str	r0, [sp, #632]
-    47be:      	add	r0, sp, #624
-    47c0:      	str	r0, [sp, #616]
-    47c2:      	add	r0, sp, #632
-    47c4:      	str	r0, [sp, #620]
-    47c6:      	ldr	r0, [sp, #616]
-    47c8:      	ldr	r1, [sp, #620]
-    47ca:      	bl	0x515c <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::{{closure}}::h0ec594e628e55c5f> @ imm = #2446
-    47ce:      	mov	r1, r0
-    47d0:      	ldr	r0, [sp, #160]
-    47d2:      	ldr	r1, [r1]
-    47d4:      	str	r0, [sp, #664]
-    47d6:      	str	r1, [sp, #668]
-    47d8:      	str	r0, [sp, #672]
-    47da:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #14502
-    47de:      	b	0x4780 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x50> @ imm = #-98
-    47e0:      	ldr	r1, [sp, #180]
-    47e2:      	movs	r0, #12
-    47e4:      	bl	0x61fc <core::cmp::min::hd7011c4be9c221eb> @ imm = #6676
-    47e8:      	str	r0, [sp, #156]
-    47ea:      	b	0x47ec <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0xbc> @ imm = #-2
-    47ec:      	ldr	r0, [sp, #156]
-    47ee:      	movs	r1, #0
-    47f0:      	str	r1, [sp, #212]
-    47f2:      	str	r0, [sp, #216]
-    47f4:      	ldr	r0, [sp, #212]
-    47f6:      	ldr	r1, [sp, #216]
-    47f8:      	bl	0x651a <<I as core::iter::traits::collect::IntoIterator>::into_iter::h1327cd27b8358e54> @ imm = #7454
-    47fc:      	str	r0, [sp, #148]
-    47fe:      	str	r1, [sp, #152]
-    4800:      	b	0x4802 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0xd2> @ imm = #-2
-    4802:      	ldr	r0, [sp, #152]
-    4804:      	ldr	r1, [sp, #148]
-    4806:      	str	r1, [sp, #220]
-    4808:      	str	r0, [sp, #224]
-    480a:      	b	0x480c <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0xdc> @ imm = #-2
-    480c:      	add	r0, sp, #220
-    480e:      	bl	0x6500 <core::iter::range::<impl core::iter::traits::iterator::Iterator for core::ops::range::Range<A>>::next::h07a91e96d06ca3d1> @ imm = #7406
-    4812:      	str	r1, [sp, #232]
-    4814:      	str	r0, [sp, #228]
-    4816:      	b	0x4818 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0xe8> @ imm = #-2
-    4818:      	ldr	r0, [sp, #228]
-    481a:      	cmp	r0, #0
-    481c:      	beq	0x4824 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0xf4> @ imm = #4
-    481e:      	b	0x4820 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0xf0> @ imm = #-2
-    4820:      	b	0x4830 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x100> @ imm = #12
-    4822:      	trap
-    4824:      	ldr	r0, [sp, #188]
-    4826:      	ldrb	r0, [r0, #9]
-    4828:      	lsls	r0, r0, #31
-    482a:      	cmp	r0, #0
-    482c:      	beq	0x492a <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x1fa> @ imm = #250
-    482e:      	b	0x4932 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x202> @ imm = #256
-    4830:      	ldr	r0, [sp, #232]
-    4832:      	str	r0, [sp, #416]
-    4834:      	str	r0, [sp, #420]
-    4836:      	b	0x4838 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x108> @ imm = #-2
-    4838:      	add	r0, sp, #204
-    483a:      	bl	0x82be <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f> @ imm = #14976
-    483e:      	str	r0, [sp, #144]
-    4840:      	b	0x4842 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x112> @ imm = #-2
-    4842:      	ldr	r0, [sp, #144]
-    4844:      	ldr	r1, [pc, #628] <$d.59+0xc>
-    4846:      	bl	0x52f4 <core::option::Option<T>::unwrap::hfb7c9ddfaa6dfdbd> @ imm = #2730
-    484a:      	str	r0, [sp, #140]
-    484c:      	b	0x484e <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x11e> @ imm = #-2
-    484e:      	ldr	r0, [sp, #188]
-    4850:      	ldr	r1, [sp, #140]
-    4852:      	ldrb	r1, [r1]
-    4854:      	add	r2, sp, #684
-    4856:      	strb	r1, [r2]
-    4858:      	str	r0, [sp, #704]
-    485a:      	str	r0, [sp, #708]
-    485c:      	ldr	r0, [pc, #608] <$d.59+0x10>
-    485e:      	str	r0, [sp, #756]
-    4860:      	str	r0, [sp, #760]
-    4862:      	str	r0, [sp, #764]
-    4864:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #14344
-    4868:      	str	r0, [sp, #752]
-    486a:      	ldr	r0, [sp, #752]
-    486c:      	str	r0, [sp, #772]
-    486e:      	str	r0, [sp, #768]
-    4870:      	ldr	r0, [sp, #768]
-    4872:      	str	r0, [sp, #696]
-    4874:      	add	r0, sp, #696
-    4876:      	str	r0, [sp, #776]
-    4878:      	str	r0, [sp, #780]
-    487a:      	ldr	r0, [sp, #696]
-    487c:      	lsls	r0, r0, #30
-    487e:      	lsrs	r0, r0, #31
-    4880:      	add	r1, sp, #788
-    4882:      	strb	r0, [r1]
-    4884:      	add	r1, sp, #796
-    4886:      	strb	r0, [r1]
-    4888:      	add	r1, sp, #792
-    488a:      	strb	r0, [r1]
-    488c:      	ldr	r0, [sp, #792]
-    488e:      	add	r1, sp, #784
-    4890:      	strb	r0, [r1]
-    4892:      	ldr	r1, [sp, #784]
-    4894:      	add	r0, sp, #692
-    4896:      	strb	r1, [r0]
-    4898:      	str	r0, [sp, #800]
-    489a:      	str	r0, [sp, #808]
-    489c:      	str	r0, [sp, #812]
-    489e:      	ldrb	r0, [r0]
-    48a0:      	lsls	r0, r0, #31
-    48a2:      	cmp	r0, #0
-    48a4:      	beq	0x48ec <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x1bc> @ imm = #68
-    48a6:      	b	0x48a8 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x178> @ imm = #-2
-    48a8:      	ldr	r0, [sp, #188]
-    48aa:      	str	r0, [sp, #804]
-    48ac:      	add	r0, sp, #684
-    48ae:      	str	r0, [sp, #700]
-    48b0:      	ldr	r0, [sp, #700]
-    48b2:      	ldr	r1, [pc, #528] <$d.59+0x16>
-    48b4:      	str	r1, [sp, #132]
-    48b6:      	str	r1, [sp, #724]
-    48b8:      	str	r0, [sp, #728]
-    48ba:      	movs	r1, #0
-    48bc:      	str	r1, [sp, #136]
-    48be:      	str	r1, [sp, #720]
-    48c0:      	ldr	r1, [sp, #720]
-    48c2:      	str	r1, [sp, #748]
-    48c4:      	str	r1, [sp, #744]
-    48c6:      	ldr	r1, [sp, #744]
-    48c8:      	str	r1, [sp, #716]
-    48ca:      	add	r1, sp, #716
-    48cc:      	str	r1, [sp, #712]
-    48ce:      	ldr	r1, [sp, #712]
-    48d0:      	bl	0x470e <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::spi::FullDuplex<u8>>::send::{{closure}}::hc4dcbfdec692fb09> @ imm = #-454
-    48d4:      	mov	r1, r0
-    48d6:      	ldr	r0, [sp, #132]
-    48d8:      	ldr	r1, [r1]
-    48da:      	str	r0, [sp, #732]
-    48dc:      	str	r1, [sp, #736]
-    48de:      	str	r0, [sp, #740]
-    48e0:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #14240
-    48e4:      	ldr	r0, [sp, #136]
-    48e6:      	add	r1, sp, #688
-    48e8:      	strb	r0, [r1]
-    48ea:      	b	0x48f4 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x1c4> @ imm = #6
-    48ec:      	add	r1, sp, #688
-    48ee:      	movs	r0, #1
-    48f0:      	strb	r0, [r1]
-    48f2:      	b	0x48f4 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x1c4> @ imm = #-2
-    48f4:      	ldr	r0, [sp, #688]
-    48f6:      	add	r1, sp, #240
-    48f8:      	strb	r0, [r1]
-    48fa:      	b	0x48fc <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x1cc> @ imm = #-2
-    48fc:      	add	r0, sp, #240
-    48fe:      	ldrb	r0, [r0]
-    4900:      	lsls	r0, r0, #31
-    4902:      	cmp	r0, #0
-    4904:      	beq	0x490c <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x1dc> @ imm = #4
-    4906:      	b	0x4908 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x1d8> @ imm = #-2
-    4908:      	b	0x4914 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x1e4> @ imm = #8
-    490a:      	trap
-    490c:      	bl	0x538e <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h096e9468cf20e054E> @ imm = #2686
-    4910:      	str	r0, [sp, #128]
-    4912:      	b	0x491c <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x1ec> @ imm = #6
-    4914:      	movs	r0, #1
-    4916:      	cmp	r0, #0
-    4918:      	bne	0x4838 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x108> @ imm = #-228
-    491a:      	b	0x490a <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x1da> @ imm = #-20
-    491c:      	ldr	r0, [sp, #128]
-    491e:      	movs	r1, #1
-    4920:      	ands	r0, r1
-    4922:      	ldr	r1, [pc, #408] <$d.59+0xe>
-    4924:      	bl	0x52c4 <core::option::Option<T>::unwrap::h8f27e7a85667e8bc> @ imm = #2460
-    4928:      	b	0x480c <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0xdc> @ imm = #-288
-    492a:      	ldr	r0, [sp, #192]
-    492c:      	cmp	r0, #0
-    492e:      	bne	0x4982 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x252> @ imm = #80
-    4930:      	b	0x4994 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x264> @ imm = #96
-    4932:      	ldr	r0, [sp, #188]
-    4934:      	str	r0, [sp, #816]
-    4936:      	b	0x4938 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x208> @ imm = #-2
-    4938:      	ldr	r0, [pc, #380] <$d.59+0x8>
-    493a:      	str	r0, [sp, #124]
-    493c:      	str	r0, [sp, #844]
-    493e:      	str	r0, [sp, #852]
-    4940:      	str	r0, [sp, #856]
-    4942:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #14122
-    4946:      	str	r0, [sp, #848]
-    4948:      	str	r0, [sp, #832]
-    494a:      	ldr	r1, [sp, #832]
-    494c:      	str	r1, [sp, #864]
-    494e:      	str	r1, [sp, #860]
-    4950:      	ldr	r1, [sp, #860]
-    4952:      	str	r1, [sp, #828]
-    4954:      	str	r0, [sp, #840]
-    4956:      	ldr	r0, [sp, #840]
-    4958:      	str	r0, [sp, #884]
-    495a:      	str	r0, [sp, #880]
-    495c:      	ldr	r0, [sp, #880]
-    495e:      	str	r0, [sp, #836]
-    4960:      	add	r0, sp, #828
-    4962:      	str	r0, [sp, #820]
-    4964:      	add	r0, sp, #836
-    4966:      	str	r0, [sp, #824]
-    4968:      	ldr	r0, [sp, #820]
-    496a:      	ldr	r1, [sp, #824]
-    496c:      	bl	0x5192 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::{{closure}}::h435966d3de0c489d> @ imm = #2082
-    4970:      	mov	r1, r0
-    4972:      	ldr	r0, [sp, #124]
-    4974:      	ldr	r1, [r1]
-    4976:      	str	r0, [sp, #868]
-    4978:      	str	r1, [sp, #872]
-    497a:      	str	r0, [sp, #876]
-    497c:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #14084
-    4980:      	b	0x492a <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x1fa> @ imm = #-90
-    4982:      	ldr	r0, [sp, #192]
-    4984:      	ldr	r1, [sp, #196]
-    4986:      	str	r0, [sp, #452]
-    4988:      	str	r1, [sp, #456]
-    498a:      	bl	0x64c8 <core::slice::<impl [T]>::iter_mut::h0c9d630705430598> @ imm = #6970
-    498e:      	str	r1, [sp, #248]
-    4990:      	str	r0, [sp, #244]
-    4992:      	b	0x4d54 <$t.60+0x28c>    @ imm = #958
-    4994:      	ldr	r0, [sp, #204]
-    4996:      	ldr	r1, [sp, #208]
-    4998:      	bl	0x82b4 <<I as core::iter::traits::collect::IntoIterator>::into_iter::hd3a73902742f3156> @ imm = #14616
-    499c:      	str	r0, [sp, #116]
-    499e:      	str	r1, [sp, #120]
-    49a0:      	b	0x49a2 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x272> @ imm = #-2
-    49a2:      	ldr	r0, [sp, #120]
-    49a4:      	ldr	r1, [sp, #116]
-    49a6:      	str	r1, [sp, #300]
-    49a8:      	str	r0, [sp, #304]
-    49aa:      	b	0x49ac <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x27c> @ imm = #-2
-    49ac:      	add	r0, sp, #300
-    49ae:      	bl	0x82be <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f> @ imm = #14604
-    49b2:      	str	r0, [sp, #308]
-    49b4:      	b	0x49b6 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x286> @ imm = #-2
-    49b6:      	ldr	r0, [sp, #308]
-    49b8:      	subs	r2, r0, #1
-    49ba:      	mov	r1, r0
-    49bc:      	sbcs	r1, r2
-    49be:      	cmp	r0, #0
-    49c0:      	beq	0x49c8 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x298> @ imm = #4
-    49c2:      	b	0x49c4 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x294> @ imm = #-2
-    49c4:      	b	0x49d4 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x2a4> @ imm = #12
-    49c6:      	trap
-    49c8:      	ldr	r1, [sp, #180]
-    49ca:      	movs	r0, #12
-    49cc:      	bl	0x61fc <core::cmp::min::hd7011c4be9c221eb> @ imm = #6188
-    49d0:      	str	r0, [sp, #112]
-    49d2:      	b	0x4c10 <$t.60+0x148>    @ imm = #570
-    49d4:      	ldr	r0, [sp, #308]
-    49d6:      	str	r0, [sp, #108]
-    49d8:      	str	r0, [sp, #424]
-    49da:      	str	r0, [sp, #428]
-    49dc:      	str	r0, [sp, #432]
-    49de:      	b	0x49e0 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x2b0> @ imm = #-2
-    49e0:      	ldr	r0, [sp, #188]
-    49e2:      	ldr	r1, [sp, #108]
-    49e4:      	ldrb	r1, [r1]
-    49e6:      	add	r2, sp, #888
-    49e8:      	strb	r1, [r2]
-    49ea:      	str	r0, [sp, #908]
-    49ec:      	str	r0, [sp, #912]
-    49ee:      	ldr	r0, [pc, #208] <$d.59+0x12>
-    49f0:      	str	r0, [sp, #960]
-    49f2:      	str	r0, [sp, #964]
-    49f4:      	str	r0, [sp, #968]
-    49f6:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #13942
-    49fa:      	str	r0, [sp, #956]
-    49fc:      	ldr	r0, [sp, #956]
-    49fe:      	str	r0, [sp, #976]
-    4a00:      	str	r0, [sp, #972]
-    4a02:      	ldr	r0, [sp, #972]
-    4a04:      	str	r0, [sp, #900]
-    4a06:      	add	r0, sp, #900
-    4a08:      	str	r0, [sp, #980]
-    4a0a:      	str	r0, [sp, #984]
-    4a0c:      	ldr	r0, [sp, #900]
-    4a0e:      	lsls	r0, r0, #30
-    4a10:      	lsrs	r0, r0, #31
-    4a12:      	add	r1, sp, #992
-    4a14:      	strb	r0, [r1]
-    4a16:      	add	r1, sp, #1000
-    4a18:      	strb	r0, [r1]
-    4a1a:      	add	r1, sp, #996
-    4a1c:      	strb	r0, [r1]
-    4a1e:      	ldr	r0, [sp, #996]
-    4a20:      	add	r1, sp, #988
-    4a22:      	strb	r0, [r1]
-    4a24:      	ldr	r1, [sp, #988]
-    4a26:      	add	r0, sp, #896
-    4a28:      	strb	r1, [r0]
-    4a2a:      	str	r0, [sp, #1004]
-    4a2c:      	str	r0, [sp, #1012]
-    4a2e:      	str	r0, [sp, #1016]
-    4a30:      	ldrb	r0, [r0]
-    4a32:      	lsls	r0, r0, #31
-    4a34:      	cmp	r0, #0
-    4a36:      	beq	0x4a7e <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x34e> @ imm = #68
-    4a38:      	b	0x4a3a <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x30a> @ imm = #-2
-    4a3a:      	ldr	r0, [sp, #188]
-    4a3c:      	str	r0, [sp, #1008]
-    4a3e:      	add	r0, sp, #888
-    4a40:      	str	r0, [sp, #904]
-    4a42:      	ldr	r0, [sp, #904]
-    4a44:      	ldr	r1, [pc, #124] <$d.59+0x14>
-    4a46:      	str	r1, [sp, #100]
-    4a48:      	str	r1, [sp, #928]
-    4a4a:      	str	r0, [sp, #932]
-    4a4c:      	movs	r1, #0
-    4a4e:      	str	r1, [sp, #104]
-    4a50:      	str	r1, [sp, #924]
-    4a52:      	ldr	r1, [sp, #924]
-    4a54:      	str	r1, [sp, #952]
-    4a56:      	str	r1, [sp, #948]
-    4a58:      	ldr	r1, [sp, #948]
-    4a5a:      	str	r1, [sp, #920]
-    4a5c:      	add	r1, sp, #920
-    4a5e:      	str	r1, [sp, #916]
-    4a60:      	ldr	r1, [sp, #916]
-    4a62:      	bl	0x470e <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::spi::FullDuplex<u8>>::send::{{closure}}::hc4dcbfdec692fb09> @ imm = #-856
-    4a66:      	mov	r1, r0
-    4a68:      	ldr	r0, [sp, #100]
-    4a6a:      	ldr	r1, [r1]
-    4a6c:      	str	r0, [sp, #936]
-    4a6e:      	str	r1, [sp, #940]
-    4a70:      	str	r0, [sp, #944]
-    4a72:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #13838
-    4a76:      	ldr	r0, [sp, #104]
-    4a78:      	add	r1, sp, #892
-    4a7a:      	strb	r0, [r1]
-    4a7c:      	b	0x4a86 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x356> @ imm = #6
-    4a7e:      	add	r1, sp, #892
-    4a80:      	movs	r0, #1
-    4a82:      	strb	r0, [r1]
-    4a84:      	b	0x4a86 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x356> @ imm = #-2
-    4a86:      	ldr	r0, [sp, #892]
-    4a88:      	add	r1, sp, #316
-    4a8a:      	strb	r0, [r1]
-    4a8c:      	b	0x4a8e <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x35e> @ imm = #-2
-    4a8e:      	add	r0, sp, #316
-    4a90:      	ldrb	r0, [r0]
-    4a92:      	lsls	r0, r0, #31
-    4a94:      	cmp	r0, #0
-    4a96:      	beq	0x4a9e <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x36e> @ imm = #4
-    4a98:      	b	0x4a9a <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x36a> @ imm = #-2
-    4a9a:      	b	0x4aa6 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x376> @ imm = #8
-    4a9c:      	trap
-    4a9e:      	bl	0x538e <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h096e9468cf20e054E> @ imm = #2284
-    4aa2:      	str	r0, [sp, #96]
-    4aa4:      	b	0x4ac8 <$t.60>          @ imm = #32
-    4aa6:      	movs	r0, #1
-    4aa8:      	cmp	r0, #0
-    4aaa:      	bne	0x49e0 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x2b0> @ imm = #-206
-    4aac:      	b	0x4a9c <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x36c> @ imm = #-20
-    4aae:      	mov	r8, r8
-
-00004ab0 <$d.59>:
-    4ab0:	c0 05 00 00	.word	0x000005c0
-    4ab4:	40 05 00 00	.word	0x00000540
-    4ab8:	04 10 05 40	.word	0x40051004
-    4abc:	68 b0 00 00	.word	0x0000b068
-    4ac0:	0c 10 05 40	.word	0x4005100c
-    4ac4:	08 10 05 40	.word	0x40051008
-
-00004ac8 <$t.60>:
-    4ac8:      	ldr	r0, [sp, #96]
-    4aca:      	movs	r1, #1
-    4acc:      	ands	r0, r1
-    4ace:      	ldr	r1, [pc, #968] <$d.61+0x2>
-    4ad0:      	bl	0x52c4 <core::option::Option<T>::unwrap::h8f27e7a85667e8bc> @ imm = #2032
-    4ad4:      	b	0x4ad6 <$t.60+0xe>      @ imm = #-2
-    4ad6:      	ldr	r1, [sp, #176]
-    4ad8:      	ldr	r0, [sp, #188]
-    4ada:      	ldr	r2, [pc, #960] <$d.61+0x6>
-    4adc:      	add	r2, sp, r2
-    4ade:      	str	r0, [r2]
-    4ae0:      	ldr	r2, [pc, #956] <$d.61+0x8>
-    4ae2:      	add	r2, sp, r2
-    4ae4:      	str	r0, [r2]
-    4ae6:      	ldr	r0, [pc, #956] <$d.61+0xe>
-    4ae8:      	ldr	r2, [pc, #956] <$d.61+0x10>
-    4aea:      	add	r2, sp, r2
-    4aec:      	str	r0, [r2]
-    4aee:      	ldr	r2, [pc, #956] <$d.61+0x16>
-    4af0:      	add	r2, sp, r2
-    4af2:      	str	r0, [r2]
-    4af4:      	str	r0, [r1]
-    4af6:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #13686
-    4afa:      	ldr	r1, [sp, #176]
-    4afc:      	ldr	r2, [pc, #944] <$d.61+0x18>
-    4afe:      	add	r2, sp, r2
-    4b00:      	str	r0, [r2]
-    4b02:      	ldr	r0, [pc, #940] <$d.61+0x1a>
-    4b04:      	add	r0, sp, r0
-    4b06:      	ldr	r0, [r0]
-    4b08:      	str	r0, [r1, #8]
-    4b0a:      	str	r0, [r1, #4]
-    4b0c:      	ldr	r0, [r1, #4]
-    4b0e:      	ldr	r2, [pc, #932] <$d.61+0x1e>
-    4b10:      	add	r2, sp, r2
-    4b12:      	str	r0, [r2]
-    4b14:      	add	r0, sp, #1020
-    4b16:      	adds	r0, #8
-    4b18:      	str	r0, [r1, #12]
-    4b1a:      	str	r0, [r1, #16]
-    4b1c:      	ldr	r0, [pc, #916] <$d.61+0x1c>
-    4b1e:      	add	r0, sp, r0
-    4b20:      	ldr	r0, [r0]
-    4b22:      	lsls	r0, r0, #29
-    4b24:      	lsrs	r0, r0, #31
-    4b26:      	add	r2, sp, #1020
-    4b28:      	adds	r2, #92
-    4b2a:      	strb	r0, [r2]
-    4b2c:      	add	r2, sp, #1020
-    4b2e:      	adds	r2, #100
-    4b30:      	strb	r0, [r2]
-    4b32:      	add	r2, sp, #1020
-    4b34:      	adds	r2, #96
-    4b36:      	strb	r0, [r2]
-    4b38:      	ldr	r0, [r1, #28]
-    4b3a:      	add	r2, sp, #1020
-    4b3c:      	adds	r2, #88
-    4b3e:      	strb	r0, [r2]
-    4b40:      	ldr	r2, [r1, #20]
-    4b42:      	add	r0, sp, #1020
-    4b44:      	adds	r0, #4
-    4b46:      	strb	r2, [r0]
-    4b48:      	str	r0, [r1, #48]
-    4b4a:      	str	r0, [r1, #40]
-    4b4c:      	str	r0, [r1, #44]
-    4b4e:      	ldrb	r0, [r0]
-    4b50:      	lsls	r0, r0, #31
-    4b52:      	cmp	r0, #0
-    4b54:      	beq	0x4bba <$t.60+0xf2>     @ imm = #98
-    4b56:      	b	0x4b58 <$t.60+0x90>     @ imm = #-2
-    4b58:      	ldr	r0, [sp, #188]
-    4b5a:      	ldr	r1, [sp, #176]
-    4b5c:      	str	r0, [r1, #36]
-    4b5e:      	ldr	r0, [pc, #856] <$d.61+0x22>
-    4b60:      	ldr	r1, [pc, #856] <$d.61+0x24>
-    4b62:      	add	r1, sp, r1
-    4b64:      	str	r0, [r1]
-    4b66:      	ldr	r1, [pc, #856] <$d.61+0x2a>
-    4b68:      	add	r1, sp, r1
-    4b6a:      	str	r0, [r1]
-    4b6c:      	ldr	r1, [pc, #852] <$d.61+0x2c>
-    4b6e:      	add	r1, sp, r1
-    4b70:      	str	r0, [r1]
-    4b72:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #13562
-    4b76:      	ldr	r1, [pc, #848] <$d.61+0x32>
-    4b78:      	add	r1, sp, r1
-    4b7a:      	str	r0, [r1]
-    4b7c:      	ldr	r0, [pc, #840] <$d.61+0x30>
-    4b7e:      	add	r0, sp, r0
-    4b80:      	ldr	r0, [r0]
-    4b82:      	ldr	r1, [pc, #840] <$d.61+0x36>
-    4b84:      	add	r1, sp, r1
-    4b86:      	str	r0, [r1]
-    4b88:      	ldr	r1, [pc, #836] <$d.61+0x38>
-    4b8a:      	add	r1, sp, r1
-    4b8c:      	str	r0, [r1]
-    4b8e:      	ldr	r0, [pc, #832] <$d.61+0x3a>
-    4b90:      	add	r0, sp, r0
-    4b92:      	ldr	r0, [r0]
-    4b94:      	ldr	r1, [pc, #828] <$d.61+0x3c>
-    4b96:      	add	r1, sp, r1
-    4b98:      	str	r0, [r1]
-    4b9a:      	add	r0, sp, #1020
-    4b9c:      	adds	r0, #12
-    4b9e:      	ldr	r1, [pc, #824] <$d.61+0x42>
-    4ba0:      	add	r1, sp, r1
-    4ba2:      	str	r0, [r1]
-    4ba4:      	ldr	r1, [pc, #820] <$d.61+0x44>
-    4ba6:      	add	r1, sp, r1
-    4ba8:      	str	r0, [r1]
-    4baa:      	ldr	r0, [pc, #808] <$d.61+0x3e>
-    4bac:      	add	r0, sp, r0
-    4bae:      	ldr	r0, [r0]
-    4bb0:      	add	r1, sp, #1020
-    4bb2:      	strb	r0, [r1, #1]
-    4bb4:      	movs	r0, #0
-    4bb6:      	strb	r0, [r1]
-    4bb8:      	b	0x4bc2 <$t.60+0xfa>     @ imm = #6
-    4bba:      	add	r1, sp, #1020
-    4bbc:      	movs	r0, #1
-    4bbe:      	strb	r0, [r1]
-    4bc0:      	b	0x4bc2 <$t.60+0xfa>     @ imm = #-2
-    4bc2:      	ldr	r0, [sp, #1020]
-    4bc4:      	add	r1, sp, #1020
-    4bc6:      	ldrb	r2, [r1, #1]
-    4bc8:      	add	r1, sp, #324
-    4bca:      	strb	r2, [r1, #1]
-    4bcc:      	strb	r0, [r1]
-    4bce:      	b	0x4bd0 <$t.60+0x108>    @ imm = #-2
-    4bd0:      	add	r0, sp, #324
-    4bd2:      	ldrb	r0, [r0]
-    4bd4:      	lsls	r0, r0, #31
-    4bd6:      	cmp	r0, #0
-    4bd8:      	beq	0x4be0 <$t.60+0x118>    @ imm = #4
-    4bda:      	b	0x4bdc <$t.60+0x114>    @ imm = #-2
-    4bdc:      	b	0x4bf8 <$t.60+0x130>    @ imm = #24
-    4bde:      	trap
-    4be0:      	add	r0, sp, #324
-    4be2:      	ldrb	r0, [r0, #1]
-    4be4:      	add	r1, sp, #436
-    4be6:      	strb	r0, [r1]
-    4be8:      	add	r1, sp, #320
-    4bea:      	strb	r0, [r1]
-    4bec:      	ldr	r0, [sp, #320]
-    4bee:      	bl	0x53be <_ZN4core6result19Result$LT$T$C$E$GT$2ok17hb50ba58294d7e124E> @ imm = #1996
-    4bf2:      	str	r0, [sp, #88]
-    4bf4:      	str	r1, [sp, #92]
-    4bf6:      	b	0x4c00 <$t.60+0x138>    @ imm = #6
-    4bf8:      	movs	r0, #1
-    4bfa:      	cmp	r0, #0
-    4bfc:      	beq	0x4bde <$t.60+0x116>    @ imm = #-34
-    4bfe:      	b	0x4ad6 <$t.60+0xe>      @ imm = #-300
-    4c00:      	ldr	r1, [sp, #92]
-    4c02:      	ldr	r0, [sp, #88]
-    4c04:      	movs	r2, #1
-    4c06:      	ands	r0, r2
-    4c08:      	ldr	r2, [pc, #652] <$d.61>
-    4c0a:      	bl	0x5254 <core::option::Option<T>::unwrap::h241596959fff7cbb> @ imm = #1606
-    4c0e:      	b	0x49ac <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435+0x27c> @ imm = #-614
-    4c10:      	ldr	r0, [sp, #112]
-    4c12:      	movs	r1, #0
-    4c14:      	str	r1, [sp, #328]
-    4c16:      	str	r0, [sp, #332]
-    4c18:      	ldr	r0, [sp, #328]
-    4c1a:      	ldr	r1, [sp, #332]
-    4c1c:      	bl	0x651a <<I as core::iter::traits::collect::IntoIterator>::into_iter::h1327cd27b8358e54> @ imm = #6394
-    4c20:      	str	r0, [sp, #80]
-    4c22:      	str	r1, [sp, #84]
-    4c24:      	b	0x4c26 <$t.60+0x15e>    @ imm = #-2
-    4c26:      	ldr	r0, [sp, #84]
-    4c28:      	ldr	r1, [sp, #80]
-    4c2a:      	str	r1, [sp, #336]
-    4c2c:      	str	r0, [sp, #340]
-    4c2e:      	b	0x4c30 <$t.60+0x168>    @ imm = #-2
-    4c30:      	add	r0, sp, #336
-    4c32:      	bl	0x6500 <core::iter::range::<impl core::iter::traits::iterator::Iterator for core::ops::range::Range<A>>::next::h07a91e96d06ca3d1> @ imm = #6346
-    4c36:      	str	r1, [sp, #348]
-    4c38:      	str	r0, [sp, #344]
-    4c3a:      	b	0x4c3c <$t.60+0x174>    @ imm = #-2
-    4c3c:      	ldr	r0, [sp, #344]
-    4c3e:      	cmp	r0, #0
-    4c40:      	beq	0x4c48 <$t.60+0x180>    @ imm = #4
-    4c42:      	b	0x4c44 <$t.60+0x17c>    @ imm = #-2
-    4c44:      	b	0x4c50 <$t.60+0x188>    @ imm = #8
-    4c46:      	trap
-    4c48:      	subs	r4, r7, #7
-    4c4a:      	subs	r4, #1
-    4c4c:      	mov	sp, r4
-    4c4e:      	pop	{r4, r6, r7, pc}
-    4c50:      	ldr	r0, [sp, #348]
-    4c52:      	str	r0, [sp, #440]
-    4c54:      	str	r0, [sp, #444]
-    4c56:      	b	0x4c58 <$t.60+0x190>    @ imm = #-2
-    4c58:      	ldr	r1, [sp, #176]
-    4c5a:      	ldr	r0, [sp, #188]
-    4c5c:      	str	r0, [r1, #68]
-    4c5e:      	str	r0, [r1, #72]
-    4c60:      	ldr	r0, [pc, #576] <$d.61+0xc>
-    4c62:      	str	r0, [r1, #112]
-    4c64:      	str	r0, [r1, #116]
-    4c66:      	str	r0, [r1, #120]
-    4c68:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #13316
-    4c6c:      	ldr	r1, [sp, #172]
-    4c6e:      	mov	r2, r0
-    4c70:      	ldr	r0, [sp, #176]
-    4c72:      	str	r2, [r0, #108]
-    4c74:      	ldr	r2, [r0, #108]
-    4c76:      	str	r2, [r1]
-    4c78:      	str	r2, [r0, #124]
-    4c7a:      	ldr	r2, [r0, #124]
-    4c7c:      	str	r2, [r0, #60]
-    4c7e:      	add	r2, sp, #1020
-    4c80:      	adds	r2, #128
-    4c82:      	str	r2, [r1, #4]
-    4c84:      	str	r2, [r1, #8]
-    4c86:      	ldr	r0, [r0, #60]
-    4c88:      	lsls	r0, r0, #29
-    4c8a:      	lsrs	r0, r0, #31
-    4c8c:      	add	r2, sp, #1020
-    4c8e:      	adds	r2, #212
-    4c90:      	strb	r0, [r2]
-    4c92:      	add	r2, sp, #1020
-    4c94:      	adds	r2, #220
-    4c96:      	strb	r0, [r2]
-    4c98:      	add	r2, sp, #1020
-    4c9a:      	adds	r2, #216
-    4c9c:      	strb	r0, [r2]
-    4c9e:      	ldr	r0, [r1, #20]
-    4ca0:      	add	r2, sp, #1020
-    4ca2:      	adds	r2, #208
-    4ca4:      	strb	r0, [r2]
-    4ca6:      	ldr	r2, [r1, #12]
-    4ca8:      	add	r0, sp, #1020
-    4caa:      	adds	r0, #124
-    4cac:      	strb	r2, [r0]
-    4cae:      	str	r0, [r1, #40]
-    4cb0:      	str	r0, [r1, #32]
-    4cb2:      	str	r0, [r1, #36]
-    4cb4:      	ldrb	r0, [r0]
-    4cb6:      	lsls	r0, r0, #31
-    4cb8:      	cmp	r0, #0
-    4cba:      	beq	0x4cf8 <$t.60+0x230>    @ imm = #58
-    4cbc:      	b	0x4cbe <$t.60+0x1f6>    @ imm = #-2
-    4cbe:      	ldr	r1, [sp, #176]
-    4cc0:      	ldr	r0, [sp, #188]
-    4cc2:      	ldr	r2, [sp, #172]
-    4cc4:      	str	r0, [r2, #28]
-    4cc6:      	ldr	r0, [pc, #496] <$d.61+0x22>
-    4cc8:      	str	r0, [r1, #88]
-    4cca:      	str	r0, [r1, #92]
-    4ccc:      	str	r0, [r1, #96]
-    4cce:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #13214
-    4cd2:      	mov	r1, r0
-    4cd4:      	ldr	r0, [sp, #176]
-    4cd6:      	str	r1, [r0, #84]
-    4cd8:      	ldr	r1, [r0, #84]
-    4cda:      	str	r1, [r0, #104]
-    4cdc:      	str	r1, [r0, #100]
-    4cde:      	ldr	r1, [r0, #100]
-    4ce0:      	str	r1, [r0, #64]
-    4ce2:      	add	r1, sp, #1020
-    4ce4:      	adds	r1, #132
-    4ce6:      	str	r1, [r0, #80]
-    4ce8:      	str	r1, [r0, #76]
-    4cea:      	ldr	r0, [r0, #64]
-    4cec:      	add	r1, sp, #1020
-    4cee:      	adds	r1, #120
-    4cf0:      	strb	r0, [r1, #1]
-    4cf2:      	movs	r0, #0
-    4cf4:      	strb	r0, [r1]
-    4cf6:      	b	0x4d02 <$t.60+0x23a>    @ imm = #8
-    4cf8:      	add	r1, sp, #1020
-    4cfa:      	adds	r1, #120
-    4cfc:      	movs	r0, #1
-    4cfe:      	strb	r0, [r1]
-    4d00:      	b	0x4d02 <$t.60+0x23a>    @ imm = #-2
-    4d02:      	ldr	r0, [sp, #176]
-    4d04:      	ldr	r0, [r0, #52]
-    4d06:      	add	r1, sp, #1020
-    4d08:      	adds	r1, #120
-    4d0a:      	ldrb	r2, [r1, #1]
-    4d0c:      	add	r1, sp, #356
-    4d0e:      	strb	r2, [r1, #1]
-    4d10:      	strb	r0, [r1]
-    4d12:      	b	0x4d14 <$t.60+0x24c>    @ imm = #-2
-    4d14:      	add	r0, sp, #356
-    4d16:      	ldrb	r0, [r0]
-    4d18:      	lsls	r0, r0, #31
-    4d1a:      	cmp	r0, #0
-    4d1c:      	beq	0x4d24 <$t.60+0x25c>    @ imm = #4
-    4d1e:      	b	0x4d20 <$t.60+0x258>    @ imm = #-2
-    4d20:      	b	0x4d3c <$t.60+0x274>    @ imm = #24
-    4d22:      	trap
-    4d24:      	add	r0, sp, #356
-    4d26:      	ldrb	r0, [r0, #1]
-    4d28:      	add	r1, sp, #448
-    4d2a:      	strb	r0, [r1]
-    4d2c:      	add	r1, sp, #352
-    4d2e:      	strb	r0, [r1]
-    4d30:      	ldr	r0, [sp, #352]
-    4d32:      	bl	0x53be <_ZN4core6result19Result$LT$T$C$E$GT$2ok17hb50ba58294d7e124E> @ imm = #1672
-    4d36:      	str	r0, [sp, #72]
-    4d38:      	str	r1, [sp, #76]
-    4d3a:      	b	0x4d44 <$t.60+0x27c>    @ imm = #6
-    4d3c:      	movs	r0, #1
-    4d3e:      	cmp	r0, #0
-    4d40:      	bne	0x4c58 <$t.60+0x190>    @ imm = #-236
-    4d42:      	b	0x4d22 <$t.60+0x25a>    @ imm = #-36
-    4d44:      	ldr	r1, [sp, #76]
-    4d46:      	ldr	r0, [sp, #72]
-    4d48:      	movs	r2, #1
-    4d4a:      	ands	r0, r2
-    4d4c:      	ldr	r2, [pc, #972] <$d.63>
-    4d4e:      	bl	0x5254 <core::option::Option<T>::unwrap::h241596959fff7cbb> @ imm = #1282
-    4d52:      	b	0x4c30 <$t.60+0x168>    @ imm = #-294
-    4d54:      	ldr	r0, [sp, #204]
-    4d56:      	ldr	r1, [sp, #208]
-    4d58:      	bl	0x82b4 <<I as core::iter::traits::collect::IntoIterator>::into_iter::hd3a73902742f3156> @ imm = #13656
-    4d5c:      	str	r0, [sp, #64]
-    4d5e:      	str	r1, [sp, #68]
-    4d60:      	b	0x4d62 <$t.60+0x29a>    @ imm = #-2
-    4d62:      	ldr	r0, [sp, #68]
-    4d64:      	ldr	r1, [sp, #64]
-    4d66:      	str	r1, [sp, #252]
-    4d68:      	str	r0, [sp, #256]
-    4d6a:      	b	0x4d6c <$t.60+0x2a4>    @ imm = #-2
-    4d6c:      	add	r0, sp, #252
-    4d6e:      	bl	0x82be <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f> @ imm = #13644
-    4d72:      	str	r0, [sp, #260]
-    4d74:      	b	0x4d76 <$t.60+0x2ae>    @ imm = #-2
-    4d76:      	ldr	r0, [sp, #260]
-    4d78:      	subs	r2, r0, #1
-    4d7a:      	mov	r1, r0
-    4d7c:      	sbcs	r1, r2
-    4d7e:      	cmp	r0, #0
-    4d80:      	beq	0x4d88 <$t.60+0x2c0>    @ imm = #4
-    4d82:      	b	0x4d84 <$t.60+0x2bc>    @ imm = #-2
-    4d84:      	b	0x4d96 <$t.60+0x2ce>    @ imm = #14
-    4d86:      	trap
-    4d88:      	ldr	r0, [sp, #244]
-    4d8a:      	ldr	r1, [sp, #248]
-    4d8c:      	bl	0x5722 <<I as core::iter::traits::collect::IntoIterator>::into_iter::hfe36a1b6ab5580ac> @ imm = #2450
-    4d90:      	str	r0, [sp, #56]
-    4d92:      	str	r1, [sp, #60]
-    4d94:      	b	0x500a <$t.62+0x12a>    @ imm = #626
-    4d96:      	ldr	r0, [sp, #260]
-    4d98:      	str	r0, [sp, #52]
-    4d9a:      	str	r0, [sp, #460]
-    4d9c:      	str	r0, [sp, #464]
-    4d9e:      	str	r0, [sp, #468]
-    4da0:      	b	0x4da2 <$t.60+0x2da>    @ imm = #-2
-    4da2:      	ldr	r1, [sp, #172]
-    4da4:      	ldr	r0, [sp, #188]
-    4da6:      	ldr	r2, [sp, #52]
-    4da8:      	ldrb	r2, [r2]
-    4daa:      	add	r3, sp, #1020
-    4dac:      	adds	r3, #240
-    4dae:      	strb	r2, [r3]
-    4db0:      	str	r0, [r1, #64]
-    4db2:      	str	r0, [r1, #68]
-    4db4:      	ldr	r0, [pc, #872] <$d.63+0x4>
-    4db6:      	str	r0, [r1, #116]
-    4db8:      	str	r0, [r1, #120]
-    4dba:      	str	r0, [r1, #124]
-    4dbc:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #12976
-    4dc0:      	ldr	r1, [sp, #168]
-    4dc2:      	mov	r2, r0
-    4dc4:      	ldr	r0, [sp, #172]
-    4dc6:      	str	r2, [r0, #112]
-    4dc8:      	ldr	r2, [r0, #112]
-    4dca:      	str	r2, [r1, #4]
-    4dcc:      	str	r2, [r1]
-    4dce:      	ldr	r2, [r1]
-    4dd0:      	str	r2, [r0, #56]
-    4dd2:      	add	r2, sp, #1020
-    4dd4:      	adds	r2, #252
-    4dd6:      	str	r2, [r1, #8]
-    4dd8:      	str	r2, [r1, #12]
-    4dda:      	ldr	r0, [r0, #56]
-    4ddc:      	lsls	r0, r0, #30
-    4dde:      	lsrs	r0, r0, #31
-    4de0:      	ldr	r2, [pc, #836] <$d.63+0xc>
-    4de2:      	add	r2, sp, r2
-    4de4:      	strb	r0, [r2]
-    4de6:      	ldr	r2, [pc, #836] <$d.63+0x12>
-    4de8:      	add	r2, sp, r2
-    4dea:      	strb	r0, [r2]
-    4dec:      	ldr	r2, [pc, #832] <$d.63+0x14>
-    4dee:      	add	r2, sp, r2
-    4df0:      	strb	r0, [r2]
-    4df2:      	ldr	r0, [r1, #24]
-    4df4:      	ldr	r2, [pc, #828] <$d.63+0x18>
-    4df6:      	add	r2, sp, r2
-    4df8:      	strb	r0, [r2]
-    4dfa:      	ldr	r2, [r1, #16]
-    4dfc:      	add	r0, sp, #1020
-    4dfe:      	adds	r0, #248
-    4e00:      	strb	r2, [r0]
-    4e02:      	str	r0, [r1, #32]
-    4e04:      	str	r0, [r1, #40]
-    4e06:      	str	r0, [r1, #44]
-    4e08:      	ldrb	r0, [r0]
-    4e0a:      	lsls	r0, r0, #31
-    4e0c:      	cmp	r0, #0
-    4e0e:      	beq	0x4e62 <$t.60+0x39a>    @ imm = #80
-    4e10:      	b	0x4e12 <$t.60+0x34a>    @ imm = #-2
-    4e12:      	ldr	r1, [sp, #172]
-    4e14:      	ldr	r0, [sp, #188]
-    4e16:      	ldr	r2, [sp, #168]
-    4e18:      	str	r0, [r2, #36]
-    4e1a:      	add	r0, sp, #1020
-    4e1c:      	adds	r0, #240
-    4e1e:      	str	r0, [r1, #60]
-    4e20:      	ldr	r0, [r1, #60]
-    4e22:      	ldr	r2, [pc, #768] <$d.63+0xa>
-    4e24:      	str	r2, [sp, #44]
-    4e26:      	str	r2, [r1, #84]
-    4e28:      	str	r0, [r1, #88]
-    4e2a:      	movs	r2, #0
-    4e2c:      	str	r2, [sp, #48]
-    4e2e:      	str	r2, [r1, #80]
-    4e30:      	ldr	r2, [r1, #80]
-    4e32:      	str	r2, [r1, #108]
-    4e34:      	str	r2, [r1, #104]
-    4e36:      	ldr	r2, [r1, #104]
-    4e38:      	str	r2, [r1, #76]
-    4e3a:      	ldr	r2, [pc, #796] <$d.63+0x3e>
-    4e3c:      	add	r2, sp, r2
-    4e3e:      	str	r2, [r1, #72]
-    4e40:      	ldr	r1, [r1, #72]
-    4e42:      	bl	0x470e <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::spi::FullDuplex<u8>>::send::{{closure}}::hc4dcbfdec692fb09> @ imm = #-1848
-    4e46:      	ldr	r2, [sp, #172]
-    4e48:      	mov	r1, r0
-    4e4a:      	ldr	r0, [sp, #44]
-    4e4c:      	ldr	r1, [r1]
-    4e4e:      	str	r0, [r2, #92]
-    4e50:      	str	r1, [r2, #96]
-    4e52:      	str	r0, [r2, #100]
-    4e54:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #12844
-    4e58:      	ldr	r0, [sp, #48]
-    4e5a:      	add	r1, sp, #1020
-    4e5c:      	adds	r1, #244
-    4e5e:      	strb	r0, [r1]
-    4e60:      	b	0x4e6c <$t.60+0x3a4>    @ imm = #8
-    4e62:      	add	r1, sp, #1020
-    4e64:      	adds	r1, #244
-    4e66:      	movs	r0, #1
-    4e68:      	strb	r0, [r1]
-    4e6a:      	b	0x4e6c <$t.60+0x3a4>    @ imm = #-2
-    4e6c:      	ldr	r0, [sp, #172]
-    4e6e:      	ldr	r0, [r0, #48]
-    4e70:      	add	r1, sp, #268
-    4e72:      	strb	r0, [r1]
-    4e74:      	b	0x4e76 <$t.60+0x3ae>    @ imm = #-2
-    4e76:      	add	r0, sp, #268
-    4e78:      	ldrb	r0, [r0]
-    4e7a:      	lsls	r0, r0, #31
-    4e7c:      	cmp	r0, #0
-    4e7e:      	beq	0x4e86 <$t.60+0x3be>    @ imm = #4
-    4e80:      	b	0x4e82 <$t.60+0x3ba>    @ imm = #-2
-    4e82:      	b	0x4e8e <$t.60+0x3c6>    @ imm = #8
-    4e84:      	trap
-    4e86:      	bl	0x538e <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h096e9468cf20e054E> @ imm = #1284
-    4e8a:      	str	r0, [sp, #40]
-    4e8c:      	b	0x4ee0 <$t.62>          @ imm = #80
-    4e8e:      	movs	r0, #1
-    4e90:      	cmp	r0, #0
-    4e92:      	bne	0x4da2 <$t.60+0x2da>    @ imm = #-244
-    4e94:      	b	0x4e84 <$t.60+0x3bc>    @ imm = #-20
-    4e96:      	mov	r8, r8
-
-00004e98 <$d.61>:
-    4e98:	68 b0 00 00	.word	0x0000b068
-    4e9c:	0c 04 00 00	.word	0x0000040c
-    4ea0:	10 04 00 00	.word	0x00000410
-    4ea4:	0c 10 05 40	.word	0x4005100c
-    4ea8:	38 04 00 00	.word	0x00000438
-    4eac:	3c 04 00 00	.word	0x0000043c
-    4eb0:	34 04 00 00	.word	0x00000434
-    4eb4:	04 04 00 00	.word	0x00000404
-    4eb8:	08 10 05 40	.word	0x40051008
-    4ebc:	20 04 00 00	.word	0x00000420
-    4ec0:	24 04 00 00	.word	0x00000424
-    4ec4:	28 04 00 00	.word	0x00000428
-    4ec8:	1c 04 00 00	.word	0x0000041c
-    4ecc:	30 04 00 00	.word	0x00000430
-    4ed0:	2c 04 00 00	.word	0x0000042c
-    4ed4:	08 04 00 00	.word	0x00000408
-    4ed8:	18 04 00 00	.word	0x00000418
-    4edc:	14 04 00 00	.word	0x00000414
-
-00004ee0 <$t.62>:
-    4ee0:      	ldr	r0, [sp, #40]
-    4ee2:      	movs	r1, #1
-    4ee4:      	ands	r0, r1
-    4ee6:      	ldr	r1, [pc, #564] <$d.63+0x2>
-    4ee8:      	bl	0x52c4 <core::option::Option<T>::unwrap::h8f27e7a85667e8bc> @ imm = #984
-    4eec:      	b	0x4eee <$t.62+0xe>      @ imm = #-2
-    4eee:      	ldr	r1, [sp, #168]
-    4ef0:      	ldr	r0, [sp, #188]
-    4ef2:      	str	r0, [r1, #64]
-    4ef4:      	str	r0, [r1, #68]
-    4ef6:      	ldr	r0, [pc, #552] <$d.63+0x6>
-    4ef8:      	str	r0, [r1, #108]
-    4efa:      	str	r0, [r1, #112]
-    4efc:      	str	r0, [r1, #116]
-    4efe:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #12654
-    4f02:      	ldr	r1, [sp, #164]
-    4f04:      	mov	r2, r0
-    4f06:      	ldr	r0, [sp, #168]
-    4f08:      	str	r2, [r0, #104]
-    4f0a:      	ldr	r2, [r0, #104]
-    4f0c:      	str	r2, [r0, #124]
-    4f0e:      	str	r2, [r0, #120]
-    4f10:      	ldr	r2, [r0, #120]
-    4f12:      	str	r2, [r0, #56]
-    4f14:      	ldr	r2, [pc, #544] <$d.63+0x1c>
-    4f16:      	add	r2, sp, r2
-    4f18:      	str	r2, [r1]
-    4f1a:      	str	r2, [r1, #4]
-    4f1c:      	ldr	r0, [r0, #56]
-    4f1e:      	lsls	r0, r0, #29
-    4f20:      	lsrs	r0, r0, #31
-    4f22:      	ldr	r2, [pc, #536] <$d.63+0x22>
-    4f24:      	add	r2, sp, r2
-    4f26:      	strb	r0, [r2]
-    4f28:      	ldr	r2, [pc, #532] <$d.63+0x24>
-    4f2a:      	add	r2, sp, r2
-    4f2c:      	strb	r0, [r2]
-    4f2e:      	ldr	r2, [pc, #532] <$d.63+0x2a>
-    4f30:      	add	r2, sp, r2
-    4f32:      	strb	r0, [r2]
-    4f34:      	ldr	r0, [r1, #16]
-    4f36:      	ldr	r2, [pc, #528] <$d.63+0x2e>
-    4f38:      	add	r2, sp, r2
-    4f3a:      	strb	r0, [r2]
-    4f3c:      	ldr	r2, [r1, #8]
-    4f3e:      	ldr	r0, [pc, #524] <$d.63+0x32>
-    4f40:      	add	r0, sp, r0
-    4f42:      	strb	r2, [r0]
-    4f44:      	str	r0, [r1, #36]
-    4f46:      	str	r0, [r1, #28]
-    4f48:      	str	r0, [r1, #32]
-    4f4a:      	ldrb	r0, [r0]
-    4f4c:      	lsls	r0, r0, #31
-    4f4e:      	cmp	r0, #0
-    4f50:      	beq	0x4f8e <$t.62+0xae>     @ imm = #58
-    4f52:      	b	0x4f54 <$t.62+0x74>     @ imm = #-2
-    4f54:      	ldr	r1, [sp, #168]
-    4f56:      	ldr	r0, [sp, #188]
-    4f58:      	ldr	r2, [sp, #164]
-    4f5a:      	str	r0, [r2, #24]
-    4f5c:      	ldr	r0, [pc, #452] <$d.63+0x8>
-    4f5e:      	str	r0, [r1, #84]
-    4f60:      	str	r0, [r1, #88]
-    4f62:      	str	r0, [r1, #92]
-    4f64:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #12552
-    4f68:      	mov	r1, r0
-    4f6a:      	ldr	r0, [sp, #168]
-    4f6c:      	str	r1, [r0, #80]
-    4f6e:      	ldr	r1, [r0, #80]
-    4f70:      	str	r1, [r0, #100]
-    4f72:      	str	r1, [r0, #96]
-    4f74:      	ldr	r1, [r0, #96]
-    4f76:      	str	r1, [r0, #60]
-    4f78:      	ldr	r1, [pc, #472] <$d.63+0x38>
-    4f7a:      	add	r1, sp, r1
-    4f7c:      	str	r1, [r0, #76]
-    4f7e:      	str	r1, [r0, #72]
-    4f80:      	ldr	r0, [r0, #60]
-    4f82:      	ldr	r1, [pc, #460] <$d.63+0x36>
-    4f84:      	add	r1, sp, r1
-    4f86:      	strb	r0, [r1, #1]
-    4f88:      	movs	r0, #0
-    4f8a:      	strb	r0, [r1]
-    4f8c:      	b	0x4f98 <$t.62+0xb8>     @ imm = #8
-    4f8e:      	ldr	r1, [pc, #448] <$d.63+0x36>
-    4f90:      	add	r1, sp, r1
-    4f92:      	movs	r0, #1
-    4f94:      	strb	r0, [r1]
-    4f96:      	b	0x4f98 <$t.62+0xb8>     @ imm = #-2
-    4f98:      	ldr	r0, [sp, #168]
-    4f9a:      	ldr	r0, [r0, #48]
-    4f9c:      	ldr	r1, [pc, #432] <$d.63+0x34>
-    4f9e:      	add	r1, sp, r1
-    4fa0:      	ldrb	r2, [r1, #1]
-    4fa2:      	add	r1, sp, #276
-    4fa4:      	strb	r2, [r1, #1]
-    4fa6:      	strb	r0, [r1]
-    4fa8:      	b	0x4faa <$t.62+0xca>     @ imm = #-2
-    4faa:      	add	r0, sp, #276
-    4fac:      	ldrb	r0, [r0]
-    4fae:      	lsls	r0, r0, #31
-    4fb0:      	cmp	r0, #0
-    4fb2:      	beq	0x4fba <$t.62+0xda>     @ imm = #4
-    4fb4:      	b	0x4fb6 <$t.62+0xd6>     @ imm = #-2
-    4fb6:      	b	0x4fd2 <$t.62+0xf2>     @ imm = #24
-    4fb8:      	trap
-    4fba:      	add	r0, sp, #276
-    4fbc:      	ldrb	r0, [r0, #1]
-    4fbe:      	add	r1, sp, #472
-    4fc0:      	strb	r0, [r1]
-    4fc2:      	add	r1, sp, #272
-    4fc4:      	strb	r0, [r1]
-    4fc6:      	ldr	r0, [sp, #272]
-    4fc8:      	bl	0x53be <_ZN4core6result19Result$LT$T$C$E$GT$2ok17hb50ba58294d7e124E> @ imm = #1010
-    4fcc:      	str	r0, [sp, #32]
-    4fce:      	str	r1, [sp, #36]
-    4fd0:      	b	0x4fda <$t.62+0xfa>     @ imm = #6
-    4fd2:      	movs	r0, #1
-    4fd4:      	cmp	r0, #0
-    4fd6:      	bne	0x4eee <$t.62+0xe>      @ imm = #-236
-    4fd8:      	b	0x4fb8 <$t.62+0xd8>     @ imm = #-36
-    4fda:      	ldr	r1, [sp, #36]
-    4fdc:      	ldr	r0, [sp, #32]
-    4fde:      	movs	r2, #1
-    4fe0:      	ands	r0, r2
-    4fe2:      	ldr	r2, [pc, #312] <$d.63+0x2>
-    4fe4:      	bl	0x5254 <core::option::Option<T>::unwrap::h241596959fff7cbb> @ imm = #620
-    4fe8:      	str	r0, [sp, #28]
-    4fea:      	b	0x4fec <$t.62+0x10c>    @ imm = #-2
-    4fec:      	add	r0, sp, #244
-    4fee:      	bl	0x572c <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hb1dbd48c35961a04> @ imm = #1850
-    4ff2:      	str	r0, [sp, #24]
-    4ff4:      	b	0x4ff6 <$t.62+0x116>    @ imm = #-2
-    4ff6:      	ldr	r0, [sp, #24]
-    4ff8:      	ldr	r1, [pc, #288] <$d.63>
-    4ffa:      	bl	0x5290 <core::option::Option<T>::unwrap::h278aba4208bf7c2d> @ imm = #658
-    4ffe:      	str	r0, [sp, #20]
-    5000:      	b	0x5002 <$t.62+0x122>    @ imm = #-2
-    5002:      	ldr	r0, [sp, #28]
-    5004:      	ldr	r1, [sp, #20]
-    5006:      	strb	r0, [r1]
-    5008:      	b	0x4d6c <$t.60+0x2a4>    @ imm = #-672
-    500a:      	ldr	r0, [sp, #60]
-    500c:      	ldr	r1, [sp, #56]
-    500e:      	str	r1, [sp, #280]
-    5010:      	str	r0, [sp, #284]
-    5012:      	b	0x5014 <$t.62+0x134>    @ imm = #-2
-    5014:      	add	r0, sp, #280
-    5016:      	bl	0x572c <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hb1dbd48c35961a04> @ imm = #1810
-    501a:      	str	r0, [sp, #288]
-    501c:      	b	0x501e <$t.62+0x13e>    @ imm = #-2
-    501e:      	ldr	r0, [sp, #288]
-    5020:      	subs	r2, r0, #1
-    5022:      	mov	r1, r0
-    5024:      	sbcs	r1, r2
-    5026:      	cmp	r0, #0
-    5028:      	bne	0x502c <$t.62+0x14c>    @ imm = #0
-    502a:      	b	0x4c48 <$t.60+0x180>    @ imm = #-998
-    502c:      	b	0x5030 <$t.62+0x150>    @ imm = #0
-    502e:      	trap
-    5030:      	ldr	r0, [sp, #288]
-    5032:      	str	r0, [sp, #16]
-    5034:      	str	r0, [sp, #476]
-    5036:      	str	r0, [sp, #480]
-    5038:      	str	r0, [sp, #484]
-    503a:      	b	0x503c <$t.62+0x15c>    @ imm = #-2
-    503c:      	ldr	r0, [sp, #188]
-    503e:      	str	r0, [sp, #512]
-    5040:      	str	r0, [sp, #516]
-    5042:      	ldr	r0, [pc, #220] <$d.63+0x6>
-    5044:      	str	r0, [sp, #556]
-    5046:      	str	r0, [sp, #560]
-    5048:      	str	r0, [sp, #564]
-    504a:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #12322
-    504e:      	str	r0, [sp, #552]
-    5050:      	ldr	r0, [sp, #552]
-    5052:      	str	r0, [sp, #572]
-    5054:      	str	r0, [sp, #568]
-    5056:      	ldr	r0, [sp, #568]
-    5058:      	str	r0, [sp, #504]
-    505a:      	add	r0, sp, #504
-    505c:      	str	r0, [sp, #576]
-    505e:      	str	r0, [sp, #580]
-    5060:      	ldr	r0, [sp, #504]
-    5062:      	lsls	r0, r0, #29
-    5064:      	lsrs	r0, r0, #31
-    5066:      	add	r1, sp, #588
-    5068:      	strb	r0, [r1]
-    506a:      	add	r1, sp, #596
-    506c:      	strb	r0, [r1]
-    506e:      	add	r1, sp, #592
-    5070:      	strb	r0, [r1]
-    5072:      	ldr	r0, [sp, #592]
-    5074:      	add	r1, sp, #584
-    5076:      	strb	r0, [r1]
-    5078:      	ldr	r1, [sp, #584]
-    507a:      	add	r0, sp, #500
-    507c:      	strb	r1, [r0]
-    507e:      	str	r0, [sp, #612]
-    5080:      	str	r0, [sp, #604]
-    5082:      	str	r0, [sp, #608]
-    5084:      	ldrb	r0, [r0]
-    5086:      	lsls	r0, r0, #31
-    5088:      	cmp	r0, #0
-    508a:      	beq	0x50bc <$t.62+0x1dc>    @ imm = #46
-    508c:      	b	0x508e <$t.62+0x1ae>    @ imm = #-2
-    508e:      	ldr	r0, [sp, #188]
-    5090:      	str	r0, [sp, #600]
-    5092:      	ldr	r0, [pc, #144] <$d.63+0xa>
-    5094:      	str	r0, [sp, #532]
-    5096:      	str	r0, [sp, #536]
-    5098:      	str	r0, [sp, #540]
-    509a:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #12242
-    509e:      	str	r0, [sp, #528]
-    50a0:      	ldr	r0, [sp, #528]
-    50a2:      	str	r0, [sp, #548]
-    50a4:      	str	r0, [sp, #544]
-    50a6:      	ldr	r0, [sp, #544]
-    50a8:      	str	r0, [sp, #508]
-    50aa:      	add	r0, sp, #508
-    50ac:      	str	r0, [sp, #524]
-    50ae:      	str	r0, [sp, #520]
-    50b0:      	ldr	r0, [sp, #508]
-    50b2:      	add	r1, sp, #496
-    50b4:      	strb	r0, [r1, #1]
-    50b6:      	movs	r0, #0
-    50b8:      	strb	r0, [r1]
-    50ba:      	b	0x50c4 <$t.62+0x1e4>    @ imm = #6
-    50bc:      	add	r1, sp, #496
-    50be:      	movs	r0, #1
-    50c0:      	strb	r0, [r1]
-    50c2:      	b	0x50c4 <$t.62+0x1e4>    @ imm = #-2
-    50c4:      	ldr	r0, [sp, #496]
-    50c6:      	add	r1, sp, #496
-    50c8:      	ldrb	r2, [r1, #1]
-    50ca:      	add	r1, sp, #296
-    50cc:      	strb	r2, [r1, #1]
-    50ce:      	strb	r0, [r1]
-    50d0:      	b	0x50d2 <$t.62+0x1f2>    @ imm = #-2
-    50d2:      	add	r0, sp, #296
-    50d4:      	ldrb	r0, [r0]
-    50d6:      	lsls	r0, r0, #31
-    50d8:      	cmp	r0, #0
-    50da:      	beq	0x50e2 <$t.62+0x202>    @ imm = #4
-    50dc:      	b	0x50de <$t.62+0x1fe>    @ imm = #-2
-    50de:      	b	0x50fa <$t.62+0x21a>    @ imm = #24
-    50e0:      	trap
-    50e2:      	add	r0, sp, #296
-    50e4:      	ldrb	r0, [r0, #1]
-    50e6:      	add	r1, sp, #488
-    50e8:      	strb	r0, [r1]
-    50ea:      	add	r1, sp, #292
-    50ec:      	strb	r0, [r1]
-    50ee:      	ldr	r0, [sp, #292]
-    50f0:      	bl	0x53be <_ZN4core6result19Result$LT$T$C$E$GT$2ok17hb50ba58294d7e124E> @ imm = #714
-    50f4:      	str	r0, [sp, #8]
-    50f6:      	str	r1, [sp, #12]
-    50f8:      	b	0x5102 <$t.62+0x222>    @ imm = #6
-    50fa:      	movs	r0, #1
-    50fc:      	cmp	r0, #0
-    50fe:      	bne	0x503c <$t.62+0x15c>    @ imm = #-198
-    5100:      	b	0x50e0 <$t.62+0x200>    @ imm = #-36
-    5102:      	ldr	r1, [sp, #12]
-    5104:      	ldr	r0, [sp, #8]
-    5106:      	movs	r2, #1
-    5108:      	ands	r0, r2
-    510a:      	ldr	r2, [pc, #16] <$d.63+0x2>
-    510c:      	bl	0x5254 <core::option::Option<T>::unwrap::h241596959fff7cbb> @ imm = #324
-    5110:      	str	r0, [sp, #4]
-    5112:      	b	0x5114 <$t.62+0x234>    @ imm = #-2
-    5114:      	ldr	r0, [sp, #4]
-    5116:      	ldr	r1, [sp, #16]
-    5118:      	strb	r0, [r1]
-    511a:      	b	0x5014 <$t.62+0x134>    @ imm = #-266
-
-0000511c <$d.63>:
-    511c:	68 b0 00 00	.word	0x0000b068
-    5120:	0c 10 05 40	.word	0x4005100c
-    5124:	08 10 05 40	.word	0x40051008
-    5128:	54 05 00 00	.word	0x00000554
-    512c:	5c 05 00 00	.word	0x0000055c
-    5130:	58 05 00 00	.word	0x00000558
-    5134:	50 05 00 00	.word	0x00000550
-    5138:	78 05 00 00	.word	0x00000578
-    513c:	cc 05 00 00	.word	0x000005cc
-    5140:	d4 05 00 00	.word	0x000005d4
-    5144:	d0 05 00 00	.word	0x000005d0
-    5148:	c8 05 00 00	.word	0x000005c8
-    514c:	74 05 00 00	.word	0x00000574
-    5150:	70 05 00 00	.word	0x00000570
-    5154:	7c 05 00 00	.word	0x0000057c
-    5158:	0c 05 00 00	.word	0x0000050c
-
-0000515c <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::{{closure}}::h0ec594e628e55c5f>:
-    515c:      	sub	sp, #48
-    515e:      	str	r0, [sp, #8]
-    5160:      	str	r1, [sp, #12]
-    5162:      	str	r1, [sp, #20]
-    5164:      	str	r1, [sp, #16]
-    5166:      	ldr	r0, [sp, #16]
-    5168:      	str	r0, [sp]
-    516a:      	b	0x516c <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::{{closure}}::h0ec594e628e55c5f+0x10> @ imm = #-2
-    516c:      	ldr	r1, [sp]
-    516e:      	str	r1, [sp, #28]
-    5170:      	str	r1, [sp, #32]
-    5172:      	add	r0, sp, #36
-    5174:      	movs	r2, #1
-    5176:      	strb	r2, [r0]
-    5178:      	str	r1, [sp, #40]
-    517a:      	ldr	r0, [r1]
-    517c:      	str	r1, [sp, #44]
-    517e:      	lsls	r2, r2, #11
-    5180:      	orrs	r0, r2
-    5182:      	str	r0, [r1]
-    5184:      	b	0x5186 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::{{closure}}::h0ec594e628e55c5f+0x2a> @ imm = #-2
-    5186:      	ldr	r0, [sp]
-    5188:      	str	r0, [sp, #24]
-    518a:      	b	0x518c <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::{{closure}}::h0ec594e628e55c5f+0x30> @ imm = #-2
-    518c:      	ldr	r0, [sp]
-    518e:      	add	sp, #48
-    5190:      	bx	lr
-
-00005192 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::{{closure}}::h435966d3de0c489d>:
-    5192:      	sub	sp, #48
-    5194:      	str	r0, [sp, #8]
-    5196:      	str	r1, [sp, #12]
-    5198:      	str	r1, [sp, #20]
-    519a:      	str	r1, [sp, #16]
-    519c:      	ldr	r0, [sp, #16]
-    519e:      	str	r0, [sp]
-    51a0:      	b	0x51a2 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::{{closure}}::h435966d3de0c489d+0x10> @ imm = #-2
-    51a2:      	ldr	r1, [sp]
-    51a4:      	str	r1, [sp, #28]
-    51a6:      	str	r1, [sp, #32]
-    51a8:      	add	r2, sp, #36
-    51aa:      	movs	r0, #0
-    51ac:      	strb	r0, [r2]
-    51ae:      	str	r1, [sp, #40]
-    51b0:      	ldr	r0, [r1]
-    51b2:      	movs	r2, #1
-    51b4:      	lsls	r2, r2, #11
-    51b6:      	bics	r0, r2
-    51b8:      	str	r1, [sp, #44]
-    51ba:      	str	r0, [r1]
-    51bc:      	b	0x51be <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::{{closure}}::h435966d3de0c489d+0x2c> @ imm = #-2
-    51be:      	ldr	r0, [sp]
-    51c0:      	str	r0, [sp, #24]
-    51c2:      	b	0x51c4 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::{{closure}}::h435966d3de0c489d+0x32> @ imm = #-2
-    51c4:      	ldr	r0, [sp]
-    51c6:      	add	sp, #48
-    51c8:      	bx	lr
-
-000051ca <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::blocking::spi::Transfer<u8>>::transfer::h705ad216a8f85d03>:
-    51ca:      	push	{r4, r6, r7, lr}
-    51cc:      	add	r7, sp, #8
-    51ce:      	sub	sp, #80
-    51d0:      	str	r2, [sp, #20]
-    51d2:      	mov	r2, r1
-    51d4:      	ldr	r1, [sp, #20]
-    51d6:      	str	r2, [sp, #24]
-    51d8:      	mov	r2, r0
-    51da:      	ldr	r0, [sp, #24]
-    51dc:      	str	r2, [sp, #28]
-    51de:      	str	r2, [sp, #52]
-    51e0:      	str	r0, [sp, #56]
-    51e2:      	str	r1, [sp, #60]
-    51e4:      	bl	0x64b4 <core::slice::<impl [T]>::is_empty::hb2048d383ec4bcc7> @ imm = #4812
-    51e8:      	str	r0, [sp, #32]
-    51ea:      	b	0x51ec <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::blocking::spi::Transfer<u8>>::transfer::h705ad216a8f85d03+0x22> @ imm = #-2
-    51ec:      	ldr	r0, [sp, #32]
-    51ee:      	lsls	r0, r0, #31
-    51f0:      	cmp	r0, #0
-    51f2:      	bne	0x5202 <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::blocking::spi::Transfer<u8>>::transfer::h705ad216a8f85d03+0x38> @ imm = #12
-    51f4:      	b	0x51f6 <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::blocking::spi::Transfer<u8>>::transfer::h705ad216a8f85d03+0x2c> @ imm = #-2
-    51f6:      	ldr	r1, [sp, #20]
-    51f8:      	ldr	r0, [sp, #24]
-    51fa:      	bl	0x8198 <core::slice::<impl [T]>::as_ptr::had785fb836f3ca27> @ imm = #12186
-    51fe:      	str	r0, [sp, #16]
-    5200:      	b	0x5214 <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::blocking::spi::Transfer<u8>>::transfer::h705ad216a8f85d03+0x4a> @ imm = #16
-    5202:      	ldr	r0, [sp, #20]
-    5204:      	ldr	r1, [sp, #24]
-    5206:      	str	r1, [sp, #36]
-    5208:      	str	r0, [sp, #40]
-    520a:      	b	0x520c <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::blocking::spi::Transfer<u8>>::transfer::h705ad216a8f85d03+0x42> @ imm = #-2
-    520c:      	ldr	r0, [sp, #36]
-    520e:      	ldr	r1, [sp, #40]
-    5210:      	add	sp, #80
-    5212:      	pop	{r4, r6, r7, pc}
-    5214:      	ldr	r1, [sp, #20]
-    5216:      	ldr	r0, [sp, #16]
-    5218:      	bl	0x6352 <core::slice::raw::from_raw_parts::h60aaf9426fae6361> @ imm = #4406
-    521c:      	mov	r2, r0
-    521e:      	str	r2, [sp, #8]
-    5220:      	mov	r2, r1
-    5222:      	str	r2, [sp, #12]
-    5224:      	str	r0, [sp, #72]
-    5226:      	str	r1, [sp, #76]
-    5228:      	b	0x522a <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::blocking::spi::Transfer<u8>>::transfer::h705ad216a8f85d03+0x60> @ imm = #-2
-    522a:      	ldr	r2, [sp, #12]
-    522c:      	ldr	r1, [sp, #8]
-    522e:      	ldr	r0, [sp, #28]
-    5230:      	ldr	r3, [sp, #20]
-    5232:      	ldr	r4, [sp, #24]
-    5234:      	str	r4, [sp, #44]
-    5236:      	str	r3, [sp, #48]
-    5238:      	ldr	r3, [sp, #44]
-    523a:      	ldr	r4, [sp, #48]
-    523c:      	str	r4, [sp]
-    523e:      	bl	0x4730 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::h7bd8d42c71406435> @ imm = #-2834
-    5242:      	b	0x5244 <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::blocking::spi::Transfer<u8>>::transfer::h705ad216a8f85d03+0x7a> @ imm = #-2
-    5244:      	bl	0x541a <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h8f6d23612e3410d7E> @ imm = #466
-    5248:      	b	0x524a <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::blocking::spi::Transfer<u8>>::transfer::h705ad216a8f85d03+0x80> @ imm = #-2
-    524a:      	ldr	r0, [sp, #20]
-    524c:      	ldr	r1, [sp, #24]
-    524e:      	str	r1, [sp, #36]
-    5250:      	str	r0, [sp, #40]
-    5252:      	b	0x520c <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::blocking::spi::Transfer<u8>>::transfer::h705ad216a8f85d03+0x42> @ imm = #-74
-
-00005254 <core::option::Option<T>::unwrap::h241596959fff7cbb>:
-    5254:      	push	{r7, lr}
-    5256:      	add	r7, sp, #0
-    5258:      	sub	sp, #16
-    525a:      	str	r2, [sp, #4]
-    525c:      	mov	r2, r0
-    525e:      	add	r0, sp, #8
-    5260:      	strb	r2, [r0]
-    5262:      	strb	r1, [r0, #1]
-    5264:      	ldrb	r0, [r0]
-    5266:      	lsls	r0, r0, #31
-    5268:      	cmp	r0, #0
-    526a:      	beq	0x5272 <core::option::Option<T>::unwrap::h241596959fff7cbb+0x1e> @ imm = #4
-    526c:      	b	0x526e <core::option::Option<T>::unwrap::h241596959fff7cbb+0x1a> @ imm = #-2
-    526e:      	b	0x527e <core::option::Option<T>::unwrap::h241596959fff7cbb+0x2a> @ imm = #12
-    5270:      	trap
-    5272:      	ldr	r2, [sp, #4]
-    5274:      	ldr	r0, [pc, #20] <$d.5>
-    5276:      	movs	r1, #43
-    5278:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #13004
-    527c:      	trap
-    527e:      	add	r0, sp, #8
-    5280:      	ldrb	r0, [r0, #1]
-    5282:      	add	r1, sp, #12
-    5284:      	strb	r0, [r1]
-    5286:      	add	sp, #16
-    5288:      	pop	{r7, pc}
-    528a:      	mov	r8, r8
-
-0000528c <$d.5>:
-    528c:	78 b0 00 00	.word	0x0000b078
-
-00005290 <core::option::Option<T>::unwrap::h278aba4208bf7c2d>:
-    5290:      	push	{r7, lr}
-    5292:      	add	r7, sp, #0
-    5294:      	sub	sp, #16
-    5296:      	str	r1, [sp, #4]
-    5298:      	str	r0, [sp, #8]
-    529a:      	ldr	r0, [sp, #8]
-    529c:      	subs	r2, r0, #1
-    529e:      	mov	r1, r0
-    52a0:      	sbcs	r1, r2
-    52a2:      	cmp	r0, #0
-    52a4:      	beq	0x52ac <core::option::Option<T>::unwrap::h278aba4208bf7c2d+0x1c> @ imm = #4
-    52a6:      	b	0x52a8 <core::option::Option<T>::unwrap::h278aba4208bf7c2d+0x18> @ imm = #-2
-    52a8:      	b	0x52b8 <core::option::Option<T>::unwrap::h278aba4208bf7c2d+0x28> @ imm = #12
-    52aa:      	trap
-    52ac:      	ldr	r2, [sp, #4]
-    52ae:      	ldr	r0, [pc, #16] <$d.7+0x2>
-    52b0:      	movs	r1, #43
-    52b2:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #12946
-    52b6:      	trap
-    52b8:      	ldr	r0, [sp, #8]
-    52ba:      	str	r0, [sp, #12]
-    52bc:      	add	sp, #16
-    52be:      	pop	{r7, pc}
-
-000052c0 <$d.7>:
-    52c0:	78 b0 00 00	.word	0x0000b078
-
-000052c4 <core::option::Option<T>::unwrap::h8f27e7a85667e8bc>:
-    52c4:      	push	{r7, lr}
-    52c6:      	add	r7, sp, #0
-    52c8:      	sub	sp, #16
-    52ca:      	str	r1, [sp, #4]
-    52cc:      	mov	r1, r0
-    52ce:      	add	r0, sp, #8
-    52d0:      	strb	r1, [r0]
-    52d2:      	ldrb	r0, [r0]
-    52d4:      	lsls	r0, r0, #31
-    52d6:      	cmp	r0, #0
-    52d8:      	beq	0x52e0 <core::option::Option<T>::unwrap::h8f27e7a85667e8bc+0x1c> @ imm = #4
-    52da:      	b	0x52dc <core::option::Option<T>::unwrap::h8f27e7a85667e8bc+0x18> @ imm = #-2
-    52dc:      	b	0x52ec <core::option::Option<T>::unwrap::h8f27e7a85667e8bc+0x28> @ imm = #12
-    52de:      	trap
-    52e0:      	ldr	r2, [sp, #4]
-    52e2:      	ldr	r0, [pc, #12] <$d.11+0x2>
-    52e4:      	movs	r1, #43
-    52e6:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #12894
-    52ea:      	trap
-    52ec:      	add	sp, #16
-    52ee:      	pop	{r7, pc}
-
-000052f0 <$d.11>:
-    52f0:	78 b0 00 00	.word	0x0000b078
-
-000052f4 <core::option::Option<T>::unwrap::hfb7c9ddfaa6dfdbd>:
-    52f4:      	push	{r7, lr}
-    52f6:      	add	r7, sp, #0
-    52f8:      	sub	sp, #16
-    52fa:      	str	r1, [sp, #4]
-    52fc:      	str	r0, [sp, #8]
-    52fe:      	ldr	r0, [sp, #8]
-    5300:      	subs	r2, r0, #1
-    5302:      	mov	r1, r0
-    5304:      	sbcs	r1, r2
-    5306:      	cmp	r0, #0
-    5308:      	beq	0x5310 <core::option::Option<T>::unwrap::hfb7c9ddfaa6dfdbd+0x1c> @ imm = #4
-    530a:      	b	0x530c <core::option::Option<T>::unwrap::hfb7c9ddfaa6dfdbd+0x18> @ imm = #-2
-    530c:      	b	0x531c <core::option::Option<T>::unwrap::hfb7c9ddfaa6dfdbd+0x28> @ imm = #12
-    530e:      	trap
-    5310:      	ldr	r2, [sp, #4]
-    5312:      	ldr	r0, [pc, #16] <$d.17+0x2>
-    5314:      	movs	r1, #43
-    5316:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #12846
-    531a:      	trap
-    531c:      	ldr	r0, [sp, #8]
-    531e:      	str	r0, [sp, #12]
-    5320:      	add	sp, #16
-    5322:      	pop	{r7, pc}
-
-00005324 <$d.17>:
-    5324:	78 b0 00 00	.word	0x0000b078
-
-00005328 <bare_metal::Mutex<T>::borrow::h675ff40daa9acaa7>:
-    5328:      	sub	sp, #16
-    532a:      	str	r0, [sp]
-    532c:      	str	r0, [sp, #4]
-    532e:      	str	r1, [sp, #8]
-    5330:      	str	r0, [sp, #12]
-    5332:      	b	0x5334 <bare_metal::Mutex<T>::borrow::h675ff40daa9acaa7+0xc> @ imm = #-2
-    5334:      	ldr	r0, [sp]
-    5336:      	add	sp, #16
-    5338:      	bx	lr
-
-0000533a <core::mem::drop::h745bcf32bb2eda5e>:
-    533a:      	sub	sp, #4
-    533c:      	str	r0, [sp]
-    533e:      	b	0x5340 <core::mem::drop::h745bcf32bb2eda5e+0x6> @ imm = #-2
-    5340:      	add	sp, #4
-    5342:      	bx	lr
-
-00005344 <core::mem::replace::hd724f683566c97d4>:
-    5344:      	push	{r7, lr}
-    5346:      	add	r7, sp, #0
-    5348:      	sub	sp, #24
-    534a:      	str	r1, [sp]
-    534c:      	str	r0, [sp, #4]
-    534e:      	str	r0, [sp, #12]
-    5350:      	str	r1, [sp, #16]
-    5352:      	bl	0x62fc <core::ptr::read::h4cf99d3c7e803bf9> @ imm = #4006
-    5356:      	mov	r1, r0
-    5358:      	str	r1, [sp, #8]
-    535a:      	str	r0, [sp, #20]
-    535c:      	b	0x535e <core::mem::replace::hd724f683566c97d4+0x1a> @ imm = #-2
-    535e:      	ldr	r1, [sp]
-    5360:      	ldr	r0, [sp, #4]
-    5362:      	bl	0x6324 <core::ptr::write::h83d01c3d61ab6f98> @ imm = #4030
-    5366:      	b	0x5368 <core::mem::replace::hd724f683566c97d4+0x24> @ imm = #-2
-    5368:      	ldr	r0, [sp, #8]
-    536a:      	add	sp, #24
-    536c:      	pop	{r7, pc}
-
-0000536e <core::ptr::non_null::NonNull<T>::new_unchecked::h7d430fd87e28637d>:
-    536e:      	sub	sp, #8
-    5370:      	str	r0, [sp, #4]
-    5372:      	str	r0, [sp]
-    5374:      	ldr	r0, [sp]
-    5376:      	add	sp, #8
-    5378:      	bx	lr
-
-0000537a <core::ptr::non_null::NonNull<T>::as_ptr::hc93bc7262c4c6416>:
-    537a:      	sub	sp, #4
-    537c:      	str	r0, [sp]
-    537e:      	add	sp, #4
-    5380:      	bx	lr
-
-00005382 <cortex_m::asm::nop::h7b8e8a62e6d1cc0f>:
-    5382:      	push	{r7, lr}
-    5384:      	add	r7, sp, #0
-    5386:      	bl	0x809a <__nop>          @ imm = #11536
-    538a:      	b	0x538c <cortex_m::asm::nop::h7b8e8a62e6d1cc0f+0xa> @ imm = #-2
-    538c:      	pop	{r7, pc}
-
-0000538e <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h096e9468cf20e054E>:
-    538e:      	sub	sp, #12
-    5390:      	movs	r0, #1
-    5392:      	cmp	r0, #0
-    5394:      	bne	0x539c <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h096e9468cf20e054E+0xe> @ imm = #4
-    5396:      	b	0x5398 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h096e9468cf20e054E+0xa> @ imm = #-2
-    5398:      	b	0x53a4 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h096e9468cf20e054E+0x16> @ imm = #8
-    539a:      	trap
-    539c:      	add	r1, sp, #4
-    539e:      	movs	r0, #1
-    53a0:      	strb	r0, [r1]
-    53a2:      	b	0x53ac <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h096e9468cf20e054E+0x1e> @ imm = #6
-    53a4:      	add	r1, sp, #4
-    53a6:      	movs	r0, #0
-    53a8:      	strb	r0, [r1]
-    53aa:      	b	0x53ac <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h096e9468cf20e054E+0x1e> @ imm = #-2
-    53ac:      	movs	r0, #0
-    53ae:      	cmp	r0, #0
-    53b0:      	bne	0x53bc <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h096e9468cf20e054E+0x2e> @ imm = #8
-    53b2:      	b	0x53b4 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h096e9468cf20e054E+0x26> @ imm = #-2
-    53b4:      	add	r0, sp, #4
-    53b6:      	ldrb	r0, [r0]
-    53b8:      	add	sp, #12
-    53ba:      	bx	lr
-    53bc:      	b	0x53b4 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h096e9468cf20e054E+0x26> @ imm = #-12
-
-000053be <_ZN4core6result19Result$LT$T$C$E$GT$2ok17hb50ba58294d7e124E>:
-    53be:      	sub	sp, #12
-    53c0:      	mov	r1, sp
-    53c2:      	strb	r0, [r1]
-    53c4:      	movs	r0, #1
-    53c6:      	cmp	r0, #0
-    53c8:      	bne	0x53d0 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17hb50ba58294d7e124E+0x12> @ imm = #4
-    53ca:      	b	0x53cc <_ZN4core6result19Result$LT$T$C$E$GT$2ok17hb50ba58294d7e124E+0xe> @ imm = #-2
-    53cc:      	b	0x53e0 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17hb50ba58294d7e124E+0x22> @ imm = #16
-    53ce:      	trap
-    53d0:      	ldr	r0, [sp]
-    53d2:      	add	r1, sp, #8
-    53d4:      	strb	r0, [r1]
-    53d6:      	add	r1, sp, #4
-    53d8:      	strb	r0, [r1, #1]
-    53da:      	movs	r0, #1
-    53dc:      	strb	r0, [r1]
-    53de:      	b	0x53e8 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17hb50ba58294d7e124E+0x2a> @ imm = #6
-    53e0:      	add	r1, sp, #4
-    53e2:      	movs	r0, #0
-    53e4:      	strb	r0, [r1]
-    53e6:      	b	0x53e8 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17hb50ba58294d7e124E+0x2a> @ imm = #-2
-    53e8:      	movs	r0, #0
-    53ea:      	cmp	r0, #0
-    53ec:      	bne	0x53fa <_ZN4core6result19Result$LT$T$C$E$GT$2ok17hb50ba58294d7e124E+0x3c> @ imm = #10
-    53ee:      	b	0x53f0 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17hb50ba58294d7e124E+0x32> @ imm = #-2
-    53f0:      	add	r1, sp, #4
-    53f2:      	ldrb	r0, [r1]
-    53f4:      	ldrb	r1, [r1, #1]
-    53f6:      	add	sp, #12
-    53f8:      	bx	lr
-    53fa:      	b	0x53f0 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17hb50ba58294d7e124E+0x32> @ imm = #-14
-
-000053fc <<T as core::convert::From<T>>::from::he95065beb96da4c3>:
-    53fc:      	sub	sp, #4
-    53fe:      	str	r0, [sp]
-    5400:      	add	sp, #4
-    5402:      	bx	lr
-
-00005404 <<T as core::convert::Into<U>>::into::h190ece12f85867ec>:
-    5404:      	push	{r7, lr}
-    5406:      	add	r7, sp, #0
-    5408:      	sub	sp, #8
-    540a:      	str	r0, [sp, #4]
-    540c:      	bl	0x53fc <<T as core::convert::From<T>>::from::he95065beb96da4c3> @ imm = #-20
-    5410:      	str	r0, [sp]
-    5412:      	b	0x5414 <<T as core::convert::Into<U>>::into::h190ece12f85867ec+0x10> @ imm = #-2
-    5414:      	ldr	r0, [sp]
-    5416:      	add	sp, #8
-    5418:      	pop	{r7, pc}
-
-0000541a <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h8f6d23612e3410d7E>:
-    541a:      	sub	sp, #20
-    541c:      	movs	r0, #1
-    541e:      	cmp	r0, #0
-    5420:      	bne	0x5428 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h8f6d23612e3410d7E+0xe> @ imm = #4
-    5422:      	b	0x5424 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h8f6d23612e3410d7E+0xa> @ imm = #-2
-    5424:      	b	0x542a <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h8f6d23612e3410d7E+0x10> @ imm = #2
-    5426:      	trap
-    5428:      	b	0x5430 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h8f6d23612e3410d7E+0x16> @ imm = #4
-    542a:      	trap
-    542c:      	trap
-    542e:      	b	0x5430 <_ZN79_$LT$core..result..Result$LT$T$C$E$GT$$u20$as$u20$core..ops..try_trait..Try$GT$6branch17h8f6d23612e3410d7E+0x16> @ imm = #-2
-    5430:      	add	sp, #20
-    5432:      	bx	lr
-
-00005434 <<u32 as va108xx_hal::time::U32Ext>::hz::h33770ef4926e0942>:
-    5434:      	sub	sp, #8
-    5436:      	str	r0, [sp, #4]
-    5438:      	str	r0, [sp]
-    543a:      	ldr	r0, [sp]
-    543c:      	add	sp, #8
-    543e:      	bx	lr
-
-00005440 <<u32 as va108xx_hal::time::U32Ext>::mhz::ha624057da36f1de9>:
-    5440:      	sub	sp, #8
-    5442:      	str	r0, [sp, #4]
-    5444:      	str	r0, [sp]
-    5446:      	ldr	r0, [sp]
-    5448:      	add	sp, #8
-    544a:      	bx	lr
-
-0000544c <<va108xx_hal::time::Hertz as core::convert::From<va108xx_hal::time::MegaHertz>>::from::hc5caf156f8e04a82>:
-    544c:      	push	{r7, lr}
-    544e:      	add	r7, sp, #0
-    5450:      	sub	sp, #16
-    5452:      	str	r0, [sp, #12]
-    5454:      	ldr	r2, [pc, #40] <$d.17>
-    5456:      	movs	r3, #0
-    5458:      	mov	r1, r3
-    545a:      	bl	0xa566 <__aeabi_lmul>   @ imm = #20744
-    545e:      	subs	r2, r1, #1
-    5460:      	sbcs	r1, r2
-    5462:      	str	r0, [sp, #4]
-    5464:      	cmp	r1, #0
-    5466:      	bne	0x5474 <<va108xx_hal::time::Hertz as core::convert::From<va108xx_hal::time::MegaHertz>>::from::hc5caf156f8e04a82+0x28> @ imm = #10
-    5468:      	b	0x546a <<va108xx_hal::time::Hertz as core::convert::From<va108xx_hal::time::MegaHertz>>::from::hc5caf156f8e04a82+0x1e> @ imm = #-2
-    546a:      	ldr	r0, [sp, #4]
-    546c:      	str	r0, [sp, #8]
-    546e:      	ldr	r0, [sp, #8]
-    5470:      	add	sp, #16
-    5472:      	pop	{r7, pc}
-    5474:      	ldr	r0, [pc, #12] <$d.17+0x4>
-    5476:      	ldr	r2, [pc, #16] <$d.17+0xa>
-    5478:      	movs	r1, #33
-    547a:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #12490
-    547e:      	trap
-
-00005480 <$d.17>:
-    5480:	40 42 0f 00	.word	0x000f4240
-    5484:	00 b1 00 00	.word	0x0000b100
-    5488:	24 b1 00 00	.word	0x0000b124
-
-0000548c <<va108xx_hal::time::Hertz as core::cmp::PartialEq>::ne::h16cf15dd0fe3c833>:
-    548c:      	sub	sp, #16
-    548e:      	str	r0, [sp]
-    5490:      	str	r1, [sp, #4]
-    5492:      	str	r1, [sp, #8]
-    5494:      	str	r0, [sp, #12]
-    5496:      	ldr	r0, [r0]
-    5498:      	ldr	r1, [r1]
-    549a:      	subs	r0, r0, r1
-    549c:      	subs	r1, r0, #1
-    549e:      	sbcs	r0, r1
-    54a0:      	add	sp, #16
-    54a2:      	bx	lr
-
-000054a4 <core::ops::function::FnOnce::call_once::hb09ebeb400ad745a>:
-    54a4:      	push	{r7, lr}
-    54a6:      	add	r7, sp, #0
-    54a8:      	sub	sp, #16
-    54aa:      	str	r0, [sp, #4]
-    54ac:      	str	r1, [sp, #8]
-    54ae:      	ldr	r0, [sp, #4]
-    54b0:      	ldr	r1, [sp, #8]
-    54b2:      	bl	0x6214 <core::cmp::impls::<impl core::cmp::Ord for usize>::cmp::h5bf304c0d5cb43f3> @ imm = #3422
-    54b6:      	str	r0, [sp]
-    54b8:      	b	0x54ba <core::ops::function::FnOnce::call_once::hb09ebeb400ad745a+0x16> @ imm = #-2
-    54ba:      	ldr	r0, [sp]
-    54bc:      	add	sp, #16
-    54be:      	pop	{r7, pc}
-
-000054c0 <core::ptr::mut_ptr::<impl *mut T>::is_null::h4b5be0c75ee47df6>:
-    54c0:      	push	{r7, lr}
-    54c2:      	add	r7, sp, #0
-    54c4:      	sub	sp, #16
-    54c6:      	str	r0, [sp, #12]
-    54c8:      	str	r0, [sp, #8]
-    54ca:      	b	0x54cc <core::ptr::mut_ptr::<impl *mut T>::is_null::h4b5be0c75ee47df6+0xc> @ imm = #-2
-    54cc:      	ldr	r0, [sp, #8]
-    54ce:      	movs	r1, #0
-    54d0:      	bl	0x81b6 <core::ptr::mut_ptr::<impl *mut T>::guaranteed_eq::hbe8386ebf759a860> @ imm = #11490
-    54d4:      	str	r0, [sp, #4]
-    54d6:      	b	0x54d8 <core::ptr::mut_ptr::<impl *mut T>::is_null::h4b5be0c75ee47df6+0x18> @ imm = #-2
-    54d8:      	ldr	r0, [sp, #4]
-    54da:      	movs	r1, #1
-    54dc:      	ands	r0, r1
-    54de:      	add	sp, #16
-    54e0:      	pop	{r7, pc}
-
-000054e2 <core::ptr::const_ptr::<impl *const T>::cast::h7946870fccab31f5>:
-    54e2:      	sub	sp, #4
-    54e4:      	str	r0, [sp]
-    54e6:      	add	sp, #4
-    54e8:      	bx	lr
-
-000054ea <<cortex_m::register::primask::Primask as core::cmp::PartialEq>::eq::h6b77fc88e77b177b>:
-    54ea:      	sub	sp, #20
-    54ec:      	str	r0, [sp, #4]
-    54ee:      	str	r1, [sp, #8]
-    54f0:      	ldrb	r0, [r0]
-    54f2:      	str	r0, [sp, #12]
-    54f4:      	ldrb	r1, [r1]
-    54f6:      	str	r1, [sp, #16]
-    54f8:      	cmp	r0, r1
-    54fa:      	beq	0x5506 <<cortex_m::register::primask::Primask as core::cmp::PartialEq>::eq::h6b77fc88e77b177b+0x1c> @ imm = #8
-    54fc:      	b	0x54fe <<cortex_m::register::primask::Primask as core::cmp::PartialEq>::eq::h6b77fc88e77b177b+0x14> @ imm = #-2
-    54fe:      	mov	r1, sp
-    5500:      	movs	r0, #0
-    5502:      	strb	r0, [r1]
-    5504:      	b	0x550e <<cortex_m::register::primask::Primask as core::cmp::PartialEq>::eq::h6b77fc88e77b177b+0x24> @ imm = #6
-    5506:      	mov	r1, sp
-    5508:      	movs	r0, #1
-    550a:      	strb	r0, [r1]
-    550c:      	b	0x550e <<cortex_m::register::primask::Primask as core::cmp::PartialEq>::eq::h6b77fc88e77b177b+0x24> @ imm = #-2
-    550e:      	mov	r0, sp
-    5510:      	ldrb	r0, [r0]
-    5512:      	add	sp, #20
-    5514:      	bx	lr
-
-00005516 <cortex_m::register::primask::read::h72d67243a66c79c5>:
-    5516:      	push	{r7, lr}
-    5518:      	add	r7, sp, #0
-    551a:      	sub	sp, #16
-    551c:      	bl	0x809e <__primask_r>    @ imm = #11134
-    5520:      	mov	r1, r0
-    5522:      	str	r1, [sp, #4]
-    5524:      	str	r0, [sp, #12]
-    5526:      	b	0x5528 <cortex_m::register::primask::read::h72d67243a66c79c5+0x12> @ imm = #-2
-    5528:      	ldr	r0, [sp, #4]
-    552a:      	lsls	r0, r0, #31
-    552c:      	cmp	r0, #0
-    552e:      	bne	0x553a <cortex_m::register::primask::read::h72d67243a66c79c5+0x24> @ imm = #8
-    5530:      	b	0x5532 <cortex_m::register::primask::read::h72d67243a66c79c5+0x1c> @ imm = #-2
-    5532:      	add	r1, sp, #8
-    5534:      	movs	r0, #0
-    5536:      	strb	r0, [r1]
-    5538:      	b	0x5542 <cortex_m::register::primask::read::h72d67243a66c79c5+0x2c> @ imm = #6
-    553a:      	add	r1, sp, #8
-    553c:      	movs	r0, #1
-    553e:      	strb	r0, [r1]
-    5540:      	b	0x5542 <cortex_m::register::primask::read::h72d67243a66c79c5+0x2c> @ imm = #-2
-    5542:      	add	r0, sp, #8
-    5544:      	ldrb	r0, [r0]
-    5546:      	add	sp, #16
-    5548:      	pop	{r7, pc}
-    554a:      	bmi	0x54f6 <<cortex_m::register::primask::Primask as core::cmp::PartialEq>::eq::h6b77fc88e77b177b+0xc> @ imm = #-88
-
-0000554c <cortex_m::register::primask::Primask::is_active::h52cfe905d1daadd4>:
-    554c:      	push	{r7, lr}
-    554e:      	add	r7, sp, #0
-    5550:      	sub	sp, #8
-    5552:      	mov	r1, r0
-    5554:      	add	r0, sp, #4
-    5556:      	strb	r1, [r0]
-    5558:      	ldr	r1, [pc, #16] <$d.13>
-    555a:      	bl	0x54ea <<cortex_m::register::primask::Primask as core::cmp::PartialEq>::eq::h6b77fc88e77b177b> @ imm = #-116
-    555e:      	str	r0, [sp]
-    5560:      	b	0x5562 <cortex_m::register::primask::Primask::is_active::h52cfe905d1daadd4+0x16> @ imm = #-2
-    5562:      	ldr	r0, [sp]
-    5564:      	movs	r1, #1
-    5566:      	ands	r0, r1
-    5568:      	add	sp, #8
-    556a:      	pop	{r7, pc}
-
-0000556c <$d.13>:
-    556c:	34 b1 00 00	.word	0x0000b134
-
-00005570 <cortex_m::interrupt::free::h530d5eb12665b755>:
-    5570:      	push	{r7, lr}
-    5572:      	add	r7, sp, #0
-    5574:      	sub	sp, #32
-    5576:      	bl	0x5516 <cortex_m::register::primask::read::h72d67243a66c79c5> @ imm = #-100
-    557a:      	mov	r1, r0
-    557c:      	str	r1, [sp, #8]
-    557e:      	add	r1, sp, #28
-    5580:      	strb	r0, [r1]
-    5582:      	b	0x5584 <cortex_m::interrupt::free::h530d5eb12665b755+0x14> @ imm = #-2
-    5584:      	bl	0x5620 <cortex_m::interrupt::disable::hd9b64a4de3ccf9ff> @ imm = #152
-    5588:      	b	0x558a <cortex_m::interrupt::free::h530d5eb12665b755+0x1a> @ imm = #-2
-    558a:      	bl	0x80a4 <bare_metal::CriticalSection::new::h63eca2240f158320> @ imm = #11030
-    558e:      	b	0x5590 <cortex_m::interrupt::free::h530d5eb12665b755+0x20> @ imm = #-2
-    5590:      	add	r0, sp, #16
-    5592:      	str	r0, [sp, #12]
-    5594:      	ldr	r0, [sp, #12]
-    5596:      	bl	0x5e80 <va108xx_hal::timer::default_ms_irq_handler::{{closure}}::hf428cc36c45f8437> @ imm = #2278
-    559a:      	b	0x559c <cortex_m::interrupt::free::h530d5eb12665b755+0x2c> @ imm = #-2
-    559c:      	ldr	r0, [sp, #8]
-    559e:      	movs	r1, #1
-    55a0:      	ands	r0, r1
-    55a2:      	bl	0x554c <cortex_m::register::primask::Primask::is_active::h52cfe905d1daadd4> @ imm = #-90
-    55a6:      	str	r0, [sp, #4]
-    55a8:      	b	0x55aa <cortex_m::interrupt::free::h530d5eb12665b755+0x3a> @ imm = #-2
-    55aa:      	ldr	r0, [sp, #4]
-    55ac:      	lsls	r0, r0, #31
-    55ae:      	cmp	r0, #0
-    55b0:      	bne	0x55b8 <cortex_m::interrupt::free::h530d5eb12665b755+0x48> @ imm = #4
-    55b2:      	b	0x55b4 <cortex_m::interrupt::free::h530d5eb12665b755+0x44> @ imm = #-2
-    55b4:      	add	sp, #32
-    55b6:      	pop	{r7, pc}
-    55b8:      	bl	0x5614 <cortex_m::interrupt::enable::hd8bd9f1c01616d08> @ imm = #88
-    55bc:      	b	0x55b4 <cortex_m::interrupt::free::h530d5eb12665b755+0x44> @ imm = #-12
-
-000055be <cortex_m::interrupt::free::h5a918748642e58b0>:
-    55be:      	push	{r7, lr}
-    55c0:      	add	r7, sp, #0
-    55c2:      	sub	sp, #32
-    55c4:      	bl	0x5516 <cortex_m::register::primask::read::h72d67243a66c79c5> @ imm = #-178
-    55c8:      	mov	r1, r0
-    55ca:      	str	r1, [sp, #8]
-    55cc:      	add	r1, sp, #24
-    55ce:      	strb	r0, [r1]
-    55d0:      	b	0x55d2 <cortex_m::interrupt::free::h5a918748642e58b0+0x14> @ imm = #-2
-    55d2:      	bl	0x5620 <cortex_m::interrupt::disable::hd9b64a4de3ccf9ff> @ imm = #74
-    55d6:      	b	0x55d8 <cortex_m::interrupt::free::h5a918748642e58b0+0x1a> @ imm = #-2
-    55d8:      	bl	0x80a4 <bare_metal::CriticalSection::new::h63eca2240f158320> @ imm = #10952
-    55dc:      	b	0x55de <cortex_m::interrupt::free::h5a918748642e58b0+0x20> @ imm = #-2
-    55de:      	add	r0, sp, #16
-    55e0:      	str	r0, [sp, #12]
-    55e2:      	ldr	r0, [sp, #12]
-    55e4:      	bl	0x5ef8 <va108xx_hal::timer::get_ms_ticks::{{closure}}::hcb223fcc8c1afe4c> @ imm = #2320
-    55e8:      	mov	r1, r0
-    55ea:      	str	r1, [sp, #4]
-    55ec:      	str	r0, [sp, #28]
-    55ee:      	b	0x55f0 <cortex_m::interrupt::free::h5a918748642e58b0+0x32> @ imm = #-2
-    55f0:      	ldr	r0, [sp, #8]
-    55f2:      	movs	r1, #1
-    55f4:      	ands	r0, r1
-    55f6:      	bl	0x554c <cortex_m::register::primask::Primask::is_active::h52cfe905d1daadd4> @ imm = #-174
-    55fa:      	str	r0, [sp]
-    55fc:      	b	0x55fe <cortex_m::interrupt::free::h5a918748642e58b0+0x40> @ imm = #-2
-    55fe:      	ldr	r0, [sp]
-    5600:      	lsls	r0, r0, #31
-    5602:      	cmp	r0, #0
-    5604:      	bne	0x560e <cortex_m::interrupt::free::h5a918748642e58b0+0x50> @ imm = #6
-    5606:      	b	0x5608 <cortex_m::interrupt::free::h5a918748642e58b0+0x4a> @ imm = #-2
-    5608:      	ldr	r0, [sp, #4]
-    560a:      	add	sp, #32
-    560c:      	pop	{r7, pc}
-    560e:      	bl	0x5614 <cortex_m::interrupt::enable::hd8bd9f1c01616d08> @ imm = #2
-    5612:      	b	0x5608 <cortex_m::interrupt::free::h5a918748642e58b0+0x4a> @ imm = #-14
-
-00005614 <cortex_m::interrupt::enable::hd8bd9f1c01616d08>:
-    5614:      	push	{r7, lr}
-    5616:      	add	r7, sp, #0
-    5618:      	bl	0x8096 <__cpsie>        @ imm = #10874
-    561c:      	b	0x561e <cortex_m::interrupt::enable::hd8bd9f1c01616d08+0xa> @ imm = #-2
-    561e:      	pop	{r7, pc}
-
-00005620 <cortex_m::interrupt::disable::hd9b64a4de3ccf9ff>:
-    5620:      	push	{r7, lr}
-    5622:      	add	r7, sp, #0
-    5624:      	bl	0x8092 <__cpsid>        @ imm = #10858
-    5628:      	b	0x562a <cortex_m::interrupt::disable::hd9b64a4de3ccf9ff+0xa> @ imm = #-2
-    562a:      	pop	{r7, pc}
-
-0000562c <core::slice::iter::IterMut<T>::new::ha1a3a3ba7b64854f>:
-    562c:      	push	{r7, lr}
-    562e:      	add	r7, sp, #0
-    5630:      	sub	sp, #80
-    5632:      	str	r1, [sp, #8]
-    5634:      	str	r0, [sp, #28]
-    5636:      	str	r1, [sp, #32]
-    5638:      	bl	0x64a0 <core::slice::<impl [T]>::as_mut_ptr::h133dc8b6616ab639> @ imm = #3684
-    563c:      	mov	r1, r0
-    563e:      	str	r1, [sp, #12]
-    5640:      	str	r0, [sp, #36]
-    5642:      	b	0x5644 <core::slice::iter::IterMut<T>::new::ha1a3a3ba7b64854f+0x18> @ imm = #-2
-    5644:      	ldr	r0, [sp, #12]
-    5646:      	bl	0x54c0 <core::ptr::mut_ptr::<impl *mut T>::is_null::h4b5be0c75ee47df6> @ imm = #-394
-    564a:      	b	0x564c <core::slice::iter::IterMut<T>::new::ha1a3a3ba7b64854f+0x20> @ imm = #-2
-    564c:      	b	0x564e <core::slice::iter::IterMut<T>::new::ha1a3a3ba7b64854f+0x22> @ imm = #-2
-    564e:      	b	0x5650 <core::slice::iter::IterMut<T>::new::ha1a3a3ba7b64854f+0x24> @ imm = #-2
-    5650:      	movs	r0, #1
-    5652:      	cmp	r0, #0
-    5654:      	bne	0x566e <core::slice::iter::IterMut<T>::new::ha1a3a3ba7b64854f+0x42> @ imm = #22
-    5656:      	b	0x5658 <core::slice::iter::IterMut<T>::new::ha1a3a3ba7b64854f+0x2c> @ imm = #-2
-    5658:      	ldr	r0, [sp, #12]
-    565a:      	ldr	r1, [sp, #8]
-    565c:      	str	r0, [sp, #60]
-    565e:      	str	r1, [sp, #64]
-    5660:      	str	r0, [sp, #68]
-    5662:      	str	r1, [sp, #72]
-    5664:      	adds	r0, r0, r1
-    5666:      	str	r0, [sp, #76]
-    5668:      	ldr	r0, [sp, #76]
-    566a:      	str	r0, [sp, #4]
-    566c:      	b	0x5692 <core::slice::iter::IterMut<T>::new::ha1a3a3ba7b64854f+0x66> @ imm = #34
-    566e:      	ldr	r0, [sp, #12]
-    5670:      	ldr	r1, [sp, #8]
-    5672:      	str	r0, [sp, #40]
-    5674:      	str	r1, [sp, #44]
-    5676:      	str	r0, [sp, #48]
-    5678:      	str	r1, [sp, #52]
-    567a:      	lsls	r1, r1, #1
-    567c:      	adds	r0, r0, r1
-    567e:      	str	r0, [sp, #56]
-    5680:      	ldr	r0, [sp, #56]
-    5682:      	str	r0, [sp, #24]
-    5684:      	b	0x5686 <core::slice::iter::IterMut<T>::new::ha1a3a3ba7b64854f+0x5a> @ imm = #-2
-    5686:      	b	0x5688 <core::slice::iter::IterMut<T>::new::ha1a3a3ba7b64854f+0x5c> @ imm = #-2
-    5688:      	ldr	r0, [sp, #12]
-    568a:      	bl	0x536e <core::ptr::non_null::NonNull<T>::new_unchecked::h7d430fd87e28637d> @ imm = #-800
-    568e:      	str	r0, [sp]
-    5690:      	b	0x5698 <core::slice::iter::IterMut<T>::new::ha1a3a3ba7b64854f+0x6c> @ imm = #4
-    5692:      	ldr	r0, [sp, #4]
-    5694:      	str	r0, [sp, #24]
-    5696:      	b	0x5688 <core::slice::iter::IterMut<T>::new::ha1a3a3ba7b64854f+0x5c> @ imm = #-18
-    5698:      	ldr	r1, [sp]
-    569a:      	ldr	r0, [sp, #24]
-    569c:      	str	r1, [sp, #16]
-    569e:      	str	r0, [sp, #20]
-    56a0:      	ldr	r0, [sp, #16]
-    56a2:      	ldr	r1, [sp, #20]
-    56a4:      	add	sp, #80
-    56a6:      	pop	{r7, pc}
-
-000056a8 <core::slice::iter::IterMut<T>::new::hc82cedf68253b996>:
-    56a8:      	push	{r7, lr}
-    56aa:      	add	r7, sp, #0
-    56ac:      	sub	sp, #80
-    56ae:      	str	r1, [sp, #8]
-    56b0:      	str	r0, [sp, #28]
-    56b2:      	str	r1, [sp, #32]
-    56b4:      	bl	0x64aa <core::slice::<impl [T]>::as_mut_ptr::hd024139067dd0113> @ imm = #3570
-    56b8:      	mov	r1, r0
-    56ba:      	str	r1, [sp, #12]
-    56bc:      	str	r0, [sp, #36]
-    56be:      	b	0x56c0 <core::slice::iter::IterMut<T>::new::hc82cedf68253b996+0x18> @ imm = #-2
-    56c0:      	ldr	r0, [sp, #12]
-    56c2:      	bl	0x81d6 <core::ptr::mut_ptr::<impl *mut T>::is_null::hc0a677e4f9e2ab6d> @ imm = #11024
-    56c6:      	b	0x56c8 <core::slice::iter::IterMut<T>::new::hc82cedf68253b996+0x20> @ imm = #-2
-    56c8:      	b	0x56ca <core::slice::iter::IterMut<T>::new::hc82cedf68253b996+0x22> @ imm = #-2
-    56ca:      	b	0x56cc <core::slice::iter::IterMut<T>::new::hc82cedf68253b996+0x24> @ imm = #-2
-    56cc:      	movs	r0, #1
-    56ce:      	cmp	r0, #0
-    56d0:      	bne	0x56ea <core::slice::iter::IterMut<T>::new::hc82cedf68253b996+0x42> @ imm = #22
-    56d2:      	b	0x56d4 <core::slice::iter::IterMut<T>::new::hc82cedf68253b996+0x2c> @ imm = #-2
-    56d4:      	ldr	r0, [sp, #12]
-    56d6:      	ldr	r1, [sp, #8]
-    56d8:      	str	r0, [sp, #60]
-    56da:      	str	r1, [sp, #64]
-    56dc:      	str	r0, [sp, #68]
-    56de:      	str	r1, [sp, #72]
-    56e0:      	adds	r0, r0, r1
-    56e2:      	str	r0, [sp, #76]
-    56e4:      	ldr	r0, [sp, #76]
-    56e6:      	str	r0, [sp, #4]
-    56e8:      	b	0x570c <core::slice::iter::IterMut<T>::new::hc82cedf68253b996+0x64> @ imm = #32
-    56ea:      	ldr	r0, [sp, #12]
-    56ec:      	ldr	r1, [sp, #8]
-    56ee:      	str	r0, [sp, #40]
-    56f0:      	str	r1, [sp, #44]
-    56f2:      	str	r0, [sp, #48]
-    56f4:      	str	r1, [sp, #52]
-    56f6:      	adds	r0, r0, r1
-    56f8:      	str	r0, [sp, #56]
-    56fa:      	ldr	r0, [sp, #56]
-    56fc:      	str	r0, [sp, #24]
-    56fe:      	b	0x5700 <core::slice::iter::IterMut<T>::new::hc82cedf68253b996+0x58> @ imm = #-2
-    5700:      	b	0x5702 <core::slice::iter::IterMut<T>::new::hc82cedf68253b996+0x5a> @ imm = #-2
-    5702:      	ldr	r0, [sp, #12]
-    5704:      	bl	0x81a2 <core::ptr::non_null::NonNull<T>::new_unchecked::h5e332c41042b69a9> @ imm = #10906
-    5708:      	str	r0, [sp]
-    570a:      	b	0x5712 <core::slice::iter::IterMut<T>::new::hc82cedf68253b996+0x6a> @ imm = #4
-    570c:      	ldr	r0, [sp, #4]
-    570e:      	str	r0, [sp, #24]
-    5710:      	b	0x5702 <core::slice::iter::IterMut<T>::new::hc82cedf68253b996+0x5a> @ imm = #-18
-    5712:      	ldr	r1, [sp]
-    5714:      	ldr	r0, [sp, #24]
-    5716:      	str	r1, [sp, #16]
-    5718:      	str	r0, [sp, #20]
-    571a:      	ldr	r0, [sp, #16]
-    571c:      	ldr	r1, [sp, #20]
-    571e:      	add	sp, #80
-    5720:      	pop	{r7, pc}
-
-00005722 <<I as core::iter::traits::collect::IntoIterator>::into_iter::hfe36a1b6ab5580ac>:
-    5722:      	sub	sp, #8
-    5724:      	str	r0, [sp]
-    5726:      	str	r1, [sp, #4]
-    5728:      	add	sp, #8
-    572a:      	bx	lr
-
-0000572c <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hb1dbd48c35961a04>:
-    572c:      	push	{r7, lr}
-    572e:      	add	r7, sp, #0
-    5730:      	sub	sp, #64
-    5732:      	str	r0, [sp, #20]
-    5734:      	str	r0, [sp, #32]
-    5736:      	ldr	r0, [r0]
-    5738:      	bl	0x81ae <core::ptr::non_null::NonNull<T>::as_ptr::h72809eea50b8d4c1> @ imm = #10866
-    573c:      	str	r0, [sp, #24]
-    573e:      	b	0x5740 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hb1dbd48c35961a04+0x14> @ imm = #-2
-    5740:      	ldr	r0, [sp, #24]
-    5742:      	bl	0x81d6 <core::ptr::mut_ptr::<impl *mut T>::is_null::hc0a677e4f9e2ab6d> @ imm = #10896
-    5746:      	b	0x5748 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hb1dbd48c35961a04+0x1c> @ imm = #-2
-    5748:      	b	0x574a <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hb1dbd48c35961a04+0x1e> @ imm = #-2
-    574a:      	b	0x574c <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hb1dbd48c35961a04+0x20> @ imm = #-2
-    574c:      	movs	r0, #1
-    574e:      	cmp	r0, #0
-    5750:      	bne	0x5756 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hb1dbd48c35961a04+0x2a> @ imm = #2
-    5752:      	b	0x5754 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hb1dbd48c35961a04+0x28> @ imm = #-2
-    5754:      	b	0x5764 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hb1dbd48c35961a04+0x38> @ imm = #12
-    5756:      	ldr	r0, [sp, #20]
-    5758:      	ldr	r0, [r0, #4]
-    575a:      	bl	0x81d6 <core::ptr::mut_ptr::<impl *mut T>::is_null::hc0a677e4f9e2ab6d> @ imm = #10872
-    575e:      	b	0x5760 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hb1dbd48c35961a04+0x34> @ imm = #-2
-    5760:      	b	0x5762 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hb1dbd48c35961a04+0x36> @ imm = #-2
-    5762:      	b	0x5764 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hb1dbd48c35961a04+0x38> @ imm = #-2
-    5764:      	ldr	r0, [sp, #20]
-    5766:      	ldr	r0, [r0]
-    5768:      	bl	0x81ae <core::ptr::non_null::NonNull<T>::as_ptr::h72809eea50b8d4c1> @ imm = #10818
-    576c:      	str	r0, [sp, #16]
-    576e:      	b	0x5770 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hb1dbd48c35961a04+0x44> @ imm = #-2
-    5770:      	ldr	r0, [sp, #16]
-    5772:      	ldr	r1, [sp, #20]
-    5774:      	ldr	r1, [r1, #4]
-    5776:      	cmp	r0, r1
-    5778:      	beq	0x57ba <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hb1dbd48c35961a04+0x8e> @ imm = #62
-    577a:      	b	0x577c <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hb1dbd48c35961a04+0x50> @ imm = #-2
-    577c:      	ldr	r0, [sp, #20]
-    577e:      	str	r0, [sp, #40]
-    5780:      	movs	r1, #1
-    5782:      	str	r1, [sp, #4]
-    5784:      	str	r1, [sp, #44]
-    5786:      	ldr	r0, [r0]
-    5788:      	bl	0x81ae <core::ptr::non_null::NonNull<T>::as_ptr::h72809eea50b8d4c1> @ imm = #10786
-    578c:      	mov	r1, r0
-    578e:      	ldr	r0, [sp, #20]
-    5790:      	str	r1, [sp, #8]
-    5792:      	str	r1, [sp, #48]
-    5794:      	ldr	r0, [r0]
-    5796:      	bl	0x81ae <core::ptr::non_null::NonNull<T>::as_ptr::h72809eea50b8d4c1> @ imm = #10772
-    579a:      	ldr	r1, [sp, #4]
-    579c:      	str	r0, [sp, #52]
-    579e:      	str	r1, [sp, #56]
-    57a0:      	adds	r0, r0, #1
-    57a2:      	str	r0, [sp, #60]
-    57a4:      	ldr	r0, [sp, #60]
-    57a6:      	bl	0x81a2 <core::ptr::non_null::NonNull<T>::new_unchecked::h5e332c41042b69a9> @ imm = #10744
-    57aa:      	ldr	r2, [sp, #20]
-    57ac:      	mov	r1, r0
-    57ae:      	ldr	r0, [sp, #8]
-    57b0:      	str	r1, [r2]
-    57b2:      	str	r0, [sp, #36]
-    57b4:      	ldr	r0, [sp, #36]
-    57b6:      	str	r0, [sp, #12]
-    57b8:      	b	0x57c6 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hb1dbd48c35961a04+0x9a> @ imm = #10
-    57ba:      	movs	r0, #0
-    57bc:      	str	r0, [sp, #28]
-    57be:      	b	0x57c0 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hb1dbd48c35961a04+0x94> @ imm = #-2
-    57c0:      	ldr	r0, [sp, #28]
-    57c2:      	add	sp, #64
-    57c4:      	pop	{r7, pc}
-    57c6:      	ldr	r0, [sp, #12]
-    57c8:      	str	r0, [sp, #28]
-    57ca:      	b	0x57c0 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hb1dbd48c35961a04+0x94> @ imm = #-14
-
-000057cc <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hcb8505d022ea0231>:
-    57cc:      	push	{r7, lr}
-    57ce:      	add	r7, sp, #0
-    57d0:      	sub	sp, #64
-    57d2:      	str	r0, [sp, #20]
-    57d4:      	str	r0, [sp, #32]
-    57d6:      	ldr	r0, [r0]
-    57d8:      	bl	0x537a <core::ptr::non_null::NonNull<T>::as_ptr::hc93bc7262c4c6416> @ imm = #-1122
-    57dc:      	str	r0, [sp, #24]
-    57de:      	b	0x57e0 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hcb8505d022ea0231+0x14> @ imm = #-2
-    57e0:      	ldr	r0, [sp, #24]
-    57e2:      	bl	0x54c0 <core::ptr::mut_ptr::<impl *mut T>::is_null::h4b5be0c75ee47df6> @ imm = #-806
-    57e6:      	b	0x57e8 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hcb8505d022ea0231+0x1c> @ imm = #-2
-    57e8:      	b	0x57ea <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hcb8505d022ea0231+0x1e> @ imm = #-2
-    57ea:      	b	0x57ec <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hcb8505d022ea0231+0x20> @ imm = #-2
-    57ec:      	movs	r0, #1
-    57ee:      	cmp	r0, #0
-    57f0:      	bne	0x57f6 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hcb8505d022ea0231+0x2a> @ imm = #2
-    57f2:      	b	0x57f4 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hcb8505d022ea0231+0x28> @ imm = #-2
-    57f4:      	b	0x5804 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hcb8505d022ea0231+0x38> @ imm = #12
-    57f6:      	ldr	r0, [sp, #20]
-    57f8:      	ldr	r0, [r0, #4]
-    57fa:      	bl	0x54c0 <core::ptr::mut_ptr::<impl *mut T>::is_null::h4b5be0c75ee47df6> @ imm = #-830
-    57fe:      	b	0x5800 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hcb8505d022ea0231+0x34> @ imm = #-2
-    5800:      	b	0x5802 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hcb8505d022ea0231+0x36> @ imm = #-2
-    5802:      	b	0x5804 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hcb8505d022ea0231+0x38> @ imm = #-2
-    5804:      	ldr	r0, [sp, #20]
-    5806:      	ldr	r0, [r0]
-    5808:      	bl	0x537a <core::ptr::non_null::NonNull<T>::as_ptr::hc93bc7262c4c6416> @ imm = #-1170
-    580c:      	str	r0, [sp, #16]
-    580e:      	b	0x5810 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hcb8505d022ea0231+0x44> @ imm = #-2
-    5810:      	ldr	r0, [sp, #16]
-    5812:      	ldr	r1, [sp, #20]
-    5814:      	ldr	r1, [r1, #4]
-    5816:      	cmp	r0, r1
-    5818:      	beq	0x585a <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hcb8505d022ea0231+0x8e> @ imm = #62
-    581a:      	b	0x581c <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hcb8505d022ea0231+0x50> @ imm = #-2
-    581c:      	ldr	r0, [sp, #20]
-    581e:      	str	r0, [sp, #40]
-    5820:      	movs	r1, #1
-    5822:      	str	r1, [sp, #4]
-    5824:      	str	r1, [sp, #44]
-    5826:      	ldr	r0, [r0]
-    5828:      	bl	0x537a <core::ptr::non_null::NonNull<T>::as_ptr::hc93bc7262c4c6416> @ imm = #-1202
-    582c:      	mov	r1, r0
-    582e:      	ldr	r0, [sp, #20]
-    5830:      	str	r1, [sp, #8]
-    5832:      	str	r1, [sp, #48]
-    5834:      	ldr	r0, [r0]
-    5836:      	bl	0x537a <core::ptr::non_null::NonNull<T>::as_ptr::hc93bc7262c4c6416> @ imm = #-1216
-    583a:      	ldr	r1, [sp, #4]
-    583c:      	str	r0, [sp, #52]
-    583e:      	str	r1, [sp, #56]
-    5840:      	adds	r0, r0, #2
-    5842:      	str	r0, [sp, #60]
-    5844:      	ldr	r0, [sp, #60]
-    5846:      	bl	0x536e <core::ptr::non_null::NonNull<T>::new_unchecked::h7d430fd87e28637d> @ imm = #-1244
-    584a:      	ldr	r2, [sp, #20]
-    584c:      	mov	r1, r0
-    584e:      	ldr	r0, [sp, #8]
-    5850:      	str	r1, [r2]
-    5852:      	str	r0, [sp, #36]
-    5854:      	ldr	r0, [sp, #36]
-    5856:      	str	r0, [sp, #12]
-    5858:      	b	0x5866 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hcb8505d022ea0231+0x9a> @ imm = #10
-    585a:      	movs	r0, #0
-    585c:      	str	r0, [sp, #28]
-    585e:      	b	0x5860 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hcb8505d022ea0231+0x94> @ imm = #-2
-    5860:      	ldr	r0, [sp, #28]
-    5862:      	add	sp, #64
-    5864:      	pop	{r7, pc}
-    5866:      	ldr	r0, [sp, #12]
-    5868:      	str	r0, [sp, #28]
-    586a:      	b	0x5860 <<core::slice::iter::IterMut<T> as core::iter::traits::iterator::Iterator>::next::hcb8505d022ea0231+0x94> @ imm = #-14
-
-0000586c <va108xx_hal::timer::TimRegister<TIM>::new::h8129c7ea1fc21b90>:
-    586c:      	sub	sp, #8
-    586e:      	add	sp, #8
-    5870:      	bx	lr
-
-00005872 <<va108xx_hal::timer::TimRegister<TIM> as va108xx_hal::timer::TimRegInterface>::tim_id::hdd92fdaabec6f342>:
-    5872:      	sub	sp, #4
-    5874:      	str	r0, [sp]
-    5876:      	movs	r0, #0
-    5878:      	add	sp, #4
-    587a:      	bx	lr
-
-0000587c <va108xx_hal::timer::enable_tim_clk::h0d5de409d850cbba>:
-    587c:      	push	{r7, lr}
-    587e:      	add	r7, sp, #0
-    5880:      	sub	sp, #96
-    5882:      	add	r2, sp, #8
-    5884:      	strb	r1, [r2]
-    5886:      	str	r0, [sp, #16]
-    5888:      	str	r0, [sp, #20]
-    588a:      	b	0x588c <va108xx_hal::timer::enable_tim_clk::h0d5de409d850cbba+0x10> @ imm = #-2
-    588c:      	add	r0, sp, #8
-    588e:      	str	r0, [sp, #12]
-    5890:      	ldr	r1, [sp, #12]
-    5892:      	str	r1, [sp]
-    5894:      	ldr	r0, [pc, #80] <$d.3>
-    5896:      	str	r0, [sp, #4]
-    5898:      	str	r0, [sp, #48]
-    589a:      	str	r1, [sp, #52]
-    589c:      	str	r0, [sp, #60]
-    589e:      	str	r0, [sp, #64]
-    58a0:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #10188
-    58a4:      	mov	r1, r0
-    58a6:      	ldr	r0, [sp]
-    58a8:      	str	r1, [sp, #56]
-    58aa:      	str	r1, [sp, #36]
-    58ac:      	ldr	r2, [sp, #36]
-    58ae:      	str	r2, [sp, #72]
-    58b0:      	str	r2, [sp, #68]
-    58b2:      	ldr	r2, [sp, #68]
-    58b4:      	str	r2, [sp, #32]
-    58b6:      	str	r1, [sp, #44]
-    58b8:      	ldr	r1, [sp, #44]
-    58ba:      	str	r1, [sp, #92]
-    58bc:      	str	r1, [sp, #88]
-    58be:      	ldr	r1, [sp, #88]
-    58c0:      	str	r1, [sp, #40]
-    58c2:      	add	r1, sp, #32
-    58c4:      	str	r1, [sp, #24]
-    58c6:      	add	r1, sp, #40
-    58c8:      	str	r1, [sp, #28]
-    58ca:      	ldr	r1, [sp, #24]
-    58cc:      	ldr	r2, [sp, #28]
-    58ce:      	bl	0x58ec <va108xx_hal::timer::enable_tim_clk::{{closure}}::h922d1b1ec2274d4e> @ imm = #26
-    58d2:      	mov	r1, r0
-    58d4:      	ldr	r0, [sp, #4]
-    58d6:      	ldr	r1, [r1]
-    58d8:      	str	r0, [sp, #76]
-    58da:      	str	r1, [sp, #80]
-    58dc:      	str	r0, [sp, #84]
-    58de:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #10146
-    58e2:      	b	0x58e4 <va108xx_hal::timer::enable_tim_clk::h0d5de409d850cbba+0x68> @ imm = #-2
-    58e4:      	add	sp, #96
-    58e6:      	pop	{r7, pc}
-
-000058e8 <$d.3>:
-    58e8:	74 00 00 40	.word	0x40000074
-
-000058ec <va108xx_hal::timer::enable_tim_clk::{{closure}}::h922d1b1ec2274d4e>:
-    58ec:      	push	{r7, lr}
-    58ee:      	add	r7, sp, #0
-    58f0:      	sub	sp, #64
-    58f2:      	str	r2, [sp, #12]
-    58f4:      	str	r1, [sp, #16]
-    58f6:      	str	r0, [sp, #20]
-    58f8:      	str	r0, [sp, #24]
-    58fa:      	str	r1, [sp, #28]
-    58fc:      	str	r2, [sp, #32]
-    58fe:      	str	r1, [sp, #36]
-    5900:      	b	0x5902 <va108xx_hal::timer::enable_tim_clk::{{closure}}::h922d1b1ec2274d4e+0x16> @ imm = #-2
-    5902:      	ldr	r0, [sp, #16]
-    5904:      	str	r0, [sp, #60]
-    5906:      	ldr	r0, [r0]
-    5908:      	str	r0, [sp, #8]
-    590a:      	b	0x590c <va108xx_hal::timer::enable_tim_clk::{{closure}}::h922d1b1ec2274d4e+0x20> @ imm = #-2
-    590c:      	ldr	r0, [sp, #20]
-    590e:      	ldrb	r0, [r0]
-    5910:      	movs	r1, #31
-    5912:      	mov	r2, r0
-    5914:      	ands	r2, r1
-    5916:      	movs	r1, #1
-    5918:      	lsls	r1, r2
-    591a:      	str	r1, [sp, #4]
-    591c:      	lsls	r0, r0, #24
-    591e:      	lsrs	r0, r0, #29
-    5920:      	cmp	r0, #0
-    5922:      	bne	0x593a <va108xx_hal::timer::enable_tim_clk::{{closure}}::h922d1b1ec2274d4e+0x4e> @ imm = #20
-    5924:      	b	0x5926 <va108xx_hal::timer::enable_tim_clk::{{closure}}::h922d1b1ec2274d4e+0x3a> @ imm = #-2
-    5926:      	ldr	r1, [sp, #12]
-    5928:      	ldr	r2, [sp, #4]
-    592a:      	ldr	r0, [sp, #8]
-    592c:      	orrs	r0, r2
-    592e:      	str	r1, [sp, #44]
-    5930:      	str	r0, [sp, #48]
-    5932:      	str	r1, [sp, #52]
-    5934:      	str	r0, [sp, #56]
-    5936:      	str	r0, [r1]
-    5938:      	b	0x5946 <va108xx_hal::timer::enable_tim_clk::{{closure}}::h922d1b1ec2274d4e+0x5a> @ imm = #10
-    593a:      	ldr	r0, [pc, #24] <$d.5+0x2>
-    593c:      	ldr	r2, [pc, #24] <$d.5+0x4>
-    593e:      	movs	r1, #35
-    5940:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #11268
-    5944:      	trap
-    5946:      	ldr	r0, [sp, #12]
-    5948:      	str	r0, [sp, #40]
-    594a:      	b	0x594c <va108xx_hal::timer::enable_tim_clk::{{closure}}::h922d1b1ec2274d4e+0x60> @ imm = #-2
-    594c:      	ldr	r0, [sp, #12]
-    594e:      	add	sp, #64
-    5950:      	pop	{r7, pc}
-    5952:      	mov	r8, r8
-
-00005954 <$d.5>:
-    5954:	b0 b1 00 00	.word	0x0000b1b0
-    5958:	94 b1 00 00	.word	0x0000b194
-
-0000595c <va108xx_hal::timer::CountDownTimer<TIM>::new::he96d9b88bcafd5a4>:
-    595c:      	push	{r7, lr}
-    595e:      	add	r7, sp, #0
-    5960:      	sub	sp, #120
-    5962:      	str	r2, [sp, #12]
-    5964:      	str	r1, [sp, #16]
-    5966:      	mov	r1, r0
-    5968:      	ldr	r0, [sp, #16]
-    596a:      	str	r1, [sp, #20]
-    596c:      	str	r0, [sp, #24]
-    596e:      	str	r2, [sp, #28]
-    5970:      	movs	r1, #0
-    5972:      	bl	0x587c <va108xx_hal::timer::enable_tim_clk::h0d5de409d850cbba> @ imm = #-250
-    5976:      	b	0x5978 <va108xx_hal::timer::CountDownTimer<TIM>::new::he96d9b88bcafd5a4+0x1c> @ imm = #-2
-    5978:      	bl	0x586c <va108xx_hal::timer::TimRegister<TIM>::new::h8129c7ea1fc21b90> @ imm = #-272
-    597c:      	b	0x597e <va108xx_hal::timer::CountDownTimer<TIM>::new::he96d9b88bcafd5a4+0x22> @ imm = #-2
-    597e:      	ldr	r0, [sp, #12]
-    5980:      	bl	0x5404 <<T as core::convert::Into<U>>::into::h190ece12f85867ec> @ imm = #-1408
-    5984:      	str	r0, [sp, #8]
-    5986:      	b	0x5988 <va108xx_hal::timer::CountDownTimer<TIM>::new::he96d9b88bcafd5a4+0x2c> @ imm = #-2
-    5988:      	movs	r0, #0
-    598a:      	bl	0x5434 <<u32 as va108xx_hal::time::U32Ext>::hz::h33770ef4926e0942> @ imm = #-1370
-    598e:      	str	r0, [sp, #4]
-    5990:      	b	0x5992 <va108xx_hal::timer::CountDownTimer<TIM>::new::he96d9b88bcafd5a4+0x36> @ imm = #-2
-    5992:      	ldr	r0, [sp, #20]
-    5994:      	ldr	r1, [sp, #8]
-    5996:      	ldr	r2, [sp, #4]
-    5998:      	str	r2, [r0]
-    599a:      	str	r1, [r0, #4]
-    599c:      	movs	r1, #0
-    599e:      	str	r1, [r0, #8]
-    59a0:      	str	r1, [r0, #12]
-    59a2:      	strb	r1, [r0, #16]
-    59a4:      	str	r0, [sp, #36]
-    59a6:      	bl	0x5872 <<va108xx_hal::timer::TimRegister<TIM> as va108xx_hal::timer::TimRegInterface>::tim_id::hdd92fdaabec6f342> @ imm = #-312
-    59aa:      	uxtb	r0, r0
-    59ac:      	ldr	r1, [pc, #92] <$d.7>
-    59ae:      	str	r1, [sp, #40]
-    59b0:      	str	r0, [sp, #44]
-    59b2:      	lsls	r0, r0, #12
-    59b4:      	adds	r0, r0, r1
-    59b6:      	str	r0, [sp, #48]
-    59b8:      	ldr	r0, [sp, #48]
-    59ba:      	str	r0, [sp]
-    59bc:      	b	0x59be <va108xx_hal::timer::CountDownTimer<TIM>::new::he96d9b88bcafd5a4+0x62> @ imm = #-2
-    59be:      	ldr	r0, [sp]
-    59c0:      	str	r0, [sp, #76]
-    59c2:      	str	r0, [sp, #84]
-    59c4:      	str	r0, [sp, #88]
-    59c6:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #9894
-    59ca:      	str	r0, [sp, #80]
-    59cc:      	str	r0, [sp, #64]
-    59ce:      	ldr	r1, [sp, #64]
-    59d0:      	str	r1, [sp, #96]
-    59d2:      	str	r1, [sp, #92]
-    59d4:      	ldr	r1, [sp, #92]
-    59d6:      	str	r1, [sp, #60]
-    59d8:      	str	r0, [sp, #72]
-    59da:      	ldr	r0, [sp, #72]
-    59dc:      	str	r0, [sp, #116]
-    59de:      	str	r0, [sp, #112]
-    59e0:      	ldr	r0, [sp, #112]
-    59e2:      	str	r0, [sp, #68]
-    59e4:      	add	r0, sp, #60
-    59e6:      	str	r0, [sp, #52]
-    59e8:      	add	r0, sp, #68
-    59ea:      	str	r0, [sp, #56]
-    59ec:      	ldr	r0, [sp, #52]
-    59ee:      	ldr	r1, [sp, #56]
-    59f0:      	bl	0x5a10 <va108xx_hal::timer::CountDownTimer<TIM>::new::{{closure}}::hbe6dc3c330118aa0> @ imm = #28
-    59f4:      	mov	r1, r0
-    59f6:      	ldr	r0, [sp]
-    59f8:      	ldr	r1, [r1]
-    59fa:      	str	r0, [sp, #100]
-    59fc:      	str	r1, [sp, #104]
-    59fe:      	str	r0, [sp, #108]
-    5a00:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #9856
-    5a04:      	b	0x5a06 <va108xx_hal::timer::CountDownTimer<TIM>::new::he96d9b88bcafd5a4+0xaa> @ imm = #-2
-    5a06:      	add	sp, #120
-    5a08:      	pop	{r7, pc}
-    5a0a:      	mov	r8, r8
-
-00005a0c <$d.7>:
-    5a0c:	00 00 02 40	.word	0x40020000
-
-00005a10 <va108xx_hal::timer::CountDownTimer<TIM>::new::{{closure}}::hbe6dc3c330118aa0>:
-    5a10:      	sub	sp, #48
-    5a12:      	str	r0, [sp, #8]
-    5a14:      	str	r1, [sp, #12]
-    5a16:      	str	r1, [sp, #20]
-    5a18:      	str	r1, [sp, #16]
-    5a1a:      	ldr	r0, [sp, #16]
-    5a1c:      	str	r0, [sp]
-    5a1e:      	b	0x5a20 <va108xx_hal::timer::CountDownTimer<TIM>::new::{{closure}}::hbe6dc3c330118aa0+0x10> @ imm = #-2
-    5a20:      	ldr	r1, [sp]
-    5a22:      	str	r1, [sp, #28]
-    5a24:      	str	r1, [sp, #32]
-    5a26:      	add	r0, sp, #36
-    5a28:      	movs	r2, #1
-    5a2a:      	strb	r2, [r0]
-    5a2c:      	str	r1, [sp, #40]
-    5a2e:      	ldr	r0, [r1]
-    5a30:      	str	r1, [sp, #44]
-    5a32:      	orrs	r0, r2
-    5a34:      	str	r0, [r1]
-    5a36:      	b	0x5a38 <va108xx_hal::timer::CountDownTimer<TIM>::new::{{closure}}::hbe6dc3c330118aa0+0x28> @ imm = #-2
-    5a38:      	ldr	r0, [sp]
-    5a3a:      	str	r0, [sp, #24]
-    5a3c:      	b	0x5a3e <va108xx_hal::timer::CountDownTimer<TIM>::new::{{closure}}::hbe6dc3c330118aa0+0x2e> @ imm = #-2
-    5a3e:      	ldr	r0, [sp]
-    5a40:      	add	sp, #48
-    5a42:      	bx	lr
-
-00005a44 <va108xx_hal::timer::CountDownTimer<TIM>::listen::hc59632b19b7e3f9f>:
-    5a44:      	push	{r4, r6, r7, lr}
-    5a46:      	add	r7, sp, #8
-    5a48:      	sub	sp, #184
-    5a4a:      	str	r2, [sp, #12]
-    5a4c:      	str	r1, [sp, #16]
-    5a4e:      	mov	r1, r0
-    5a50:      	ldr	r0, [sp, #16]
-    5a52:      	str	r1, [sp, #20]
-    5a54:      	add	r4, sp, #24
-    5a56:      	strh	r3, [r4]
-    5a58:      	str	r1, [sp, #36]
-    5a5a:      	str	r0, [sp, #44]
-    5a5c:      	str	r2, [sp, #48]
-    5a5e:      	add	r2, sp, #28
-    5a60:      	movs	r1, #21
-    5a62:      	strb	r1, [r2]
-    5a64:      	ldr	r1, [sp, #28]
-    5a66:      	bl	0x6370 <va108xx_hal::clock::enable_peripheral_clock::hd69be02d59fbba63> @ imm = #2310
-    5a6a:      	b	0x5a6c <va108xx_hal::timer::CountDownTimer<TIM>::listen::hc59632b19b7e3f9f+0x28> @ imm = #-2
-    5a6c:      	ldr	r0, [sp, #12]
-    5a6e:      	str	r0, [sp, #52]
-    5a70:      	b	0x5a72 <va108xx_hal::timer::CountDownTimer<TIM>::listen::hc59632b19b7e3f9f+0x2e> @ imm = #-2
-    5a72:      	b	0x5a74 <va108xx_hal::timer::CountDownTimer<TIM>::listen::hc59632b19b7e3f9f+0x30> @ imm = #-2
-    5a74:      	add	r0, sp, #24
-    5a76:      	str	r0, [sp, #32]
-    5a78:      	ldr	r0, [sp, #32]
-    5a7a:      	ldr	r1, [pc, #160] <$d.10+0x2>
-    5a7c:      	str	r1, [sp, #8]
-    5a7e:      	str	r1, [sp, #156]
-    5a80:      	str	r0, [sp, #160]
-    5a82:      	movs	r1, #0
-    5a84:      	mvns	r1, r1
-    5a86:      	str	r1, [sp, #152]
-    5a88:      	ldr	r1, [sp, #152]
-    5a8a:      	str	r1, [sp, #180]
-    5a8c:      	str	r1, [sp, #176]
-    5a8e:      	ldr	r1, [sp, #176]
-    5a90:      	str	r1, [sp, #148]
-    5a92:      	add	r1, sp, #148
-    5a94:      	str	r1, [sp, #144]
-    5a96:      	ldr	r1, [sp, #144]
-    5a98:      	bl	0x5b24 <va108xx_hal::timer::CountDownTimer<TIM>::listen::{{closure}}::h01d16808ef51ba4d> @ imm = #136
-    5a9c:      	mov	r1, r0
-    5a9e:      	ldr	r0, [sp, #8]
-    5aa0:      	ldr	r1, [r1]
-    5aa2:      	str	r0, [sp, #164]
-    5aa4:      	str	r1, [sp, #168]
-    5aa6:      	str	r0, [sp, #172]
-    5aa8:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #9688
-    5aac:      	b	0x5aae <va108xx_hal::timer::CountDownTimer<TIM>::listen::hc59632b19b7e3f9f+0x6a> @ imm = #-2
-    5aae:      	ldr	r0, [sp, #20]
-    5ab0:      	str	r0, [sp, #56]
-    5ab2:      	str	r0, [sp, #60]
-    5ab4:      	bl	0x5872 <<va108xx_hal::timer::TimRegister<TIM> as va108xx_hal::timer::TimRegInterface>::tim_id::hdd92fdaabec6f342> @ imm = #-582
-    5ab8:      	uxtb	r0, r0
-    5aba:      	ldr	r1, [pc, #100] <$d.10+0x6>
-    5abc:      	str	r1, [sp, #64]
-    5abe:      	str	r0, [sp, #68]
-    5ac0:      	lsls	r0, r0, #12
-    5ac2:      	adds	r0, r0, r1
-    5ac4:      	str	r0, [sp, #72]
-    5ac6:      	ldr	r0, [sp, #72]
-    5ac8:      	str	r0, [sp, #4]
-    5aca:      	str	r0, [sp, #100]
-    5acc:      	str	r0, [sp, #108]
-    5ace:      	str	r0, [sp, #112]
-    5ad0:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #9628
-    5ad4:      	str	r0, [sp, #104]
-    5ad6:      	str	r0, [sp, #88]
-    5ad8:      	ldr	r1, [sp, #88]
-    5ada:      	str	r1, [sp, #120]
-    5adc:      	str	r1, [sp, #116]
-    5ade:      	ldr	r1, [sp, #116]
-    5ae0:      	str	r1, [sp, #84]
-    5ae2:      	str	r0, [sp, #96]
-    5ae4:      	ldr	r0, [sp, #96]
-    5ae6:      	str	r0, [sp, #140]
-    5ae8:      	str	r0, [sp, #136]
-    5aea:      	ldr	r0, [sp, #136]
-    5aec:      	str	r0, [sp, #92]
-    5aee:      	add	r0, sp, #84
-    5af0:      	str	r0, [sp, #76]
-    5af2:      	add	r0, sp, #92
-    5af4:      	str	r0, [sp, #80]
-    5af6:      	ldr	r0, [sp, #76]
-    5af8:      	ldr	r1, [sp, #80]
-    5afa:      	bl	0x5b46 <va108xx_hal::timer::CountDownTimer<TIM>::enable_interrupt::{{closure}}::h8111bf651a29ef17> @ imm = #72
-    5afe:      	mov	r1, r0
-    5b00:      	ldr	r0, [sp, #4]
-    5b02:      	ldr	r1, [r1]
-    5b04:      	str	r0, [sp, #124]
-    5b06:      	str	r1, [sp, #128]
-    5b08:      	str	r0, [sp, #132]
-    5b0a:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #9590
-    5b0e:      	b	0x5b10 <va108xx_hal::timer::CountDownTimer<TIM>::listen::hc59632b19b7e3f9f+0xcc> @ imm = #-2
-    5b10:      	ldr	r1, [sp, #20]
-    5b12:      	movs	r0, #1
-    5b14:      	strb	r0, [r1, #16]
-    5b16:      	add	sp, #184
-    5b18:      	pop	{r4, r6, r7, pc}
-    5b1a:      	mov	r8, r8
-
-00005b1c <$d.10>:
-    5b1c:	00 11 00 40	.word	0x40001100
-    5b20:	00 00 02 40	.word	0x40020000
-
-00005b24 <va108xx_hal::timer::CountDownTimer<TIM>::listen::{{closure}}::h01d16808ef51ba4d>:
-    5b24:      	sub	sp, #32
-    5b26:      	str	r1, [sp]
-    5b28:      	str	r0, [sp, #4]
-    5b2a:      	str	r1, [sp, #8]
-    5b2c:      	ldrh	r0, [r0]
-    5b2e:      	str	r1, [sp, #12]
-    5b30:      	str	r0, [sp, #16]
-    5b32:      	str	r1, [sp, #20]
-    5b34:      	str	r0, [sp, #24]
-    5b36:      	str	r0, [r1]
-    5b38:      	b	0x5b3a <va108xx_hal::timer::CountDownTimer<TIM>::listen::{{closure}}::h01d16808ef51ba4d+0x16> @ imm = #-2
-    5b3a:      	ldr	r0, [sp]
-    5b3c:      	str	r0, [sp, #28]
-    5b3e:      	b	0x5b40 <va108xx_hal::timer::CountDownTimer<TIM>::listen::{{closure}}::h01d16808ef51ba4d+0x1c> @ imm = #-2
-    5b40:      	ldr	r0, [sp]
-    5b42:      	add	sp, #32
-    5b44:      	bx	lr
-
-00005b46 <va108xx_hal::timer::CountDownTimer<TIM>::enable_interrupt::{{closure}}::h8111bf651a29ef17>:
-    5b46:      	sub	sp, #48
-    5b48:      	str	r0, [sp, #8]
-    5b4a:      	str	r1, [sp, #12]
-    5b4c:      	str	r1, [sp, #20]
-    5b4e:      	str	r1, [sp, #16]
-    5b50:      	ldr	r0, [sp, #16]
-    5b52:      	str	r0, [sp]
-    5b54:      	b	0x5b56 <va108xx_hal::timer::CountDownTimer<TIM>::enable_interrupt::{{closure}}::h8111bf651a29ef17+0x10> @ imm = #-2
-    5b56:      	ldr	r1, [sp]
-    5b58:      	str	r1, [sp, #28]
-    5b5a:      	str	r1, [sp, #32]
-    5b5c:      	add	r2, sp, #36
-    5b5e:      	movs	r0, #1
-    5b60:      	strb	r0, [r2]
-    5b62:      	str	r1, [sp, #40]
-    5b64:      	ldr	r0, [r1]
-    5b66:      	str	r1, [sp, #44]
-    5b68:      	movs	r2, #16
-    5b6a:      	orrs	r0, r2
-    5b6c:      	str	r0, [r1]
-    5b6e:      	b	0x5b70 <va108xx_hal::timer::CountDownTimer<TIM>::enable_interrupt::{{closure}}::h8111bf651a29ef17+0x2a> @ imm = #-2
-    5b70:      	ldr	r0, [sp]
-    5b72:      	str	r0, [sp, #24]
-    5b74:      	b	0x5b76 <va108xx_hal::timer::CountDownTimer<TIM>::enable_interrupt::{{closure}}::h8111bf651a29ef17+0x30> @ imm = #-2
-    5b76:      	ldr	r0, [sp]
-    5b78:      	add	sp, #48
-    5b7a:      	bx	lr
-
-00005b7c <va108xx_hal::timer::CountDownTimer<TIM>::load::hd1333ac2182e88cb>:
-    5b7c:      	push	{r7, lr}
-    5b7e:      	add	r7, sp, #0
-    5b80:      	sub	sp, #256
-    5b82:      	str	r1, [sp, #32]
-    5b84:      	str	r0, [sp, #36]
-    5b86:      	str	r0, [sp, #52]
-    5b88:      	str	r1, [sp, #56]
-    5b8a:      	str	r0, [sp, #60]
-    5b8c:      	bl	0x5872 <<va108xx_hal::timer::TimRegister<TIM> as va108xx_hal::timer::TimRegInterface>::tim_id::hdd92fdaabec6f342> @ imm = #-798
-    5b90:      	uxtb	r0, r0
-    5b92:      	ldr	r1, [pc, #324] <$d.14+0x2>
-    5b94:      	str	r1, [sp, #64]
-    5b96:      	str	r0, [sp, #68]
-    5b98:      	lsls	r0, r0, #12
-    5b9a:      	adds	r0, r0, r1
-    5b9c:      	str	r0, [sp, #72]
-    5b9e:      	ldr	r0, [sp, #72]
-    5ba0:      	str	r0, [sp, #40]
-    5ba2:      	b	0x5ba4 <va108xx_hal::timer::CountDownTimer<TIM>::load::hd1333ac2182e88cb+0x28> @ imm = #-2
-    5ba4:      	ldr	r0, [sp, #40]
-    5ba6:      	str	r0, [sp, #100]
-    5ba8:      	str	r0, [sp, #108]
-    5baa:      	str	r0, [sp, #112]
-    5bac:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #9408
-    5bb0:      	str	r0, [sp, #104]
-    5bb2:      	str	r0, [sp, #88]
-    5bb4:      	ldr	r1, [sp, #88]
-    5bb6:      	str	r1, [sp, #120]
-    5bb8:      	str	r1, [sp, #116]
-    5bba:      	ldr	r1, [sp, #116]
-    5bbc:      	str	r1, [sp, #84]
-    5bbe:      	str	r0, [sp, #96]
-    5bc0:      	ldr	r0, [sp, #96]
-    5bc2:      	str	r0, [sp, #140]
-    5bc4:      	str	r0, [sp, #136]
-    5bc6:      	ldr	r0, [sp, #136]
-    5bc8:      	str	r0, [sp, #92]
-    5bca:      	add	r0, sp, #84
-    5bcc:      	str	r0, [sp, #76]
-    5bce:      	add	r0, sp, #92
-    5bd0:      	str	r0, [sp, #80]
-    5bd2:      	ldr	r0, [sp, #76]
-    5bd4:      	ldr	r1, [sp, #80]
-    5bd6:      	bl	0x5ce4 <va108xx_hal::timer::CountDownTimer<TIM>::load::{{closure}}::h4c1a1202297ac82a> @ imm = #266
-    5bda:      	mov	r1, r0
-    5bdc:      	ldr	r0, [sp, #40]
-    5bde:      	ldr	r1, [r1]
-    5be0:      	str	r0, [sp, #124]
-    5be2:      	str	r1, [sp, #128]
-    5be4:      	str	r0, [sp, #132]
-    5be6:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #9370
-    5bea:      	b	0x5bec <va108xx_hal::timer::CountDownTimer<TIM>::load::hd1333ac2182e88cb+0x70> @ imm = #-2
-    5bec:      	ldr	r0, [sp, #32]
-    5bee:      	bl	0x5404 <<T as core::convert::Into<U>>::into::h190ece12f85867ec> @ imm = #-2030
-    5bf2:      	str	r0, [sp, #28]
-    5bf4:      	b	0x5bf6 <va108xx_hal::timer::CountDownTimer<TIM>::load::hd1333ac2182e88cb+0x7a> @ imm = #-2
-    5bf6:      	ldr	r0, [sp, #36]
-    5bf8:      	ldr	r1, [sp, #28]
-    5bfa:      	str	r1, [r0]
-    5bfc:      	ldr	r1, [r0, #4]
-    5bfe:      	str	r1, [sp, #20]
-    5c00:      	ldr	r0, [r0]
-    5c02:      	str	r0, [sp, #24]
-    5c04:      	cmp	r0, #0
-    5c06:      	beq	0x5c32 <va108xx_hal::timer::CountDownTimer<TIM>::load::hd1333ac2182e88cb+0xb6> @ imm = #40
-    5c08:      	b	0x5c0a <va108xx_hal::timer::CountDownTimer<TIM>::load::hd1333ac2182e88cb+0x8e> @ imm = #-2
-    5c0a:      	ldr	r1, [sp, #24]
-    5c0c:      	ldr	r0, [sp, #20]
-    5c0e:      	bl	0xa5b6 <__aeabi_uidiv>  @ imm = #18852
-    5c12:      	mov	r1, r0
-    5c14:      	ldr	r0, [sp, #36]
-    5c16:      	str	r1, [r0, #8]
-    5c18:      	str	r0, [sp, #144]
-    5c1a:      	bl	0x5872 <<va108xx_hal::timer::TimRegister<TIM> as va108xx_hal::timer::TimRegInterface>::tim_id::hdd92fdaabec6f342> @ imm = #-940
-    5c1e:      	uxtb	r0, r0
-    5c20:      	ldr	r1, [pc, #180] <$d.14>
-    5c22:      	str	r1, [sp, #148]
-    5c24:      	str	r0, [sp, #152]
-    5c26:      	lsls	r0, r0, #12
-    5c28:      	adds	r0, r0, r1
-    5c2a:      	str	r0, [sp, #156]
-    5c2c:      	ldr	r0, [sp, #156]
-    5c2e:      	str	r0, [sp, #16]
-    5c30:      	b	0x5c3e <va108xx_hal::timer::CountDownTimer<TIM>::load::hd1333ac2182e88cb+0xc2> @ imm = #10
-    5c32:      	ldr	r0, [pc, #168] <$d.14+0x6>
-    5c34:      	ldr	r2, [pc, #168] <$d.14+0x8>
-    5c36:      	movs	r1, #25
-    5c38:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #10508
-    5c3c:      	trap
-    5c3e:      	ldr	r0, [sp, #36]
-    5c40:      	ldr	r1, [sp, #16]
-    5c42:      	adds	r1, r1, #4
-    5c44:      	str	r1, [sp, #12]
-    5c46:      	adds	r0, #8
-    5c48:      	str	r0, [sp, #44]
-    5c4a:      	ldr	r0, [sp, #44]
-    5c4c:      	str	r1, [sp, #172]
-    5c4e:      	str	r0, [sp, #176]
-    5c50:      	movs	r1, #0
-    5c52:      	str	r1, [sp, #168]
-    5c54:      	ldr	r1, [sp, #168]
-    5c56:      	str	r1, [sp, #196]
-    5c58:      	str	r1, [sp, #192]
-    5c5a:      	ldr	r1, [sp, #192]
-    5c5c:      	str	r1, [sp, #164]
-    5c5e:      	add	r1, sp, #164
-    5c60:      	str	r1, [sp, #160]
-    5c62:      	ldr	r1, [sp, #160]
-    5c64:      	bl	0x5d1a <va108xx_hal::timer::CountDownTimer<TIM>::load::{{closure}}::h38a7aa2e0a25dc72> @ imm = #178
-    5c68:      	mov	r1, r0
-    5c6a:      	ldr	r0, [sp, #12]
-    5c6c:      	ldr	r1, [r1]
-    5c6e:      	str	r0, [sp, #180]
-    5c70:      	str	r1, [sp, #184]
-    5c72:      	str	r0, [sp, #188]
-    5c74:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #9228
-    5c78:      	b	0x5c7a <va108xx_hal::timer::CountDownTimer<TIM>::load::hd1333ac2182e88cb+0xfe> @ imm = #-2
-    5c7a:      	ldr	r0, [sp, #36]
-    5c7c:      	str	r0, [sp, #200]
-    5c7e:      	bl	0x5872 <<va108xx_hal::timer::TimRegister<TIM> as va108xx_hal::timer::TimRegInterface>::tim_id::hdd92fdaabec6f342> @ imm = #-1040
-    5c82:      	uxtb	r0, r0
-    5c84:      	ldr	r1, [pc, #80] <$d.14>
-    5c86:      	str	r1, [sp, #204]
-    5c88:      	str	r0, [sp, #208]
-    5c8a:      	lsls	r0, r0, #12
-    5c8c:      	adds	r0, r0, r1
-    5c8e:      	str	r0, [sp, #212]
-    5c90:      	ldr	r0, [sp, #212]
-    5c92:      	str	r0, [sp, #8]
-    5c94:      	b	0x5c96 <va108xx_hal::timer::CountDownTimer<TIM>::load::hd1333ac2182e88cb+0x11a> @ imm = #-2
-    5c96:      	ldr	r0, [sp, #36]
-    5c98:      	ldr	r1, [sp, #8]
-    5c9a:      	adds	r1, #8
-    5c9c:      	str	r1, [sp, #4]
-    5c9e:      	adds	r0, #8
-    5ca0:      	str	r0, [sp, #48]
-    5ca2:      	ldr	r0, [sp, #48]
-    5ca4:      	str	r1, [sp, #228]
-    5ca6:      	str	r0, [sp, #232]
-    5ca8:      	movs	r1, #0
-    5caa:      	str	r1, [sp, #224]
-    5cac:      	ldr	r1, [sp, #224]
-    5cae:      	str	r1, [sp, #252]
-    5cb0:      	str	r1, [sp, #248]
-    5cb2:      	ldr	r1, [sp, #248]
-    5cb4:      	str	r1, [sp, #220]
-    5cb6:      	add	r1, sp, #220
-    5cb8:      	str	r1, [sp, #216]
-    5cba:      	ldr	r1, [sp, #216]
-    5cbc:      	bl	0x5d3c <va108xx_hal::timer::CountDownTimer<TIM>::load::{{closure}}::h4424d9b65696bfbd> @ imm = #124
-    5cc0:      	mov	r1, r0
-    5cc2:      	ldr	r0, [sp, #4]
-    5cc4:      	ldr	r1, [r1]
-    5cc6:      	str	r0, [sp, #236]
-    5cc8:      	str	r1, [sp, #240]
-    5cca:      	str	r0, [sp, #244]
-    5ccc:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #9140
-    5cd0:      	b	0x5cd2 <va108xx_hal::timer::CountDownTimer<TIM>::load::hd1333ac2182e88cb+0x156> @ imm = #-2
-    5cd2:      	add	sp, #256
-    5cd4:      	pop	{r7, pc}
-    5cd6:      	mov	r8, r8
-
-00005cd8 <$d.14>:
-    5cd8:	00 00 02 40	.word	0x40020000
-    5cdc:	f0 b1 00 00	.word	0x0000b1f0
-    5ce0:	d4 b1 00 00	.word	0x0000b1d4
-
-00005ce4 <va108xx_hal::timer::CountDownTimer<TIM>::load::{{closure}}::h4c1a1202297ac82a>:
-    5ce4:      	sub	sp, #48
-    5ce6:      	str	r0, [sp, #8]
-    5ce8:      	str	r1, [sp, #12]
-    5cea:      	str	r1, [sp, #20]
-    5cec:      	str	r1, [sp, #16]
-    5cee:      	ldr	r0, [sp, #16]
-    5cf0:      	str	r0, [sp]
-    5cf2:      	b	0x5cf4 <va108xx_hal::timer::CountDownTimer<TIM>::load::{{closure}}::h4c1a1202297ac82a+0x10> @ imm = #-2
-    5cf4:      	ldr	r1, [sp]
-    5cf6:      	str	r1, [sp, #28]
-    5cf8:      	str	r1, [sp, #32]
-    5cfa:      	add	r2, sp, #36
-    5cfc:      	movs	r0, #0
-    5cfe:      	strb	r0, [r2]
-    5d00:      	str	r1, [sp, #40]
-    5d02:      	ldr	r0, [r1]
-    5d04:      	movs	r2, #1
-    5d06:      	bics	r0, r2
-    5d08:      	str	r1, [sp, #44]
-    5d0a:      	str	r0, [r1]
-    5d0c:      	b	0x5d0e <va108xx_hal::timer::CountDownTimer<TIM>::load::{{closure}}::h4c1a1202297ac82a+0x2a> @ imm = #-2
-    5d0e:      	ldr	r0, [sp]
-    5d10:      	str	r0, [sp, #24]
-    5d12:      	b	0x5d14 <va108xx_hal::timer::CountDownTimer<TIM>::load::{{closure}}::h4c1a1202297ac82a+0x30> @ imm = #-2
-    5d14:      	ldr	r0, [sp]
-    5d16:      	add	sp, #48
-    5d18:      	bx	lr
-
-00005d1a <va108xx_hal::timer::CountDownTimer<TIM>::load::{{closure}}::h38a7aa2e0a25dc72>:
-    5d1a:      	sub	sp, #32
-    5d1c:      	str	r1, [sp]
-    5d1e:      	str	r0, [sp, #4]
-    5d20:      	str	r1, [sp, #8]
-    5d22:      	ldr	r0, [r0]
-    5d24:      	str	r1, [sp, #12]
-    5d26:      	str	r0, [sp, #16]
-    5d28:      	str	r1, [sp, #20]
-    5d2a:      	str	r0, [sp, #24]
-    5d2c:      	str	r0, [r1]
-    5d2e:      	b	0x5d30 <va108xx_hal::timer::CountDownTimer<TIM>::load::{{closure}}::h38a7aa2e0a25dc72+0x16> @ imm = #-2
-    5d30:      	ldr	r0, [sp]
-    5d32:      	str	r0, [sp, #28]
-    5d34:      	b	0x5d36 <va108xx_hal::timer::CountDownTimer<TIM>::load::{{closure}}::h38a7aa2e0a25dc72+0x1c> @ imm = #-2
-    5d36:      	ldr	r0, [sp]
-    5d38:      	add	sp, #32
-    5d3a:      	bx	lr
-
-00005d3c <va108xx_hal::timer::CountDownTimer<TIM>::load::{{closure}}::h4424d9b65696bfbd>:
-    5d3c:      	sub	sp, #32
-    5d3e:      	str	r1, [sp]
-    5d40:      	str	r0, [sp, #4]
-    5d42:      	str	r1, [sp, #8]
-    5d44:      	ldr	r0, [r0]
-    5d46:      	str	r1, [sp, #12]
-    5d48:      	str	r0, [sp, #16]
-    5d4a:      	str	r1, [sp, #20]
-    5d4c:      	str	r0, [sp, #24]
-    5d4e:      	str	r0, [r1]
-    5d50:      	b	0x5d52 <va108xx_hal::timer::CountDownTimer<TIM>::load::{{closure}}::h4424d9b65696bfbd+0x16> @ imm = #-2
-    5d52:      	ldr	r0, [sp]
-    5d54:      	str	r0, [sp, #28]
-    5d56:      	b	0x5d58 <va108xx_hal::timer::CountDownTimer<TIM>::load::{{closure}}::h4424d9b65696bfbd+0x1c> @ imm = #-2
-    5d58:      	ldr	r0, [sp]
-    5d5a:      	add	sp, #32
-    5d5c:      	bx	lr
-
-00005d5e <va108xx_hal::timer::CountDownTimer<TIM>::enable::{{closure}}::h0dc898f474daad58>:
-    5d5e:      	sub	sp, #48
-    5d60:      	str	r0, [sp, #8]
-    5d62:      	str	r1, [sp, #12]
-    5d64:      	str	r1, [sp, #20]
-    5d66:      	str	r1, [sp, #16]
-    5d68:      	ldr	r0, [sp, #16]
-    5d6a:      	str	r0, [sp]
-    5d6c:      	b	0x5d6e <va108xx_hal::timer::CountDownTimer<TIM>::enable::{{closure}}::h0dc898f474daad58+0x10> @ imm = #-2
-    5d6e:      	ldr	r1, [sp]
-    5d70:      	str	r1, [sp, #28]
-    5d72:      	str	r1, [sp, #32]
-    5d74:      	add	r0, sp, #36
-    5d76:      	movs	r2, #1
-    5d78:      	strb	r2, [r0]
-    5d7a:      	str	r1, [sp, #40]
-    5d7c:      	ldr	r0, [r1]
-    5d7e:      	str	r1, [sp, #44]
-    5d80:      	orrs	r0, r2
-    5d82:      	str	r0, [r1]
-    5d84:      	b	0x5d86 <va108xx_hal::timer::CountDownTimer<TIM>::enable::{{closure}}::h0dc898f474daad58+0x28> @ imm = #-2
-    5d86:      	ldr	r0, [sp]
-    5d88:      	str	r0, [sp, #24]
-    5d8a:      	b	0x5d8c <va108xx_hal::timer::CountDownTimer<TIM>::enable::{{closure}}::h0dc898f474daad58+0x2e> @ imm = #-2
-    5d8c:      	ldr	r0, [sp]
-    5d8e:      	add	sp, #48
-    5d90:      	bx	lr
-
-00005d92 <va108xx_hal::timer::CountDownTimer<TIM>::curr_freq::hfc4843a0b17e21c1>:
-    5d92:      	sub	sp, #4
-    5d94:      	str	r0, [sp]
-    5d96:      	ldr	r0, [r0]
-    5d98:      	add	sp, #4
-    5d9a:      	bx	lr
-
-00005d9c <va108xx_hal::timer::CountDownTimer<TIM>::listening::hc887461eddcc0b5f>:
-    5d9c:      	sub	sp, #4
-    5d9e:      	str	r0, [sp]
-    5da0:      	ldrb	r0, [r0, #16]
-    5da2:      	add	sp, #4
-    5da4:      	bx	lr
-    5da6:      	bmi	0x5d52 <va108xx_hal::timer::CountDownTimer<TIM>::load::{{closure}}::h4424d9b65696bfbd+0x16> @ imm = #-88
-
-00005da8 <<va108xx_hal::timer::CountDownTimer<TIM> as embedded_hal::timer::CountDown>::start::h76c10a1bc73ae5fb>:
-    5da8:      	push	{r7, lr}
-    5daa:      	add	r7, sp, #0
-    5dac:      	sub	sp, #104
-    5dae:      	str	r0, [sp, #4]
-    5db0:      	str	r0, [sp, #8]
-    5db2:      	str	r1, [sp, #12]
-    5db4:      	bl	0x5b7c <va108xx_hal::timer::CountDownTimer<TIM>::load::hd1333ac2182e88cb> @ imm = #-572
-    5db8:      	b	0x5dba <<va108xx_hal::timer::CountDownTimer<TIM> as embedded_hal::timer::CountDown>::start::h76c10a1bc73ae5fb+0x12> @ imm = #-2
-    5dba:      	ldr	r0, [sp, #4]
-    5dbc:      	str	r0, [sp, #16]
-    5dbe:      	str	r0, [sp, #20]
-    5dc0:      	bl	0x5872 <<va108xx_hal::timer::TimRegister<TIM> as va108xx_hal::timer::TimRegInterface>::tim_id::hdd92fdaabec6f342> @ imm = #-1362
-    5dc4:      	uxtb	r0, r0
-    5dc6:      	ldr	r1, [pc, #88] <$d.22+0x2>
-    5dc8:      	str	r1, [sp, #24]
-    5dca:      	str	r0, [sp, #28]
-    5dcc:      	lsls	r0, r0, #12
-    5dce:      	adds	r0, r0, r1
-    5dd0:      	str	r0, [sp, #32]
-    5dd2:      	ldr	r0, [sp, #32]
-    5dd4:      	str	r0, [sp]
-    5dd6:      	str	r0, [sp, #60]
-    5dd8:      	str	r0, [sp, #68]
-    5dda:      	str	r0, [sp, #72]
-    5ddc:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #8848
-    5de0:      	str	r0, [sp, #64]
-    5de2:      	str	r0, [sp, #48]
-    5de4:      	ldr	r1, [sp, #48]
-    5de6:      	str	r1, [sp, #80]
-    5de8:      	str	r1, [sp, #76]
-    5dea:      	ldr	r1, [sp, #76]
-    5dec:      	str	r1, [sp, #44]
-    5dee:      	str	r0, [sp, #56]
-    5df0:      	ldr	r0, [sp, #56]
-    5df2:      	str	r0, [sp, #100]
-    5df4:      	str	r0, [sp, #96]
-    5df6:      	ldr	r0, [sp, #96]
-    5df8:      	str	r0, [sp, #52]
-    5dfa:      	add	r0, sp, #44
-    5dfc:      	str	r0, [sp, #36]
-    5dfe:      	add	r0, sp, #52
-    5e00:      	str	r0, [sp, #40]
-    5e02:      	ldr	r0, [sp, #36]
-    5e04:      	ldr	r1, [sp, #40]
-    5e06:      	bl	0x5d5e <va108xx_hal::timer::CountDownTimer<TIM>::enable::{{closure}}::h0dc898f474daad58> @ imm = #-172
-    5e0a:      	mov	r1, r0
-    5e0c:      	ldr	r0, [sp]
-    5e0e:      	ldr	r1, [r1]
-    5e10:      	str	r0, [sp, #84]
-    5e12:      	str	r1, [sp, #88]
-    5e14:      	str	r0, [sp, #92]
-    5e16:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #8810
-    5e1a:      	b	0x5e1c <<va108xx_hal::timer::CountDownTimer<TIM> as embedded_hal::timer::CountDown>::start::h76c10a1bc73ae5fb+0x74> @ imm = #-2
-    5e1c:      	add	sp, #104
-    5e1e:      	pop	{r7, pc}
-
-00005e20 <$d.22>:
-    5e20:	00 00 02 40	.word	0x40020000
-
-00005e24 <va108xx_hal::timer::set_up_ms_timer::h5f530a05457f7283>:
-    5e24:      	push	{r4, r6, r7, lr}
-    5e26:      	add	r7, sp, #8
-    5e28:      	sub	sp, #48
-    5e2a:      	str	r3, [sp, #4]
-    5e2c:      	mov	r4, r2
-    5e2e:      	ldr	r2, [sp, #4]
-    5e30:      	str	r4, [sp, #8]
-    5e32:      	str	r1, [sp, #12]
-    5e34:      	str	r0, [sp, #16]
-    5e36:      	ldr	r3, [r7, #8]
-    5e38:      	str	r3, [sp, #20]
-    5e3a:      	str	r1, [sp, #28]
-    5e3c:      	str	r4, [sp, #32]
-    5e3e:      	str	r2, [sp, #36]
-    5e40:      	add	r4, sp, #44
-    5e42:      	strh	r3, [r4]
-    5e44:      	bl	0x595c <va108xx_hal::timer::CountDownTimer<TIM>::new::he96d9b88bcafd5a4> @ imm = #-1260
-    5e48:      	b	0x5e4a <va108xx_hal::timer::set_up_ms_timer::h5f530a05457f7283+0x26> @ imm = #-2
-    5e4a:      	ldr	r3, [sp, #20]
-    5e4c:      	ldr	r2, [sp, #8]
-    5e4e:      	ldr	r1, [sp, #12]
-    5e50:      	ldr	r0, [sp, #16]
-    5e52:      	bl	0x5a44 <va108xx_hal::timer::CountDownTimer<TIM>::listen::hc59632b19b7e3f9f> @ imm = #-1042
-    5e56:      	b	0x5e58 <va108xx_hal::timer::set_up_ms_timer::h5f530a05457f7283+0x34> @ imm = #-2
-    5e58:      	movs	r0, #125
-    5e5a:      	lsls	r0, r0, #3
-    5e5c:      	bl	0x5434 <<u32 as va108xx_hal::time::U32Ext>::hz::h33770ef4926e0942> @ imm = #-2604
-    5e60:      	str	r0, [sp]
-    5e62:      	b	0x5e64 <va108xx_hal::timer::set_up_ms_timer::h5f530a05457f7283+0x40> @ imm = #-2
-    5e64:      	ldr	r1, [sp]
-    5e66:      	ldr	r0, [sp, #16]
-    5e68:      	bl	0x5da8 <<va108xx_hal::timer::CountDownTimer<TIM> as embedded_hal::timer::CountDown>::start::h76c10a1bc73ae5fb> @ imm = #-196
-    5e6c:      	b	0x5e6e <va108xx_hal::timer::set_up_ms_timer::h5f530a05457f7283+0x4a> @ imm = #-2
-    5e6e:      	add	sp, #48
-    5e70:      	pop	{r4, r6, r7, pc}
-
-00005e72 <va108xx_hal::timer::default_ms_irq_handler::h04184af176254ced>:
-    5e72:      	push	{r7, lr}
-    5e74:      	add	r7, sp, #0
-    5e76:      	bl	0x5570 <cortex_m::interrupt::free::h530d5eb12665b755> @ imm = #-2314
-    5e7a:      	b	0x5e7c <va108xx_hal::timer::default_ms_irq_handler::h04184af176254ced+0xa> @ imm = #-2
-    5e7c:      	pop	{r7, pc}
-    5e7e:      	bmi	0x5e2a <va108xx_hal::timer::set_up_ms_timer::h5f530a05457f7283+0x6> @ imm = #-88
-
-00005e80 <va108xx_hal::timer::default_ms_irq_handler::{{closure}}::hf428cc36c45f8437>:
-    5e80:      	push	{r7, lr}
-    5e82:      	add	r7, sp, #0
-    5e84:      	sub	sp, #32
-    5e86:      	mov	r1, r0
-    5e88:      	str	r1, [sp, #12]
-    5e8a:      	str	r1, [sp, #28]
-    5e8c:      	ldr	r0, [pc, #72] <$d.26>
-    5e8e:      	bl	0x5328 <bare_metal::Mutex<T>::borrow::h675ff40daa9acaa7> @ imm = #-2922
-    5e92:      	str	r0, [sp, #16]
-    5e94:      	b	0x5e96 <va108xx_hal::timer::default_ms_irq_handler::{{closure}}::hf428cc36c45f8437+0x16> @ imm = #-2
-    5e96:      	ldr	r0, [sp, #16]
-    5e98:      	bl	0x6448 <core::cell::Cell<T>::get::h3ca00346260f8619> @ imm = #1452
-    5e9c:      	str	r0, [sp, #20]
-    5e9e:      	b	0x5ea0 <va108xx_hal::timer::default_ms_irq_handler::{{closure}}::hf428cc36c45f8437+0x20> @ imm = #-2
-    5ea0:      	ldr	r1, [sp, #20]
-    5ea2:      	adds	r0, r1, #1
-    5ea4:      	str	r0, [sp, #8]
-    5ea6:      	cmp	r0, r1
-    5ea8:      	blo	0x5ebc <va108xx_hal::timer::default_ms_irq_handler::{{closure}}::hf428cc36c45f8437+0x3c> @ imm = #16
-    5eaa:      	b	0x5eac <va108xx_hal::timer::default_ms_irq_handler::{{closure}}::hf428cc36c45f8437+0x2c> @ imm = #-2
-    5eac:      	ldr	r1, [sp, #12]
-    5eae:      	ldr	r0, [sp, #8]
-    5eb0:      	str	r0, [sp, #20]
-    5eb2:      	ldr	r0, [pc, #36] <$d.26+0x2>
-    5eb4:      	bl	0x5328 <bare_metal::Mutex<T>::borrow::h675ff40daa9acaa7> @ imm = #-2960
-    5eb8:      	str	r0, [sp, #4]
-    5eba:      	b	0x5ec8 <va108xx_hal::timer::default_ms_irq_handler::{{closure}}::hf428cc36c45f8437+0x48> @ imm = #10
-    5ebc:      	ldr	r0, [pc, #28] <$d.26+0x4>
-    5ebe:      	ldr	r2, [pc, #32] <$d.26+0xa>
-    5ec0:      	movs	r1, #28
-    5ec2:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #9858
-    5ec6:      	trap
-    5ec8:      	ldr	r0, [sp, #4]
-    5eca:      	ldr	r1, [sp, #20]
-    5ecc:      	bl	0x645a <core::cell::Cell<T>::set::h7018ce74618b823a> @ imm = #1418
-    5ed0:      	b	0x5ed2 <va108xx_hal::timer::default_ms_irq_handler::{{closure}}::hf428cc36c45f8437+0x52> @ imm = #-2
-    5ed2:      	add	sp, #32
-    5ed4:      	pop	{r7, pc}
-    5ed6:      	mov	r8, r8
-
-00005ed8 <$d.26>:
-    5ed8:	30 04 00 10	.word	0x10000430
-    5edc:	20 b2 00 00	.word	0x0000b220
-    5ee0:	0c b2 00 00	.word	0x0000b20c
-
-00005ee4 <va108xx_hal::timer::get_ms_ticks::h99acc7fb8306fa26>:
-    5ee4:      	push	{r7, lr}
-    5ee6:      	add	r7, sp, #0
-    5ee8:      	sub	sp, #8
-    5eea:      	bl	0x55be <cortex_m::interrupt::free::h5a918748642e58b0> @ imm = #-2352
-    5eee:      	str	r0, [sp, #4]
-    5ef0:      	b	0x5ef2 <va108xx_hal::timer::get_ms_ticks::h99acc7fb8306fa26+0xe> @ imm = #-2
-    5ef2:      	ldr	r0, [sp, #4]
-    5ef4:      	add	sp, #8
-    5ef6:      	pop	{r7, pc}
-
-00005ef8 <va108xx_hal::timer::get_ms_ticks::{{closure}}::hcb223fcc8c1afe4c>:
-    5ef8:      	push	{r7, lr}
-    5efa:      	add	r7, sp, #0
-    5efc:      	sub	sp, #16
-    5efe:      	mov	r1, r0
-    5f00:      	str	r1, [sp, #12]
-    5f02:      	ldr	r0, [pc, #24] <$d.29+0x2>
-    5f04:      	bl	0x5328 <bare_metal::Mutex<T>::borrow::h675ff40daa9acaa7> @ imm = #-3040
-    5f08:      	str	r0, [sp, #4]
-    5f0a:      	b	0x5f0c <va108xx_hal::timer::get_ms_ticks::{{closure}}::hcb223fcc8c1afe4c+0x14> @ imm = #-2
-    5f0c:      	ldr	r0, [sp, #4]
-    5f0e:      	bl	0x6448 <core::cell::Cell<T>::get::h3ca00346260f8619> @ imm = #1334
-    5f12:      	str	r0, [sp]
-    5f14:      	b	0x5f16 <va108xx_hal::timer::get_ms_ticks::{{closure}}::hcb223fcc8c1afe4c+0x1e> @ imm = #-2
-    5f16:      	ldr	r0, [sp]
-    5f18:      	add	sp, #16
-    5f1a:      	pop	{r7, pc}
-
-00005f1c <$d.29>:
-    5f1c:	30 04 00 10	.word	0x10000430
-
-00005f20 <va108xx_hal::timer::Delay::new::hd4c264914bb7202d>:
-    5f20:      	push	{r4, r5, r6, r7, lr}
-    5f22:      	add	r7, sp, #12
-    5f24:      	sub	sp, #20
-    5f26:      	mov	r3, r1
-    5f28:      	mov	r1, sp
-    5f2a:      	mov	r2, r1
-    5f2c:      	ldm	r3!, {r4, r5}
-    5f2e:      	stm	r2!, {r4, r5}
-    5f30:      	ldm	r3!, {r4, r5, r6}
-    5f32:      	stm	r2!, {r4, r5, r6}
-    5f34:      	ldm	r1!, {r2, r3}
-    5f36:      	stm	r0!, {r2, r3}
-    5f38:      	ldm	r1!, {r2, r3, r4}
-    5f3a:      	stm	r0!, {r2, r3, r4}
-    5f3c:      	add	sp, #20
-    5f3e:      	pop	{r4, r5, r6, r7, pc}
-
-00005f40 <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h1970e35c5cf06a9d>:
-    5f40:      	push	{r7, lr}
-    5f42:      	add	r7, sp, #0
-    5f44:      	sub	sp, #56
-    5f46:      	str	r1, [sp, #24]
-    5f48:      	str	r0, [sp, #28]
-    5f4a:      	str	r0, [sp, #44]
-    5f4c:      	str	r1, [sp, #48]
-    5f4e:      	bl	0x5d92 <va108xx_hal::timer::CountDownTimer<TIM>::curr_freq::hfc4843a0b17e21c1> @ imm = #-448
-    5f52:      	str	r0, [sp, #36]
-    5f54:      	b	0x5f56 <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h1970e35c5cf06a9d+0x16> @ imm = #-2
-    5f56:      	movs	r0, #125
-    5f58:      	lsls	r0, r0, #3
-    5f5a:      	bl	0x5434 <<u32 as va108xx_hal::time::U32Ext>::hz::h33770ef4926e0942> @ imm = #-2858
-    5f5e:      	str	r0, [sp, #40]
-    5f60:      	b	0x5f62 <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h1970e35c5cf06a9d+0x22> @ imm = #-2
-    5f62:      	add	r0, sp, #36
-    5f64:      	add	r1, sp, #40
-    5f66:      	bl	0x548c <<va108xx_hal::time::Hertz as core::cmp::PartialEq>::ne::h16cf15dd0fe3c833> @ imm = #-2782
-    5f6a:      	str	r0, [sp, #20]
-    5f6c:      	b	0x5f6e <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h1970e35c5cf06a9d+0x2e> @ imm = #-2
-    5f6e:      	ldr	r0, [sp, #20]
-    5f70:      	lsls	r0, r0, #31
-    5f72:      	cmp	r0, #0
-    5f74:      	bne	0x5f82 <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h1970e35c5cf06a9d+0x42> @ imm = #10
-    5f76:      	b	0x5f78 <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h1970e35c5cf06a9d+0x38> @ imm = #-2
-    5f78:      	ldr	r0, [sp, #28]
-    5f7a:      	bl	0x5d9c <va108xx_hal::timer::CountDownTimer<TIM>::listening::hc887461eddcc0b5f> @ imm = #-482
-    5f7e:      	str	r0, [sp, #16]
-    5f80:      	b	0x5f96 <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h1970e35c5cf06a9d+0x56> @ imm = #18
-    5f82:      	add	r1, sp, #32
-    5f84:      	movs	r0, #1
-    5f86:      	strb	r0, [r1]
-    5f88:      	b	0x5f8a <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h1970e35c5cf06a9d+0x4a> @ imm = #-2
-    5f8a:      	add	r0, sp, #32
-    5f8c:      	ldrb	r0, [r0]
-    5f8e:      	lsls	r0, r0, #31
-    5f90:      	cmp	r0, #0
-    5f92:      	bne	0x5fae <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h1970e35c5cf06a9d+0x6e> @ imm = #24
-    5f94:      	b	0x5fa2 <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h1970e35c5cf06a9d+0x62> @ imm = #10
-    5f96:      	ldr	r1, [sp, #16]
-    5f98:      	movs	r0, #1
-    5f9a:      	bics	r0, r1
-    5f9c:      	add	r1, sp, #32
-    5f9e:      	strb	r0, [r1]
-    5fa0:      	b	0x5f8a <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h1970e35c5cf06a9d+0x4a> @ imm = #-26
-    5fa2:      	bl	0x5ee4 <va108xx_hal::timer::get_ms_ticks::h99acc7fb8306fa26> @ imm = #-194
-    5fa6:      	mov	r1, r0
-    5fa8:      	str	r1, [sp, #12]
-    5faa:      	str	r0, [sp, #52]
-    5fac:      	b	0x5fb2 <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h1970e35c5cf06a9d+0x72> @ imm = #2
-    5fae:      	add	sp, #56
-    5fb0:      	pop	{r7, pc}
-    5fb2:      	bl	0x5ee4 <va108xx_hal::timer::get_ms_ticks::h99acc7fb8306fa26> @ imm = #-210
-    5fb6:      	str	r0, [sp, #8]
-    5fb8:      	b	0x5fba <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h1970e35c5cf06a9d+0x7a> @ imm = #-2
-    5fba:      	ldr	r0, [sp, #8]
-    5fbc:      	ldr	r1, [sp, #12]
-    5fbe:      	subs	r2, r0, r1
-    5fc0:      	str	r2, [sp, #4]
-    5fc2:      	cmp	r0, r1
-    5fc4:      	blo	0x5fd2 <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h1970e35c5cf06a9d+0x92> @ imm = #10
-    5fc6:      	b	0x5fc8 <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h1970e35c5cf06a9d+0x88> @ imm = #-2
-    5fc8:      	ldr	r0, [sp, #4]
-    5fca:      	ldr	r1, [sp, #24]
-    5fcc:      	cmp	r0, r1
-    5fce:      	blo	0x5fde <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h1970e35c5cf06a9d+0x9e> @ imm = #12
-    5fd0:      	b	0x5fae <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h1970e35c5cf06a9d+0x6e> @ imm = #-38
-    5fd2:      	ldr	r0, [pc, #16] <$d.32+0x2>
-    5fd4:      	ldr	r2, [pc, #16] <$d.32+0x4>
-    5fd6:      	movs	r1, #33
-    5fd8:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #9580
-    5fdc:      	trap
-    5fde:      	bl	0x5382 <cortex_m::asm::nop::h7b8e8a62e6d1cc0f> @ imm = #-3168
-    5fe2:      	b	0x5fb2 <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h1970e35c5cf06a9d+0x72> @ imm = #-52
-
-00005fe4 <$d.32>:
-    5fe4:	50 b2 00 00	.word	0x0000b250
-    5fe8:	3c b2 00 00	.word	0x0000b23c
-
-00005fec <va108xx_hal::utility::port_mux::hcf39c081d82efd23>:
-    5fec:      	push	{r4, r6, r7, lr}
-    5fee:      	add	r7, sp, #8
-    5ff0:      	sub	sp, #216
-    5ff2:      	mov	r4, r1
-    5ff4:      	mov	r1, r0
-    5ff6:      	str	r1, [sp, #28]
-    5ff8:      	mov	r0, r2
-    5ffa:      	str	r0, [sp, #32]
-    5ffc:      	add	r0, sp, #36
-    5ffe:      	strb	r4, [r0]
-    6000:      	add	r4, sp, #40
-    6002:      	strb	r3, [r4]
-    6004:      	str	r1, [sp, #56]
-    6006:      	add	r1, sp, #60
-    6008:      	strb	r2, [r1]
-    600a:      	ldrb	r0, [r0]
-    600c:      	lsls	r0, r0, #31
-    600e:      	cmp	r0, #0
-    6010:      	beq	0x6018 <va108xx_hal::utility::port_mux::hcf39c081d82efd23+0x2c> @ imm = #4
-    6012:      	b	0x6014 <va108xx_hal::utility::port_mux::hcf39c081d82efd23+0x28> @ imm = #-2
-    6014:      	b	0x6022 <va108xx_hal::utility::port_mux::hcf39c081d82efd23+0x36> @ imm = #10
-    6016:      	trap
-    6018:      	ldr	r0, [sp, #32]
-    601a:      	uxtb	r0, r0
-    601c:      	cmp	r0, #31
-    601e:      	bhi	0x60c8 <va108xx_hal::utility::port_mux::hcf39c081d82efd23+0xdc> @ imm = #166
-    6020:      	b	0x60c2 <va108xx_hal::utility::port_mux::hcf39c081d82efd23+0xd6> @ imm = #158
-    6022:      	ldr	r0, [sp, #32]
-    6024:      	uxtb	r0, r0
-    6026:      	cmp	r0, #23
-    6028:      	bhi	0x6032 <va108xx_hal::utility::port_mux::hcf39c081d82efd23+0x46> @ imm = #6
-    602a:      	b	0x602c <va108xx_hal::utility::port_mux::hcf39c081d82efd23+0x40> @ imm = #-2
-    602c:      	ldr	r0, [sp, #28]
-    602e:      	str	r0, [sp, #64]
-    6030:      	b	0x6040 <va108xx_hal::utility::port_mux::hcf39c081d82efd23+0x54> @ imm = #12
-    6032:      	add	r1, sp, #44
-    6034:      	movs	r0, #1
-    6036:      	strb	r0, [r1]
-    6038:      	b	0x603a <va108xx_hal::utility::port_mux::hcf39c081d82efd23+0x4e> @ imm = #-2
-    603a:      	ldr	r0, [sp, #44]
-    603c:      	add	sp, #216
-    603e:      	pop	{r4, r6, r7, pc}
-    6040:      	ldr	r0, [sp, #32]
-    6042:      	uxtb	r0, r0
-    6044:      	str	r0, [sp, #24]
-    6046:      	cmp	r0, #31
-    6048:      	bhi	0x60aa <va108xx_hal::utility::port_mux::hcf39c081d82efd23+0xbe> @ imm = #94
-    604a:      	b	0x604c <va108xx_hal::utility::port_mux::hcf39c081d82efd23+0x60> @ imm = #-2
-    604c:      	ldr	r0, [sp, #24]
-    604e:      	lsls	r0, r0, #2
-    6050:      	ldr	r1, [pc, #260] <$d.21+0x4>
-    6052:      	adds	r0, r0, r1
-    6054:      	str	r0, [sp, #20]
-    6056:      	add	r1, sp, #40
-    6058:      	str	r1, [sp, #52]
-    605a:      	ldr	r1, [sp, #52]
-    605c:      	str	r1, [sp, #16]
-    605e:      	str	r0, [sp, #164]
-    6060:      	str	r1, [sp, #168]
-    6062:      	str	r0, [sp, #176]
-    6064:      	str	r0, [sp, #180]
-    6066:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #8198
-    606a:      	mov	r1, r0
-    606c:      	ldr	r0, [sp, #16]
-    606e:      	str	r1, [sp, #172]
-    6070:      	str	r1, [sp, #152]
-    6072:      	ldr	r2, [sp, #152]
-    6074:      	str	r2, [sp, #188]
-    6076:      	str	r2, [sp, #184]
-    6078:      	ldr	r2, [sp, #184]
-    607a:      	str	r2, [sp, #148]
-    607c:      	str	r1, [sp, #160]
-    607e:      	ldr	r1, [sp, #160]
-    6080:      	str	r1, [sp, #208]
-    6082:      	str	r1, [sp, #204]
-    6084:      	ldr	r1, [sp, #204]
-    6086:      	str	r1, [sp, #156]
-    6088:      	add	r1, sp, #148
-    608a:      	str	r1, [sp, #140]
-    608c:      	add	r1, sp, #156
-    608e:      	str	r1, [sp, #144]
-    6090:      	ldr	r1, [sp, #140]
-    6092:      	ldr	r2, [sp, #144]
-    6094:      	bl	0x61a4 <va108xx_hal::utility::port_mux::{{closure}}::h4fca9302d5c9f8d5> @ imm = #268
-    6098:      	mov	r1, r0
-    609a:      	ldr	r0, [sp, #20]
-    609c:      	ldr	r1, [r1]
-    609e:      	str	r0, [sp, #192]
-    60a0:      	str	r1, [sp, #196]
-    60a2:      	str	r0, [sp, #200]
-    60a4:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #8156
-    60a8:      	b	0x60b6 <va108xx_hal::utility::port_mux::hcf39c081d82efd23+0xca> @ imm = #10
-    60aa:      	ldr	r0, [sp, #24]
-    60ac:      	ldr	r2, [pc, #164] <$d.21>
-    60ae:      	movs	r1, #32
-    60b0:      	bl	0x8574 <core::panicking::panic_bounds_check::h5d2fdbe20d7940cc> @ imm = #9408
-    60b4:      	trap
-    60b6:      	add	r1, sp, #44
-    60b8:      	movs	r0, #0
-    60ba:      	strb	r0, [r1]
-    60bc:      	movs	r0, #2
-    60be:      	strb	r0, [r1]
-    60c0:      	b	0x603a <va108xx_hal::utility::port_mux::hcf39c081d82efd23+0x4e> @ imm = #-138
-    60c2:      	ldr	r0, [sp, #28]
-    60c4:      	str	r0, [sp, #212]
-    60c6:      	b	0x60d0 <va108xx_hal::utility::port_mux::hcf39c081d82efd23+0xe4> @ imm = #6
-    60c8:      	add	r1, sp, #44
-    60ca:      	movs	r0, #1
-    60cc:      	strb	r0, [r1]
-    60ce:      	b	0x603a <va108xx_hal::utility::port_mux::hcf39c081d82efd23+0x4e> @ imm = #-152
-    60d0:      	ldr	r0, [sp, #32]
-    60d2:      	uxtb	r0, r0
-    60d4:      	str	r0, [sp, #12]
-    60d6:      	cmp	r0, #31
-    60d8:      	bhi	0x613a <va108xx_hal::utility::port_mux::hcf39c081d82efd23+0x14e> @ imm = #94
-    60da:      	b	0x60dc <va108xx_hal::utility::port_mux::hcf39c081d82efd23+0xf0> @ imm = #-2
-    60dc:      	ldr	r0, [sp, #12]
-    60de:      	lsls	r0, r0, #2
-    60e0:      	ldr	r1, [pc, #124] <$d.21+0xc>
-    60e2:      	adds	r0, r0, r1
-    60e4:      	str	r0, [sp, #8]
-    60e6:      	add	r1, sp, #40
-    60e8:      	str	r1, [sp, #48]
-    60ea:      	ldr	r1, [sp, #48]
-    60ec:      	str	r1, [sp, #4]
-    60ee:      	str	r0, [sp, #92]
-    60f0:      	str	r1, [sp, #96]
-    60f2:      	str	r0, [sp, #104]
-    60f4:      	str	r0, [sp, #108]
-    60f6:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #8054
-    60fa:      	mov	r1, r0
-    60fc:      	ldr	r0, [sp, #4]
-    60fe:      	str	r1, [sp, #100]
-    6100:      	str	r1, [sp, #80]
-    6102:      	ldr	r2, [sp, #80]
-    6104:      	str	r2, [sp, #116]
-    6106:      	str	r2, [sp, #112]
-    6108:      	ldr	r2, [sp, #112]
-    610a:      	str	r2, [sp, #76]
-    610c:      	str	r1, [sp, #88]
-    610e:      	ldr	r1, [sp, #88]
-    6110:      	str	r1, [sp, #136]
-    6112:      	str	r1, [sp, #132]
-    6114:      	ldr	r1, [sp, #132]
-    6116:      	str	r1, [sp, #84]
-    6118:      	add	r1, sp, #76
-    611a:      	str	r1, [sp, #68]
-    611c:      	add	r1, sp, #84
-    611e:      	str	r1, [sp, #72]
-    6120:      	ldr	r1, [sp, #68]
-    6122:      	ldr	r2, [sp, #72]
-    6124:      	bl	0x6164 <va108xx_hal::utility::port_mux::{{closure}}::h1ddf3e2a6ce58164> @ imm = #60
-    6128:      	mov	r1, r0
-    612a:      	ldr	r0, [sp, #8]
-    612c:      	ldr	r1, [r1]
-    612e:      	str	r0, [sp, #120]
-    6130:      	str	r1, [sp, #124]
-    6132:      	str	r0, [sp, #128]
-    6134:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #8012
-    6138:      	b	0x6146 <va108xx_hal::utility::port_mux::hcf39c081d82efd23+0x15a> @ imm = #10
-    613a:      	ldr	r0, [sp, #12]
-    613c:      	ldr	r2, [pc, #28] <$d.21+0x8>
-    613e:      	movs	r1, #32
-    6140:      	bl	0x8574 <core::panicking::panic_bounds_check::h5d2fdbe20d7940cc> @ imm = #9264
-    6144:      	trap
-    6146:      	add	r1, sp, #44
-    6148:      	movs	r0, #0
-    614a:      	strb	r0, [r1]
-    614c:      	movs	r0, #2
-    614e:      	strb	r0, [r1]
-    6150:      	b	0x603a <va108xx_hal::utility::port_mux::hcf39c081d82efd23+0x4e> @ imm = #-282
-    6152:      	mov	r8, r8
-
-00006154 <$d.21>:
-    6154:	d0 b2 00 00	.word	0x0000b2d0
-    6158:	80 20 00 40	.word	0x40002080
-    615c:	e0 b2 00 00	.word	0x0000b2e0
-    6160:	00 20 00 40	.word	0x40002000
-
-00006164 <va108xx_hal::utility::port_mux::{{closure}}::h1ddf3e2a6ce58164>:
-    6164:      	sub	sp, #48
-    6166:      	str	r0, [sp]
-    6168:      	str	r0, [sp, #8]
-    616a:      	str	r1, [sp, #12]
-    616c:      	str	r2, [sp, #16]
-    616e:      	str	r2, [sp, #24]
-    6170:      	str	r2, [sp, #20]
-    6172:      	ldr	r0, [sp, #20]
-    6174:      	str	r0, [sp, #4]
-    6176:      	b	0x6178 <va108xx_hal::utility::port_mux::{{closure}}::h1ddf3e2a6ce58164+0x14> @ imm = #-2
-    6178:      	ldr	r1, [sp, #4]
-    617a:      	ldr	r0, [sp]
-    617c:      	ldrb	r2, [r0]
-    617e:      	str	r1, [sp, #32]
-    6180:      	add	r0, sp, #36
-    6182:      	strb	r2, [r0]
-    6184:      	str	r1, [sp, #40]
-    6186:      	ldr	r0, [r1]
-    6188:      	movs	r3, #7
-    618a:      	lsls	r3, r3, #13
-    618c:      	bics	r0, r3
-    618e:      	lsls	r2, r2, #13
-    6190:      	str	r1, [sp, #44]
-    6192:      	orrs	r0, r2
-    6194:      	str	r0, [r1]
-    6196:      	b	0x6198 <va108xx_hal::utility::port_mux::{{closure}}::h1ddf3e2a6ce58164+0x34> @ imm = #-2
-    6198:      	ldr	r0, [sp, #4]
-    619a:      	str	r0, [sp, #28]
-    619c:      	b	0x619e <va108xx_hal::utility::port_mux::{{closure}}::h1ddf3e2a6ce58164+0x3a> @ imm = #-2
-    619e:      	ldr	r0, [sp, #4]
-    61a0:      	add	sp, #48
-    61a2:      	bx	lr
-
-000061a4 <va108xx_hal::utility::port_mux::{{closure}}::h4fca9302d5c9f8d5>:
-    61a4:      	sub	sp, #48
-    61a6:      	str	r0, [sp]
-    61a8:      	str	r0, [sp, #8]
-    61aa:      	str	r1, [sp, #12]
-    61ac:      	str	r2, [sp, #16]
-    61ae:      	str	r2, [sp, #24]
-    61b0:      	str	r2, [sp, #20]
-    61b2:      	ldr	r0, [sp, #20]
-    61b4:      	str	r0, [sp, #4]
-    61b6:      	b	0x61b8 <va108xx_hal::utility::port_mux::{{closure}}::h4fca9302d5c9f8d5+0x14> @ imm = #-2
-    61b8:      	ldr	r1, [sp, #4]
-    61ba:      	ldr	r0, [sp]
-    61bc:      	ldrb	r2, [r0]
-    61be:      	str	r1, [sp, #32]
-    61c0:      	add	r0, sp, #36
-    61c2:      	strb	r2, [r0]
-    61c4:      	str	r1, [sp, #40]
-    61c6:      	ldr	r0, [r1]
-    61c8:      	movs	r3, #7
-    61ca:      	lsls	r3, r3, #13
-    61cc:      	bics	r0, r3
-    61ce:      	lsls	r2, r2, #13
-    61d0:      	str	r1, [sp, #44]
-    61d2:      	orrs	r0, r2
-    61d4:      	str	r0, [r1]
-    61d6:      	b	0x61d8 <va108xx_hal::utility::port_mux::{{closure}}::h4fca9302d5c9f8d5+0x34> @ imm = #-2
-    61d8:      	ldr	r0, [sp, #4]
-    61da:      	str	r0, [sp, #28]
-    61dc:      	b	0x61de <va108xx_hal::utility::port_mux::{{closure}}::h4fca9302d5c9f8d5+0x3a> @ imm = #-2
-    61de:      	ldr	r0, [sp, #4]
-    61e0:      	add	sp, #48
-    61e2:      	bx	lr
-
-000061e4 <core::cmp::Ord::min::hc9a7a92dd2e90eaf>:
-    61e4:      	push	{r7, lr}
-    61e6:      	add	r7, sp, #0
-    61e8:      	sub	sp, #16
-    61ea:      	str	r0, [sp, #8]
-    61ec:      	str	r1, [sp, #12]
-    61ee:      	bl	0x6256 <core::cmp::min_by::hf474d06e9d24a816> @ imm = #100
-    61f2:      	str	r0, [sp, #4]
-    61f4:      	b	0x61f6 <core::cmp::Ord::min::hc9a7a92dd2e90eaf+0x12> @ imm = #-2
-    61f6:      	ldr	r0, [sp, #4]
-    61f8:      	add	sp, #16
-    61fa:      	pop	{r7, pc}
-
-000061fc <core::cmp::min::hd7011c4be9c221eb>:
-    61fc:      	push	{r7, lr}
-    61fe:      	add	r7, sp, #0
-    6200:      	sub	sp, #16
-    6202:      	str	r0, [sp, #8]
-    6204:      	str	r1, [sp, #12]
-    6206:      	bl	0x61e4 <core::cmp::Ord::min::hc9a7a92dd2e90eaf> @ imm = #-38
-    620a:      	str	r0, [sp, #4]
-    620c:      	b	0x620e <core::cmp::min::hd7011c4be9c221eb+0x12> @ imm = #-2
-    620e:      	ldr	r0, [sp, #4]
-    6210:      	add	sp, #16
-    6212:      	pop	{r7, pc}
-
-00006214 <core::cmp::impls::<impl core::cmp::Ord for usize>::cmp::h5bf304c0d5cb43f3>:
-    6214:      	sub	sp, #20
-    6216:      	str	r1, [sp]
-    6218:      	str	r0, [sp, #4]
-    621a:      	str	r0, [sp, #12]
-    621c:      	str	r1, [sp, #16]
-    621e:      	ldr	r0, [r0]
-    6220:      	ldr	r1, [r1]
-    6222:      	cmp	r0, r1
-    6224:      	blo	0x6236 <core::cmp::impls::<impl core::cmp::Ord for usize>::cmp::h5bf304c0d5cb43f3+0x22> @ imm = #14
-    6226:      	b	0x6228 <core::cmp::impls::<impl core::cmp::Ord for usize>::cmp::h5bf304c0d5cb43f3+0x14> @ imm = #-2
-    6228:      	ldr	r1, [sp]
-    622a:      	ldr	r0, [sp, #4]
-    622c:      	ldr	r0, [r0]
-    622e:      	ldr	r1, [r1]
-    6230:      	cmp	r0, r1
-    6232:      	beq	0x624c <core::cmp::impls::<impl core::cmp::Ord for usize>::cmp::h5bf304c0d5cb43f3+0x38> @ imm = #22
-    6234:      	b	0x6244 <core::cmp::impls::<impl core::cmp::Ord for usize>::cmp::h5bf304c0d5cb43f3+0x30> @ imm = #12
-    6236:      	add	r1, sp, #8
-    6238:      	movs	r0, #255
-    623a:      	strb	r0, [r1]
-    623c:      	b	0x623e <core::cmp::impls::<impl core::cmp::Ord for usize>::cmp::h5bf304c0d5cb43f3+0x2a> @ imm = #-2
-    623e:      	ldr	r0, [sp, #8]
-    6240:      	add	sp, #20
-    6242:      	bx	lr
-    6244:      	add	r1, sp, #8
-    6246:      	movs	r0, #1
-    6248:      	strb	r0, [r1]
-    624a:      	b	0x6254 <core::cmp::impls::<impl core::cmp::Ord for usize>::cmp::h5bf304c0d5cb43f3+0x40> @ imm = #6
-    624c:      	add	r1, sp, #8
-    624e:      	movs	r0, #0
-    6250:      	strb	r0, [r1]
-    6252:      	b	0x6254 <core::cmp::impls::<impl core::cmp::Ord for usize>::cmp::h5bf304c0d5cb43f3+0x40> @ imm = #-2
-    6254:      	b	0x623e <core::cmp::impls::<impl core::cmp::Ord for usize>::cmp::h5bf304c0d5cb43f3+0x2a> @ imm = #-26
-
-00006256 <core::cmp::min_by::hf474d06e9d24a816>:
-    6256:      	push	{r7, lr}
-    6258:      	add	r7, sp, #0
-    625a:      	sub	sp, #40
-    625c:      	str	r0, [sp, #4]
-    625e:      	str	r1, [sp, #8]
-    6260:      	add	r2, sp, #32
-    6262:      	movs	r0, #0
-    6264:      	strb	r0, [r2]
-    6266:      	add	r1, sp, #28
-    6268:      	strb	r0, [r1]
-    626a:      	movs	r0, #1
-    626c:      	strb	r0, [r2]
-    626e:      	strb	r0, [r1]
-    6270:      	add	r0, sp, #4
-    6272:      	str	r0, [sp, #20]
-    6274:      	add	r0, sp, #8
-    6276:      	str	r0, [sp, #24]
-    6278:      	ldr	r0, [sp, #20]
-    627a:      	ldr	r1, [sp, #24]
-    627c:      	bl	0x54a4 <core::ops::function::FnOnce::call_once::hb09ebeb400ad745a> @ imm = #-3548
-    6280:      	add	r1, sp, #16
-    6282:      	strb	r0, [r1]
-    6284:      	b	0x6286 <core::cmp::min_by::hf474d06e9d24a816+0x30> @ imm = #-2
-    6286:      	add	r0, sp, #16
-    6288:      	ldrb	r0, [r0]
-    628a:      	adds	r0, r0, #1
-    628c:      	uxtb	r0, r0
-    628e:      	cmp	r0, #2
-    6290:      	blo	0x6298 <core::cmp::min_by::hf474d06e9d24a816+0x42> @ imm = #4
-    6292:      	b	0x6294 <core::cmp::min_by::hf474d06e9d24a816+0x3e> @ imm = #-2
-    6294:      	b	0x62a4 <core::cmp::min_by::hf474d06e9d24a816+0x4e> @ imm = #12
-    6296:      	trap
-    6298:      	add	r1, sp, #32
-    629a:      	movs	r0, #0
-    629c:      	strb	r0, [r1]
-    629e:      	ldr	r0, [sp, #4]
-    62a0:      	str	r0, [sp, #12]
-    62a2:      	b	0x62b0 <core::cmp::min_by::hf474d06e9d24a816+0x5a> @ imm = #10
-    62a4:      	add	r1, sp, #28
-    62a6:      	movs	r0, #0
-    62a8:      	strb	r0, [r1]
-    62aa:      	ldr	r0, [sp, #8]
-    62ac:      	str	r0, [sp, #12]
-    62ae:      	b	0x62b0 <core::cmp::min_by::hf474d06e9d24a816+0x5a> @ imm = #-2
-    62b0:      	add	r0, sp, #28
-    62b2:      	ldrb	r0, [r0]
-    62b4:      	lsls	r0, r0, #31
-    62b6:      	cmp	r0, #0
-    62b8:      	bne	0x62c8 <core::cmp::min_by::hf474d06e9d24a816+0x72> @ imm = #12
-    62ba:      	b	0x62bc <core::cmp::min_by::hf474d06e9d24a816+0x66> @ imm = #-2
-    62bc:      	add	r0, sp, #32
-    62be:      	ldrb	r0, [r0]
-    62c0:      	lsls	r0, r0, #31
-    62c2:      	cmp	r0, #0
-    62c4:      	bne	0x62d0 <core::cmp::min_by::hf474d06e9d24a816+0x7a> @ imm = #8
-    62c6:      	b	0x62ca <core::cmp::min_by::hf474d06e9d24a816+0x74> @ imm = #0
-    62c8:      	b	0x62bc <core::cmp::min_by::hf474d06e9d24a816+0x66> @ imm = #-16
-    62ca:      	ldr	r0, [sp, #12]
-    62cc:      	add	sp, #40
-    62ce:      	pop	{r7, pc}
-    62d0:      	b	0x62ca <core::cmp::min_by::hf474d06e9d24a816+0x74> @ imm = #-10
-
-000062d2 <core::ptr::slice_from_raw_parts::h782ce3cc57cd89b8>:
-    62d2:      	push	{r7, lr}
-    62d4:      	add	r7, sp, #0
-    62d6:      	sub	sp, #24
-    62d8:      	str	r1, [sp, #8]
-    62da:      	str	r0, [sp, #16]
-    62dc:      	str	r1, [sp, #20]
-    62de:      	bl	0x54e2 <core::ptr::const_ptr::<impl *const T>::cast::h7946870fccab31f5> @ imm = #-3584
-    62e2:      	str	r0, [sp, #12]
-    62e4:      	b	0x62e6 <core::ptr::slice_from_raw_parts::h782ce3cc57cd89b8+0x14> @ imm = #-2
-    62e6:      	ldr	r1, [sp, #8]
-    62e8:      	ldr	r0, [sp, #12]
-    62ea:      	bl	0x6338 <core::ptr::metadata::from_raw_parts::h1e2aaa3ca1a65a24> @ imm = #74
-    62ee:      	str	r0, [sp]
-    62f0:      	str	r1, [sp, #4]
-    62f2:      	b	0x62f4 <core::ptr::slice_from_raw_parts::h782ce3cc57cd89b8+0x22> @ imm = #-2
-    62f4:      	ldr	r1, [sp, #4]
-    62f6:      	ldr	r0, [sp]
-    62f8:      	add	sp, #24
-    62fa:      	pop	{r7, pc}
-
-000062fc <core::ptr::read::h4cf99d3c7e803bf9>:
-    62fc:      	sub	sp, #32
-    62fe:      	str	r0, [sp, #4]
-    6300:      	str	r0, [sp, #12]
-    6302:      	ldr	r0, [sp, #16]
-    6304:      	str	r0, [sp, #8]
-    6306:      	b	0x6308 <core::ptr::read::h4cf99d3c7e803bf9+0xc> @ imm = #-2
-    6308:      	add	r0, sp, #8
-    630a:      	str	r0, [sp, #28]
-    630c:      	b	0x630e <core::ptr::read::h4cf99d3c7e803bf9+0x12> @ imm = #-2
-    630e:      	ldr	r0, [sp, #4]
-    6310:      	ldr	r0, [r0]
-    6312:      	str	r0, [sp, #8]
-    6314:      	ldr	r0, [sp, #8]
-    6316:      	str	r0, [sp]
-    6318:      	str	r0, [sp, #20]
-    631a:      	str	r0, [sp, #24]
-    631c:      	b	0x631e <core::ptr::read::h4cf99d3c7e803bf9+0x22> @ imm = #-2
-    631e:      	ldr	r0, [sp]
-    6320:      	add	sp, #32
-    6322:      	bx	lr
-
-00006324 <core::ptr::write::h83d01c3d61ab6f98>:
-    6324:      	sub	sp, #12
-    6326:      	str	r1, [sp]
-    6328:      	mov	r1, r0
-    632a:      	ldr	r0, [sp]
-    632c:      	str	r0, [sp, #4]
-    632e:      	str	r1, [sp, #8]
-    6330:      	ldr	r0, [sp, #4]
-    6332:      	str	r0, [r1]
-    6334:      	add	sp, #12
-    6336:      	bx	lr
-
-00006338 <core::ptr::metadata::from_raw_parts::h1e2aaa3ca1a65a24>:
-    6338:      	sub	sp, #24
-    633a:      	str	r0, [sp, #16]
-    633c:      	str	r1, [sp, #20]
-    633e:      	str	r0, [sp, #8]
-    6340:      	str	r1, [sp, #12]
-    6342:      	ldr	r1, [sp, #8]
-    6344:      	ldr	r0, [sp, #12]
-    6346:      	str	r1, [sp]
-    6348:      	str	r0, [sp, #4]
-    634a:      	ldr	r0, [sp]
-    634c:      	ldr	r1, [sp, #4]
-    634e:      	add	sp, #24
-    6350:      	bx	lr
-
-00006352 <core::slice::raw::from_raw_parts::h60aaf9426fae6361>:
-    6352:      	push	{r7, lr}
-    6354:      	add	r7, sp, #0
-    6356:      	sub	sp, #16
-    6358:      	str	r0, [sp, #8]
-    635a:      	str	r1, [sp, #12]
-    635c:      	bl	0x62d2 <core::ptr::slice_from_raw_parts::h782ce3cc57cd89b8> @ imm = #-142
-    6360:      	str	r0, [sp]
-    6362:      	str	r1, [sp, #4]
-    6364:      	b	0x6366 <core::slice::raw::from_raw_parts::h60aaf9426fae6361+0x14> @ imm = #-2
-    6366:      	ldr	r1, [sp, #4]
-    6368:      	ldr	r0, [sp]
-    636a:      	add	sp, #16
-    636c:      	pop	{r7, pc}
-    636e:      	bmi	0x631a <core::ptr::read::h4cf99d3c7e803bf9+0x1e> @ imm = #-88
-
-00006370 <va108xx_hal::clock::enable_peripheral_clock::hd69be02d59fbba63>:
-    6370:      	push	{r7, lr}
-    6372:      	add	r7, sp, #0
-    6374:      	sub	sp, #96
-    6376:      	add	r2, sp, #8
-    6378:      	strb	r1, [r2]
-    637a:      	str	r0, [sp, #16]
-    637c:      	str	r0, [sp, #20]
-    637e:      	b	0x6380 <va108xx_hal::clock::enable_peripheral_clock::hd69be02d59fbba63+0x10> @ imm = #-2
-    6380:      	add	r0, sp, #8
-    6382:      	str	r0, [sp, #12]
-    6384:      	ldr	r1, [sp, #12]
-    6386:      	str	r1, [sp]
-    6388:      	ldr	r0, [pc, #80] <$d.15>
-    638a:      	str	r0, [sp, #4]
-    638c:      	str	r0, [sp, #48]
-    638e:      	str	r1, [sp, #52]
-    6390:      	str	r0, [sp, #60]
-    6392:      	str	r0, [sp, #64]
-    6394:      	bl	0x8070 <core::ptr::read_volatile::hf4c692006cd65b29> @ imm = #7384
-    6398:      	mov	r1, r0
-    639a:      	ldr	r0, [sp]
-    639c:      	str	r1, [sp, #56]
-    639e:      	str	r1, [sp, #36]
-    63a0:      	ldr	r2, [sp, #36]
-    63a2:      	str	r2, [sp, #72]
-    63a4:      	str	r2, [sp, #68]
-    63a6:      	ldr	r2, [sp, #68]
-    63a8:      	str	r2, [sp, #32]
-    63aa:      	str	r1, [sp, #44]
-    63ac:      	ldr	r1, [sp, #44]
-    63ae:      	str	r1, [sp, #92]
-    63b0:      	str	r1, [sp, #88]
-    63b2:      	ldr	r1, [sp, #88]
-    63b4:      	str	r1, [sp, #40]
-    63b6:      	add	r1, sp, #32
-    63b8:      	str	r1, [sp, #24]
-    63ba:      	add	r1, sp, #40
-    63bc:      	str	r1, [sp, #28]
-    63be:      	ldr	r1, [sp, #24]
-    63c0:      	ldr	r2, [sp, #28]
-    63c2:      	bl	0x63e0 <va108xx_hal::clock::enable_peripheral_clock::{{closure}}::hf8f53455e38c0312> @ imm = #26
-    63c6:      	mov	r1, r0
-    63c8:      	ldr	r0, [sp, #4]
-    63ca:      	ldr	r1, [r1]
-    63cc:      	str	r0, [sp, #76]
-    63ce:      	str	r1, [sp, #80]
-    63d0:      	str	r0, [sp, #84]
-    63d2:      	bl	0x8084 <core::ptr::write_volatile::h8d4daf2714a04997> @ imm = #7342
-    63d6:      	b	0x63d8 <va108xx_hal::clock::enable_peripheral_clock::hd69be02d59fbba63+0x68> @ imm = #-2
-    63d8:      	add	sp, #96
-    63da:      	pop	{r7, pc}
-
-000063dc <$d.15>:
-    63dc:	7c 00 00 40	.word	0x4000007c
-
-000063e0 <va108xx_hal::clock::enable_peripheral_clock::{{closure}}::hf8f53455e38c0312>:
-    63e0:      	push	{r7, lr}
-    63e2:      	add	r7, sp, #0
-    63e4:      	sub	sp, #64
-    63e6:      	str	r2, [sp, #12]
-    63e8:      	str	r1, [sp, #16]
-    63ea:      	str	r0, [sp, #20]
-    63ec:      	str	r0, [sp, #24]
-    63ee:      	str	r1, [sp, #28]
-    63f0:      	str	r2, [sp, #32]
-    63f2:      	str	r1, [sp, #36]
-    63f4:      	b	0x63f6 <va108xx_hal::clock::enable_peripheral_clock::{{closure}}::hf8f53455e38c0312+0x16> @ imm = #-2
-    63f6:      	ldr	r0, [sp, #16]
-    63f8:      	str	r0, [sp, #60]
-    63fa:      	ldr	r0, [r0]
-    63fc:      	str	r0, [sp, #8]
-    63fe:      	b	0x6400 <va108xx_hal::clock::enable_peripheral_clock::{{closure}}::hf8f53455e38c0312+0x20> @ imm = #-2
-    6400:      	ldr	r0, [sp, #20]
-    6402:      	ldrb	r1, [r0]
-    6404:      	movs	r0, #1
-    6406:      	lsls	r0, r1
-    6408:      	str	r0, [sp, #4]
-    640a:      	movs	r0, #0
-    640c:      	cmp	r0, #0
-    640e:      	bne	0x6426 <va108xx_hal::clock::enable_peripheral_clock::{{closure}}::hf8f53455e38c0312+0x46> @ imm = #20
-    6410:      	b	0x6412 <va108xx_hal::clock::enable_peripheral_clock::{{closure}}::hf8f53455e38c0312+0x32> @ imm = #-2
-    6412:      	ldr	r1, [sp, #12]
-    6414:      	ldr	r2, [sp, #4]
-    6416:      	ldr	r0, [sp, #8]
-    6418:      	orrs	r0, r2
-    641a:      	str	r1, [sp, #44]
-    641c:      	str	r0, [sp, #48]
-    641e:      	str	r1, [sp, #52]
-    6420:      	str	r0, [sp, #56]
-    6422:      	str	r0, [r1]
-    6424:      	b	0x6432 <va108xx_hal::clock::enable_peripheral_clock::{{closure}}::hf8f53455e38c0312+0x52> @ imm = #10
-    6426:      	ldr	r0, [pc, #24] <$d.17+0x2>
-    6428:      	ldr	r2, [pc, #24] <$d.17+0x4>
-    642a:      	movs	r1, #35
-    642c:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #8472
-    6430:      	trap
-    6432:      	ldr	r0, [sp, #12]
-    6434:      	str	r0, [sp, #40]
-    6436:      	b	0x6438 <va108xx_hal::clock::enable_peripheral_clock::{{closure}}::hf8f53455e38c0312+0x58> @ imm = #-2
-    6438:      	ldr	r0, [sp, #12]
-    643a:      	add	sp, #64
-    643c:      	pop	{r7, pc}
-    643e:      	mov	r8, r8
-
-00006440 <$d.17>:
-    6440:	60 b3 00 00	.word	0x0000b360
-    6444:	50 b3 00 00	.word	0x0000b350
-
-00006448 <core::cell::Cell<T>::get::h3ca00346260f8619>:
-    6448:      	sub	sp, #12
-    644a:      	str	r0, [sp]
-    644c:      	str	r0, [sp, #4]
-    644e:      	str	r0, [sp, #8]
-    6450:      	b	0x6452 <core::cell::Cell<T>::get::h3ca00346260f8619+0xa> @ imm = #-2
-    6452:      	ldr	r0, [sp]
-    6454:      	ldr	r0, [r0]
-    6456:      	add	sp, #12
-    6458:      	bx	lr
-
-0000645a <core::cell::Cell<T>::set::h7018ce74618b823a>:
-    645a:      	push	{r7, lr}
-    645c:      	add	r7, sp, #0
-    645e:      	sub	sp, #16
-    6460:      	str	r0, [sp, #4]
-    6462:      	str	r1, [sp, #8]
-    6464:      	bl	0x647c <core::cell::Cell<T>::replace::h26e68e9979eacf15> @ imm = #20
-    6468:      	mov	r1, r0
-    646a:      	str	r1, [sp]
-    646c:      	str	r0, [sp, #12]
-    646e:      	b	0x6470 <core::cell::Cell<T>::set::h7018ce74618b823a+0x16> @ imm = #-2
-    6470:      	ldr	r0, [sp]
-    6472:      	bl	0x533a <core::mem::drop::h745bcf32bb2eda5e> @ imm = #-4412
-    6476:      	b	0x6478 <core::cell::Cell<T>::set::h7018ce74618b823a+0x1e> @ imm = #-2
-    6478:      	add	sp, #16
-    647a:      	pop	{r7, pc}
-
-0000647c <core::cell::Cell<T>::replace::h26e68e9979eacf15>:
-    647c:      	push	{r7, lr}
-    647e:      	add	r7, sp, #0
-    6480:      	sub	sp, #24
-    6482:      	str	r1, [sp, #4]
-    6484:      	str	r0, [sp, #8]
-    6486:      	str	r0, [sp, #12]
-    6488:      	str	r1, [sp, #16]
-    648a:      	str	r0, [sp, #20]
-    648c:      	b	0x648e <core::cell::Cell<T>::replace::h26e68e9979eacf15+0x12> @ imm = #-2
-    648e:      	ldr	r1, [sp, #4]
-    6490:      	ldr	r0, [sp, #8]
-    6492:      	bl	0x5344 <core::mem::replace::hd724f683566c97d4> @ imm = #-4434
-    6496:      	str	r0, [sp]
-    6498:      	b	0x649a <core::cell::Cell<T>::replace::h26e68e9979eacf15+0x1e> @ imm = #-2
-    649a:      	ldr	r0, [sp]
-    649c:      	add	sp, #24
-    649e:      	pop	{r7, pc}
-
-000064a0 <core::slice::<impl [T]>::as_mut_ptr::h133dc8b6616ab639>:
-    64a0:      	sub	sp, #8
-    64a2:      	str	r0, [sp]
-    64a4:      	str	r1, [sp, #4]
-    64a6:      	add	sp, #8
-    64a8:      	bx	lr
-
-000064aa <core::slice::<impl [T]>::as_mut_ptr::hd024139067dd0113>:
-    64aa:      	sub	sp, #8
-    64ac:      	str	r0, [sp]
-    64ae:      	str	r1, [sp, #4]
-    64b0:      	add	sp, #8
-    64b2:      	bx	lr
-
-000064b4 <core::slice::<impl [T]>::is_empty::hb2048d383ec4bcc7>:
-    64b4:      	sub	sp, #12
-    64b6:      	str	r1, [sp]
-    64b8:      	mov	r1, r0
-    64ba:      	ldr	r0, [sp]
-    64bc:      	str	r1, [sp, #4]
-    64be:      	str	r0, [sp, #8]
-    64c0:      	rsbs	r1, r0, #0
-    64c2:      	adcs	r0, r1
-    64c4:      	add	sp, #12
-    64c6:      	bx	lr
-
-000064c8 <core::slice::<impl [T]>::iter_mut::h0c9d630705430598>:
-    64c8:      	push	{r7, lr}
-    64ca:      	add	r7, sp, #0
-    64cc:      	sub	sp, #16
-    64ce:      	str	r0, [sp, #8]
-    64d0:      	str	r1, [sp, #12]
-    64d2:      	bl	0x56a8 <core::slice::iter::IterMut<T>::new::hc82cedf68253b996> @ imm = #-3630
-    64d6:      	str	r0, [sp]
-    64d8:      	str	r1, [sp, #4]
-    64da:      	b	0x64dc <core::slice::<impl [T]>::iter_mut::h0c9d630705430598+0x14> @ imm = #-2
-    64dc:      	ldr	r1, [sp, #4]
-    64de:      	ldr	r0, [sp]
-    64e0:      	add	sp, #16
-    64e2:      	pop	{r7, pc}
-
-000064e4 <core::slice::<impl [T]>::iter_mut::h62d5d54f7427be8c>:
-    64e4:      	push	{r7, lr}
-    64e6:      	add	r7, sp, #0
-    64e8:      	sub	sp, #16
-    64ea:      	str	r0, [sp, #8]
-    64ec:      	str	r1, [sp, #12]
-    64ee:      	bl	0x562c <core::slice::iter::IterMut<T>::new::ha1a3a3ba7b64854f> @ imm = #-3782
-    64f2:      	str	r0, [sp]
-    64f4:      	str	r1, [sp, #4]
-    64f6:      	b	0x64f8 <core::slice::<impl [T]>::iter_mut::h62d5d54f7427be8c+0x14> @ imm = #-2
-    64f8:      	ldr	r1, [sp, #4]
-    64fa:      	ldr	r0, [sp]
-    64fc:      	add	sp, #16
-    64fe:      	pop	{r7, pc}
-
-00006500 <core::iter::range::<impl core::iter::traits::iterator::Iterator for core::ops::range::Range<A>>::next::h07a91e96d06ca3d1>:
-    6500:      	push	{r7, lr}
-    6502:      	add	r7, sp, #0
-    6504:      	sub	sp, #16
-    6506:      	str	r0, [sp, #12]
-    6508:      	bl	0x6524 <<core::ops::range::Range<T> as core::iter::range::RangeIteratorImpl>::spec_next::hd8a64e25781df701> @ imm = #24
-    650c:      	str	r0, [sp, #4]
-    650e:      	str	r1, [sp, #8]
-    6510:      	b	0x6512 <core::iter::range::<impl core::iter::traits::iterator::Iterator for core::ops::range::Range<A>>::next::h07a91e96d06ca3d1+0x12> @ imm = #-2
-    6512:      	ldr	r1, [sp, #8]
-    6514:      	ldr	r0, [sp, #4]
-    6516:      	add	sp, #16
-    6518:      	pop	{r7, pc}
-
-0000651a <<I as core::iter::traits::collect::IntoIterator>::into_iter::h1327cd27b8358e54>:
-    651a:      	sub	sp, #8
-    651c:      	str	r0, [sp]
-    651e:      	str	r1, [sp, #4]
-    6520:      	add	sp, #8
-    6522:      	bx	lr
-
-00006524 <<core::ops::range::Range<T> as core::iter::range::RangeIteratorImpl>::spec_next::hd8a64e25781df701>:
-    6524:      	push	{r7, lr}
-    6526:      	add	r7, sp, #0
-    6528:      	sub	sp, #40
-    652a:      	str	r0, [sp, #16]
-    652c:      	str	r0, [sp, #32]
-    652e:      	adds	r1, r0, #4
-    6530:      	bl	0x65f0 <core::cmp::impls::<impl core::cmp::PartialOrd for usize>::lt::h310d2b4568729a36> @ imm = #188
-    6534:      	str	r0, [sp, #20]
-    6536:      	b	0x6538 <<core::ops::range::Range<T> as core::iter::range::RangeIteratorImpl>::spec_next::hd8a64e25781df701+0x14> @ imm = #-2
-    6538:      	ldr	r0, [sp, #20]
-    653a:      	lsls	r0, r0, #31
-    653c:      	cmp	r0, #0
-    653e:      	bne	0x6548 <<core::ops::range::Range<T> as core::iter::range::RangeIteratorImpl>::spec_next::hd8a64e25781df701+0x24> @ imm = #6
-    6540:      	b	0x6542 <<core::ops::range::Range<T> as core::iter::range::RangeIteratorImpl>::spec_next::hd8a64e25781df701+0x1e> @ imm = #-2
-    6542:      	movs	r0, #0
-    6544:      	str	r0, [sp, #24]
-    6546:      	b	0x6578 <<core::ops::range::Range<T> as core::iter::range::RangeIteratorImpl>::spec_next::hd8a64e25781df701+0x54> @ imm = #46
-    6548:      	ldr	r0, [sp, #16]
-    654a:      	bl	0x65e6 <core::clone::impls::<impl core::clone::Clone for usize>::clone::h22b68903188ef860> @ imm = #152
-    654e:      	str	r0, [sp, #12]
-    6550:      	b	0x6552 <<core::ops::range::Range<T> as core::iter::range::RangeIteratorImpl>::spec_next::hd8a64e25781df701+0x2e> @ imm = #-2
-    6552:      	ldr	r0, [sp, #12]
-    6554:      	movs	r1, #1
-    6556:      	bl	0x6616 <<usize as core::iter::range::Step>::forward_unchecked::h58ab4b3cc560032b> @ imm = #188
-    655a:      	mov	r1, r0
-    655c:      	str	r1, [sp, #8]
-    655e:      	str	r0, [sp, #36]
-    6560:      	b	0x6562 <<core::ops::range::Range<T> as core::iter::range::RangeIteratorImpl>::spec_next::hd8a64e25781df701+0x3e> @ imm = #-2
-    6562:      	ldr	r1, [sp, #8]
-    6564:      	ldr	r0, [sp, #16]
-    6566:      	bl	0x6580 <core::mem::replace::h8ee07cce571bc944> @ imm = #22
-    656a:      	str	r0, [sp, #4]
-    656c:      	b	0x656e <<core::ops::range::Range<T> as core::iter::range::RangeIteratorImpl>::spec_next::hd8a64e25781df701+0x4a> @ imm = #-2
-    656e:      	ldr	r0, [sp, #4]
-    6570:      	str	r0, [sp, #28]
-    6572:      	movs	r0, #1
-    6574:      	str	r0, [sp, #24]
-    6576:      	b	0x6578 <<core::ops::range::Range<T> as core::iter::range::RangeIteratorImpl>::spec_next::hd8a64e25781df701+0x54> @ imm = #-2
-    6578:      	ldr	r0, [sp, #24]
-    657a:      	ldr	r1, [sp, #28]
-    657c:      	add	sp, #40
-    657e:      	pop	{r7, pc}
-
-00006580 <core::mem::replace::h8ee07cce571bc944>:
-    6580:      	push	{r7, lr}
-    6582:      	add	r7, sp, #0
-    6584:      	sub	sp, #24
-    6586:      	str	r1, [sp]
-    6588:      	str	r0, [sp, #4]
-    658a:      	str	r0, [sp, #12]
-    658c:      	str	r1, [sp, #16]
-    658e:      	bl	0x65aa <core::ptr::read::he17d8a150d32d9f3> @ imm = #24
-    6592:      	mov	r1, r0
-    6594:      	str	r1, [sp, #8]
-    6596:      	str	r0, [sp, #20]
-    6598:      	b	0x659a <core::mem::replace::h8ee07cce571bc944+0x1a> @ imm = #-2
-    659a:      	ldr	r1, [sp]
-    659c:      	ldr	r0, [sp, #4]
-    659e:      	bl	0x65d2 <core::ptr::write::h0f60870eaeef4a01> @ imm = #48
-    65a2:      	b	0x65a4 <core::mem::replace::h8ee07cce571bc944+0x24> @ imm = #-2
-    65a4:      	ldr	r0, [sp, #8]
-    65a6:      	add	sp, #24
-    65a8:      	pop	{r7, pc}
-
-000065aa <core::ptr::read::he17d8a150d32d9f3>:
-    65aa:      	sub	sp, #32
-    65ac:      	str	r0, [sp, #4]
-    65ae:      	str	r0, [sp, #12]
-    65b0:      	ldr	r0, [sp, #16]
-    65b2:      	str	r0, [sp, #8]
-    65b4:      	b	0x65b6 <core::ptr::read::he17d8a150d32d9f3+0xc> @ imm = #-2
-    65b6:      	add	r0, sp, #8
-    65b8:      	str	r0, [sp, #28]
-    65ba:      	b	0x65bc <core::ptr::read::he17d8a150d32d9f3+0x12> @ imm = #-2
-    65bc:      	ldr	r0, [sp, #4]
-    65be:      	ldr	r0, [r0]
-    65c0:      	str	r0, [sp, #8]
-    65c2:      	ldr	r0, [sp, #8]
-    65c4:      	str	r0, [sp]
-    65c6:      	str	r0, [sp, #20]
-    65c8:      	str	r0, [sp, #24]
-    65ca:      	b	0x65cc <core::ptr::read::he17d8a150d32d9f3+0x22> @ imm = #-2
-    65cc:      	ldr	r0, [sp]
-    65ce:      	add	sp, #32
-    65d0:      	bx	lr
-
-000065d2 <core::ptr::write::h0f60870eaeef4a01>:
-    65d2:      	sub	sp, #12
-    65d4:      	str	r1, [sp]
-    65d6:      	mov	r1, r0
-    65d8:      	ldr	r0, [sp]
-    65da:      	str	r0, [sp, #4]
-    65dc:      	str	r1, [sp, #8]
-    65de:      	ldr	r0, [sp, #4]
-    65e0:      	str	r0, [r1]
-    65e2:      	add	sp, #12
-    65e4:      	bx	lr
-
-000065e6 <core::clone::impls::<impl core::clone::Clone for usize>::clone::h22b68903188ef860>:
-    65e6:      	sub	sp, #4
-    65e8:      	str	r0, [sp]
-    65ea:      	ldr	r0, [r0]
-    65ec:      	add	sp, #4
-    65ee:      	bx	lr
-
-000065f0 <core::cmp::impls::<impl core::cmp::PartialOrd for usize>::lt::h310d2b4568729a36>:
-    65f0:      	sub	sp, #20
-    65f2:      	str	r1, [sp]
-    65f4:      	mov	r1, r0
-    65f6:      	ldr	r0, [sp]
-    65f8:      	str	r1, [sp, #12]
-    65fa:      	str	r0, [sp, #16]
-    65fc:      	ldr	r1, [r1]
-    65fe:      	ldr	r2, [r0]
-    6600:      	movs	r0, #1
-    6602:      	movs	r3, #0
-    6604:      	str	r3, [sp, #4]
-    6606:      	cmp	r1, r2
-    6608:      	str	r0, [sp, #8]
-    660a:      	blo	0x6610 <core::cmp::impls::<impl core::cmp::PartialOrd for usize>::lt::h310d2b4568729a36+0x20> @ imm = #2
-    660c:      	ldr	r0, [sp, #4]
-    660e:      	str	r0, [sp, #8]
-    6610:      	ldr	r0, [sp, #8]
-    6612:      	add	sp, #20
-    6614:      	bx	lr
-
-00006616 <<usize as core::iter::range::Step>::forward_unchecked::h58ab4b3cc560032b>:
-    6616:      	sub	sp, #24
-    6618:      	str	r0, [sp, #4]
-    661a:      	str	r1, [sp, #8]
-    661c:      	str	r0, [sp, #12]
-    661e:      	str	r1, [sp, #16]
-    6620:      	adds	r0, r0, r1
-    6622:      	str	r0, [sp, #20]
-    6624:      	ldr	r0, [sp, #20]
-    6626:      	str	r0, [sp]
-    6628:      	b	0x662a <<usize as core::iter::range::Step>::forward_unchecked::h58ab4b3cc560032b+0x14> @ imm = #-2
-    662a:      	ldr	r0, [sp]
-    662c:      	add	sp, #24
-    662e:      	bx	lr
-
-00006630 <core::cmp::PartialEq::ne::h34b24d8849367d53>:
-    6630:      	push	{r7, lr}
-    6632:      	add	r7, sp, #0
-    6634:      	sub	sp, #16
-    6636:      	str	r0, [sp, #8]
-    6638:      	str	r1, [sp, #12]
-    663a:      	bl	0x6c98 <<rtt_target::rtt::WriteState as core::cmp::PartialEq>::eq::hbb1081db84dfabd4> @ imm = #1626
-    663e:      	str	r0, [sp, #4]
-    6640:      	b	0x6642 <core::cmp::PartialEq::ne::h34b24d8849367d53+0x12> @ imm = #-2
-    6642:      	ldr	r1, [sp, #4]
-    6644:      	movs	r0, #1
-    6646:      	bics	r0, r1
-    6648:      	add	sp, #16
-    664a:      	pop	{r7, pc}
-
-0000664c <core::fmt::Write::write_char::hc1a78c63374c394c>:
-    664c:      	push	{r7, lr}
-    664e:      	add	r7, sp, #0
-    6650:      	sub	sp, #32
-    6652:      	str	r1, [sp, #4]
-    6654:      	mov	r1, r0
-    6656:      	ldr	r0, [sp, #4]
-    6658:      	str	r1, [sp, #8]
-    665a:      	str	r1, [sp, #24]
-    665c:      	str	r0, [sp, #28]
-    665e:      	movs	r1, #0
-    6660:      	str	r1, [sp, #20]
-    6662:      	add	r1, sp, #20
-    6664:      	movs	r2, #4
-    6666:      	bl	0x6e94 <core::char::methods::<impl char>::encode_utf8::h4ca3f652912759a3> @ imm = #2090
-    666a:      	str	r0, [sp, #12]
-    666c:      	str	r1, [sp, #16]
-    666e:      	b	0x6670 <core::fmt::Write::write_char::hc1a78c63374c394c+0x24> @ imm = #-2
-    6670:      	ldr	r2, [sp, #16]
-    6672:      	ldr	r1, [sp, #12]
-    6674:      	ldr	r0, [sp, #8]
-    6676:      	bl	0x6c60 <<rtt_target::rtt::RttWriter as core::fmt::Write>::write_str::h424414bcc1cbb99c> @ imm = #1510
-    667a:      	str	r0, [sp]
-    667c:      	b	0x667e <core::fmt::Write::write_char::hc1a78c63374c394c+0x32> @ imm = #-2
-    667e:      	ldr	r0, [sp]
-    6680:      	movs	r1, #1
-    6682:      	ands	r0, r1
-    6684:      	add	sp, #32
-    6686:      	pop	{r7, pc}
-
-00006688 <core::fmt::Write::write_fmt::hd238934d9fad75de>:
-    6688:      	push	{r4, r5, r7, lr}
-    668a:      	add	r7, sp, #8
-    668c:      	sub	sp, #32
-    668e:      	str	r0, [sp, #4]
-    6690:      	add	r2, sp, #8
-    6692:      	mov	r0, r2
-    6694:      	ldm	r1!, {r3, r4, r5}
-    6696:      	stm	r0!, {r3, r4, r5}
-    6698:      	ldm	r1!, {r3, r4, r5}
-    669a:      	stm	r0!, {r3, r4, r5}
-    669c:      	ldr	r1, [pc, #20] <$d.3>
-    669e:      	add	r0, sp, #4
-    66a0:      	bl	0x8bdc <core::fmt::write::hff185d7d684cc368> @ imm = #9528
-    66a4:      	str	r0, [sp]
-    66a6:      	b	0x66a8 <core::fmt::Write::write_fmt::hd238934d9fad75de+0x20> @ imm = #-2
-    66a8:      	ldr	r0, [sp]
-    66aa:      	movs	r1, #1
-    66ac:      	ands	r0, r1
-    66ae:      	add	sp, #32
-    66b0:      	pop	{r4, r5, r7, pc}
-    66b2:      	mov	r8, r8
-
-000066b4 <$d.3>:
-    66b4:	84 b3 00 00	.word	0x0000b384
-
-000066b8 <<&mut W as core::fmt::Write>::write_char::hb384f2f762af3da5>:
-    66b8:      	push	{r7, lr}
-    66ba:      	add	r7, sp, #0
-    66bc:      	sub	sp, #16
-    66be:      	str	r0, [sp, #8]
-    66c0:      	str	r1, [sp, #12]
-    66c2:      	ldr	r0, [r0]
-    66c4:      	bl	0x664c <core::fmt::Write::write_char::hc1a78c63374c394c> @ imm = #-124
-    66c8:      	str	r0, [sp, #4]
-    66ca:      	b	0x66cc <<&mut W as core::fmt::Write>::write_char::hb384f2f762af3da5+0x14> @ imm = #-2
-    66cc:      	ldr	r0, [sp, #4]
-    66ce:      	movs	r1, #1
-    66d0:      	ands	r0, r1
-    66d2:      	add	sp, #16
-    66d4:      	pop	{r7, pc}
-
-000066d6 <<&mut W as core::fmt::Write>::write_fmt::hb89602e92baaeea4>:
-    66d6:      	push	{r4, r5, r6, r7, lr}
-    66d8:      	add	r7, sp, #12
-    66da:      	sub	sp, #36
-    66dc:      	mov	r3, r1
-    66de:      	str	r0, [sp, #32]
-    66e0:      	ldr	r0, [r0]
-    66e2:      	add	r1, sp, #8
-    66e4:      	mov	r2, r1
-    66e6:      	ldm	r3!, {r4, r5, r6}
-    66e8:      	stm	r2!, {r4, r5, r6}
-    66ea:      	ldm	r3!, {r4, r5, r6}
-    66ec:      	stm	r2!, {r4, r5, r6}
-    66ee:      	bl	0x6688 <core::fmt::Write::write_fmt::hd238934d9fad75de> @ imm = #-106
-    66f2:      	str	r0, [sp, #4]
-    66f4:      	b	0x66f6 <<&mut W as core::fmt::Write>::write_fmt::hb89602e92baaeea4+0x20> @ imm = #-2
-    66f6:      	ldr	r0, [sp, #4]
-    66f8:      	movs	r1, #1
-    66fa:      	ands	r0, r1
-    66fc:      	add	sp, #36
-    66fe:      	pop	{r4, r5, r6, r7, pc}
-
-00006700 <<&mut W as core::fmt::Write>::write_str::hd5bc458d7b444e0c>:
-    6700:      	push	{r7, lr}
-    6702:      	add	r7, sp, #0
-    6704:      	sub	sp, #16
-    6706:      	str	r0, [sp, #4]
-    6708:      	str	r1, [sp, #8]
-    670a:      	str	r2, [sp, #12]
-    670c:      	ldr	r0, [r0]
-    670e:      	bl	0x6c60 <<rtt_target::rtt::RttWriter as core::fmt::Write>::write_str::h424414bcc1cbb99c> @ imm = #1358
-    6712:      	str	r0, [sp]
-    6714:      	b	0x6716 <<&mut W as core::fmt::Write>::write_str::hd5bc458d7b444e0c+0x16> @ imm = #-2
-    6716:      	ldr	r0, [sp]
-    6718:      	movs	r1, #1
-    671a:      	ands	r0, r1
-    671c:      	add	sp, #16
-    671e:      	pop	{r7, pc}
-
-00006720 <rtt_target::rtt::RttHeader::init::haebaef83091ee026>:
-    6720:      	push	{r7, lr}
-    6722:      	add	r7, sp, #0
-    6724:      	sub	sp, #48
-    6726:      	str	r2, [sp, #12]
-    6728:      	str	r0, [sp, #16]
-    672a:      	str	r0, [sp, #24]
-    672c:      	str	r1, [sp, #28]
-    672e:      	str	r2, [sp, #32]
-    6730:      	adds	r0, #16
-    6732:      	bl	0x7ec4 <core::ptr::write_volatile::h2231ac4850343f7f> @ imm = #6030
-    6736:      	b	0x6738 <rtt_target::rtt::RttHeader::init::haebaef83091ee026+0x18> @ imm = #-2
-    6738:      	ldr	r1, [sp, #12]
-    673a:      	ldr	r0, [sp, #16]
-    673c:      	adds	r0, #20
-    673e:      	bl	0x7ec4 <core::ptr::write_volatile::h2231ac4850343f7f> @ imm = #6018
-    6742:      	b	0x6744 <rtt_target::rtt::RttHeader::init::haebaef83091ee026+0x24> @ imm = #-2
-    6744:      	ldr	r0, [sp, #16]
-    6746:      	movs	r1, #16
-    6748:      	bl	0x6ffc <core::slice::<impl [T]>::as_mut_ptr::hf14f467ef231dff9> @ imm = #2224
-    674c:      	str	r0, [sp, #8]
-    674e:      	b	0x6750 <rtt_target::rtt::RttHeader::init::haebaef83091ee026+0x30> @ imm = #-2
-    6750:      	ldr	r1, [sp, #8]
-    6752:      	ldr	r0, [pc, #68] <$d.8+0x2>
-    6754:      	movs	r2, #5
-    6756:      	bl	0x6f02 <core::intrinsics::copy_nonoverlapping::he7fbb2a940a9d97f> @ imm = #1960
-    675a:      	b	0x675c <rtt_target::rtt::RttHeader::init::haebaef83091ee026+0x3c> @ imm = #-2
-    675c:      	add	r1, sp, #20
-    675e:      	movs	r0, #4
-    6760:      	strb	r0, [r1]
-    6762:      	ldr	r0, [sp, #20]
-    6764:      	bl	0x7b50 <core::sync::atomic::fence::hab4fc659313d4cc6> @ imm = #5096
-    6768:      	b	0x676a <rtt_target::rtt::RttHeader::init::haebaef83091ee026+0x4a> @ imm = #-2
-    676a:      	ldr	r0, [sp, #16]
-    676c:      	movs	r1, #16
-    676e:      	bl	0x6ffc <core::slice::<impl [T]>::as_mut_ptr::hf14f467ef231dff9> @ imm = #2186
-    6772:      	str	r0, [sp, #4]
-    6774:      	b	0x6776 <rtt_target::rtt::RttHeader::init::haebaef83091ee026+0x56> @ imm = #-2
-    6776:      	ldr	r0, [sp, #4]
-    6778:      	str	r0, [sp, #36]
-    677a:      	movs	r1, #4
-    677c:      	str	r1, [sp, #40]
-    677e:      	adds	r0, r0, #4
-    6780:      	str	r0, [sp, #44]
-    6782:      	ldr	r0, [sp, #44]
-    6784:      	str	r0, [sp]
-    6786:      	b	0x6788 <rtt_target::rtt::RttHeader::init::haebaef83091ee026+0x68> @ imm = #-2
-    6788:      	ldr	r1, [sp]
-    678a:      	ldr	r0, [pc, #16] <$d.8+0x6>
-    678c:      	movs	r2, #12
-    678e:      	bl	0x6f02 <core::intrinsics::copy_nonoverlapping::he7fbb2a940a9d97f> @ imm = #1904
-    6792:      	b	0x6794 <rtt_target::rtt::RttHeader::init::haebaef83091ee026+0x74> @ imm = #-2
-    6794:      	add	sp, #48
-    6796:      	pop	{r7, pc}
-
-00006798 <$d.8>:
-    6798:	9c b3 00 00	.word	0x0000b39c
-    679c:	a1 b3 00 00	.word	0x0000b3a1
-
-000067a0 <rtt_target::rtt::RttHeader::max_up_channels::hf5fa05b4faaefda2>:
-    67a0:      	sub	sp, #4
-    67a2:      	str	r0, [sp]
-    67a4:      	ldr	r0, [r0, #16]
-    67a6:      	add	sp, #4
-    67a8:      	bx	lr
-
-000067aa <rtt_target::rtt::RttChannel::init::hfbd2ce9862242f9a>:
-    67aa:      	push	{r4, r6, r7, lr}
-    67ac:      	add	r7, sp, #8
-    67ae:      	sub	sp, #40
-    67b0:      	str	r3, [sp, #4]
-    67b2:      	mov	r4, r2
-    67b4:      	str	r4, [sp, #8]
-    67b6:      	str	r0, [sp, #12]
-    67b8:      	ldr	r2, [r7, #8]
-    67ba:      	str	r2, [sp, #16]
-    67bc:      	str	r0, [sp, #20]
-    67be:      	str	r1, [sp, #24]
-    67c0:      	str	r4, [sp, #28]
-    67c2:      	str	r3, [sp, #32]
-    67c4:      	str	r2, [sp, #36]
-    67c6:      	bl	0x7ed2 <core::ptr::write_volatile::hb6fd14ae999ddd5d> @ imm = #5896
-    67ca:      	b	0x67cc <rtt_target::rtt::RttChannel::init::hfbd2ce9862242f9a+0x22> @ imm = #-2
-    67cc:      	ldr	r1, [sp, #16]
-    67ce:      	ldr	r0, [sp, #12]
-    67d0:      	adds	r0, #8
-    67d2:      	bl	0x7ec4 <core::ptr::write_volatile::h2231ac4850343f7f> @ imm = #5870
-    67d6:      	b	0x67d8 <rtt_target::rtt::RttChannel::init::hfbd2ce9862242f9a+0x2e> @ imm = #-2
-    67d8:      	ldr	r1, [sp, #8]
-    67da:      	ldr	r0, [sp, #12]
-    67dc:      	bl	0x6842 <rtt_target::rtt::RttChannel::set_mode::he21d912f12cc0e2d> @ imm = #98
-    67e0:      	b	0x67e2 <rtt_target::rtt::RttChannel::init::hfbd2ce9862242f9a+0x38> @ imm = #-2
-    67e2:      	ldr	r1, [sp, #4]
-    67e4:      	ldr	r0, [sp, #12]
-    67e6:      	adds	r0, r0, #4
-    67e8:      	bl	0x7ee0 <core::ptr::write_volatile::hbd2619430a2c7d61> @ imm = #5876
-    67ec:      	b	0x67ee <rtt_target::rtt::RttChannel::init::hfbd2ce9862242f9a+0x44> @ imm = #-2
-    67ee:      	add	sp, #40
-    67f0:      	pop	{r4, r6, r7, pc}
-
-000067f2 <rtt_target::rtt::RttChannel::is_initialized::h5df8277e2eebd53b>:
-    67f2:      	sub	sp, #8
-    67f4:      	str	r0, [sp, #4]
-    67f6:      	ldr	r0, [r0, #4]
-    67f8:      	str	r0, [sp]
-    67fa:      	b	0x67fc <rtt_target::rtt::RttChannel::is_initialized::h5df8277e2eebd53b+0xa> @ imm = #-2
-    67fc:      	ldr	r0, [sp]
-    67fe:      	subs	r1, r0, #1
-    6800:      	sbcs	r0, r1
-    6802:      	add	sp, #8
-    6804:      	bx	lr
-
-00006806 <rtt_target::rtt::RttChannel::mode::h2c85284ec93d74c4>:
-    6806:      	push	{r7, lr}
-    6808:      	add	r7, sp, #0
-    680a:      	sub	sp, #24
-    680c:      	str	r0, [sp, #16]
-    680e:      	adds	r0, #20
-    6810:      	add	r2, sp, #12
-    6812:      	movs	r1, #4
-    6814:      	strb	r1, [r2]
-    6816:      	ldr	r1, [sp, #12]
-    6818:      	bl	0x786e <core::sync::atomic::AtomicUsize::load::h9a663a0eb38718a0> @ imm = #4178
-    681c:      	str	r0, [sp, #4]
-    681e:      	b	0x6820 <rtt_target::rtt::RttChannel::mode::h2c85284ec93d74c4+0x1a> @ imm = #-2
-    6820:      	ldr	r0, [sp, #4]
-    6822:      	movs	r1, #3
-    6824:      	ands	r0, r1
-    6826:      	str	r0, [sp]
-    6828:      	str	r0, [sp, #20]
-    682a:      	cmp	r0, #3
-    682c:      	blo	0x6836 <rtt_target::rtt::RttChannel::mode::h2c85284ec93d74c4+0x30> @ imm = #6
-    682e:      	b	0x6830 <rtt_target::rtt::RttChannel::mode::h2c85284ec93d74c4+0x2a> @ imm = #-2
-    6830:      	movs	r0, #0
-    6832:      	str	r0, [sp, #8]
-    6834:      	b	0x683c <rtt_target::rtt::RttChannel::mode::h2c85284ec93d74c4+0x36> @ imm = #4
-    6836:      	ldr	r0, [sp]
-    6838:      	str	r0, [sp, #8]
-    683a:      	b	0x683c <rtt_target::rtt::RttChannel::mode::h2c85284ec93d74c4+0x36> @ imm = #-2
-    683c:      	ldr	r0, [sp, #8]
-    683e:      	add	sp, #24
-    6840:      	pop	{r7, pc}
-
-00006842 <rtt_target::rtt::RttChannel::set_mode::he21d912f12cc0e2d>:
-    6842:      	push	{r7, lr}
-    6844:      	add	r7, sp, #0
-    6846:      	sub	sp, #32
-    6848:      	str	r1, [sp, #4]
-    684a:      	str	r0, [sp, #24]
-    684c:      	str	r1, [sp, #28]
-    684e:      	adds	r0, #20
-    6850:      	str	r0, [sp, #8]
-    6852:      	add	r2, sp, #16
-    6854:      	movs	r1, #4
-    6856:      	strb	r1, [r2]
-    6858:      	ldr	r1, [sp, #16]
-    685a:      	bl	0x786e <core::sync::atomic::AtomicUsize::load::h9a663a0eb38718a0> @ imm = #4112
-    685e:      	str	r0, [sp, #12]
-    6860:      	b	0x6862 <rtt_target::rtt::RttChannel::set_mode::he21d912f12cc0e2d+0x20> @ imm = #-2
-    6862:      	ldr	r0, [sp, #8]
-    6864:      	ldr	r2, [sp, #4]
-    6866:      	ldr	r1, [sp, #12]
-    6868:      	movs	r3, #3
-    686a:      	bics	r1, r3
-    686c:      	orrs	r1, r2
-    686e:      	add	r3, sp, #20
-    6870:      	movs	r2, #4
-    6872:      	strb	r2, [r3]
-    6874:      	ldr	r2, [sp, #20]
-    6876:      	bl	0x7898 <core::sync::atomic::AtomicUsize::store::h8f3ace57839c4a24> @ imm = #4126
-    687a:      	b	0x687c <rtt_target::rtt::RttChannel::set_mode::he21d912f12cc0e2d+0x3a> @ imm = #-2
-    687c:      	add	sp, #32
-    687e:      	pop	{r7, pc}
-
-00006880 <rtt_target::rtt::RttChannel::writer::h0ee597b617166698>:
-    6880:      	push	{r7, lr}
-    6882:      	add	r7, sp, #0
-    6884:      	sub	sp, #16
-    6886:      	str	r1, [sp]
-    6888:      	mov	r1, r0
-    688a:      	ldr	r0, [sp]
-    688c:      	str	r1, [sp, #4]
-    688e:      	str	r0, [sp, #12]
-    6890:      	bl	0x68ac <rtt_target::rtt::RttChannel::read_pointers::hfd6853074f211659> @ imm = #24
-    6894:      	str	r0, [sp, #8]
-    6896:      	b	0x6898 <rtt_target::rtt::RttChannel::writer::h0ee597b617166698+0x18> @ imm = #-2
-    6898:      	ldr	r1, [sp, #4]
-    689a:      	ldr	r0, [sp, #8]
-    689c:      	ldr	r2, [sp]
-    689e:      	str	r2, [r1]
-    68a0:      	str	r0, [r1, #4]
-    68a2:      	movs	r0, #0
-    68a4:      	str	r0, [r1, #8]
-    68a6:      	strb	r0, [r1, #12]
-    68a8:      	add	sp, #16
-    68aa:      	pop	{r7, pc}
-
-000068ac <rtt_target::rtt::RttChannel::read_pointers::hfd6853074f211659>:
-    68ac:      	push	{r7, lr}
-    68ae:      	add	r7, sp, #0
-    68b0:      	sub	sp, #64
-    68b2:      	str	r0, [sp, #16]
-    68b4:      	str	r0, [sp, #52]
-    68b6:      	adds	r0, #12
-    68b8:      	add	r2, sp, #32
-    68ba:      	movs	r1, #4
-    68bc:      	strb	r1, [r2]
-    68be:      	ldr	r1, [sp, #32]
-    68c0:      	bl	0x786e <core::sync::atomic::AtomicUsize::load::h9a663a0eb38718a0> @ imm = #4010
-    68c4:      	mov	r1, r0
-    68c6:      	str	r1, [sp, #20]
-    68c8:      	str	r0, [sp, #56]
-    68ca:      	b	0x68cc <rtt_target::rtt::RttChannel::read_pointers::hfd6853074f211659+0x20> @ imm = #-2
-    68cc:      	ldr	r0, [sp, #16]
-    68ce:      	adds	r0, #16
-    68d0:      	add	r2, sp, #36
-    68d2:      	movs	r1, #4
-    68d4:      	strb	r1, [r2]
-    68d6:      	ldr	r1, [sp, #36]
-    68d8:      	bl	0x786e <core::sync::atomic::AtomicUsize::load::h9a663a0eb38718a0> @ imm = #3986
-    68dc:      	mov	r1, r0
-    68de:      	str	r1, [sp, #12]
-    68e0:      	str	r0, [sp, #60]
-    68e2:      	b	0x68e4 <rtt_target::rtt::RttChannel::read_pointers::hfd6853074f211659+0x38> @ imm = #-2
-    68e4:      	ldr	r0, [sp, #20]
-    68e6:      	ldr	r1, [sp, #16]
-    68e8:      	ldr	r1, [r1, #8]
-    68ea:      	cmp	r0, r1
-    68ec:      	bhs	0x690e <rtt_target::rtt::RttChannel::read_pointers::hfd6853074f211659+0x62> @ imm = #30
-    68ee:      	b	0x68f0 <rtt_target::rtt::RttChannel::read_pointers::hfd6853074f211659+0x44> @ imm = #-2
-    68f0:      	ldr	r1, [sp, #12]
-    68f2:      	ldr	r0, [sp, #16]
-    68f4:      	ldr	r2, [r0, #8]
-    68f6:      	movs	r0, #1
-    68f8:      	movs	r3, #0
-    68fa:      	str	r3, [sp, #4]
-    68fc:      	cmp	r1, r2
-    68fe:      	str	r0, [sp, #8]
-    6900:      	bhs	0x6906 <rtt_target::rtt::RttChannel::read_pointers::hfd6853074f211659+0x5a> @ imm = #2
-    6902:      	ldr	r0, [sp, #4]
-    6904:      	str	r0, [sp, #8]
-    6906:      	ldr	r0, [sp, #8]
-    6908:      	add	r1, sp, #40
-    690a:      	strb	r0, [r1]
-    690c:      	b	0x6916 <rtt_target::rtt::RttChannel::read_pointers::hfd6853074f211659+0x6a> @ imm = #6
-    690e:      	add	r1, sp, #40
-    6910:      	movs	r0, #1
-    6912:      	strb	r0, [r1]
-    6914:      	b	0x6916 <rtt_target::rtt::RttChannel::read_pointers::hfd6853074f211659+0x6a> @ imm = #-2
-    6916:      	add	r0, sp, #40
-    6918:      	ldrb	r0, [r0]
-    691a:      	lsls	r0, r0, #31
-    691c:      	cmp	r0, #0
-    691e:      	bne	0x692c <rtt_target::rtt::RttChannel::read_pointers::hfd6853074f211659+0x80> @ imm = #10
-    6920:      	b	0x6922 <rtt_target::rtt::RttChannel::read_pointers::hfd6853074f211659+0x76> @ imm = #-2
-    6922:      	ldr	r0, [sp, #12]
-    6924:      	ldr	r1, [sp, #20]
-    6926:      	str	r1, [sp, #24]
-    6928:      	str	r0, [sp, #28]
-    692a:      	b	0x695c <rtt_target::rtt::RttChannel::read_pointers::hfd6853074f211659+0xb0> @ imm = #46
-    692c:      	ldr	r0, [sp, #16]
-    692e:      	adds	r0, #12
-    6930:      	add	r2, sp, #44
-    6932:      	movs	r1, #4
-    6934:      	strb	r1, [r2]
-    6936:      	ldr	r2, [sp, #44]
-    6938:      	movs	r1, #0
-    693a:      	bl	0x7898 <core::sync::atomic::AtomicUsize::store::h8f3ace57839c4a24> @ imm = #3930
-    693e:      	b	0x6940 <rtt_target::rtt::RttChannel::read_pointers::hfd6853074f211659+0x94> @ imm = #-2
-    6940:      	ldr	r0, [sp, #16]
-    6942:      	adds	r0, #16
-    6944:      	add	r2, sp, #48
-    6946:      	movs	r1, #4
-    6948:      	strb	r1, [r2]
-    694a:      	ldr	r2, [sp, #48]
-    694c:      	movs	r1, #0
-    694e:      	bl	0x7898 <core::sync::atomic::AtomicUsize::store::h8f3ace57839c4a24> @ imm = #3910
-    6952:      	b	0x6954 <rtt_target::rtt::RttChannel::read_pointers::hfd6853074f211659+0xa8> @ imm = #-2
-    6954:      	movs	r0, #0
-    6956:      	str	r0, [sp, #24]
-    6958:      	str	r0, [sp, #28]
-    695a:      	b	0x695c <rtt_target::rtt::RttChannel::read_pointers::hfd6853074f211659+0xb0> @ imm = #-2
-    695c:      	ldr	r0, [sp, #24]
-    695e:      	ldr	r1, [sp, #28]
-    6960:      	add	sp, #64
-    6962:      	pop	{r7, pc}
-
-00006964 <rtt_target::rtt::RttWriter::write::he7941ff0a4dacd31>:
-    6964:      	push	{r7, lr}
-    6966:      	add	r7, sp, #0
-    6968:      	sub	sp, #32
-    696a:      	str	r2, [sp, #4]
-    696c:      	str	r1, [sp, #8]
-    696e:      	str	r0, [sp, #12]
-    6970:      	str	r0, [sp, #20]
-    6972:      	str	r1, [sp, #24]
-    6974:      	str	r2, [sp, #28]
-    6976:      	ldr	r0, [r0]
-    6978:      	bl	0x6806 <rtt_target::rtt::RttChannel::mode::h2c85284ec93d74c4> @ imm = #-374
-    697c:      	str	r0, [sp, #16]
-    697e:      	b	0x6980 <rtt_target::rtt::RttWriter::write::he7941ff0a4dacd31+0x1c> @ imm = #-2
-    6980:      	ldr	r3, [sp, #4]
-    6982:      	ldr	r2, [sp, #8]
-    6984:      	ldr	r1, [sp, #16]
-    6986:      	ldr	r0, [sp, #12]
-    6988:      	bl	0x6994 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c> @ imm = #8
-    698c:      	b	0x698e <rtt_target::rtt::RttWriter::write::he7941ff0a4dacd31+0x2a> @ imm = #-2
-    698e:      	add	sp, #32
-    6990:      	pop	{r7, pc}
-    6992:      	bmi	0x693e <rtt_target::rtt::RttChannel::read_pointers::hfd6853074f211659+0x92> @ imm = #-88
-
-00006994 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c>:
-    6994:      	push	{r7, lr}
-    6996:      	add	r7, sp, #0
-    6998:      	sub	sp, #104
-    699a:      	str	r0, [sp, #48]
-    699c:      	str	r1, [sp, #52]
-    699e:      	str	r2, [sp, #56]
-    69a0:      	str	r3, [sp, #60]
-    69a2:      	str	r0, [sp, #84]
-    69a4:      	b	0x69a6 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x12> @ imm = #-2
-    69a6:      	ldr	r0, [sp, #48]
-    69a8:      	adds	r0, #12
-    69aa:      	ldr	r1, [pc, #336] <$d.22+0x2>
-    69ac:      	bl	0x6c98 <<rtt_target::rtt::WriteState as core::cmp::PartialEq>::eq::hbb1081db84dfabd4> @ imm = #744
-    69b0:      	str	r0, [sp, #44]
-    69b2:      	b	0x69b4 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x20> @ imm = #-2
-    69b4:      	ldr	r0, [sp, #44]
-    69b6:      	lsls	r0, r0, #31
-    69b8:      	cmp	r0, #0
-    69ba:      	bne	0x69c6 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x32> @ imm = #8
-    69bc:      	b	0x69be <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x2a> @ imm = #-2
-    69be:      	add	r1, sp, #64
-    69c0:      	movs	r0, #0
-    69c2:      	strb	r0, [r1]
-    69c4:      	b	0x69de <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x4a> @ imm = #22
-    69c6:      	ldr	r0, [sp, #56]
-    69c8:      	ldr	r1, [sp, #60]
-    69ca:      	bl	0x7006 <core::slice::<impl [T]>::is_empty::hcbf74f500e790572> @ imm = #1592
-    69ce:      	str	r0, [sp, #40]
-    69d0:      	b	0x69d2 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x3e> @ imm = #-2
-    69d2:      	ldr	r1, [sp, #40]
-    69d4:      	movs	r0, #1
-    69d6:      	bics	r0, r1
-    69d8:      	add	r1, sp, #64
-    69da:      	strb	r0, [r1]
-    69dc:      	b	0x69de <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x4a> @ imm = #-2
-    69de:      	add	r0, sp, #64
-    69e0:      	ldrb	r0, [r0]
-    69e2:      	lsls	r0, r0, #31
-    69e4:      	cmp	r0, #0
-    69e6:      	bne	0x69ee <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x5a> @ imm = #4
-    69e8:      	b	0x69ea <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x56> @ imm = #-2
-    69ea:      	add	sp, #104
-    69ec:      	pop	{r7, pc}
-    69ee:      	ldr	r0, [sp, #48]
-    69f0:      	bl	0x6b10 <rtt_target::rtt::RttWriter::writable_contiguous::ha6340a4d743fdf5b> @ imm = #284
-    69f4:      	str	r0, [sp, #36]
-    69f6:      	b	0x69f8 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x64> @ imm = #-2
-    69f8:      	ldr	r0, [sp, #36]
-    69fa:      	ldr	r1, [sp, #60]
-    69fc:      	bl	0x7f74 <core::cmp::min::hda110f1328bdc05b> @ imm = #5492
-    6a00:      	mov	r1, r0
-    6a02:      	str	r1, [sp, #32]
-    6a04:      	str	r0, [sp, #88]
-    6a06:      	b	0x6a08 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x74> @ imm = #-2
-    6a08:      	ldr	r0, [sp, #32]
-    6a0a:      	cmp	r0, #0
-    6a0c:      	bne	0x6a24 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x90> @ imm = #20
-    6a0e:      	b	0x6a10 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x7c> @ imm = #-2
-    6a10:      	ldr	r0, [sp, #52]
-    6a12:      	str	r0, [sp, #28]
-    6a14:      	cmp	r0, #0
-    6a16:      	beq	0x6a32 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x9e> @ imm = #24
-    6a18:      	b	0x6a1a <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x86> @ imm = #-2
-    6a1a:      	ldr	r0, [sp, #28]
-    6a1c:      	cmp	r0, #1
-    6a1e:      	beq	0x6a40 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0xac> @ imm = #30
-    6a20:      	b	0x6a22 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x8e> @ imm = #-2
-    6a22:      	b	0x6a4e <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0xba> @ imm = #40
-    6a24:      	ldr	r0, [sp, #56]
-    6a26:      	ldr	r1, [sp, #60]
-    6a28:      	bl	0x8198 <core::slice::<impl [T]>::as_ptr::had785fb836f3ca27> @ imm = #5996
-    6a2c:      	str	r0, [sp, #24]
-    6a2e:      	b	0x6a64 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0xd0> @ imm = #50
-    6a30:      	trap
-    6a32:      	ldr	r1, [sp, #48]
-    6a34:      	add	r2, sp, #68
-    6a36:      	movs	r0, #2
-    6a38:      	strb	r0, [r2]
-    6a3a:      	ldr	r0, [sp, #68]
-    6a3c:      	strb	r0, [r1, #12]
-    6a3e:      	b	0x69ea <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x56> @ imm = #-88
-    6a40:      	ldr	r1, [sp, #48]
-    6a42:      	add	r2, sp, #72
-    6a44:      	movs	r0, #1
-    6a46:      	strb	r0, [r2]
-    6a48:      	ldr	r0, [sp, #72]
-    6a4a:      	strb	r0, [r1, #12]
-    6a4c:      	b	0x6a24 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x90> @ imm = #-44
-    6a4e:      	ldr	r1, [sp, #48]
-    6a50:      	ldr	r0, [r1]
-    6a52:      	adds	r0, #12
-    6a54:      	ldr	r1, [r1, #4]
-    6a56:      	add	r3, sp, #76
-    6a58:      	movs	r2, #4
-    6a5a:      	strb	r2, [r3]
-    6a5c:      	ldr	r2, [sp, #76]
-    6a5e:      	bl	0x7898 <core::sync::atomic::AtomicUsize::store::h8f3ace57839c4a24> @ imm = #3638
-    6a62:      	b	0x69a6 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x12> @ imm = #-192
-    6a64:      	ldr	r1, [sp, #48]
-    6a66:      	ldr	r0, [r1]
-    6a68:      	ldr	r0, [r0, #4]
-    6a6a:      	ldr	r1, [r1, #4]
-    6a6c:      	str	r0, [sp, #92]
-    6a6e:      	str	r1, [sp, #96]
-    6a70:      	adds	r0, r0, r1
-    6a72:      	str	r0, [sp, #100]
-    6a74:      	ldr	r0, [sp, #100]
-    6a76:      	str	r0, [sp, #20]
-    6a78:      	b	0x6a7a <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0xe6> @ imm = #-2
-    6a7a:      	ldr	r2, [sp, #32]
-    6a7c:      	ldr	r1, [sp, #20]
-    6a7e:      	ldr	r0, [sp, #24]
-    6a80:      	bl	0x6f02 <core::intrinsics::copy_nonoverlapping::he7fbb2a940a9d97f> @ imm = #1150
-    6a84:      	b	0x6a86 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0xf2> @ imm = #-2
-    6a86:      	ldr	r0, [sp, #32]
-    6a88:      	ldr	r1, [sp, #48]
-    6a8a:      	ldr	r1, [r1, #4]
-    6a8c:      	adds	r0, r1, r0
-    6a8e:      	str	r0, [sp, #16]
-    6a90:      	cmp	r0, r1
-    6a92:      	blo	0x6aaa <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x116> @ imm = #20
-    6a94:      	b	0x6a96 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x102> @ imm = #-2
-    6a96:      	ldr	r0, [sp, #32]
-    6a98:      	ldr	r1, [sp, #48]
-    6a9a:      	ldr	r2, [sp, #16]
-    6a9c:      	str	r2, [r1, #4]
-    6a9e:      	ldr	r1, [r1, #8]
-    6aa0:      	adds	r0, r1, r0
-    6aa2:      	str	r0, [sp, #12]
-    6aa4:      	cmp	r0, r1
-    6aa6:      	blo	0x6ac8 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x134> @ imm = #30
-    6aa8:      	b	0x6ab6 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x122> @ imm = #10
-    6aaa:      	ldr	r0, [pc, #88] <$d.22+0xa>
-    6aac:      	ldr	r2, [pc, #92] <$d.22+0x10>
-    6aae:      	movs	r1, #28
-    6ab0:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #6804
-    6ab4:      	trap
-    6ab6:      	ldr	r1, [sp, #48]
-    6ab8:      	ldr	r0, [sp, #12]
-    6aba:      	str	r0, [r1, #8]
-    6abc:      	ldr	r0, [r1, #4]
-    6abe:      	ldr	r1, [r1]
-    6ac0:      	ldr	r1, [r1, #8]
-    6ac2:      	cmp	r0, r1
-    6ac4:      	bhs	0x6aea <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x156> @ imm = #34
-    6ac6:      	b	0x6ad4 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x140> @ imm = #10
-    6ac8:      	ldr	r0, [pc, #56] <$d.22+0x8>
-    6aca:      	ldr	r2, [pc, #60] <$d.22+0xe>
-    6acc:      	movs	r1, #28
-    6ace:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #6774
-    6ad2:      	trap
-    6ad4:      	ldr	r2, [sp, #32]
-    6ad6:      	ldr	r0, [sp, #56]
-    6ad8:      	ldr	r1, [sp, #60]
-    6ada:      	str	r2, [sp, #80]
-    6adc:      	ldr	r2, [sp, #80]
-    6ade:      	ldr	r3, [pc, #32] <$d.22+0x6>
-    6ae0:      	bl	0x8008 <core::slice::index::<impl core::ops::index::Index<I> for [T]>::index::h287369d2223dfeb3> @ imm = #5412
-    6ae4:      	str	r0, [sp, #4]
-    6ae6:      	str	r1, [sp, #8]
-    6ae8:      	b	0x6af2 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x15e> @ imm = #6
-    6aea:      	ldr	r1, [sp, #48]
-    6aec:      	movs	r0, #0
-    6aee:      	str	r0, [r1, #4]
-    6af0:      	b	0x6ad4 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x140> @ imm = #-32
-    6af2:      	ldr	r0, [sp, #8]
-    6af4:      	ldr	r1, [sp, #4]
-    6af6:      	str	r1, [sp, #56]
-    6af8:      	str	r0, [sp, #60]
-    6afa:      	b	0x69a6 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c+0x12> @ imm = #-344
-
-00006afc <$d.22>:
-    6afc:	51 b4 00 00	.word	0x0000b451
-    6b00:	74 b4 00 00	.word	0x0000b474
-    6b04:	10 b4 00 00	.word	0x0000b410
-    6b08:	64 b4 00 00	.word	0x0000b464
-    6b0c:	54 b4 00 00	.word	0x0000b454
-
-00006b10 <rtt_target::rtt::RttWriter::writable_contiguous::ha6340a4d743fdf5b>:
-    6b10:      	push	{r7, lr}
-    6b12:      	add	r7, sp, #0
-    6b14:      	sub	sp, #40
-    6b16:      	str	r0, [sp, #20]
-    6b18:      	str	r0, [sp, #32]
-    6b1a:      	ldr	r0, [r0]
-    6b1c:      	bl	0x68ac <rtt_target::rtt::RttChannel::read_pointers::hfd6853074f211659> @ imm = #-628
-    6b20:      	str	r1, [sp, #24]
-    6b22:      	b	0x6b24 <rtt_target::rtt::RttWriter::writable_contiguous::ha6340a4d743fdf5b+0x14> @ imm = #-2
-    6b24:      	ldr	r0, [sp, #24]
-    6b26:      	ldr	r1, [sp, #20]
-    6b28:      	str	r0, [sp, #36]
-    6b2a:      	ldr	r1, [r1, #4]
-    6b2c:      	cmp	r0, r1
-    6b2e:      	bhi	0x6b3a <rtt_target::rtt::RttWriter::writable_contiguous::ha6340a4d743fdf5b+0x2a> @ imm = #8
-    6b30:      	b	0x6b32 <rtt_target::rtt::RttWriter::writable_contiguous::ha6340a4d743fdf5b+0x22> @ imm = #-2
-    6b32:      	ldr	r0, [sp, #24]
-    6b34:      	cmp	r0, #0
-    6b36:      	beq	0x6b7a <rtt_target::rtt::RttWriter::writable_contiguous::ha6340a4d743fdf5b+0x6a> @ imm = #64
-    6b38:      	b	0x6b8c <rtt_target::rtt::RttWriter::writable_contiguous::ha6340a4d743fdf5b+0x7c> @ imm = #80
-    6b3a:      	ldr	r0, [sp, #24]
-    6b3c:      	ldr	r1, [sp, #20]
-    6b3e:      	ldr	r1, [r1, #4]
-    6b40:      	subs	r2, r0, r1
-    6b42:      	str	r2, [sp, #16]
-    6b44:      	cmp	r0, r1
-    6b46:      	blo	0x6b56 <rtt_target::rtt::RttWriter::writable_contiguous::ha6340a4d743fdf5b+0x46> @ imm = #12
-    6b48:      	b	0x6b4a <rtt_target::rtt::RttWriter::writable_contiguous::ha6340a4d743fdf5b+0x3a> @ imm = #-2
-    6b4a:      	ldr	r0, [sp, #16]
-    6b4c:      	subs	r1, r0, #1
-    6b4e:      	str	r1, [sp, #12]
-    6b50:      	cmp	r0, #1
-    6b52:      	blo	0x6b68 <rtt_target::rtt::RttWriter::writable_contiguous::ha6340a4d743fdf5b+0x58> @ imm = #18
-    6b54:      	b	0x6b62 <rtt_target::rtt::RttWriter::writable_contiguous::ha6340a4d743fdf5b+0x52> @ imm = #10
-    6b56:      	ldr	r0, [pc, #132] <$d.24+0x2>
-    6b58:      	ldr	r2, [pc, #140] <$d.24+0xc>
-    6b5a:      	movs	r1, #33
-    6b5c:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #6632
-    6b60:      	trap
-    6b62:      	ldr	r0, [sp, #12]
-    6b64:      	str	r0, [sp, #28]
-    6b66:      	b	0x6b74 <rtt_target::rtt::RttWriter::writable_contiguous::ha6340a4d743fdf5b+0x64> @ imm = #10
-    6b68:      	ldr	r0, [pc, #112] <$d.24>
-    6b6a:      	ldr	r2, [pc, #124] <$d.24+0xe>
-    6b6c:      	movs	r1, #33
-    6b6e:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #6614
-    6b72:      	trap
-    6b74:      	ldr	r0, [sp, #28]
-    6b76:      	add	sp, #40
-    6b78:      	pop	{r7, pc}
-    6b7a:      	ldr	r1, [sp, #20]
-    6b7c:      	ldr	r0, [r1]
-    6b7e:      	ldr	r0, [r0, #8]
-    6b80:      	ldr	r1, [r1, #4]
-    6b82:      	subs	r2, r0, r1
-    6b84:      	str	r2, [sp, #8]
-    6b86:      	cmp	r0, r1
-    6b88:      	blo	0x6bbc <rtt_target::rtt::RttWriter::writable_contiguous::ha6340a4d743fdf5b+0xac> @ imm = #48
-    6b8a:      	b	0x6bb0 <rtt_target::rtt::RttWriter::writable_contiguous::ha6340a4d743fdf5b+0xa0> @ imm = #34
-    6b8c:      	ldr	r1, [sp, #20]
-    6b8e:      	ldr	r0, [r1]
-    6b90:      	ldr	r0, [r0, #8]
-    6b92:      	ldr	r1, [r1, #4]
-    6b94:      	subs	r2, r0, r1
-    6b96:      	str	r2, [sp, #4]
-    6b98:      	cmp	r0, r1
-    6b9a:      	blo	0x6ba4 <rtt_target::rtt::RttWriter::writable_contiguous::ha6340a4d743fdf5b+0x94> @ imm = #6
-    6b9c:      	b	0x6b9e <rtt_target::rtt::RttWriter::writable_contiguous::ha6340a4d743fdf5b+0x8e> @ imm = #-2
-    6b9e:      	ldr	r0, [sp, #4]
-    6ba0:      	str	r0, [sp, #28]
-    6ba2:      	b	0x6b74 <rtt_target::rtt::RttWriter::writable_contiguous::ha6340a4d743fdf5b+0x64> @ imm = #-50
-    6ba4:      	ldr	r0, [pc, #52] <$d.24>
-    6ba6:      	ldr	r2, [pc, #56] <$d.24+0x6>
-    6ba8:      	movs	r1, #33
-    6baa:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #6554
-    6bae:      	trap
-    6bb0:      	ldr	r0, [sp, #8]
-    6bb2:      	subs	r1, r0, #1
-    6bb4:      	str	r1, [sp]
-    6bb6:      	cmp	r0, #1
-    6bb8:      	blo	0x6bce <rtt_target::rtt::RttWriter::writable_contiguous::ha6340a4d743fdf5b+0xbe> @ imm = #18
-    6bba:      	b	0x6bc8 <rtt_target::rtt::RttWriter::writable_contiguous::ha6340a4d743fdf5b+0xb8> @ imm = #10
-    6bbc:      	ldr	r0, [pc, #28] <$d.24>
-    6bbe:      	ldr	r2, [pc, #36] <$d.24+0xa>
-    6bc0:      	movs	r1, #33
-    6bc2:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #6530
-    6bc6:      	trap
-    6bc8:      	ldr	r0, [sp]
-    6bca:      	str	r0, [sp, #28]
-    6bcc:      	b	0x6b74 <rtt_target::rtt::RttWriter::writable_contiguous::ha6340a4d743fdf5b+0x64> @ imm = #-92
-    6bce:      	ldr	r0, [pc, #12] <$d.24+0x2>
-    6bd0:      	ldr	r2, [pc, #16] <$d.24+0x8>
-    6bd2:      	movs	r1, #33
-    6bd4:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #6512
-    6bd8:      	trap
-    6bda:      	mov	r8, r8
-
-00006bdc <$d.24>:
-    6bdc:	30 b4 00 00	.word	0x0000b430
-    6be0:	94 b4 00 00	.word	0x0000b494
-    6be4:	a4 b4 00 00	.word	0x0000b4a4
-    6be8:	84 b4 00 00	.word	0x0000b484
-
-00006bec <rtt_target::rtt::RttWriter::is_failed::h6672171e1e5a4b42>:
-    6bec:      	push	{r7, lr}
-    6bee:      	add	r7, sp, #0
-    6bf0:      	sub	sp, #8
-    6bf2:      	str	r0, [sp, #4]
-    6bf4:      	adds	r0, #12
-    6bf6:      	ldr	r1, [pc, #20] <$d.26+0x2>
-    6bf8:      	bl	0x6630 <core::cmp::PartialEq::ne::h34b24d8849367d53> @ imm = #-1484
-    6bfc:      	str	r0, [sp]
-    6bfe:      	b	0x6c00 <rtt_target::rtt::RttWriter::is_failed::h6672171e1e5a4b42+0x14> @ imm = #-2
-    6c00:      	ldr	r0, [sp]
-    6c02:      	movs	r1, #1
-    6c04:      	ands	r0, r1
-    6c06:      	add	sp, #8
-    6c08:      	pop	{r7, pc}
-    6c0a:      	mov	r8, r8
-
-00006c0c <$d.26>:
-    6c0c:	b4 b4 00 00	.word	0x0000b4b4
-
-00006c10 <rtt_target::rtt::RttWriter::commit_impl::hb5e33a76af7e9407>:
-    6c10:      	push	{r7, lr}
-    6c12:      	add	r7, sp, #0
-    6c14:      	sub	sp, #16
-    6c16:      	str	r0, [sp]
-    6c18:      	str	r0, [sp, #12]
-    6c1a:      	ldrb	r0, [r0, #12]
-    6c1c:      	cmp	r0, #2
-    6c1e:      	blo	0x6c26 <rtt_target::rtt::RttWriter::commit_impl::hb5e33a76af7e9407+0x16> @ imm = #4
-    6c20:      	b	0x6c22 <rtt_target::rtt::RttWriter::commit_impl::hb5e33a76af7e9407+0x12> @ imm = #-2
-    6c22:      	b	0x6c3c <rtt_target::rtt::RttWriter::commit_impl::hb5e33a76af7e9407+0x2c> @ imm = #22
-    6c24:      	trap
-    6c26:      	ldr	r1, [sp]
-    6c28:      	ldr	r0, [r1]
-    6c2a:      	adds	r0, #12
-    6c2c:      	ldr	r1, [r1, #4]
-    6c2e:      	add	r3, sp, #4
-    6c30:      	movs	r2, #4
-    6c32:      	strb	r2, [r3]
-    6c34:      	ldr	r2, [sp, #4]
-    6c36:      	bl	0x7898 <core::sync::atomic::AtomicUsize::store::h8f3ace57839c4a24> @ imm = #3166
-    6c3a:      	b	0x6c40 <rtt_target::rtt::RttWriter::commit_impl::hb5e33a76af7e9407+0x30> @ imm = #2
-    6c3c:      	add	sp, #16
-    6c3e:      	pop	{r7, pc}
-    6c40:      	ldr	r1, [sp]
-    6c42:      	add	r2, sp, #8
-    6c44:      	movs	r0, #2
-    6c46:      	strb	r0, [r2]
-    6c48:      	ldr	r0, [sp, #8]
-    6c4a:      	strb	r0, [r1, #12]
-    6c4c:      	b	0x6c3c <rtt_target::rtt::RttWriter::commit_impl::hb5e33a76af7e9407+0x2c> @ imm = #-20
-
-00006c4e <<rtt_target::rtt::RttWriter as core::ops::drop::Drop>::drop::ha43684152be6e312>:
-    6c4e:      	push	{r7, lr}
-    6c50:      	add	r7, sp, #0
-    6c52:      	sub	sp, #8
-    6c54:      	str	r0, [sp, #4]
-    6c56:      	bl	0x6c10 <rtt_target::rtt::RttWriter::commit_impl::hb5e33a76af7e9407> @ imm = #-74
-    6c5a:      	b	0x6c5c <<rtt_target::rtt::RttWriter as core::ops::drop::Drop>::drop::ha43684152be6e312+0xe> @ imm = #-2
-    6c5c:      	add	sp, #8
-    6c5e:      	pop	{r7, pc}
-
-00006c60 <<rtt_target::rtt::RttWriter as core::fmt::Write>::write_str::h424414bcc1cbb99c>:
-    6c60:      	push	{r7, lr}
-    6c62:      	add	r7, sp, #0
-    6c64:      	sub	sp, #48
-    6c66:      	str	r0, [sp, #4]
-    6c68:      	str	r0, [sp, #20]
-    6c6a:      	str	r1, [sp, #24]
-    6c6c:      	str	r2, [sp, #28]
-    6c6e:      	str	r1, [sp, #32]
-    6c70:      	str	r2, [sp, #36]
-    6c72:      	str	r1, [sp, #40]
-    6c74:      	str	r2, [sp, #44]
-    6c76:      	ldr	r0, [sp, #40]
-    6c78:      	str	r0, [sp, #8]
-    6c7a:      	ldr	r0, [sp, #44]
-    6c7c:      	str	r0, [sp, #12]
-    6c7e:      	b	0x6c80 <<rtt_target::rtt::RttWriter as core::fmt::Write>::write_str::h424414bcc1cbb99c+0x20> @ imm = #-2
-    6c80:      	ldr	r2, [sp, #12]
-    6c82:      	ldr	r1, [sp, #8]
-    6c84:      	ldr	r0, [sp, #4]
-    6c86:      	bl	0x6964 <rtt_target::rtt::RttWriter::write::he7941ff0a4dacd31> @ imm = #-806
-    6c8a:      	b	0x6c8c <<rtt_target::rtt::RttWriter as core::fmt::Write>::write_str::h424414bcc1cbb99c+0x2c> @ imm = #-2
-    6c8c:      	add	r0, sp, #16
-    6c8e:      	movs	r1, #0
-    6c90:      	strb	r1, [r0]
-    6c92:      	ldrb	r0, [r0]
-    6c94:      	add	sp, #48
-    6c96:      	pop	{r7, pc}
-
-00006c98 <<rtt_target::rtt::WriteState as core::cmp::PartialEq>::eq::hbb1081db84dfabd4>:
-    6c98:      	sub	sp, #20
-    6c9a:      	str	r0, [sp, #4]
-    6c9c:      	str	r1, [sp, #8]
-    6c9e:      	ldrb	r0, [r0]
-    6ca0:      	str	r0, [sp, #12]
-    6ca2:      	ldrb	r1, [r1]
-    6ca4:      	str	r1, [sp, #16]
-    6ca6:      	cmp	r0, r1
-    6ca8:      	beq	0x6cb4 <<rtt_target::rtt::WriteState as core::cmp::PartialEq>::eq::hbb1081db84dfabd4+0x1c> @ imm = #8
-    6caa:      	b	0x6cac <<rtt_target::rtt::WriteState as core::cmp::PartialEq>::eq::hbb1081db84dfabd4+0x14> @ imm = #-2
-    6cac:      	mov	r1, sp
-    6cae:      	movs	r0, #0
-    6cb0:      	strb	r0, [r1]
-    6cb2:      	b	0x6cbc <<rtt_target::rtt::WriteState as core::cmp::PartialEq>::eq::hbb1081db84dfabd4+0x24> @ imm = #6
-    6cb4:      	mov	r1, sp
-    6cb6:      	movs	r0, #1
-    6cb8:      	strb	r0, [r1]
-    6cba:      	b	0x6cbc <<rtt_target::rtt::WriteState as core::cmp::PartialEq>::eq::hbb1081db84dfabd4+0x24> @ imm = #-2
-    6cbc:      	mov	r0, sp
-    6cbe:      	ldrb	r0, [r0]
-    6cc0:      	add	sp, #20
-    6cc2:      	bx	lr
-
-00006cc4 <core::char::methods::encode_utf8_raw::h7513c15b37cd2e1d>:
-    6cc4:      	push	{r4, r5, r7, lr}
-    6cc6:      	add	r7, sp, #8
-    6cc8:      	sub	sp, #216
-    6cca:      	str	r2, [sp, #60]
-    6ccc:      	str	r1, [sp, #64]
-    6cce:      	str	r0, [sp, #68]
-    6cd0:      	str	r1, [sp, #156]
-    6cd2:      	str	r2, [sp, #160]
-    6cd4:      	ldr	r0, [sp, #68]
-    6cd6:      	bl	0x6ec0 <core::char::methods::len_utf8::hbe32fe9fb78f01cc> @ imm = #486
-    6cda:      	str	r0, [sp, #72]
-    6cdc:      	b	0x6cde <core::char::methods::encode_utf8_raw::h7513c15b37cd2e1d+0x1a> @ imm = #-2
-    6cde:      	ldr	r1, [sp, #60]
-    6ce0:      	ldr	r0, [sp, #64]
-    6ce2:      	ldr	r2, [sp, #72]
-    6ce4:      	str	r2, [sp, #48]
-    6ce6:      	ldr	r2, [pc, #404] <$d.3+0x2>
-    6ce8:      	bl	0x802e <core::slice::index::<impl core::ops::index::IndexMut<I> for [T]>::index_mut::h94ec7aa701508980> @ imm = #4930
-    6cec:      	str	r0, [sp, #52]
-    6cee:      	str	r1, [sp, #56]
-    6cf0:      	b	0x6cf2 <core::char::methods::encode_utf8_raw::h7513c15b37cd2e1d+0x2e> @ imm = #-2
-    6cf2:      	ldr	r0, [sp, #56]
-    6cf4:      	ldr	r1, [sp, #52]
-    6cf6:      	ldr	r2, [sp, #48]
-    6cf8:      	str	r2, [sp, #76]
-    6cfa:      	str	r1, [sp, #80]
-    6cfc:      	str	r0, [sp, #84]
-    6cfe:      	ldr	r0, [sp, #76]
-    6d00:      	subs	r0, r0, #1
-    6d02:      	str	r0, [sp, #44]
-    6d04:      	cmp	r0, #3
-    6d06:      	bhi	0x6d24 <$t.2>           @ imm = #26
-    6d08:      	ldr	r0, [sp, #44]
-    6d0a:      	lsls	r1, r0, #2
-    6d0c:      	adr	r0, #4 <core::char::methods::encode_utf8_raw::h7513c15b37cd2e1d+0x4d>
-    6d0e:      	ldr	r0, [r0, r1]
-    6d10:      	mov	pc, r0
-    6d12:      	mov	r8, r8
-
-00006d14 <$d.1>:
-    6d14:	51 6d 00 00	.word	0x00006d51
-    6d18:	59 6d 00 00	.word	0x00006d59
-    6d1c:	61 6d 00 00	.word	0x00006d61
-    6d20:	69 6d 00 00	.word	0x00006d69
-
-00006d24 <$t.2>:
-    6d24:      	ldr	r0, [sp, #60]
-    6d26:      	str	r0, [sp, #148]
-    6d28:      	add	r0, sp, #72
-    6d2a:      	str	r0, [sp, #136]
-    6d2c:      	add	r0, sp, #68
-    6d2e:      	str	r0, [sp, #140]
-    6d30:      	add	r0, sp, #148
-    6d32:      	str	r0, [sp, #144]
-    6d34:      	ldr	r0, [sp, #136]
-    6d36:      	str	r0, [sp, #204]
-    6d38:      	ldr	r1, [sp, #140]
-    6d3a:      	str	r1, [sp, #28]
-    6d3c:      	str	r1, [sp, #208]
-    6d3e:      	ldr	r1, [sp, #144]
-    6d40:      	str	r1, [sp, #32]
-    6d42:      	str	r1, [sp, #212]
-    6d44:      	ldr	r1, [pc, #316] <$d.3+0x8>
-    6d46:      	bl	0x7e0c <core::fmt::ArgumentV1::new::ha735e2928536ca1c> @ imm = #4290
-    6d4a:      	str	r0, [sp, #36]
-    6d4c:      	str	r1, [sp, #40]
-    6d4e:      	b	0x6e2e <$t.2+0x10a>     @ imm = #220
-    6d50:      	ldr	r0, [sp, #84]
-    6d52:      	cmp	r0, #0
-    6d54:      	bne	0x6e1c <$t.2+0xf8>      @ imm = #196
-    6d56:      	b	0x6d24 <$t.2>           @ imm = #-54
-    6d58:      	ldr	r0, [sp, #84]
-    6d5a:      	cmp	r0, #1
-    6d5c:      	bhi	0x6dfa <$t.2+0xd6>      @ imm = #154
-    6d5e:      	b	0x6d24 <$t.2>           @ imm = #-62
-    6d60:      	ldr	r0, [sp, #84]
-    6d62:      	cmp	r0, #2
-    6d64:      	bhi	0x6dc8 <$t.2+0xa4>      @ imm = #96
-    6d66:      	b	0x6d24 <$t.2>           @ imm = #-70
-    6d68:      	ldr	r0, [sp, #84]
-    6d6a:      	cmp	r0, #4
-    6d6c:      	blo	0x6d24 <$t.2>           @ imm = #-76
-    6d6e:      	b	0x6d70 <$t.2+0x4c>      @ imm = #-2
-    6d70:      	ldr	r4, [sp, #80]
-    6d72:      	str	r4, [sp, #164]
-    6d74:      	ldr	r3, [sp, #80]
-    6d76:      	adds	r0, r3, #1
-    6d78:      	str	r0, [sp, #168]
-    6d7a:      	ldr	r2, [sp, #80]
-    6d7c:      	adds	r0, r2, #2
-    6d7e:      	str	r0, [sp, #172]
-    6d80:      	ldr	r1, [sp, #80]
-    6d82:      	adds	r0, r1, #3
-    6d84:      	str	r0, [sp, #176]
-    6d86:      	ldr	r0, [sp, #68]
-    6d88:      	lsls	r0, r0, #11
-    6d8a:      	lsrs	r0, r0, #29
-    6d8c:      	adds	r0, #240
-    6d8e:      	strb	r0, [r4]
-    6d90:      	ldr	r0, [sp, #68]
-    6d92:      	lsls	r0, r0, #14
-    6d94:      	lsrs	r0, r0, #26
-    6d96:      	adds	r0, #128
-    6d98:      	strb	r0, [r3, #1]
-    6d9a:      	ldr	r0, [sp, #68]
-    6d9c:      	lsls	r0, r0, #20
-    6d9e:      	lsrs	r0, r0, #26
-    6da0:      	adds	r0, #128
-    6da2:      	strb	r0, [r2, #2]
-    6da4:      	add	r0, sp, #68
-    6da6:      	ldrb	r0, [r0]
-    6da8:      	movs	r2, #63
-    6daa:      	ands	r0, r2
-    6dac:      	adds	r0, #128
-    6dae:      	strb	r0, [r1, #3]
-    6db0:      	b	0x6db2 <$t.2+0x8e>      @ imm = #-2
-    6db2:      	ldr	r1, [sp, #60]
-    6db4:      	ldr	r0, [sp, #64]
-    6db6:      	ldr	r2, [sp, #72]
-    6db8:      	str	r2, [sp, #152]
-    6dba:      	ldr	r2, [sp, #152]
-    6dbc:      	ldr	r3, [pc, #192] <$d.3+0x4>
-    6dbe:      	bl	0x804a <core::slice::index::<impl core::ops::index::IndexMut<I> for [T]>::index_mut::h9bb66623713ef6cf> @ imm = #4744
-    6dc2:      	str	r0, [sp, #20]
-    6dc4:      	str	r1, [sp, #24]
-    6dc6:      	b	0x6e26 <$t.2+0x102>     @ imm = #92
-    6dc8:      	ldr	r3, [sp, #80]
-    6dca:      	str	r3, [sp, #180]
-    6dcc:      	ldr	r2, [sp, #80]
-    6dce:      	adds	r0, r2, #1
-    6dd0:      	str	r0, [sp, #184]
-    6dd2:      	ldr	r1, [sp, #80]
-    6dd4:      	adds	r0, r1, #2
-    6dd6:      	str	r0, [sp, #188]
-    6dd8:      	ldr	r0, [sp, #68]
-    6dda:      	lsls	r0, r0, #16
-    6ddc:      	lsrs	r0, r0, #28
-    6dde:      	adds	r0, #224
-    6de0:      	strb	r0, [r3]
-    6de2:      	ldr	r0, [sp, #68]
-    6de4:      	lsls	r0, r0, #20
-    6de6:      	lsrs	r0, r0, #26
-    6de8:      	adds	r0, #128
-    6dea:      	strb	r0, [r2, #1]
-    6dec:      	add	r0, sp, #68
-    6dee:      	ldrb	r0, [r0]
-    6df0:      	movs	r2, #63
-    6df2:      	ands	r0, r2
-    6df4:      	adds	r0, #128
-    6df6:      	strb	r0, [r1, #2]
-    6df8:      	b	0x6db2 <$t.2+0x8e>      @ imm = #-74
-    6dfa:      	ldr	r2, [sp, #80]
-    6dfc:      	str	r2, [sp, #192]
-    6dfe:      	ldr	r1, [sp, #80]
-    6e00:      	adds	r0, r1, #1
-    6e02:      	str	r0, [sp, #196]
-    6e04:      	ldr	r0, [sp, #68]
-    6e06:      	lsls	r0, r0, #21
-    6e08:      	lsrs	r0, r0, #27
-    6e0a:      	adds	r0, #192
-    6e0c:      	strb	r0, [r2]
-    6e0e:      	add	r0, sp, #68
-    6e10:      	ldrb	r0, [r0]
-    6e12:      	movs	r2, #63
-    6e14:      	ands	r0, r2
-    6e16:      	adds	r0, #128
-    6e18:      	strb	r0, [r1, #1]
-    6e1a:      	b	0x6db2 <$t.2+0x8e>      @ imm = #-108
-    6e1c:      	ldr	r1, [sp, #80]
-    6e1e:      	str	r1, [sp, #200]
-    6e20:      	ldr	r0, [sp, #68]
-    6e22:      	strb	r0, [r1]
-    6e24:      	b	0x6db2 <$t.2+0x8e>      @ imm = #-118
-    6e26:      	ldr	r1, [sp, #24]
-    6e28:      	ldr	r0, [sp, #20]
-    6e2a:      	add	sp, #216
-    6e2c:      	pop	{r4, r5, r7, pc}
-    6e2e:      	ldr	r0, [sp, #28]
-    6e30:      	ldr	r1, [pc, #84] <$d.3+0xc>
-    6e32:      	bl	0x7de2 <core::fmt::ArgumentV1::new::h81b8e67c8f326c50> @ imm = #4012
-    6e36:      	str	r0, [sp, #12]
-    6e38:      	str	r1, [sp, #16]
-    6e3a:      	b	0x6e3c <$t.2+0x118>     @ imm = #-2
-    6e3c:      	ldr	r0, [sp, #32]
-    6e3e:      	ldr	r1, [pc, #68] <$d.3+0xa>
-    6e40:      	bl	0x7e0c <core::fmt::ArgumentV1::new::ha735e2928536ca1c> @ imm = #4040
-    6e44:      	str	r0, [sp, #4]
-    6e46:      	str	r1, [sp, #8]
-    6e48:      	b	0x6e4a <$t.2+0x126>     @ imm = #-2
-    6e4a:      	ldr	r0, [sp, #8]
-    6e4c:      	ldr	r1, [sp, #4]
-    6e4e:      	ldr	r2, [sp, #16]
-    6e50:      	ldr	r3, [sp, #12]
-    6e52:      	ldr	r4, [sp, #40]
-    6e54:      	ldr	r5, [sp, #36]
-    6e56:      	str	r5, [sp, #112]
-    6e58:      	str	r4, [sp, #116]
-    6e5a:      	str	r3, [sp, #120]
-    6e5c:      	str	r2, [sp, #124]
-    6e5e:      	str	r1, [sp, #128]
-    6e60:      	str	r0, [sp, #132]
-    6e62:      	movs	r2, #3
-    6e64:      	str	r2, [sp]
-    6e66:      	ldr	r1, [pc, #36] <$d.3+0x12>
-    6e68:      	add	r0, sp, #88
-    6e6a:      	add	r3, sp, #112
-    6e6c:      	bl	0x7e38 <core::fmt::Arguments::new_v1::h36bfcae551ebdf87> @ imm = #4040
-    6e70:      	b	0x6e72 <$t.2+0x14e>     @ imm = #-2
-    6e72:      	ldr	r1, [pc, #28] <$d.3+0x16>
-    6e74:      	add	r0, sp, #88
-    6e76:      	bl	0x85b4 <core::panicking::panic_fmt::h884220a03f3bce26> @ imm = #5946
-    6e7a:      	trap
-
-00006e7c <$d.3>:
-    6e7c:	08 b5 00 00	.word	0x0000b508
-    6e80:	18 b5 00 00	.word	0x0000b518
-    6e84:	85 a1 00 00	.word	0x0000a185
-    6e88:	4d 9d 00 00	.word	0x00009d4d
-    6e8c:	64 b5 00 00	.word	0x0000b564
-    6e90:	7c b5 00 00	.word	0x0000b57c
-
-00006e94 <core::char::methods::<impl char>::encode_utf8::h4ca3f652912759a3>:
-    6e94:      	push	{r7, lr}
-    6e96:      	add	r7, sp, #0
-    6e98:      	sub	sp, #32
-    6e9a:      	str	r0, [sp, #20]
-    6e9c:      	str	r1, [sp, #24]
-    6e9e:      	str	r2, [sp, #28]
-    6ea0:      	bl	0x6cc4 <core::char::methods::encode_utf8_raw::h7513c15b37cd2e1d> @ imm = #-480
-    6ea4:      	str	r0, [sp, #12]
-    6ea6:      	str	r1, [sp, #16]
-    6ea8:      	b	0x6eaa <core::char::methods::<impl char>::encode_utf8::h4ca3f652912759a3+0x16> @ imm = #-2
-    6eaa:      	ldr	r1, [sp, #16]
-    6eac:      	ldr	r0, [sp, #12]
-    6eae:      	bl	0x70e0 <core::str::converts::from_utf8_unchecked_mut::hcf4c1f11097dec57> @ imm = #558
-    6eb2:      	str	r0, [sp, #4]
-    6eb4:      	str	r1, [sp, #8]
-    6eb6:      	b	0x6eb8 <core::char::methods::<impl char>::encode_utf8::h4ca3f652912759a3+0x24> @ imm = #-2
-    6eb8:      	ldr	r1, [sp, #8]
-    6eba:      	ldr	r0, [sp, #4]
-    6ebc:      	add	sp, #32
-    6ebe:      	pop	{r7, pc}
-
-00006ec0 <core::char::methods::len_utf8::hbe32fe9fb78f01cc>:
-    6ec0:      	sub	sp, #12
-    6ec2:      	str	r0, [sp]
-    6ec4:      	str	r0, [sp, #8]
-    6ec6:      	cmp	r0, #128
-    6ec8:      	blo	0x6ed6 <core::char::methods::len_utf8::hbe32fe9fb78f01cc+0x16> @ imm = #10
-    6eca:      	b	0x6ecc <core::char::methods::len_utf8::hbe32fe9fb78f01cc+0xc> @ imm = #-2
-    6ecc:      	ldr	r0, [sp]
-    6ece:      	lsrs	r0, r0, #11
-    6ed0:      	cmp	r0, #0
-    6ed2:      	beq	0x6eec <core::char::methods::len_utf8::hbe32fe9fb78f01cc+0x2c> @ imm = #22
-    6ed4:      	b	0x6ee2 <core::char::methods::len_utf8::hbe32fe9fb78f01cc+0x22> @ imm = #10
-    6ed6:      	movs	r0, #1
-    6ed8:      	str	r0, [sp, #4]
-    6eda:      	b	0x6edc <core::char::methods::len_utf8::hbe32fe9fb78f01cc+0x1c> @ imm = #-2
-    6edc:      	ldr	r0, [sp, #4]
-    6ede:      	add	sp, #12
-    6ee0:      	bx	lr
-    6ee2:      	ldr	r0, [sp]
-    6ee4:      	lsrs	r0, r0, #16
-    6ee6:      	cmp	r0, #0
-    6ee8:      	beq	0x6efa <core::char::methods::len_utf8::hbe32fe9fb78f01cc+0x3a> @ imm = #14
-    6eea:      	b	0x6ef4 <core::char::methods::len_utf8::hbe32fe9fb78f01cc+0x34> @ imm = #6
-    6eec:      	movs	r0, #2
-    6eee:      	str	r0, [sp, #4]
-    6ef0:      	b	0x6ef2 <core::char::methods::len_utf8::hbe32fe9fb78f01cc+0x32> @ imm = #-2
-    6ef2:      	b	0x6edc <core::char::methods::len_utf8::hbe32fe9fb78f01cc+0x1c> @ imm = #-26
-    6ef4:      	movs	r0, #4
-    6ef6:      	str	r0, [sp, #4]
-    6ef8:      	b	0x6f00 <core::char::methods::len_utf8::hbe32fe9fb78f01cc+0x40> @ imm = #4
-    6efa:      	movs	r0, #3
-    6efc:      	str	r0, [sp, #4]
-    6efe:      	b	0x6f00 <core::char::methods::len_utf8::hbe32fe9fb78f01cc+0x40> @ imm = #-2
-    6f00:      	b	0x6ef2 <core::char::methods::len_utf8::hbe32fe9fb78f01cc+0x32> @ imm = #-18
-
-00006f02 <core::intrinsics::copy_nonoverlapping::he7fbb2a940a9d97f>:
-    6f02:      	push	{r7, lr}
-    6f04:      	add	r7, sp, #0
-    6f06:      	sub	sp, #16
-    6f08:      	str	r1, [sp]
-    6f0a:      	mov	r1, r0
-    6f0c:      	ldr	r0, [sp]
-    6f0e:      	str	r1, [sp, #4]
-    6f10:      	str	r0, [sp, #8]
-    6f12:      	str	r2, [sp, #12]
-    6f14:      	bl	0xa65e <__aeabi_memcpy> @ imm = #14150
-    6f18:      	add	sp, #16
-    6f1a:      	pop	{r7, pc}
-
-00006f1c <core::ops::function::FnOnce::call_once::h0064b3ef53ba00f3>:
-    6f1c:      	push	{r7, lr}
-    6f1e:      	add	r7, sp, #0
-    6f20:      	sub	sp, #8
-    6f22:      	str	r0, [sp, #4]
-    6f24:      	ldr	r1, [sp, #4]
-    6f26:      	mov	r0, sp
-    6f28:      	bl	0x7cac <rtt_target::print::print_impl::with_writer::{{closure}}::h170784b9fd98caa4> @ imm = #3456
-    6f2c:      	b	0x6f2e <core::ops::function::FnOnce::call_once::h0064b3ef53ba00f3+0x12> @ imm = #-2
-    6f2e:      	b	0x6f30 <core::ops::function::FnOnce::call_once::h0064b3ef53ba00f3+0x14> @ imm = #-2
-    6f30:      	add	sp, #8
-    6f32:      	pop	{r7, pc}
-
-00006f34 <core::ops::function::FnOnce::call_once::h078bdd863c7ce609>:
-    6f34:      	push	{r7, lr}
-    6f36:      	add	r7, sp, #0
-    6f38:      	sub	sp, #16
-    6f3a:      	str	r0, [sp, #4]
-    6f3c:      	str	r1, [sp, #8]
-    6f3e:      	ldr	r0, [sp, #4]
-    6f40:      	ldr	r1, [sp, #8]
-    6f42:      	bl	0x7126 <core::cmp::impls::<impl core::cmp::Ord for usize>::cmp::h7b0237d3b624c896> @ imm = #480
-    6f46:      	str	r0, [sp]
-    6f48:      	b	0x6f4a <core::ops::function::FnOnce::call_once::h078bdd863c7ce609+0x16> @ imm = #-2
-    6f4a:      	ldr	r0, [sp]
-    6f4c:      	add	sp, #16
-    6f4e:      	pop	{r7, pc}
-
-00006f50 <core::ops::function::FnOnce::call_once::h145c803a2cf7d9f3>:
-    6f50:      	push	{r7, lr}
-    6f52:      	add	r7, sp, #0
-    6f54:      	sub	sp, #8
-    6f56:      	str	r0, [sp, #4]
-    6f58:      	ldr	r1, [sp, #4]
-    6f5a:      	mov	r0, sp
-    6f5c:      	bl	0x7cf4 <rtt_target::print::print_impl::with_writer::{{closure}}::h9b08329612e75dcb> @ imm = #3476
-    6f60:      	b	0x6f62 <core::ops::function::FnOnce::call_once::h145c803a2cf7d9f3+0x12> @ imm = #-2
-    6f62:      	b	0x6f64 <core::ops::function::FnOnce::call_once::h145c803a2cf7d9f3+0x14> @ imm = #-2
-    6f64:      	add	sp, #8
-    6f66:      	pop	{r7, pc}
-
-00006f68 <core::ops::function::FnOnce::call_once::h7c01c1e44ca950ba>:
-    6f68:      	push	{r7, lr}
-    6f6a:      	add	r7, sp, #0
-    6f6c:      	sub	sp, #16
-    6f6e:      	str	r0, [sp, #8]
-    6f70:      	str	r1, [sp, #12]
-    6f72:      	ldr	r1, [sp, #8]
-    6f74:      	ldr	r2, [sp, #12]
-    6f76:      	add	r0, sp, #4
-    6f78:      	bl	0x70be <rtt_target::print::set_print_channel::{{closure}}::hcef9429af789e8b5> @ imm = #322
-    6f7c:      	b	0x6f7e <core::ops::function::FnOnce::call_once::h7c01c1e44ca950ba+0x16> @ imm = #-2
-    6f7e:      	b	0x6f80 <core::ops::function::FnOnce::call_once::h7c01c1e44ca950ba+0x18> @ imm = #-2
-    6f80:      	add	sp, #16
-    6f82:      	pop	{r7, pc}
-
-00006f84 <core::ops::function::FnOnce::call_once::hd8d04f1d42aca6c1>:
-    6f84:      	push	{r7, lr}
-    6f86:      	add	r7, sp, #0
-    6f88:      	sub	sp, #8
-    6f8a:      	str	r0, [sp, #4]
-    6f8c:      	ldr	r1, [sp, #4]
-    6f8e:      	mov	r0, sp
-    6f90:      	bl	0x7050 <rtt_target::print::set_print_channel_cs::{{closure}}::h0d62196dac09d56b> @ imm = #188
-    6f94:      	b	0x6f96 <core::ops::function::FnOnce::call_once::hd8d04f1d42aca6c1+0x12> @ imm = #-2
-    6f96:      	b	0x6f98 <core::ops::function::FnOnce::call_once::hd8d04f1d42aca6c1+0x14> @ imm = #-2
-    6f98:      	add	sp, #8
-    6f9a:      	pop	{r7, pc}
-
-00006f9c <core::ptr::drop_in_place<rtt_target::TerminalWriter>::hbc7a82d78699968f>:
-    6f9c:      	push	{r7, lr}
-    6f9e:      	add	r7, sp, #0
-    6fa0:      	sub	sp, #8
-    6fa2:      	str	r0, [sp]
-    6fa4:      	str	r0, [sp, #4]
-    6fa6:      	bl	0x7660 <<rtt_target::TerminalWriter as core::ops::drop::Drop>::drop::h333866a7b04b26dd> @ imm = #1718
-    6faa:      	b	0x6fac <core::ptr::drop_in_place<rtt_target::TerminalWriter>::hbc7a82d78699968f+0x10> @ imm = #-2
-    6fac:      	ldr	r0, [sp]
-    6fae:      	bl	0x6fb8 <core::ptr::drop_in_place<rtt_target::rtt::RttWriter>::h2c42bb23c8f8086c> @ imm = #6
-    6fb2:      	b	0x6fb4 <core::ptr::drop_in_place<rtt_target::TerminalWriter>::hbc7a82d78699968f+0x18> @ imm = #-2
-    6fb4:      	add	sp, #8
-    6fb6:      	pop	{r7, pc}
-
-00006fb8 <core::ptr::drop_in_place<rtt_target::rtt::RttWriter>::h2c42bb23c8f8086c>:
-    6fb8:      	push	{r7, lr}
-    6fba:      	add	r7, sp, #0
-    6fbc:      	sub	sp, #8
-    6fbe:      	str	r0, [sp, #4]
-    6fc0:      	bl	0x6c4e <<rtt_target::rtt::RttWriter as core::ops::drop::Drop>::drop::ha43684152be6e312> @ imm = #-886
-    6fc4:      	b	0x6fc6 <core::ptr::drop_in_place<rtt_target::rtt::RttWriter>::h2c42bb23c8f8086c+0xe> @ imm = #-2
-    6fc6:      	add	sp, #8
-    6fc8:      	pop	{r7, pc}
-
-00006fca <core::ptr::drop_in_place<&mut rtt_target::TerminalWriter>::h8a28e428c8c4dbcd>:
-    6fca:      	sub	sp, #4
-    6fcc:      	str	r0, [sp]
-    6fce:      	add	sp, #4
-    6fd0:      	bx	lr
-
-00006fd2 <core::ptr::drop_in_place<&mut rtt_target::rtt::RttWriter>::h5fa9b05ce9789415>:
-    6fd2:      	sub	sp, #4
-    6fd4:      	str	r0, [sp]
-    6fd6:      	add	sp, #4
-    6fd8:      	bx	lr
-
-00006fda <core::ptr::mut_ptr::<impl *mut T>::is_null::h5357cc960f469c38>:
-    6fda:      	push	{r7, lr}
-    6fdc:      	add	r7, sp, #0
-    6fde:      	sub	sp, #16
-    6fe0:      	str	r0, [sp, #12]
-    6fe2:      	str	r0, [sp, #8]
-    6fe4:      	b	0x6fe6 <core::ptr::mut_ptr::<impl *mut T>::is_null::h5357cc960f469c38+0xc> @ imm = #-2
-    6fe6:      	ldr	r0, [sp, #8]
-    6fe8:      	movs	r1, #0
-    6fea:      	bl	0x81b6 <core::ptr::mut_ptr::<impl *mut T>::guaranteed_eq::hbe8386ebf759a860> @ imm = #4552
-    6fee:      	str	r0, [sp, #4]
-    6ff0:      	b	0x6ff2 <core::ptr::mut_ptr::<impl *mut T>::is_null::h5357cc960f469c38+0x18> @ imm = #-2
-    6ff2:      	ldr	r0, [sp, #4]
-    6ff4:      	movs	r1, #1
-    6ff6:      	ands	r0, r1
-    6ff8:      	add	sp, #16
-    6ffa:      	pop	{r7, pc}
-
-00006ffc <core::slice::<impl [T]>::as_mut_ptr::hf14f467ef231dff9>:
-    6ffc:      	sub	sp, #8
-    6ffe:      	str	r0, [sp]
-    7000:      	str	r1, [sp, #4]
-    7002:      	add	sp, #8
-    7004:      	bx	lr
-
-00007006 <core::slice::<impl [T]>::is_empty::hcbf74f500e790572>:
-    7006:      	sub	sp, #12
-    7008:      	str	r1, [sp]
-    700a:      	mov	r1, r0
-    700c:      	ldr	r0, [sp]
-    700e:      	str	r1, [sp, #4]
-    7010:      	str	r0, [sp, #8]
-    7012:      	rsbs	r1, r0, #0
-    7014:      	adcs	r0, r1
-    7016:      	add	sp, #12
-    7018:      	bx	lr
-    701a:      	bmi	0x6fc6 <core::ptr::drop_in_place<rtt_target::rtt::RttWriter>::h2c42bb23c8f8086c+0xe> @ imm = #-88
-
-0000701c <rtt_target::print::set_print_channel_cs::h98b3c31f4065aaac>:
-    701c:      	push	{r7, lr}
-    701e:      	add	r7, sp, #0
-    7020:      	sub	sp, #16
-    7022:      	str	r1, [sp]
-    7024:      	str	r0, [sp, #8]
-    7026:      	str	r1, [sp, #12]
-    7028:      	ldr	r2, [r1]
-    702a:      	ldr	r1, [pc, #28] <$d.1+0x2>
-    702c:      	blx	r2
-    702e:      	b	0x7030 <rtt_target::print::set_print_channel_cs::h98b3c31f4065aaac+0x14> @ imm = #-2
-    7030:      	ldr	r1, [sp]
-    7032:      	add	r2, sp, #4
-    7034:      	movs	r0, #4
-    7036:      	strb	r0, [r2]
-    7038:      	ldr	r2, [sp, #4]
-    703a:      	ldr	r0, [pc, #16] <$d.1+0x6>
-    703c:      	bl	0x7b24 <core::sync::atomic::AtomicPtr<T>::store::h860b95e1d66e25ca> @ imm = #2788
-    7040:      	b	0x7042 <rtt_target::print::set_print_channel_cs::h98b3c31f4065aaac+0x26> @ imm = #-2
-    7042:      	add	sp, #16
-    7044:      	pop	{r7, pc}
-    7046:      	mov	r8, r8
-
-00007048 <$d.1>:
-    7048:	85 6f 00 00	.word	0x00006f85
-    704c:	38 04 00 10	.word	0x10000438
-
-00007050 <rtt_target::print::set_print_channel_cs::{{closure}}::h0d62196dac09d56b>:
-    7050:      	push	{r7, lr}
-    7052:      	add	r7, sp, #0
-    7054:      	sub	sp, #32
-    7056:      	str	r1, [sp, #12]
-    7058:      	str	r0, [sp, #20]
-    705a:      	str	r1, [sp, #24]
-    705c:      	ldr	r0, [pc, #36] <$d.3>
-    705e:      	str	r0, [sp, #28]
-    7060:      	b	0x7062 <rtt_target::print::set_print_channel_cs::{{closure}}::h0d62196dac09d56b+0x12> @ imm = #-2
-    7062:      	ldr	r0, [sp, #12]
-    7064:      	str	r0, [sp, #16]
-    7066:      	ldr	r0, [sp, #16]
-    7068:      	bl	0x74d6 <rtt_target::TerminalChannel::new::h01f22f107cd83f3d> @ imm = #1130
-    706c:      	str	r0, [sp, #4]
-    706e:      	str	r1, [sp, #8]
-    7070:      	b	0x7072 <rtt_target::print::set_print_channel_cs::{{closure}}::h0d62196dac09d56b+0x22> @ imm = #-2
-    7072:      	ldr	r2, [sp, #8]
-    7074:      	ldr	r1, [sp, #4]
-    7076:      	ldr	r0, [pc, #12] <$d.3+0x2>
-    7078:      	bl	0x7f40 <core::ptr::write::h41a9cae531f9444c> @ imm = #3780
-    707c:      	b	0x707e <rtt_target::print::set_print_channel_cs::{{closure}}::h0d62196dac09d56b+0x2e> @ imm = #-2
-    707e:      	add	sp, #32
-    7080:      	pop	{r7, pc}
-    7082:      	mov	r8, r8
-
-00007084 <$d.3>:
-    7084:	3c 04 00 10	.word	0x1000043c
-
-00007088 <rtt_target::print::set_print_channel::h74df2f304ed931f0>:
-    7088:      	push	{r7, lr}
-    708a:      	add	r7, sp, #0
-    708c:      	sub	sp, #8
-    708e:      	str	r0, [sp, #4]
-    7090:      	ldr	r1, [pc, #8] <$d.5>
-    7092:      	bl	0x701c <rtt_target::print::set_print_channel_cs::h98b3c31f4065aaac> @ imm = #-122
-    7096:      	b	0x7098 <rtt_target::print::set_print_channel::h74df2f304ed931f0+0x10> @ imm = #-2
-    7098:      	add	sp, #8
-    709a:      	pop	{r7, pc}
-
-0000709c <$d.5>:
-    709c:	8c b5 00 00	.word	0x0000b58c
-
-000070a0 <rtt_target::print::set_print_channel::{{closure}}::{{closure}}::ha0a8efa3362893d3>:
-    70a0:      	push	{r7, lr}
-    70a2:      	add	r7, sp, #0
-    70a4:      	sub	sp, #16
-    70a6:      	str	r1, [sp]
-    70a8:      	mov	r1, r0
-    70aa:      	ldr	r0, [sp]
-    70ac:      	str	r1, [sp, #4]
-    70ae:      	str	r0, [sp, #8]
-    70b0:      	str	r2, [sp, #12]
-    70b2:      	ldr	r1, [r1]
-    70b4:      	ldr	r0, [r0]
-    70b6:      	blx	r1
-    70b8:      	b	0x70ba <rtt_target::print::set_print_channel::{{closure}}::{{closure}}::ha0a8efa3362893d3+0x1a> @ imm = #-2
-    70ba:      	add	sp, #16
-    70bc:      	pop	{r7, pc}
-
-000070be <rtt_target::print::set_print_channel::{{closure}}::hcef9429af789e8b5>:
-    70be:      	push	{r7, lr}
-    70c0:      	add	r7, sp, #0
-    70c2:      	sub	sp, #24
-    70c4:      	str	r1, [sp, #4]
-    70c6:      	str	r2, [sp, #8]
-    70c8:      	str	r0, [sp, #20]
-    70ca:      	add	r0, sp, #8
-    70cc:      	str	r0, [sp, #12]
-    70ce:      	add	r0, sp, #4
-    70d0:      	str	r0, [sp, #16]
-    70d2:      	ldr	r0, [sp, #12]
-    70d4:      	ldr	r1, [sp, #16]
-    70d6:      	bl	0x7192 <cortex_m::interrupt::free::h3d77b620cda93b86> @ imm = #184
-    70da:      	b	0x70dc <rtt_target::print::set_print_channel::{{closure}}::hcef9429af789e8b5+0x1e> @ imm = #-2
-    70dc:      	add	sp, #24
-    70de:      	pop	{r7, pc}
-
-000070e0 <core::str::converts::from_utf8_unchecked_mut::hcf4c1f11097dec57>:
-    70e0:      	sub	sp, #8
-    70e2:      	str	r0, [sp]
-    70e4:      	str	r1, [sp, #4]
-    70e6:      	add	sp, #8
-    70e8:      	bx	lr
-
-000070ea <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h824f7b02f54f5a05E>:
-    70ea:      	sub	sp, #12
-    70ec:      	mov	r1, r0
-    70ee:      	mov	r0, sp
-    70f0:      	strb	r1, [r0]
-    70f2:      	ldrb	r0, [r0]
-    70f4:      	lsls	r0, r0, #31
-    70f6:      	cmp	r0, #0
-    70f8:      	beq	0x7100 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h824f7b02f54f5a05E+0x16> @ imm = #4
-    70fa:      	b	0x70fc <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h824f7b02f54f5a05E+0x12> @ imm = #-2
-    70fc:      	b	0x7108 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h824f7b02f54f5a05E+0x1e> @ imm = #8
-    70fe:      	trap
-    7100:      	add	r1, sp, #4
-    7102:      	movs	r0, #1
-    7104:      	strb	r0, [r1]
-    7106:      	b	0x7110 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h824f7b02f54f5a05E+0x26> @ imm = #6
-    7108:      	add	r1, sp, #4
-    710a:      	movs	r0, #0
-    710c:      	strb	r0, [r1]
-    710e:      	b	0x7110 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h824f7b02f54f5a05E+0x26> @ imm = #-2
-    7110:      	mov	r0, sp
-    7112:      	ldrb	r0, [r0]
-    7114:      	lsls	r0, r0, #31
-    7116:      	cmp	r0, #0
-    7118:      	bne	0x7124 <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h824f7b02f54f5a05E+0x3a> @ imm = #8
-    711a:      	b	0x711c <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h824f7b02f54f5a05E+0x32> @ imm = #-2
-    711c:      	add	r0, sp, #4
-    711e:      	ldrb	r0, [r0]
-    7120:      	add	sp, #12
-    7122:      	bx	lr
-    7124:      	b	0x711c <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h824f7b02f54f5a05E+0x32> @ imm = #-12
-
-00007126 <core::cmp::impls::<impl core::cmp::Ord for usize>::cmp::h7b0237d3b624c896>:
-    7126:      	sub	sp, #20
-    7128:      	str	r1, [sp]
-    712a:      	str	r0, [sp, #4]
-    712c:      	str	r0, [sp, #12]
-    712e:      	str	r1, [sp, #16]
-    7130:      	ldr	r0, [r0]
-    7132:      	ldr	r1, [r1]
-    7134:      	cmp	r0, r1
-    7136:      	blo	0x7148 <core::cmp::impls::<impl core::cmp::Ord for usize>::cmp::h7b0237d3b624c896+0x22> @ imm = #14
-    7138:      	b	0x713a <core::cmp::impls::<impl core::cmp::Ord for usize>::cmp::h7b0237d3b624c896+0x14> @ imm = #-2
-    713a:      	ldr	r1, [sp]
-    713c:      	ldr	r0, [sp, #4]
-    713e:      	ldr	r0, [r0]
-    7140:      	ldr	r1, [r1]
-    7142:      	cmp	r0, r1
-    7144:      	beq	0x715e <core::cmp::impls::<impl core::cmp::Ord for usize>::cmp::h7b0237d3b624c896+0x38> @ imm = #22
-    7146:      	b	0x7156 <core::cmp::impls::<impl core::cmp::Ord for usize>::cmp::h7b0237d3b624c896+0x30> @ imm = #12
-    7148:      	add	r1, sp, #8
-    714a:      	movs	r0, #255
-    714c:      	strb	r0, [r1]
-    714e:      	b	0x7150 <core::cmp::impls::<impl core::cmp::Ord for usize>::cmp::h7b0237d3b624c896+0x2a> @ imm = #-2
-    7150:      	ldr	r0, [sp, #8]
-    7152:      	add	sp, #20
-    7154:      	bx	lr
-    7156:      	add	r1, sp, #8
-    7158:      	movs	r0, #1
-    715a:      	strb	r0, [r1]
-    715c:      	b	0x7166 <core::cmp::impls::<impl core::cmp::Ord for usize>::cmp::h7b0237d3b624c896+0x40> @ imm = #6
-    715e:      	add	r1, sp, #8
-    7160:      	movs	r0, #0
-    7162:      	strb	r0, [r1]
-    7164:      	b	0x7166 <core::cmp::impls::<impl core::cmp::Ord for usize>::cmp::h7b0237d3b624c896+0x40> @ imm = #-2
-    7166:      	b	0x7150 <core::cmp::impls::<impl core::cmp::Ord for usize>::cmp::h7b0237d3b624c896+0x2a> @ imm = #-26
-
-00007168 <core::ptr::const_ptr::<impl *const T>::cast::h04f8cbf1460ff280>:
-    7168:      	sub	sp, #4
-    716a:      	str	r0, [sp]
-    716c:      	add	sp, #4
-    716e:      	bx	lr
-
-00007170 <core::ptr::const_ptr::<impl *const [T]>::len::h5c9f0d880e46d416>:
-    7170:      	push	{r7, lr}
-    7172:      	add	r7, sp, #0
-    7174:      	sub	sp, #16
-    7176:      	str	r0, [sp, #8]
-    7178:      	str	r1, [sp, #12]
-    717a:      	bl	0x7238 <core::ptr::metadata::metadata::h9c4a006814c5845c> @ imm = #186
-    717e:      	str	r0, [sp, #4]
-    7180:      	b	0x7182 <core::ptr::const_ptr::<impl *const [T]>::len::h5c9f0d880e46d416+0x12> @ imm = #-2
-    7182:      	ldr	r0, [sp, #4]
-    7184:      	add	sp, #16
-    7186:      	pop	{r7, pc}
-
-00007188 <core::ptr::const_ptr::<impl *const [T]>::as_ptr::h7862195f9672c2be>:
-    7188:      	sub	sp, #8
-    718a:      	str	r0, [sp]
-    718c:      	str	r1, [sp, #4]
-    718e:      	add	sp, #8
-    7190:      	bx	lr
-
-00007192 <cortex_m::interrupt::free::h3d77b620cda93b86>:
-    7192:      	push	{r7, lr}
-    7194:      	add	r7, sp, #0
-    7196:      	sub	sp, #40
-    7198:      	str	r1, [sp, #4]
-    719a:      	str	r0, [sp, #8]
-    719c:      	str	r0, [sp, #28]
-    719e:      	str	r1, [sp, #32]
-    71a0:      	bl	0x7274 <cortex_m::register::primask::read::h33117d5db771506b> @ imm = #208
-    71a4:      	mov	r1, r0
-    71a6:      	str	r1, [sp, #12]
-    71a8:      	add	r1, sp, #36
-    71aa:      	strb	r0, [r1]
-    71ac:      	b	0x71ae <cortex_m::interrupt::free::h3d77b620cda93b86+0x1c> @ imm = #-2
-    71ae:      	bl	0x71f8 <cortex_m::interrupt::disable::hdc85a50c631731bc> @ imm = #70
-    71b2:      	b	0x71b4 <cortex_m::interrupt::free::h3d77b620cda93b86+0x22> @ imm = #-2
-    71b4:      	bl	0x80a4 <bare_metal::CriticalSection::new::h63eca2240f158320> @ imm = #3820
-    71b8:      	b	0x71ba <cortex_m::interrupt::free::h3d77b620cda93b86+0x28> @ imm = #-2
-    71ba:      	ldr	r1, [sp, #4]
-    71bc:      	ldr	r0, [sp, #8]
-    71be:      	add	r2, sp, #20
-    71c0:      	str	r2, [sp, #16]
-    71c2:      	ldr	r2, [sp, #16]
-    71c4:      	bl	0x70a0 <rtt_target::print::set_print_channel::{{closure}}::{{closure}}::ha0a8efa3362893d3> @ imm = #-296
-    71c8:      	b	0x71ca <cortex_m::interrupt::free::h3d77b620cda93b86+0x38> @ imm = #-2
-    71ca:      	ldr	r0, [sp, #12]
-    71cc:      	movs	r1, #1
-    71ce:      	ands	r0, r1
-    71d0:      	bl	0x72a8 <cortex_m::register::primask::Primask::is_active::hc352068efa6f71d2> @ imm = #212
-    71d4:      	str	r0, [sp]
-    71d6:      	b	0x71d8 <cortex_m::interrupt::free::h3d77b620cda93b86+0x46> @ imm = #-2
-    71d8:      	ldr	r0, [sp]
-    71da:      	lsls	r0, r0, #31
-    71dc:      	cmp	r0, #0
-    71de:      	bne	0x71e6 <cortex_m::interrupt::free::h3d77b620cda93b86+0x54> @ imm = #4
-    71e0:      	b	0x71e2 <cortex_m::interrupt::free::h3d77b620cda93b86+0x50> @ imm = #-2
-    71e2:      	add	sp, #40
-    71e4:      	pop	{r7, pc}
-    71e6:      	bl	0x71ec <cortex_m::interrupt::enable::hdb5a3f55db5ec101> @ imm = #2
-    71ea:      	b	0x71e2 <cortex_m::interrupt::free::h3d77b620cda93b86+0x50> @ imm = #-12
-
-000071ec <cortex_m::interrupt::enable::hdb5a3f55db5ec101>:
-    71ec:      	push	{r7, lr}
-    71ee:      	add	r7, sp, #0
-    71f0:      	bl	0x8096 <__cpsie>        @ imm = #3746
-    71f4:      	b	0x71f6 <cortex_m::interrupt::enable::hdb5a3f55db5ec101+0xa> @ imm = #-2
-    71f6:      	pop	{r7, pc}
-
-000071f8 <cortex_m::interrupt::disable::hdc85a50c631731bc>:
-    71f8:      	push	{r7, lr}
-    71fa:      	add	r7, sp, #0
-    71fc:      	bl	0x8092 <__cpsid>        @ imm = #3730
-    7200:      	b	0x7202 <cortex_m::interrupt::disable::hdc85a50c631731bc+0xa> @ imm = #-2
-    7202:      	pop	{r7, pc}
-
-00007204 <core::ptr::metadata::from_raw_parts::h933e008c49d91e86>:
-    7204:      	sub	sp, #24
-    7206:      	str	r0, [sp, #16]
-    7208:      	str	r1, [sp, #20]
-    720a:      	str	r0, [sp, #8]
-    720c:      	str	r1, [sp, #12]
-    720e:      	ldr	r1, [sp, #8]
-    7210:      	ldr	r0, [sp, #12]
-    7212:      	str	r1, [sp]
-    7214:      	str	r0, [sp, #4]
-    7216:      	ldr	r0, [sp]
-    7218:      	ldr	r1, [sp, #4]
-    721a:      	add	sp, #24
-    721c:      	bx	lr
-
-0000721e <core::ptr::metadata::from_raw_parts_mut::hff425b9af894d7a6>:
-    721e:      	sub	sp, #24
-    7220:      	str	r0, [sp, #16]
-    7222:      	str	r1, [sp, #20]
-    7224:      	str	r0, [sp, #8]
-    7226:      	str	r1, [sp, #12]
-    7228:      	ldr	r1, [sp, #8]
-    722a:      	ldr	r0, [sp, #12]
-    722c:      	str	r1, [sp]
-    722e:      	str	r0, [sp, #4]
-    7230:      	ldr	r0, [sp]
-    7232:      	ldr	r1, [sp, #4]
-    7234:      	add	sp, #24
-    7236:      	bx	lr
-
-00007238 <core::ptr::metadata::metadata::h9c4a006814c5845c>:
-    7238:      	sub	sp, #16
-    723a:      	str	r0, [sp, #8]
-    723c:      	str	r1, [sp, #12]
-    723e:      	str	r0, [sp]
-    7240:      	str	r1, [sp, #4]
-    7242:      	ldr	r0, [sp, #4]
-    7244:      	add	sp, #16
-    7246:      	bx	lr
-
-00007248 <<cortex_m::register::primask::Primask as core::cmp::PartialEq>::eq::h9e1d0bde53286840>:
-    7248:      	sub	sp, #20
-    724a:      	str	r0, [sp, #4]
-    724c:      	str	r1, [sp, #8]
-    724e:      	ldrb	r0, [r0]
-    7250:      	str	r0, [sp, #12]
-    7252:      	ldrb	r1, [r1]
-    7254:      	str	r1, [sp, #16]
-    7256:      	cmp	r0, r1
-    7258:      	beq	0x7264 <<cortex_m::register::primask::Primask as core::cmp::PartialEq>::eq::h9e1d0bde53286840+0x1c> @ imm = #8
-    725a:      	b	0x725c <<cortex_m::register::primask::Primask as core::cmp::PartialEq>::eq::h9e1d0bde53286840+0x14> @ imm = #-2
-    725c:      	mov	r1, sp
-    725e:      	movs	r0, #0
-    7260:      	strb	r0, [r1]
-    7262:      	b	0x726c <<cortex_m::register::primask::Primask as core::cmp::PartialEq>::eq::h9e1d0bde53286840+0x24> @ imm = #6
-    7264:      	mov	r1, sp
-    7266:      	movs	r0, #1
-    7268:      	strb	r0, [r1]
-    726a:      	b	0x726c <<cortex_m::register::primask::Primask as core::cmp::PartialEq>::eq::h9e1d0bde53286840+0x24> @ imm = #-2
-    726c:      	mov	r0, sp
-    726e:      	ldrb	r0, [r0]
-    7270:      	add	sp, #20
-    7272:      	bx	lr
-
-00007274 <cortex_m::register::primask::read::h33117d5db771506b>:
-    7274:      	push	{r7, lr}
-    7276:      	add	r7, sp, #0
-    7278:      	sub	sp, #16
-    727a:      	bl	0x809e <__primask_r>    @ imm = #3616
-    727e:      	mov	r1, r0
-    7280:      	str	r1, [sp, #4]
-    7282:      	str	r0, [sp, #12]
-    7284:      	b	0x7286 <cortex_m::register::primask::read::h33117d5db771506b+0x12> @ imm = #-2
-    7286:      	ldr	r0, [sp, #4]
-    7288:      	lsls	r0, r0, #31
-    728a:      	cmp	r0, #0
-    728c:      	bne	0x7298 <cortex_m::register::primask::read::h33117d5db771506b+0x24> @ imm = #8
-    728e:      	b	0x7290 <cortex_m::register::primask::read::h33117d5db771506b+0x1c> @ imm = #-2
-    7290:      	add	r1, sp, #8
-    7292:      	movs	r0, #0
-    7294:      	strb	r0, [r1]
-    7296:      	b	0x72a0 <cortex_m::register::primask::read::h33117d5db771506b+0x2c> @ imm = #6
-    7298:      	add	r1, sp, #8
-    729a:      	movs	r0, #1
-    729c:      	strb	r0, [r1]
-    729e:      	b	0x72a0 <cortex_m::register::primask::read::h33117d5db771506b+0x2c> @ imm = #-2
-    72a0:      	add	r0, sp, #8
-    72a2:      	ldrb	r0, [r0]
-    72a4:      	add	sp, #16
-    72a6:      	pop	{r7, pc}
-
-000072a8 <cortex_m::register::primask::Primask::is_active::hc352068efa6f71d2>:
-    72a8:      	push	{r7, lr}
-    72aa:      	add	r7, sp, #0
-    72ac:      	sub	sp, #8
-    72ae:      	mov	r1, r0
-    72b0:      	add	r0, sp, #4
-    72b2:      	strb	r1, [r0]
-    72b4:      	ldr	r1, [pc, #16] <$d.3>
-    72b6:      	bl	0x7248 <<cortex_m::register::primask::Primask as core::cmp::PartialEq>::eq::h9e1d0bde53286840> @ imm = #-114
-    72ba:      	str	r0, [sp]
-    72bc:      	b	0x72be <cortex_m::register::primask::Primask::is_active::hc352068efa6f71d2+0x16> @ imm = #-2
-    72be:      	ldr	r0, [sp]
-    72c0:      	movs	r1, #1
-    72c2:      	ands	r0, r1
-    72c4:      	add	sp, #8
-    72c6:      	pop	{r7, pc}
-
-000072c8 <$d.3>:
-    72c8:	90 b5 00 00	.word	0x0000b590
-
-000072cc <core::fmt::Write::write_char::h16a64aa5702bcb56>:
-    72cc:      	push	{r7, lr}
-    72ce:      	add	r7, sp, #0
-    72d0:      	sub	sp, #32
-    72d2:      	str	r1, [sp, #4]
-    72d4:      	mov	r1, r0
-    72d6:      	ldr	r0, [sp, #4]
-    72d8:      	str	r1, [sp, #8]
-    72da:      	str	r1, [sp, #24]
-    72dc:      	str	r0, [sp, #28]
-    72de:      	movs	r1, #0
-    72e0:      	str	r1, [sp, #20]
-    72e2:      	add	r1, sp, #20
-    72e4:      	movs	r2, #4
-    72e6:      	bl	0x6e94 <core::char::methods::<impl char>::encode_utf8::h4ca3f652912759a3> @ imm = #-1110
-    72ea:      	str	r0, [sp, #12]
-    72ec:      	str	r1, [sp, #16]
-    72ee:      	b	0x72f0 <core::fmt::Write::write_char::h16a64aa5702bcb56+0x24> @ imm = #-2
-    72f0:      	ldr	r2, [sp, #16]
-    72f2:      	ldr	r1, [sp, #12]
-    72f4:      	ldr	r0, [sp, #8]
-    72f6:      	bl	0x7628 <<rtt_target::TerminalWriter as core::fmt::Write>::write_str::hbd0d9bf528179285> @ imm = #814
-    72fa:      	str	r0, [sp]
-    72fc:      	b	0x72fe <core::fmt::Write::write_char::h16a64aa5702bcb56+0x32> @ imm = #-2
-    72fe:      	ldr	r0, [sp]
-    7300:      	movs	r1, #1
-    7302:      	ands	r0, r1
-    7304:      	add	sp, #32
-    7306:      	pop	{r7, pc}
-
-00007308 <core::fmt::Write::write_fmt::h517fbdb63d1c3dc5>:
-    7308:      	push	{r4, r5, r7, lr}
-    730a:      	add	r7, sp, #8
-    730c:      	sub	sp, #32
-    730e:      	str	r0, [sp, #4]
-    7310:      	add	r2, sp, #8
-    7312:      	mov	r0, r2
-    7314:      	ldm	r1!, {r3, r4, r5}
-    7316:      	stm	r0!, {r3, r4, r5}
-    7318:      	ldm	r1!, {r3, r4, r5}
-    731a:      	stm	r0!, {r3, r4, r5}
-    731c:      	ldr	r1, [pc, #20] <$d.2>
-    731e:      	add	r0, sp, #4
-    7320:      	bl	0x8bdc <core::fmt::write::hff185d7d684cc368> @ imm = #6328
-    7324:      	str	r0, [sp]
-    7326:      	b	0x7328 <core::fmt::Write::write_fmt::h517fbdb63d1c3dc5+0x20> @ imm = #-2
-    7328:      	ldr	r0, [sp]
-    732a:      	movs	r1, #1
-    732c:      	ands	r0, r1
-    732e:      	add	sp, #32
-    7330:      	pop	{r4, r5, r7, pc}
-    7332:      	mov	r8, r8
-
-00007334 <$d.2>:
-    7334:	94 b5 00 00	.word	0x0000b594
-
-00007338 <<&mut W as core::fmt::Write>::write_char::hb753c85aa749cb4c>:
-    7338:      	push	{r7, lr}
-    733a:      	add	r7, sp, #0
-    733c:      	sub	sp, #16
-    733e:      	str	r0, [sp, #8]
-    7340:      	str	r1, [sp, #12]
-    7342:      	ldr	r0, [r0]
-    7344:      	bl	0x72cc <core::fmt::Write::write_char::h16a64aa5702bcb56> @ imm = #-124
-    7348:      	str	r0, [sp, #4]
-    734a:      	b	0x734c <<&mut W as core::fmt::Write>::write_char::hb753c85aa749cb4c+0x14> @ imm = #-2
-    734c:      	ldr	r0, [sp, #4]
-    734e:      	movs	r1, #1
-    7350:      	ands	r0, r1
-    7352:      	add	sp, #16
-    7354:      	pop	{r7, pc}
-
-00007356 <<&mut W as core::fmt::Write>::write_fmt::hc3268287a710177e>:
-    7356:      	push	{r4, r5, r6, r7, lr}
-    7358:      	add	r7, sp, #12
-    735a:      	sub	sp, #36
-    735c:      	mov	r3, r1
-    735e:      	str	r0, [sp, #32]
-    7360:      	ldr	r0, [r0]
-    7362:      	add	r1, sp, #8
-    7364:      	mov	r2, r1
-    7366:      	ldm	r3!, {r4, r5, r6}
-    7368:      	stm	r2!, {r4, r5, r6}
-    736a:      	ldm	r3!, {r4, r5, r6}
-    736c:      	stm	r2!, {r4, r5, r6}
-    736e:      	bl	0x7308 <core::fmt::Write::write_fmt::h517fbdb63d1c3dc5> @ imm = #-106
-    7372:      	str	r0, [sp, #4]
-    7374:      	b	0x7376 <<&mut W as core::fmt::Write>::write_fmt::hc3268287a710177e+0x20> @ imm = #-2
-    7376:      	ldr	r0, [sp, #4]
-    7378:      	movs	r1, #1
-    737a:      	ands	r0, r1
-    737c:      	add	sp, #36
-    737e:      	pop	{r4, r5, r6, r7, pc}
-
-00007380 <<&mut W as core::fmt::Write>::write_str::ha17b2d0197b750b1>:
-    7380:      	push	{r7, lr}
-    7382:      	add	r7, sp, #0
-    7384:      	sub	sp, #16
-    7386:      	str	r0, [sp, #4]
-    7388:      	str	r1, [sp, #8]
-    738a:      	str	r2, [sp, #12]
-    738c:      	ldr	r0, [r0]
-    738e:      	bl	0x7628 <<rtt_target::TerminalWriter as core::fmt::Write>::write_str::hbd0d9bf528179285> @ imm = #662
-    7392:      	str	r0, [sp]
-    7394:      	b	0x7396 <<&mut W as core::fmt::Write>::write_str::ha17b2d0197b750b1+0x16> @ imm = #-2
-    7396:      	ldr	r0, [sp]
-    7398:      	movs	r1, #1
-    739a:      	ands	r0, r1
-    739c:      	add	sp, #16
-    739e:      	pop	{r7, pc}
-
-000073a0 <rtt_target::UpChannel::new::hd7d8c3674c76046c>:
-    73a0:      	sub	sp, #8
-    73a2:      	str	r0, [sp, #4]
-    73a4:      	str	r0, [sp]
-    73a6:      	ldr	r0, [sp]
-    73a8:      	add	sp, #8
-    73aa:      	bx	lr
-
-000073ac <rtt_target::UpChannel::channel::h37bed21426864b23>:
-    73ac:      	sub	sp, #4
-    73ae:      	str	r0, [sp]
-    73b0:      	ldr	r0, [r0]
-    73b2:      	add	sp, #4
-    73b4:      	bx	lr
-
-000073b6 <rtt_target::UpChannel::mode::h669f03d65abb8b7d>:
-    73b6:      	push	{r7, lr}
-    73b8:      	add	r7, sp, #0
-    73ba:      	sub	sp, #16
-    73bc:      	str	r0, [sp, #12]
-    73be:      	bl	0x73ac <rtt_target::UpChannel::channel::h37bed21426864b23> @ imm = #-22
-    73c2:      	str	r0, [sp, #8]
-    73c4:      	b	0x73c6 <rtt_target::UpChannel::mode::h669f03d65abb8b7d+0x10> @ imm = #-2
-    73c6:      	ldr	r0, [sp, #8]
-    73c8:      	bl	0x6806 <rtt_target::rtt::RttChannel::mode::h2c85284ec93d74c4> @ imm = #-3014
-    73cc:      	str	r0, [sp, #4]
-    73ce:      	b	0x73d0 <rtt_target::UpChannel::mode::h669f03d65abb8b7d+0x1a> @ imm = #-2
-    73d0:      	ldr	r0, [sp, #4]
-    73d2:      	add	sp, #16
-    73d4:      	pop	{r7, pc}
-
-000073d6 <rtt_target::UpChannel::set_mode::hfe6707b5980fe5db>:
-    73d6:      	push	{r7, lr}
-    73d8:      	add	r7, sp, #0
-    73da:      	sub	sp, #16
-    73dc:      	str	r1, [sp]
-    73de:      	str	r0, [sp, #8]
-    73e0:      	str	r1, [sp, #12]
-    73e2:      	bl	0x73ac <rtt_target::UpChannel::channel::h37bed21426864b23> @ imm = #-58
-    73e6:      	str	r0, [sp, #4]
-    73e8:      	b	0x73ea <rtt_target::UpChannel::set_mode::hfe6707b5980fe5db+0x14> @ imm = #-2
-    73ea:      	ldr	r1, [sp]
-    73ec:      	ldr	r0, [sp, #4]
-    73ee:      	bl	0x6842 <rtt_target::rtt::RttChannel::set_mode::he21d912f12cc0e2d> @ imm = #-2992
-    73f2:      	b	0x73f4 <rtt_target::UpChannel::set_mode::hfe6707b5980fe5db+0x1e> @ imm = #-2
-    73f4:      	add	sp, #16
-    73f6:      	pop	{r7, pc}
-
-000073f8 <rtt_target::UpChannel::conjure::h386844067325a205>:
-    73f8:      	push	{r7, lr}
-    73fa:      	add	r7, sp, #0
-    73fc:      	sub	sp, #88
-    73fe:      	str	r0, [sp, #16]
-    7400:      	str	r0, [sp, #32]
-    7402:      	ldr	r0, [pc, #136] <$d.14+0x2>
-    7404:      	str	r0, [sp, #40]
-    7406:      	b	0x7408 <rtt_target::UpChannel::conjure::h386844067325a205+0x10> @ imm = #-2
-    7408:      	ldr	r0, [pc, #128] <$d.14>
-    740a:      	bl	0x67a0 <rtt_target::rtt::RttHeader::max_up_channels::hf5fa05b4faaefda2> @ imm = #-3182
-    740e:      	str	r0, [sp, #12]
-    7410:      	b	0x7412 <rtt_target::UpChannel::conjure::h386844067325a205+0x1a> @ imm = #-2
-    7412:      	ldr	r0, [sp, #16]
-    7414:      	ldr	r1, [sp, #12]
-    7416:      	cmp	r0, r1
-    7418:      	bhs	0x7422 <rtt_target::UpChannel::conjure::h386844067325a205+0x2a> @ imm = #6
-    741a:      	b	0x741c <rtt_target::UpChannel::conjure::h386844067325a205+0x24> @ imm = #-2
-    741c:      	ldr	r0, [pc, #108] <$d.14>
-    741e:      	str	r0, [sp, #84]
-    7420:      	b	0x7430 <rtt_target::UpChannel::conjure::h386844067325a205+0x38> @ imm = #12
-    7422:      	movs	r0, #0
-    7424:      	str	r0, [sp, #20]
-    7426:      	b	0x7428 <rtt_target::UpChannel::conjure::h386844067325a205+0x30> @ imm = #-2
-    7428:      	ldr	r0, [sp, #20]
-    742a:      	ldr	r1, [sp, #24]
-    742c:      	add	sp, #88
-    742e:      	pop	{r7, pc}
-    7430:      	ldr	r0, [pc, #88] <$d.14>
-    7432:      	str	r0, [sp, #64]
-    7434:      	movs	r1, #1
-    7436:      	str	r1, [sp, #68]
-    7438:      	str	r0, [sp, #72]
-    743a:      	str	r1, [sp, #76]
-    743c:      	adds	r0, #24
-    743e:      	str	r0, [sp, #80]
-    7440:      	ldr	r0, [sp, #80]
-    7442:      	str	r0, [sp, #8]
-    7444:      	b	0x7446 <rtt_target::UpChannel::conjure::h386844067325a205+0x4e> @ imm = #-2
-    7446:      	ldr	r0, [sp, #8]
-    7448:      	ldr	r2, [sp, #16]
-    744a:      	str	r0, [sp, #44]
-    744c:      	str	r2, [sp, #48]
-    744e:      	str	r0, [sp, #52]
-    7450:      	str	r2, [sp, #56]
-    7452:      	movs	r1, #24
-    7454:      	muls	r1, r2, r1
-    7456:      	adds	r0, r0, r1
-    7458:      	str	r0, [sp, #60]
-    745a:      	ldr	r0, [sp, #60]
-    745c:      	str	r0, [sp, #4]
-    745e:      	str	r0, [sp, #36]
-    7460:      	b	0x7462 <rtt_target::UpChannel::conjure::h386844067325a205+0x6a> @ imm = #-2
-    7462:      	ldr	r0, [sp, #4]
-    7464:      	bl	0x67f2 <rtt_target::rtt::RttChannel::is_initialized::h5df8277e2eebd53b> @ imm = #-3190
-    7468:      	str	r0, [sp]
-    746a:      	b	0x746c <rtt_target::UpChannel::conjure::h386844067325a205+0x74> @ imm = #-2
-    746c:      	ldr	r0, [sp]
-    746e:      	lsls	r0, r0, #31
-    7470:      	cmp	r0, #0
-    7472:      	beq	0x7484 <rtt_target::UpChannel::conjure::h386844067325a205+0x8c> @ imm = #14
-    7474:      	b	0x7476 <rtt_target::UpChannel::conjure::h386844067325a205+0x7e> @ imm = #-2
-    7476:      	ldr	r0, [sp, #4]
-    7478:      	str	r0, [sp, #28]
-    747a:      	ldr	r0, [sp, #28]
-    747c:      	str	r0, [sp, #24]
-    747e:      	movs	r0, #1
-    7480:      	str	r0, [sp, #20]
-    7482:      	b	0x7428 <rtt_target::UpChannel::conjure::h386844067325a205+0x30> @ imm = #-94
-    7484:      	movs	r0, #0
-    7486:      	str	r0, [sp, #20]
-    7488:      	b	0x7428 <rtt_target::UpChannel::conjure::h386844067325a205+0x30> @ imm = #-100
-    748a:      	mov	r8, r8
-
-0000748c <$d.14>:
-    748c:	00 00 00 10	.word	0x10000000
-
-00007490 <<rtt_target::UpChannel as core::fmt::Write>::write_fmt::h0cac0a5a45fd5955>:
-    7490:      	push	{r4, r5, r7, lr}
-    7492:      	add	r7, sp, #8
-    7494:      	sub	sp, #56
-    7496:      	str	r1, [sp, #4]
-    7498:      	str	r0, [sp, #52]
-    749a:      	bl	0x73ac <rtt_target::UpChannel::channel::h37bed21426864b23> @ imm = #-242
-    749e:      	str	r0, [sp, #8]
-    74a0:      	b	0x74a2 <<rtt_target::UpChannel as core::fmt::Write>::write_fmt::h0cac0a5a45fd5955+0x12> @ imm = #-2
-    74a2:      	ldr	r1, [sp, #8]
-    74a4:      	add	r0, sp, #12
-    74a6:      	bl	0x6880 <rtt_target::rtt::RttChannel::writer::h0ee597b617166698> @ imm = #-3114
-    74aa:      	b	0x74ac <<rtt_target::UpChannel as core::fmt::Write>::write_fmt::h0cac0a5a45fd5955+0x1c> @ imm = #-2
-    74ac:      	ldr	r2, [sp, #4]
-    74ae:      	add	r1, sp, #28
-    74b0:      	mov	r0, r1
-    74b2:      	ldm	r2!, {r3, r4, r5}
-    74b4:      	stm	r0!, {r3, r4, r5}
-    74b6:      	ldm	r2!, {r3, r4, r5}
-    74b8:      	stm	r0!, {r3, r4, r5}
-    74ba:      	add	r0, sp, #12
-    74bc:      	bl	0x6688 <core::fmt::Write::write_fmt::hd238934d9fad75de> @ imm = #-3640
-    74c0:      	str	r0, [sp]
-    74c2:      	b	0x74c4 <<rtt_target::UpChannel as core::fmt::Write>::write_fmt::h0cac0a5a45fd5955+0x34> @ imm = #-2
-    74c4:      	add	r0, sp, #12
-    74c6:      	bl	0x6fb8 <core::ptr::drop_in_place<rtt_target::rtt::RttWriter>::h2c42bb23c8f8086c> @ imm = #-1298
-    74ca:      	b	0x74cc <<rtt_target::UpChannel as core::fmt::Write>::write_fmt::h0cac0a5a45fd5955+0x3c> @ imm = #-2
-    74cc:      	ldr	r0, [sp]
-    74ce:      	movs	r1, #1
-    74d0:      	ands	r0, r1
-    74d2:      	add	sp, #56
-    74d4:      	pop	{r4, r5, r7, pc}
-
-000074d6 <rtt_target::TerminalChannel::new::h01f22f107cd83f3d>:
-    74d6:      	sub	sp, #12
-    74d8:      	str	r0, [sp, #8]
-    74da:      	str	r0, [sp]
-    74dc:      	mov	r1, sp
-    74de:      	movs	r0, #0
-    74e0:      	strb	r0, [r1, #4]
-    74e2:      	ldr	r0, [sp]
-    74e4:      	ldr	r1, [sp, #4]
-    74e6:      	add	sp, #12
-    74e8:      	bx	lr
-    74ea:      	bmi	0x7496 <<rtt_target::UpChannel as core::fmt::Write>::write_fmt::h0cac0a5a45fd5955+0x6> @ imm = #-88
-
-000074ec <rtt_target::TerminalChannel::write::h881f2a502ca6a059>:
-    74ec:      	push	{r4, r6, r7, lr}
-    74ee:      	add	r7, sp, #8
-    74f0:      	sub	sp, #104
-    74f2:      	str	r1, [sp, #20]
-    74f4:      	mov	r1, r0
-    74f6:      	ldr	r0, [sp, #20]
-    74f8:      	str	r1, [sp, #24]
-    74fa:      	mov	r1, r2
-    74fc:      	str	r1, [sp, #28]
-    74fe:      	str	r0, [sp, #96]
-    7500:      	add	r1, sp, #100
-    7502:      	strb	r2, [r1]
-    7504:      	bl	0x73ac <rtt_target::UpChannel::channel::h37bed21426864b23> @ imm = #-348
-    7508:      	str	r0, [sp, #32]
-    750a:      	b	0x750c <rtt_target::TerminalChannel::write::h881f2a502ca6a059+0x20> @ imm = #-2
-    750c:      	ldr	r1, [sp, #32]
-    750e:      	add	r0, sp, #36
-    7510:      	bl	0x6880 <rtt_target::rtt::RttChannel::writer::h0ee597b617166698> @ imm = #-3220
-    7514:      	b	0x7516 <rtt_target::TerminalChannel::write::h881f2a502ca6a059+0x2a> @ imm = #-2
-    7516:      	ldr	r0, [sp, #28]
-    7518:      	ldr	r1, [sp, #20]
-    751a:      	ldrb	r1, [r1, #4]
-    751c:      	uxtb	r0, r0
-    751e:      	cmp	r0, r1
-    7520:      	bne	0x7554 <rtt_target::TerminalChannel::write::h881f2a502ca6a059+0x68> @ imm = #48
-    7522:      	b	0x7524 <rtt_target::TerminalChannel::write::h881f2a502ca6a059+0x38> @ imm = #-2
-    7524:      	ldr	r1, [sp, #24]
-    7526:      	ldr	r2, [sp, #28]
-    7528:      	ldr	r0, [sp, #20]
-    752a:      	ldr	r3, [sp, #48]
-    752c:      	str	r3, [sp, #92]
-    752e:      	ldr	r3, [sp, #44]
-    7530:      	str	r3, [sp, #88]
-    7532:      	ldr	r3, [sp, #40]
-    7534:      	str	r3, [sp, #84]
-    7536:      	ldr	r3, [sp, #36]
-    7538:      	str	r3, [sp, #80]
-    753a:      	adds	r0, r0, #4
-    753c:      	ldr	r3, [sp, #92]
-    753e:      	str	r3, [r1, #12]
-    7540:      	ldr	r3, [sp, #88]
-    7542:      	str	r3, [r1, #8]
-    7544:      	ldr	r3, [sp, #84]
-    7546:      	str	r3, [r1, #4]
-    7548:      	ldr	r3, [sp, #80]
-    754a:      	str	r3, [r1]
-    754c:      	strb	r2, [r1, #20]
-    754e:      	str	r0, [r1, #16]
-    7550:      	add	sp, #104
-    7552:      	pop	{r4, r6, r7, pc}
-    7554:      	ldr	r0, [sp, #20]
-    7556:      	bl	0x73b6 <rtt_target::UpChannel::mode::h669f03d65abb8b7d> @ imm = #-420
-    755a:      	str	r0, [sp, #52]
-    755c:      	b	0x755e <rtt_target::TerminalChannel::write::h881f2a502ca6a059+0x72> @ imm = #-2
-    755e:      	ldr	r1, [pc, #188] <$d.23+0x2>
-    7560:      	add	r0, sp, #52
-    7562:      	bl	0x768a <<rtt_target::ChannelMode as core::cmp::PartialEq>::eq::h8c76d276b350cae5> @ imm = #292
-    7566:      	str	r0, [sp, #16]
-    7568:      	b	0x756a <rtt_target::TerminalChannel::write::h881f2a502ca6a059+0x7e> @ imm = #-2
-    756a:      	ldr	r0, [sp, #16]
-    756c:      	lsls	r0, r0, #31
-    756e:      	cmp	r0, #0
-    7570:      	bne	0x757a <rtt_target::TerminalChannel::write::h881f2a502ca6a059+0x8e> @ imm = #6
-    7572:      	b	0x7574 <rtt_target::TerminalChannel::write::h881f2a502ca6a059+0x88> @ imm = #-2
-    7574:      	ldr	r0, [sp, #52]
-    7576:      	str	r0, [sp, #56]
-    7578:      	b	0x7580 <rtt_target::TerminalChannel::write::h881f2a502ca6a059+0x94> @ imm = #4
-    757a:      	movs	r0, #0
-    757c:      	str	r0, [sp, #56]
-    757e:      	b	0x7580 <rtt_target::TerminalChannel::write::h881f2a502ca6a059+0x94> @ imm = #-2
-    7580:      	ldr	r0, [sp, #28]
-    7582:      	ldr	r1, [sp, #56]
-    7584:      	str	r1, [sp, #4]
-    7586:      	ldr	r1, [pc, #152] <$d.23+0x6>
-    7588:      	str	r1, [sp, #8]
-    758a:      	ldrb	r3, [r1, #12]
-    758c:      	ldrb	r2, [r1, #13]
-    758e:      	lsls	r2, r2, #8
-    7590:      	adds	r3, r2, r3
-    7592:      	ldrb	r4, [r1, #14]
-    7594:      	ldrb	r2, [r1, #15]
-    7596:      	lsls	r2, r2, #8
-    7598:      	adds	r2, r2, r4
-    759a:      	lsls	r2, r2, #16
-    759c:      	adds	r2, r2, r3
-    759e:      	str	r2, [sp, #76]
-    75a0:      	ldrb	r3, [r1, #8]
-    75a2:      	ldrb	r2, [r1, #9]
-    75a4:      	lsls	r2, r2, #8
-    75a6:      	adds	r3, r2, r3
-    75a8:      	ldrb	r4, [r1, #10]
-    75aa:      	ldrb	r2, [r1, #11]
-    75ac:      	lsls	r2, r2, #8
-    75ae:      	adds	r2, r2, r4
-    75b0:      	lsls	r2, r2, #16
-    75b2:      	adds	r2, r2, r3
-    75b4:      	str	r2, [sp, #72]
-    75b6:      	ldrb	r3, [r1, #4]
-    75b8:      	ldrb	r2, [r1, #5]
-    75ba:      	lsls	r2, r2, #8
-    75bc:      	adds	r3, r2, r3
-    75be:      	ldrb	r4, [r1, #6]
-    75c0:      	ldrb	r2, [r1, #7]
-    75c2:      	lsls	r2, r2, #8
-    75c4:      	adds	r2, r2, r4
-    75c6:      	lsls	r2, r2, #16
-    75c8:      	adds	r2, r2, r3
-    75ca:      	str	r2, [sp, #68]
-    75cc:      	ldrb	r3, [r1]
-    75ce:      	ldrb	r2, [r1, #1]
-    75d0:      	lsls	r2, r2, #8
-    75d2:      	adds	r2, r2, r3
-    75d4:      	ldrb	r3, [r1, #2]
-    75d6:      	ldrb	r1, [r1, #3]
-    75d8:      	lsls	r1, r1, #8
-    75da:      	adds	r1, r1, r3
-    75dc:      	lsls	r1, r1, #16
-    75de:      	adds	r1, r1, r2
-    75e0:      	str	r1, [sp, #64]
-    75e2:      	movs	r1, #15
-    75e4:      	ands	r0, r1
-    75e6:      	str	r0, [sp, #12]
-    75e8:      	cmp	r0, #15
-    75ea:      	bhi	0x7608 <rtt_target::TerminalChannel::write::h881f2a502ca6a059+0x11c> @ imm = #26
-    75ec:      	b	0x75ee <rtt_target::TerminalChannel::write::h881f2a502ca6a059+0x102> @ imm = #-2
-    75ee:      	ldr	r1, [sp, #4]
-    75f0:      	ldr	r2, [sp, #12]
-    75f2:      	add	r0, sp, #64
-    75f4:      	ldrb	r0, [r0, r2]
-    75f6:      	add	r2, sp, #60
-    75f8:      	movs	r3, #255
-    75fa:      	strb	r3, [r2]
-    75fc:      	strb	r0, [r2, #1]
-    75fe:      	add	r0, sp, #36
-    7600:      	movs	r3, #2
-    7602:      	bl	0x6994 <rtt_target::rtt::RttWriter::write_with_mode::he797d91d3d49263c> @ imm = #-3186
-    7606:      	b	0x7614 <rtt_target::TerminalChannel::write::h881f2a502ca6a059+0x128> @ imm = #10
-    7608:      	ldr	r0, [sp, #12]
-    760a:      	ldr	r2, [pc, #24] <$d.23+0xa>
-    760c:      	movs	r1, #16
-    760e:      	bl	0x8574 <core::panicking::panic_bounds_check::h5d2fdbe20d7940cc> @ imm = #3938
-    7612:      	trap
-    7614:      	ldr	r0, [sp, #28]
-    7616:      	ldr	r1, [sp, #20]
-    7618:      	strb	r0, [r1, #4]
-    761a:      	b	0x7524 <rtt_target::TerminalChannel::write::h881f2a502ca6a059+0x38> @ imm = #-250
-
-0000761c <$d.23>:
-    761c:	78 ac 00 00	.word	0x0000ac78
-    7620:	ec b5 00 00	.word	0x0000b5ec
-    7624:	68 b6 00 00	.word	0x0000b668
-
-00007628 <<rtt_target::TerminalWriter as core::fmt::Write>::write_str::hbd0d9bf528179285>:
-    7628:      	push	{r7, lr}
-    762a:      	add	r7, sp, #0
-    762c:      	sub	sp, #48
-    762e:      	str	r0, [sp, #20]
-    7630:      	str	r1, [sp, #24]
-    7632:      	str	r2, [sp, #28]
-    7634:      	str	r0, [sp, #4]
-    7636:      	str	r1, [sp, #32]
-    7638:      	str	r2, [sp, #36]
-    763a:      	str	r1, [sp, #40]
-    763c:      	str	r2, [sp, #44]
-    763e:      	ldr	r0, [sp, #40]
-    7640:      	str	r0, [sp, #8]
-    7642:      	ldr	r0, [sp, #44]
-    7644:      	str	r0, [sp, #12]
-    7646:      	b	0x7648 <<rtt_target::TerminalWriter as core::fmt::Write>::write_str::hbd0d9bf528179285+0x20> @ imm = #-2
-    7648:      	ldr	r2, [sp, #12]
-    764a:      	ldr	r1, [sp, #8]
-    764c:      	ldr	r0, [sp, #4]
-    764e:      	bl	0x6964 <rtt_target::rtt::RttWriter::write::he7941ff0a4dacd31> @ imm = #-3310
-    7652:      	b	0x7654 <<rtt_target::TerminalWriter as core::fmt::Write>::write_str::hbd0d9bf528179285+0x2c> @ imm = #-2
-    7654:      	add	r0, sp, #16
-    7656:      	movs	r1, #0
-    7658:      	strb	r1, [r0]
-    765a:      	ldrb	r0, [r0]
-    765c:      	add	sp, #48
-    765e:      	pop	{r7, pc}
-
-00007660 <<rtt_target::TerminalWriter as core::ops::drop::Drop>::drop::h333866a7b04b26dd>:
-    7660:      	push	{r7, lr}
-    7662:      	add	r7, sp, #0
-    7664:      	sub	sp, #16
-    7666:      	str	r0, [sp, #4]
-    7668:      	str	r0, [sp, #12]
-    766a:      	bl	0x6bec <rtt_target::rtt::RttWriter::is_failed::h6672171e1e5a4b42> @ imm = #-2690
-    766e:      	str	r0, [sp, #8]
-    7670:      	b	0x7672 <<rtt_target::TerminalWriter as core::ops::drop::Drop>::drop::h333866a7b04b26dd+0x12> @ imm = #-2
-    7672:      	ldr	r0, [sp, #8]
-    7674:      	lsls	r0, r0, #31
-    7676:      	cmp	r0, #0
-    7678:      	beq	0x7680 <<rtt_target::TerminalWriter as core::ops::drop::Drop>::drop::h333866a7b04b26dd+0x20> @ imm = #4
-    767a:      	b	0x767c <<rtt_target::TerminalWriter as core::ops::drop::Drop>::drop::h333866a7b04b26dd+0x1c> @ imm = #-2
-    767c:      	add	sp, #16
-    767e:      	pop	{r7, pc}
-    7680:      	ldr	r1, [sp, #4]
-    7682:      	ldrb	r0, [r1, #20]
-    7684:      	ldr	r1, [r1, #16]
-    7686:      	strb	r0, [r1]
-    7688:      	b	0x767c <<rtt_target::TerminalWriter as core::ops::drop::Drop>::drop::h333866a7b04b26dd+0x1c> @ imm = #-16
-
-0000768a <<rtt_target::ChannelMode as core::cmp::PartialEq>::eq::h8c76d276b350cae5>:
-    768a:      	sub	sp, #20
-    768c:      	str	r0, [sp, #4]
-    768e:      	str	r1, [sp, #8]
-    7690:      	ldr	r0, [r0]
-    7692:      	str	r0, [sp, #12]
-    7694:      	ldr	r1, [r1]
-    7696:      	str	r1, [sp, #16]
-    7698:      	cmp	r0, r1
-    769a:      	beq	0x76a6 <<rtt_target::ChannelMode as core::cmp::PartialEq>::eq::h8c76d276b350cae5+0x1c> @ imm = #8
-    769c:      	b	0x769e <<rtt_target::ChannelMode as core::cmp::PartialEq>::eq::h8c76d276b350cae5+0x14> @ imm = #-2
-    769e:      	mov	r1, sp
-    76a0:      	movs	r0, #0
-    76a2:      	strb	r0, [r1]
-    76a4:      	b	0x76ae <<rtt_target::ChannelMode as core::cmp::PartialEq>::eq::h8c76d276b350cae5+0x24> @ imm = #6
-    76a6:      	mov	r1, sp
-    76a8:      	movs	r0, #1
-    76aa:      	strb	r0, [r1]
-    76ac:      	b	0x76ae <<rtt_target::ChannelMode as core::cmp::PartialEq>::eq::h8c76d276b350cae5+0x24> @ imm = #-2
-    76ae:      	mov	r0, sp
-    76b0:      	ldrb	r0, [r0]
-    76b2:      	add	sp, #20
-    76b4:      	bx	lr
-
-000076b6 <<core::ops::range::Range<usize> as core::slice::index::SliceIndex<[T]>>::get_unchecked::h50ad3e51a6e2081f>:
-    76b6:      	push	{r7, lr}
-    76b8:      	add	r7, sp, #0
-    76ba:      	sub	sp, #72
-    76bc:      	str	r3, [sp, #16]
-    76be:      	str	r2, [sp, #24]
-    76c0:      	mov	r2, r1
-    76c2:      	ldr	r1, [sp, #16]
-    76c4:      	str	r2, [sp, #20]
-    76c6:      	mov	r3, r0
-    76c8:      	ldr	r0, [sp, #24]
-    76ca:      	str	r3, [sp, #28]
-    76cc:      	str	r3, [sp, #36]
-    76ce:      	str	r2, [sp, #40]
-    76d0:      	str	r0, [sp, #44]
-    76d2:      	str	r1, [sp, #48]
-    76d4:      	bl	0x7188 <core::ptr::const_ptr::<impl *const [T]>::as_ptr::h7862195f9672c2be> @ imm = #-1360
-    76d8:      	str	r0, [sp, #32]
-    76da:      	b	0x76dc <<core::ops::range::Range<usize> as core::slice::index::SliceIndex<[T]>>::get_unchecked::h50ad3e51a6e2081f+0x26> @ imm = #-2
-    76dc:      	ldr	r0, [sp, #32]
-    76de:      	ldr	r1, [sp, #28]
-    76e0:      	str	r0, [sp, #52]
-    76e2:      	str	r1, [sp, #56]
-    76e4:      	str	r0, [sp, #60]
-    76e6:      	str	r1, [sp, #64]
-    76e8:      	adds	r0, r0, r1
-    76ea:      	str	r0, [sp, #68]
-    76ec:      	ldr	r0, [sp, #68]
-    76ee:      	str	r0, [sp, #12]
-    76f0:      	b	0x76f2 <<core::ops::range::Range<usize> as core::slice::index::SliceIndex<[T]>>::get_unchecked::h50ad3e51a6e2081f+0x3c> @ imm = #-2
-    76f2:      	ldr	r0, [sp, #12]
-    76f4:      	ldr	r1, [sp, #20]
-    76f6:      	ldr	r2, [sp, #28]
-    76f8:      	subs	r1, r1, r2
-    76fa:      	bl	0x7eee <core::ptr::slice_from_raw_parts::h33886107cb0882ef> @ imm = #2032
-    76fe:      	str	r0, [sp, #4]
-    7700:      	str	r1, [sp, #8]
-    7702:      	b	0x7704 <<core::ops::range::Range<usize> as core::slice::index::SliceIndex<[T]>>::get_unchecked::h50ad3e51a6e2081f+0x4e> @ imm = #-2
-    7704:      	ldr	r1, [sp, #8]
-    7706:      	ldr	r0, [sp, #4]
-    7708:      	add	sp, #72
-    770a:      	pop	{r7, pc}
-
-0000770c <<core::ops::range::Range<usize> as core::slice::index::SliceIndex<[T]>>::get_unchecked_mut::h4fe602494192e1f5>:
-    770c:      	push	{r7, lr}
-    770e:      	add	r7, sp, #0
-    7710:      	sub	sp, #72
-    7712:      	str	r1, [sp, #16]
-    7714:      	str	r0, [sp, #20]
-    7716:      	str	r0, [sp, #28]
-    7718:      	str	r1, [sp, #32]
-    771a:      	str	r2, [sp, #36]
-    771c:      	str	r3, [sp, #40]
-    771e:      	str	r2, [sp, #44]
-    7720:      	str	r3, [sp, #48]
-    7722:      	str	r2, [sp, #24]
-    7724:      	b	0x7726 <<core::ops::range::Range<usize> as core::slice::index::SliceIndex<[T]>>::get_unchecked_mut::h4fe602494192e1f5+0x1a> @ imm = #-2
-    7726:      	ldr	r0, [sp, #24]
-    7728:      	ldr	r1, [sp, #20]
-    772a:      	str	r0, [sp, #52]
-    772c:      	str	r1, [sp, #56]
-    772e:      	str	r0, [sp, #60]
-    7730:      	str	r1, [sp, #64]
-    7732:      	adds	r0, r0, r1
-    7734:      	str	r0, [sp, #68]
-    7736:      	ldr	r0, [sp, #68]
-    7738:      	str	r0, [sp, #12]
-    773a:      	b	0x773c <<core::ops::range::Range<usize> as core::slice::index::SliceIndex<[T]>>::get_unchecked_mut::h4fe602494192e1f5+0x30> @ imm = #-2
-    773c:      	ldr	r0, [sp, #12]
-    773e:      	ldr	r1, [sp, #16]
-    7740:      	ldr	r2, [sp, #20]
-    7742:      	subs	r1, r1, r2
-    7744:      	bl	0x7f18 <core::ptr::slice_from_raw_parts_mut::h3561eefef668cfef> @ imm = #2000
-    7748:      	str	r0, [sp, #4]
-    774a:      	str	r1, [sp, #8]
-    774c:      	b	0x774e <<core::ops::range::Range<usize> as core::slice::index::SliceIndex<[T]>>::get_unchecked_mut::h4fe602494192e1f5+0x42> @ imm = #-2
-    774e:      	ldr	r1, [sp, #8]
-    7750:      	ldr	r0, [sp, #4]
-    7752:      	add	sp, #72
-    7754:      	pop	{r7, pc}
-
-00007756 <<core::ops::range::Range<usize> as core::slice::index::SliceIndex<[T]>>::index_mut::hfef3f1dc8e845709>:
-    7756:      	push	{r4, r6, r7, lr}
-    7758:      	add	r7, sp, #8
-    775a:      	sub	sp, #48
-    775c:      	str	r3, [sp, #12]
-    775e:      	str	r2, [sp, #16]
-    7760:      	str	r1, [sp, #20]
-    7762:      	str	r0, [sp, #24]
-    7764:      	ldr	r4, [r7, #8]
-    7766:      	str	r4, [sp, #28]
-    7768:      	str	r0, [sp, #32]
-    776a:      	str	r1, [sp, #36]
-    776c:      	str	r2, [sp, #40]
-    776e:      	str	r3, [sp, #44]
-    7770:      	cmp	r0, r1
-    7772:      	bhi	0x7780 <<core::ops::range::Range<usize> as core::slice::index::SliceIndex<[T]>>::index_mut::hfef3f1dc8e845709+0x2a> @ imm = #10
-    7774:      	b	0x7776 <<core::ops::range::Range<usize> as core::slice::index::SliceIndex<[T]>>::index_mut::hfef3f1dc8e845709+0x20> @ imm = #-2
-    7776:      	ldr	r0, [sp, #20]
-    7778:      	ldr	r1, [sp, #12]
-    777a:      	cmp	r0, r1
-    777c:      	bhi	0x779e <<core::ops::range::Range<usize> as core::slice::index::SliceIndex<[T]>>::index_mut::hfef3f1dc8e845709+0x48> @ imm = #30
-    777e:      	b	0x778c <<core::ops::range::Range<usize> as core::slice::index::SliceIndex<[T]>>::index_mut::hfef3f1dc8e845709+0x36> @ imm = #10
-    7780:      	ldr	r2, [sp, #28]
-    7782:      	ldr	r1, [sp, #20]
-    7784:      	ldr	r0, [sp, #24]
-    7786:      	bl	0x962c <core::slice::index::slice_index_order_fail::h35619d5607b7eea8> @ imm = #7842
-    778a:      	trap
-    778c:      	ldr	r3, [sp, #12]
-    778e:      	ldr	r2, [sp, #16]
-    7790:      	ldr	r1, [sp, #20]
-    7792:      	ldr	r0, [sp, #24]
-    7794:      	bl	0x770c <<core::ops::range::Range<usize> as core::slice::index::SliceIndex<[T]>>::get_unchecked_mut::h4fe602494192e1f5> @ imm = #-140
-    7798:      	str	r0, [sp, #4]
-    779a:      	str	r1, [sp, #8]
-    779c:      	b	0x77aa <<core::ops::range::Range<usize> as core::slice::index::SliceIndex<[T]>>::index_mut::hfef3f1dc8e845709+0x54> @ imm = #10
-    779e:      	ldr	r2, [sp, #28]
-    77a0:      	ldr	r1, [sp, #12]
-    77a2:      	ldr	r0, [sp, #20]
-    77a4:      	bl	0x95ec <core::slice::index::slice_end_index_len_fail::h4968a5fa708ed4f2> @ imm = #7748
-    77a8:      	trap
-    77aa:      	ldr	r1, [sp, #8]
-    77ac:      	ldr	r0, [sp, #4]
-    77ae:      	add	sp, #48
-    77b0:      	pop	{r4, r6, r7, pc}
-
-000077b2 <<core::ops::range::RangeTo<usize> as core::slice::index::SliceIndex<[T]>>::index_mut::h96d92709bd33603d>:
-    77b2:      	push	{r4, r6, r7, lr}
-    77b4:      	add	r7, sp, #8
-    77b6:      	sub	sp, #32
-    77b8:      	mov	r4, r3
-    77ba:      	mov	r3, r2
-    77bc:      	mov	r2, r1
-    77be:      	str	r0, [sp, #20]
-    77c0:      	str	r2, [sp, #24]
-    77c2:      	str	r3, [sp, #28]
-    77c4:      	movs	r1, #0
-    77c6:      	str	r1, [sp, #12]
-    77c8:      	str	r0, [sp, #16]
-    77ca:      	ldr	r0, [sp, #12]
-    77cc:      	ldr	r1, [sp, #16]
-    77ce:      	str	r4, [sp]
-    77d0:      	bl	0x7756 <<core::ops::range::Range<usize> as core::slice::index::SliceIndex<[T]>>::index_mut::hfef3f1dc8e845709> @ imm = #-126
-    77d4:      	str	r0, [sp, #4]
-    77d6:      	str	r1, [sp, #8]
-    77d8:      	b	0x77da <<core::ops::range::RangeTo<usize> as core::slice::index::SliceIndex<[T]>>::index_mut::h96d92709bd33603d+0x28> @ imm = #-2
-    77da:      	ldr	r1, [sp, #8]
-    77dc:      	ldr	r0, [sp, #4]
-    77de:      	add	sp, #32
-    77e0:      	pop	{r4, r6, r7, pc}
-
-000077e2 <<core::ops::range::RangeFrom<usize> as core::slice::index::SliceIndex<[T]>>::get_unchecked::h9f3ed2cd5e912a74>:
-    77e2:      	push	{r7, lr}
-    77e4:      	add	r7, sp, #0
-    77e6:      	sub	sp, #48
-    77e8:      	str	r2, [sp, #12]
-    77ea:      	mov	r2, r1
-    77ec:      	ldr	r1, [sp, #12]
-    77ee:      	str	r2, [sp, #16]
-    77f0:      	mov	r2, r0
-    77f2:      	ldr	r0, [sp, #16]
-    77f4:      	str	r2, [sp, #20]
-    77f6:      	str	r2, [sp, #36]
-    77f8:      	str	r0, [sp, #40]
-    77fa:      	str	r1, [sp, #44]
-    77fc:      	bl	0x7170 <core::ptr::const_ptr::<impl *const [T]>::len::h5c9f0d880e46d416> @ imm = #-1680
-    7800:      	str	r0, [sp, #24]
-    7802:      	b	0x7804 <<core::ops::range::RangeFrom<usize> as core::slice::index::SliceIndex<[T]>>::get_unchecked::h9f3ed2cd5e912a74+0x22> @ imm = #-2
-    7804:      	ldr	r3, [sp, #12]
-    7806:      	ldr	r2, [sp, #16]
-    7808:      	ldr	r0, [sp, #24]
-    780a:      	ldr	r1, [sp, #20]
-    780c:      	str	r1, [sp, #28]
-    780e:      	str	r0, [sp, #32]
-    7810:      	ldr	r0, [sp, #28]
-    7812:      	ldr	r1, [sp, #32]
-    7814:      	bl	0x76b6 <<core::ops::range::Range<usize> as core::slice::index::SliceIndex<[T]>>::get_unchecked::h50ad3e51a6e2081f> @ imm = #-354
-    7818:      	str	r0, [sp, #4]
-    781a:      	str	r1, [sp, #8]
-    781c:      	b	0x781e <<core::ops::range::RangeFrom<usize> as core::slice::index::SliceIndex<[T]>>::get_unchecked::h9f3ed2cd5e912a74+0x3c> @ imm = #-2
-    781e:      	ldr	r1, [sp, #8]
-    7820:      	ldr	r0, [sp, #4]
-    7822:      	add	sp, #48
-    7824:      	pop	{r7, pc}
-
-00007826 <<core::ops::range::RangeFrom<usize> as core::slice::index::SliceIndex<[T]>>::index::hd072b581b4aa1a9d>:
-    7826:      	push	{r7, lr}
-    7828:      	add	r7, sp, #0
-    782a:      	sub	sp, #40
-    782c:      	str	r3, [sp, #12]
-    782e:      	str	r2, [sp, #16]
-    7830:      	str	r1, [sp, #20]
-    7832:      	str	r0, [sp, #24]
-    7834:      	str	r0, [sp, #28]
-    7836:      	str	r1, [sp, #32]
-    7838:      	str	r2, [sp, #36]
-    783a:      	cmp	r0, r2
-    783c:      	bhi	0x7850 <<core::ops::range::RangeFrom<usize> as core::slice::index::SliceIndex<[T]>>::index::hd072b581b4aa1a9d+0x2a> @ imm = #16
-    783e:      	b	0x7840 <<core::ops::range::RangeFrom<usize> as core::slice::index::SliceIndex<[T]>>::index::hd072b581b4aa1a9d+0x1a> @ imm = #-2
-    7840:      	ldr	r2, [sp, #16]
-    7842:      	ldr	r1, [sp, #20]
-    7844:      	ldr	r0, [sp, #24]
-    7846:      	bl	0x77e2 <<core::ops::range::RangeFrom<usize> as core::slice::index::SliceIndex<[T]>>::get_unchecked::h9f3ed2cd5e912a74> @ imm = #-104
-    784a:      	str	r0, [sp, #4]
-    784c:      	str	r1, [sp, #8]
-    784e:      	b	0x785c <<core::ops::range::RangeFrom<usize> as core::slice::index::SliceIndex<[T]>>::index::hd072b581b4aa1a9d+0x36> @ imm = #10
-    7850:      	ldr	r2, [sp, #12]
-    7852:      	ldr	r1, [sp, #16]
-    7854:      	ldr	r0, [sp, #24]
-    7856:      	bl	0x95ac <core::slice::index::slice_start_index_len_fail::h3080a8211123744d> @ imm = #7506
-    785a:      	trap
-    785c:      	ldr	r1, [sp, #8]
-    785e:      	ldr	r0, [sp, #4]
-    7860:      	add	sp, #40
-    7862:      	pop	{r7, pc}
-
-00007864 <<core::ops::range::RangeFull as core::slice::index::SliceIndex<[T]>>::index_mut::h341d3d585fc4b276>:
-    7864:      	sub	sp, #12
-    7866:      	str	r0, [sp, #4]
-    7868:      	str	r1, [sp, #8]
-    786a:      	add	sp, #12
-    786c:      	bx	lr
-
-0000786e <core::sync::atomic::AtomicUsize::load::h9a663a0eb38718a0>:
-    786e:      	push	{r7, lr}
-    7870:      	add	r7, sp, #0
-    7872:      	sub	sp, #24
-    7874:      	mov	r2, r1
-    7876:      	str	r2, [sp, #4]
-    7878:      	str	r0, [sp, #12]
-    787a:      	add	r2, sp, #16
-    787c:      	strb	r1, [r2]
-    787e:      	mov	r1, r0
-    7880:      	str	r1, [sp, #8]
-    7882:      	str	r0, [sp, #20]
-    7884:      	b	0x7886 <core::sync::atomic::AtomicUsize::load::h9a663a0eb38718a0+0x18> @ imm = #-2
-    7886:      	ldr	r1, [sp, #4]
-    7888:      	ldr	r0, [sp, #8]
-    788a:      	bl	0x78c4 <core::sync::atomic::atomic_load::h5a383df8bab4b4a8> @ imm = #54
-    788e:      	str	r0, [sp]
-    7890:      	b	0x7892 <core::sync::atomic::AtomicUsize::load::h9a663a0eb38718a0+0x24> @ imm = #-2
-    7892:      	ldr	r0, [sp]
-    7894:      	add	sp, #24
-    7896:      	pop	{r7, pc}
-
-00007898 <core::sync::atomic::AtomicUsize::store::h8f3ace57839c4a24>:
-    7898:      	push	{r7, lr}
-    789a:      	add	r7, sp, #0
-    789c:      	sub	sp, #32
-    789e:      	str	r1, [sp, #4]
-    78a0:      	mov	r3, r2
-    78a2:      	str	r3, [sp, #8]
-    78a4:      	str	r0, [sp, #16]
-    78a6:      	str	r1, [sp, #20]
-    78a8:      	add	r1, sp, #24
-    78aa:      	strb	r2, [r1]
-    78ac:      	mov	r1, r0
-    78ae:      	str	r1, [sp, #12]
-    78b0:      	str	r0, [sp, #28]
-    78b2:      	b	0x78b4 <core::sync::atomic::AtomicUsize::store::h8f3ace57839c4a24+0x1c> @ imm = #-2
-    78b4:      	ldr	r2, [sp, #8]
-    78b6:      	ldr	r1, [sp, #4]
-    78b8:      	ldr	r0, [sp, #12]
-    78ba:      	bl	0x7a6c <core::sync::atomic::atomic_store::h8a63f7ee5bb9ce64> @ imm = #430
-    78be:      	b	0x78c0 <core::sync::atomic::AtomicUsize::store::h8f3ace57839c4a24+0x28> @ imm = #-2
-    78c0:      	add	sp, #32
-    78c2:      	pop	{r7, pc}
-
-000078c4 <core::sync::atomic::atomic_load::h5a383df8bab4b4a8>:
-    78c4:      	push	{r7, lr}
-    78c6:      	add	r7, sp, #0
-    78c8:      	sub	sp, #24
-    78ca:      	mov	r2, r1
-    78cc:      	mov	r1, r0
-    78ce:      	str	r1, [sp, #4]
-    78d0:      	add	r0, sp, #12
-    78d2:      	strb	r2, [r0]
-    78d4:      	str	r1, [sp, #20]
-    78d6:      	ldrb	r0, [r0]
-    78d8:      	str	r0, [sp, #8]
-    78da:      	ldr	r0, [sp, #8]
-    78dc:      	lsls	r1, r0, #2
-    78de:      	adr	r0, #4 <core::sync::atomic::atomic_load::h5a383df8bab4b4a8+0x1f>
-    78e0:      	ldr	r0, [r0, r1]
-    78e2:      	mov	pc, r0
-
-000078e4 <$d.3>:
-    78e4:	fb 78 00 00	.word	0x000078fb
-    78e8:	03 79 00 00	.word	0x00007903
-    78ec:	0f 79 00 00	.word	0x0000790f
-    78f0:	1b 79 00 00	.word	0x0000791b
-    78f4:	27 79 00 00	.word	0x00007927
-
-000078f8 <$t.4>:
-    78f8:      	trap
-    78fa:      	ldr	r0, [sp, #4]
-    78fc:      	ldr	r0, [r0]
-    78fe:      	str	r0, [sp, #16]
-    7900:      	b	0x793c <$t.4+0x44>      @ imm = #56
-    7902:      	ldr	r0, [pc, #68] <$d.5+0xa>
-    7904:      	ldr	r2, [pc, #68] <$d.5+0xc>
-    7906:      	movs	r1, #40
-    7908:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #3132
-    790c:      	trap
-    790e:      	ldr	r0, [sp, #4]
-    7910:      	ldr	r0, [r0]
-    7912:      	dmb	sy
-    7916:      	str	r0, [sp, #16]
-    7918:      	b	0x793a <$t.4+0x42>      @ imm = #30
-    791a:      	ldr	r0, [pc, #36] <$d.5+0x2>
-    791c:      	ldr	r2, [pc, #36] <$d.5+0x4>
-    791e:      	movs	r1, #49
-    7920:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #3108
-    7924:      	trap
-    7926:      	ldr	r0, [sp, #4]
-    7928:      	ldr	r0, [r0]
-    792a:      	dmb	sy
-    792e:      	str	r0, [sp, #16]
-    7930:      	b	0x7932 <$t.4+0x3a>      @ imm = #-2
-    7932:      	b	0x7934 <$t.4+0x3c>      @ imm = #-2
-    7934:      	ldr	r0, [sp, #16]
-    7936:      	add	sp, #24
-    7938:      	pop	{r7, pc}
-    793a:      	b	0x7934 <$t.4+0x3c>      @ imm = #-10
-    793c:      	b	0x7934 <$t.4+0x3c>      @ imm = #-12
-    793e:      	mov	r8, r8
-
-00007940 <$d.5>:
-    7940:	78 b6 00 00	.word	0x0000b678
-    7944:	f8 b6 00 00	.word	0x0000b6f8
-    7948:	08 b7 00 00	.word	0x0000b708
-    794c:	30 b7 00 00	.word	0x0000b730
-
-00007950 <core::sync::atomic::atomic_load::he2bfc88ea7bfe08f>:
-    7950:      	push	{r7, lr}
-    7952:      	add	r7, sp, #0
-    7954:      	sub	sp, #24
-    7956:      	mov	r2, r1
-    7958:      	mov	r1, r0
-    795a:      	str	r1, [sp, #4]
-    795c:      	add	r0, sp, #12
-    795e:      	strb	r2, [r0]
-    7960:      	str	r1, [sp, #20]
-    7962:      	ldrb	r0, [r0]
-    7964:      	str	r0, [sp, #8]
-    7966:      	ldr	r0, [sp, #8]
-    7968:      	lsls	r1, r0, #2
-    796a:      	adr	r0, #4 <core::sync::atomic::atomic_load::he2bfc88ea7bfe08f+0x1f>
-    796c:      	ldr	r0, [r0, r1]
-    796e:      	mov	pc, r0
-
-00007970 <$d.7>:
-    7970:	87 79 00 00	.word	0x00007987
-    7974:	8f 79 00 00	.word	0x0000798f
-    7978:	9b 79 00 00	.word	0x0000799b
-    797c:	a7 79 00 00	.word	0x000079a7
-    7980:	b3 79 00 00	.word	0x000079b3
-
-00007984 <$t.8>:
-    7984:      	trap
-    7986:      	ldr	r0, [sp, #4]
-    7988:      	ldr	r0, [r0]
-    798a:      	str	r0, [sp, #16]
-    798c:      	b	0x79c8 <$t.8+0x44>      @ imm = #56
-    798e:      	ldr	r0, [pc, #68] <$d.9+0xa>
-    7990:      	ldr	r2, [pc, #68] <$d.9+0xc>
-    7992:      	movs	r1, #40
-    7994:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #2992
-    7998:      	trap
-    799a:      	ldr	r0, [sp, #4]
-    799c:      	ldr	r0, [r0]
-    799e:      	dmb	sy
-    79a2:      	str	r0, [sp, #16]
-    79a4:      	b	0x79c6 <$t.8+0x42>      @ imm = #30
-    79a6:      	ldr	r0, [pc, #36] <$d.9+0x2>
-    79a8:      	ldr	r2, [pc, #36] <$d.9+0x4>
-    79aa:      	movs	r1, #49
-    79ac:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #2968
-    79b0:      	trap
-    79b2:      	ldr	r0, [sp, #4]
-    79b4:      	ldr	r0, [r0]
-    79b6:      	dmb	sy
-    79ba:      	str	r0, [sp, #16]
-    79bc:      	b	0x79be <$t.8+0x3a>      @ imm = #-2
-    79be:      	b	0x79c0 <$t.8+0x3c>      @ imm = #-2
-    79c0:      	ldr	r0, [sp, #16]
-    79c2:      	add	sp, #24
-    79c4:      	pop	{r7, pc}
-    79c6:      	b	0x79c0 <$t.8+0x3c>      @ imm = #-10
-    79c8:      	b	0x79c0 <$t.8+0x3c>      @ imm = #-12
-    79ca:      	mov	r8, r8
-
-000079cc <$d.9>:
-    79cc:	78 b6 00 00	.word	0x0000b678
-    79d0:	f8 b6 00 00	.word	0x0000b6f8
-    79d4:	08 b7 00 00	.word	0x0000b708
-    79d8:	30 b7 00 00	.word	0x0000b730
-
-000079dc <core::sync::atomic::atomic_store::h6b1dca1157a53a2b>:
-    79dc:      	push	{r7, lr}
-    79de:      	add	r7, sp, #0
-    79e0:      	sub	sp, #24
-    79e2:      	mov	r3, r2
-    79e4:      	str	r1, [sp]
-    79e6:      	mov	r2, r0
-    79e8:      	str	r2, [sp, #4]
-    79ea:      	add	r0, sp, #12
-    79ec:      	strb	r3, [r0]
-    79ee:      	str	r2, [sp, #16]
-    79f0:      	str	r1, [sp, #20]
-    79f2:      	ldrb	r0, [r0]
-    79f4:      	str	r0, [sp, #8]
-    79f6:      	ldr	r0, [sp, #8]
-    79f8:      	lsls	r1, r0, #2
-    79fa:      	adr	r0, #4 <core::sync::atomic::atomic_store::h6b1dca1157a53a2b+0x23>
-    79fc:      	ldr	r0, [r0, r1]
-    79fe:      	mov	pc, r0
-
-00007a00 <$d.11>:
-    7a00:	17 7a 00 00	.word	0x00007a17
-    7a04:	1f 7a 00 00	.word	0x00007a1f
-    7a08:	2b 7a 00 00	.word	0x00007a2b
-    7a0c:	37 7a 00 00	.word	0x00007a37
-    7a10:	43 7a 00 00	.word	0x00007a43
-
-00007a14 <$t.12>:
-    7a14:      	trap
-    7a16:      	ldr	r0, [sp]
-    7a18:      	ldr	r1, [sp, #4]
-    7a1a:      	str	r0, [r1]
-    7a1c:      	b	0x7a5a <$t.12+0x46>     @ imm = #58
-    7a1e:      	ldr	r0, [sp]
-    7a20:      	ldr	r1, [sp, #4]
-    7a22:      	dmb	sy
-    7a26:      	str	r0, [r1]
-    7a28:      	b	0x7a58 <$t.12+0x44>     @ imm = #44
-    7a2a:      	ldr	r0, [pc, #56] <$d.13+0xa>
-    7a2c:      	ldr	r2, [pc, #56] <$d.13+0xc>
-    7a2e:      	movs	r1, #42
-    7a30:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #2836
-    7a34:      	trap
-    7a36:      	ldr	r0, [pc, #36] <$d.13+0x2>
-    7a38:      	ldr	r2, [pc, #36] <$d.13+0x4>
-    7a3a:      	movs	r1, #50
-    7a3c:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #2824
-    7a40:      	trap
-    7a42:      	ldr	r0, [sp]
-    7a44:      	ldr	r1, [sp, #4]
-    7a46:      	dmb	sy
-    7a4a:      	str	r0, [r1]
-    7a4c:      	dmb	sy
-    7a50:      	b	0x7a52 <$t.12+0x3e>     @ imm = #-2
-    7a52:      	b	0x7a54 <$t.12+0x40>     @ imm = #-2
-    7a54:      	add	sp, #24
-    7a56:      	pop	{r7, pc}
-    7a58:      	b	0x7a54 <$t.12+0x40>     @ imm = #-8
-    7a5a:      	b	0x7a54 <$t.12+0x40>     @ imm = #-10
-
-00007a5c <$d.13>:
-    7a5c:	40 b7 00 00	.word	0x0000b740
-    7a60:	74 b7 00 00	.word	0x0000b774
-    7a64:	84 b7 00 00	.word	0x0000b784
-    7a68:	b0 b7 00 00	.word	0x0000b7b0
-
-00007a6c <core::sync::atomic::atomic_store::h8a63f7ee5bb9ce64>:
-    7a6c:      	push	{r7, lr}
-    7a6e:      	add	r7, sp, #0
-    7a70:      	sub	sp, #24
-    7a72:      	mov	r3, r2
-    7a74:      	str	r1, [sp]
-    7a76:      	mov	r2, r0
-    7a78:      	str	r2, [sp, #4]
-    7a7a:      	add	r0, sp, #12
-    7a7c:      	strb	r3, [r0]
-    7a7e:      	str	r2, [sp, #16]
-    7a80:      	str	r1, [sp, #20]
-    7a82:      	ldrb	r0, [r0]
-    7a84:      	str	r0, [sp, #8]
-    7a86:      	ldr	r0, [sp, #8]
-    7a88:      	lsls	r1, r0, #2
-    7a8a:      	adr	r0, #4 <core::sync::atomic::atomic_store::h8a63f7ee5bb9ce64+0x23>
-    7a8c:      	ldr	r0, [r0, r1]
-    7a8e:      	mov	pc, r0
-
-00007a90 <$d.15>:
-    7a90:	a7 7a 00 00	.word	0x00007aa7
-    7a94:	af 7a 00 00	.word	0x00007aaf
-    7a98:	bb 7a 00 00	.word	0x00007abb
-    7a9c:	c7 7a 00 00	.word	0x00007ac7
-    7aa0:	d3 7a 00 00	.word	0x00007ad3
-
-00007aa4 <$t.16>:
-    7aa4:      	trap
-    7aa6:      	ldr	r0, [sp]
-    7aa8:      	ldr	r1, [sp, #4]
-    7aaa:      	str	r0, [r1]
-    7aac:      	b	0x7aea <$t.16+0x46>     @ imm = #58
-    7aae:      	ldr	r0, [sp]
-    7ab0:      	ldr	r1, [sp, #4]
-    7ab2:      	dmb	sy
-    7ab6:      	str	r0, [r1]
-    7ab8:      	b	0x7ae8 <$t.16+0x44>     @ imm = #44
-    7aba:      	ldr	r0, [pc, #56] <$d.17+0xa>
-    7abc:      	ldr	r2, [pc, #56] <$d.17+0xc>
-    7abe:      	movs	r1, #42
-    7ac0:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #2692
-    7ac4:      	trap
-    7ac6:      	ldr	r0, [pc, #36] <$d.17+0x2>
-    7ac8:      	ldr	r2, [pc, #36] <$d.17+0x4>
-    7aca:      	movs	r1, #50
-    7acc:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #2680
-    7ad0:      	trap
-    7ad2:      	ldr	r0, [sp]
-    7ad4:      	ldr	r1, [sp, #4]
-    7ad6:      	dmb	sy
-    7ada:      	str	r0, [r1]
-    7adc:      	dmb	sy
-    7ae0:      	b	0x7ae2 <$t.16+0x3e>     @ imm = #-2
-    7ae2:      	b	0x7ae4 <$t.16+0x40>     @ imm = #-2
-    7ae4:      	add	sp, #24
-    7ae6:      	pop	{r7, pc}
-    7ae8:      	b	0x7ae4 <$t.16+0x40>     @ imm = #-8
-    7aea:      	b	0x7ae4 <$t.16+0x40>     @ imm = #-10
-
-00007aec <$d.17>:
-    7aec:	40 b7 00 00	.word	0x0000b740
-    7af0:	74 b7 00 00	.word	0x0000b774
-    7af4:	84 b7 00 00	.word	0x0000b784
-    7af8:	b0 b7 00 00	.word	0x0000b7b0
-
-00007afc <core::sync::atomic::AtomicPtr<T>::load::hbf93d896d15fb4dc>:
-    7afc:      	push	{r7, lr}
-    7afe:      	add	r7, sp, #0
-    7b00:      	sub	sp, #24
-    7b02:      	mov	r2, r1
-    7b04:      	str	r2, [sp, #4]
-    7b06:      	str	r0, [sp, #12]
-    7b08:      	add	r2, sp, #16
-    7b0a:      	strb	r1, [r2]
-    7b0c:      	str	r0, [sp, #20]
-    7b0e:      	str	r0, [sp, #8]
-    7b10:      	b	0x7b12 <core::sync::atomic::AtomicPtr<T>::load::hbf93d896d15fb4dc+0x16> @ imm = #-2
-    7b12:      	ldr	r1, [sp, #4]
-    7b14:      	ldr	r0, [sp, #8]
-    7b16:      	bl	0x7950 <core::sync::atomic::atomic_load::he2bfc88ea7bfe08f> @ imm = #-458
-    7b1a:      	str	r0, [sp]
-    7b1c:      	b	0x7b1e <core::sync::atomic::AtomicPtr<T>::load::hbf93d896d15fb4dc+0x22> @ imm = #-2
-    7b1e:      	ldr	r0, [sp]
-    7b20:      	add	sp, #24
-    7b22:      	pop	{r7, pc}
-
-00007b24 <core::sync::atomic::AtomicPtr<T>::store::h860b95e1d66e25ca>:
-    7b24:      	push	{r7, lr}
-    7b26:      	add	r7, sp, #0
-    7b28:      	sub	sp, #32
-    7b2a:      	str	r1, [sp, #4]
-    7b2c:      	mov	r3, r2
-    7b2e:      	str	r3, [sp, #8]
-    7b30:      	str	r0, [sp, #16]
-    7b32:      	str	r1, [sp, #20]
-    7b34:      	add	r1, sp, #24
-    7b36:      	strb	r2, [r1]
-    7b38:      	str	r0, [sp, #28]
-    7b3a:      	str	r0, [sp, #12]
-    7b3c:      	b	0x7b3e <core::sync::atomic::AtomicPtr<T>::store::h860b95e1d66e25ca+0x1a> @ imm = #-2
-    7b3e:      	ldr	r2, [sp, #8]
-    7b40:      	ldr	r1, [sp, #4]
-    7b42:      	ldr	r0, [sp, #12]
-    7b44:      	bl	0x79dc <core::sync::atomic::atomic_store::h6b1dca1157a53a2b> @ imm = #-364
-    7b48:      	b	0x7b4a <core::sync::atomic::AtomicPtr<T>::store::h860b95e1d66e25ca+0x26> @ imm = #-2
-    7b4a:      	add	sp, #32
-    7b4c:      	pop	{r7, pc}
-    7b4e:      	bmi	0x7afa <$d.17+0xe>      @ imm = #-88
-
-00007b50 <core::sync::atomic::fence::hab4fc659313d4cc6>:
-    7b50:      	push	{r7, lr}
-    7b52:      	add	r7, sp, #0
-    7b54:      	sub	sp, #8
-    7b56:      	mov	r1, r0
-    7b58:      	add	r0, sp, #4
-    7b5a:      	strb	r1, [r0]
-    7b5c:      	ldrb	r0, [r0]
-    7b5e:      	str	r0, [sp]
-    7b60:      	ldr	r0, [sp]
-    7b62:      	lsls	r1, r0, #2
-    7b64:      	adr	r0, #4 <core::sync::atomic::fence::hab4fc659313d4cc6+0x19>
-    7b66:      	ldr	r0, [r0, r1]
-    7b68:      	mov	pc, r0
-    7b6a:      	mov	r8, r8
-
-00007b6c <$d.21>:
-    7b6c:	83 7b 00 00	.word	0x00007b83
-    7b70:	8f 7b 00 00	.word	0x00007b8f
-    7b74:	95 7b 00 00	.word	0x00007b95
-    7b78:	9b 7b 00 00	.word	0x00007b9b
-    7b7c:	a1 7b 00 00	.word	0x00007ba1
-
-00007b80 <$t.22>:
-    7b80:      	trap
-    7b82:      	ldr	r0, [pc, #40] <$d.23+0x2>
-    7b84:      	ldr	r2, [pc, #40] <$d.23+0x4>
-    7b86:      	movs	r1, #41
-    7b88:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #2492
-    7b8c:      	trap
-    7b8e:      	dmb	sy
-    7b92:      	b	0x7ba6 <$t.22+0x26>     @ imm = #16
-    7b94:      	dmb	sy
-    7b98:      	b	0x7ba6 <$t.22+0x26>     @ imm = #10
-    7b9a:      	dmb	sy
-    7b9e:      	b	0x7ba6 <$t.22+0x26>     @ imm = #4
-    7ba0:      	dmb	sy
-    7ba4:      	b	0x7ba6 <$t.22+0x26>     @ imm = #-2
-    7ba6:      	add	sp, #8
-    7ba8:      	pop	{r7, pc}
-    7baa:      	mov	r8, r8
-
-00007bac <$d.23>:
-    7bac:	c0 b7 00 00	.word	0x0000b7c0
-    7bb0:	ec b7 00 00	.word	0x0000b7ec
-
-00007bb4 <rtt_target::print::print_impl::with_writer::h0c0c75429d5f5bd2>:
-    7bb4:      	push	{r4, r6, r7, lr}
-    7bb6:      	add	r7, sp, #8
-    7bb8:      	sub	sp, #48
-    7bba:      	str	r1, [sp, #8]
-    7bbc:      	mov	r2, r0
-    7bbe:      	str	r2, [sp, #12]
-    7bc0:      	add	r2, sp, #36
-    7bc2:      	strb	r0, [r2]
-    7bc4:      	str	r1, [sp, #40]
-    7bc6:      	add	r1, sp, #32
-    7bc8:      	movs	r0, #0
-    7bca:      	strb	r0, [r1]
-    7bcc:      	movs	r0, #1
-    7bce:      	strb	r0, [r1]
-    7bd0:      	add	r1, sp, #20
-    7bd2:      	movs	r0, #4
-    7bd4:      	strb	r0, [r1]
-    7bd6:      	ldr	r1, [sp, #20]
-    7bd8:      	ldr	r0, [pc, #76] <$d.1>
-    7bda:      	bl	0x7afc <core::sync::atomic::AtomicPtr<T>::load::hbf93d896d15fb4dc> @ imm = #-226
-    7bde:      	mov	r1, r0
-    7be0:      	str	r1, [sp, #16]
-    7be2:      	str	r0, [sp, #44]
-    7be4:      	b	0x7be6 <rtt_target::print::print_impl::with_writer::h0c0c75429d5f5bd2+0x32> @ imm = #-2
-    7be6:      	ldr	r0, [sp, #16]
-    7be8:      	bl	0x6fda <core::ptr::mut_ptr::<impl *mut T>::is_null::h5357cc960f469c38> @ imm = #-3090
-    7bec:      	str	r0, [sp, #4]
-    7bee:      	b	0x7bf0 <rtt_target::print::print_impl::with_writer::h0c0c75429d5f5bd2+0x3c> @ imm = #-2
-    7bf0:      	ldr	r0, [sp, #4]
-    7bf2:      	lsls	r0, r0, #31
-    7bf4:      	cmp	r0, #0
-    7bf6:      	beq	0x7c06 <rtt_target::print::print_impl::with_writer::h0c0c75429d5f5bd2+0x52> @ imm = #12
-    7bf8:      	b	0x7bfa <rtt_target::print::print_impl::with_writer::h0c0c75429d5f5bd2+0x46> @ imm = #-2
-    7bfa:      	add	r0, sp, #32
-    7bfc:      	ldrb	r0, [r0]
-    7bfe:      	lsls	r0, r0, #31
-    7c00:      	cmp	r0, #0
-    7c02:      	bne	0x7c26 <rtt_target::print::print_impl::with_writer::h0c0c75429d5f5bd2+0x72> @ imm = #32
-    7c04:      	b	0x7c22 <rtt_target::print::print_impl::with_writer::h0c0c75429d5f5bd2+0x6e> @ imm = #26
-    7c06:      	ldr	r1, [sp, #16]
-    7c08:      	ldr	r2, [sp, #8]
-    7c0a:      	ldr	r3, [sp, #12]
-    7c0c:      	add	r4, sp, #32
-    7c0e:      	movs	r0, #0
-    7c10:      	strb	r0, [r4]
-    7c12:      	add	r0, sp, #24
-    7c14:      	strb	r3, [r0]
-    7c16:      	str	r2, [sp, #28]
-    7c18:      	ldr	r2, [r1]
-    7c1a:      	ldr	r1, [pc, #16] <$d.1+0x6>
-    7c1c:      	blx	r2
-    7c1e:      	b	0x7c20 <rtt_target::print::print_impl::with_writer::h0c0c75429d5f5bd2+0x6c> @ imm = #-2
-    7c20:      	b	0x7bfa <rtt_target::print::print_impl::with_writer::h0c0c75429d5f5bd2+0x46> @ imm = #-42
-    7c22:      	add	sp, #48
-    7c24:      	pop	{r4, r6, r7, pc}
-    7c26:      	b	0x7c22 <rtt_target::print::print_impl::with_writer::h0c0c75429d5f5bd2+0x6e> @ imm = #-8
-
-00007c28 <$d.1>:
-    7c28:	38 04 00 10	.word	0x10000438
-    7c2c:	51 6f 00 00	.word	0x00006f51
-
-00007c30 <rtt_target::print::print_impl::with_writer::hb4a3d6b1f7cc3322>:
-    7c30:      	push	{r4, r6, r7, lr}
-    7c32:      	add	r7, sp, #8
-    7c34:      	sub	sp, #48
-    7c36:      	str	r1, [sp, #8]
-    7c38:      	mov	r2, r0
-    7c3a:      	str	r2, [sp, #12]
-    7c3c:      	add	r2, sp, #36
-    7c3e:      	strb	r0, [r2]
-    7c40:      	str	r1, [sp, #40]
-    7c42:      	add	r1, sp, #32
-    7c44:      	movs	r0, #0
-    7c46:      	strb	r0, [r1]
-    7c48:      	movs	r0, #1
-    7c4a:      	strb	r0, [r1]
-    7c4c:      	add	r1, sp, #20
-    7c4e:      	movs	r0, #4
-    7c50:      	strb	r0, [r1]
-    7c52:      	ldr	r1, [sp, #20]
-    7c54:      	ldr	r0, [pc, #76] <$d.3>
-    7c56:      	bl	0x7afc <core::sync::atomic::AtomicPtr<T>::load::hbf93d896d15fb4dc> @ imm = #-350
-    7c5a:      	mov	r1, r0
-    7c5c:      	str	r1, [sp, #16]
-    7c5e:      	str	r0, [sp, #44]
-    7c60:      	b	0x7c62 <rtt_target::print::print_impl::with_writer::hb4a3d6b1f7cc3322+0x32> @ imm = #-2
-    7c62:      	ldr	r0, [sp, #16]
-    7c64:      	bl	0x6fda <core::ptr::mut_ptr::<impl *mut T>::is_null::h5357cc960f469c38> @ imm = #-3214
-    7c68:      	str	r0, [sp, #4]
-    7c6a:      	b	0x7c6c <rtt_target::print::print_impl::with_writer::hb4a3d6b1f7cc3322+0x3c> @ imm = #-2
-    7c6c:      	ldr	r0, [sp, #4]
-    7c6e:      	lsls	r0, r0, #31
-    7c70:      	cmp	r0, #0
-    7c72:      	beq	0x7c82 <rtt_target::print::print_impl::with_writer::hb4a3d6b1f7cc3322+0x52> @ imm = #12
-    7c74:      	b	0x7c76 <rtt_target::print::print_impl::with_writer::hb4a3d6b1f7cc3322+0x46> @ imm = #-2
-    7c76:      	add	r0, sp, #32
-    7c78:      	ldrb	r0, [r0]
-    7c7a:      	lsls	r0, r0, #31
-    7c7c:      	cmp	r0, #0
-    7c7e:      	bne	0x7ca2 <rtt_target::print::print_impl::with_writer::hb4a3d6b1f7cc3322+0x72> @ imm = #32
-    7c80:      	b	0x7c9e <rtt_target::print::print_impl::with_writer::hb4a3d6b1f7cc3322+0x6e> @ imm = #26
-    7c82:      	ldr	r1, [sp, #16]
-    7c84:      	ldr	r2, [sp, #8]
-    7c86:      	ldr	r3, [sp, #12]
-    7c88:      	add	r4, sp, #32
-    7c8a:      	movs	r0, #0
-    7c8c:      	strb	r0, [r4]
-    7c8e:      	add	r0, sp, #24
-    7c90:      	strb	r3, [r0]
-    7c92:      	str	r2, [sp, #28]
-    7c94:      	ldr	r2, [r1]
-    7c96:      	ldr	r1, [pc, #16] <$d.3+0x6>
-    7c98:      	blx	r2
-    7c9a:      	b	0x7c9c <rtt_target::print::print_impl::with_writer::hb4a3d6b1f7cc3322+0x6c> @ imm = #-2
-    7c9c:      	b	0x7c76 <rtt_target::print::print_impl::with_writer::hb4a3d6b1f7cc3322+0x46> @ imm = #-42
-    7c9e:      	add	sp, #48
-    7ca0:      	pop	{r4, r6, r7, pc}
-    7ca2:      	b	0x7c9e <rtt_target::print::print_impl::with_writer::hb4a3d6b1f7cc3322+0x6e> @ imm = #-8
-
-00007ca4 <$d.3>:
-    7ca4:	38 04 00 10	.word	0x10000438
-    7ca8:	1d 6f 00 00	.word	0x00006f1d
-
-00007cac <rtt_target::print::print_impl::with_writer::{{closure}}::h170784b9fd98caa4>:
-    7cac:      	push	{r4, r5, r6, r7, lr}
-    7cae:      	add	r7, sp, #12
-    7cb0:      	sub	sp, #76
-    7cb2:      	str	r0, [sp, #56]
-    7cb4:      	str	r1, [sp, #60]
-    7cb6:      	mov	r0, r1
-    7cb8:      	str	r0, [sp, #4]
-    7cba:      	str	r1, [sp, #64]
-    7cbc:      	ldr	r0, [pc, #48] <$d.5>
-    7cbe:      	str	r0, [sp, #72]
-    7cc0:      	b	0x7cc2 <rtt_target::print::print_impl::with_writer::{{closure}}::h170784b9fd98caa4+0x16> @ imm = #-2
-    7cc2:      	ldr	r0, [sp, #4]
-    7cc4:      	ldr	r1, [pc, #40] <$d.5>
-    7cc6:      	str	r1, [sp, #68]
-    7cc8:      	adds	r2, r0, #4
-    7cca:      	str	r2, [sp]
-    7ccc:      	ldrb	r2, [r0]
-    7cce:      	add	r0, sp, #32
-    7cd0:      	bl	0x74ec <rtt_target::TerminalChannel::write::h881f2a502ca6a059> @ imm = #-2024
-    7cd4:      	b	0x7cd6 <rtt_target::print::print_impl::with_writer::{{closure}}::h170784b9fd98caa4+0x2a> @ imm = #-2
-    7cd6:      	ldr	r0, [sp]
-    7cd8:      	add	r3, sp, #32
-    7cda:      	add	r1, sp, #8
-    7cdc:      	mov	r2, r1
-    7cde:      	ldm	r3!, {r4, r5, r6}
-    7ce0:      	stm	r2!, {r4, r5, r6}
-    7ce2:      	ldm	r3!, {r4, r5, r6}
-    7ce4:      	stm	r2!, {r4, r5, r6}
-    7ce6:      	bl	0x7d5a <rtt_target::print::print_impl::write_str::{{closure}}::h8286a5c883d9a032> @ imm = #112
-    7cea:      	b	0x7cec <rtt_target::print::print_impl::with_writer::{{closure}}::h170784b9fd98caa4+0x40> @ imm = #-2
-    7cec:      	add	sp, #76
-    7cee:      	pop	{r4, r5, r6, r7, pc}
-
-00007cf0 <$d.5>:
-    7cf0:	3c 04 00 10	.word	0x1000043c
-
-00007cf4 <rtt_target::print::print_impl::with_writer::{{closure}}::h9b08329612e75dcb>:
-    7cf4:      	push	{r4, r5, r6, r7, lr}
-    7cf6:      	add	r7, sp, #12
-    7cf8:      	sub	sp, #76
-    7cfa:      	str	r0, [sp, #56]
-    7cfc:      	str	r1, [sp, #60]
-    7cfe:      	mov	r0, r1
-    7d00:      	str	r0, [sp, #4]
-    7d02:      	str	r1, [sp, #64]
-    7d04:      	ldr	r0, [pc, #48] <$d.7>
-    7d06:      	str	r0, [sp, #72]
-    7d08:      	b	0x7d0a <rtt_target::print::print_impl::with_writer::{{closure}}::h9b08329612e75dcb+0x16> @ imm = #-2
-    7d0a:      	ldr	r0, [sp, #4]
-    7d0c:      	ldr	r1, [pc, #40] <$d.7>
-    7d0e:      	str	r1, [sp, #68]
-    7d10:      	adds	r2, r0, #4
-    7d12:      	str	r2, [sp]
-    7d14:      	ldrb	r2, [r0]
-    7d16:      	add	r0, sp, #32
-    7d18:      	bl	0x74ec <rtt_target::TerminalChannel::write::h881f2a502ca6a059> @ imm = #-2096
-    7d1c:      	b	0x7d1e <rtt_target::print::print_impl::with_writer::{{closure}}::h9b08329612e75dcb+0x2a> @ imm = #-2
-    7d1e:      	ldr	r0, [sp]
-    7d20:      	add	r3, sp, #32
-    7d22:      	add	r1, sp, #8
-    7d24:      	mov	r2, r1
-    7d26:      	ldm	r3!, {r4, r5, r6}
-    7d28:      	stm	r2!, {r4, r5, r6}
-    7d2a:      	ldm	r3!, {r4, r5, r6}
-    7d2c:      	stm	r2!, {r4, r5, r6}
-    7d2e:      	bl	0x7da6 <rtt_target::print::print_impl::write_fmt::{{closure}}::he229448fc03cc8d9> @ imm = #116
-    7d32:      	b	0x7d34 <rtt_target::print::print_impl::with_writer::{{closure}}::h9b08329612e75dcb+0x40> @ imm = #-2
-    7d34:      	add	sp, #76
-    7d36:      	pop	{r4, r5, r6, r7, pc}
-
-00007d38 <$d.7>:
-    7d38:	3c 04 00 10	.word	0x1000043c
-
-00007d3c <rtt_target::print::print_impl::write_str::hd99d580f704d1205>:
-    7d3c:      	push	{r7, lr}
-    7d3e:      	add	r7, sp, #0
-    7d40:      	sub	sp, #16
-    7d42:      	str	r1, [sp]
-    7d44:      	str	r2, [sp, #4]
-    7d46:      	add	r1, sp, #12
-    7d48:      	strb	r0, [r1]
-    7d4a:      	mov	r1, sp
-    7d4c:      	str	r1, [sp, #8]
-    7d4e:      	ldr	r1, [sp, #8]
-    7d50:      	bl	0x7c30 <rtt_target::print::print_impl::with_writer::hb4a3d6b1f7cc3322> @ imm = #-292
-    7d54:      	b	0x7d56 <rtt_target::print::print_impl::write_str::hd99d580f704d1205+0x1a> @ imm = #-2
-    7d56:      	add	sp, #16
-    7d58:      	pop	{r7, pc}
-
-00007d5a <rtt_target::print::print_impl::write_str::{{closure}}::h8286a5c883d9a032>:
-    7d5a:      	push	{r7, lr}
-    7d5c:      	add	r7, sp, #0
-    7d5e:      	sub	sp, #16
-    7d60:      	str	r1, [sp, #4]
-    7d62:      	mov	r1, r0
-    7d64:      	ldr	r0, [sp, #4]
-    7d66:      	str	r1, [sp, #12]
-    7d68:      	ldr	r2, [r1]
-    7d6a:      	ldr	r1, [r2]
-    7d6c:      	ldr	r2, [r2, #4]
-    7d6e:      	bl	0x7628 <<rtt_target::TerminalWriter as core::fmt::Write>::write_str::hbd0d9bf528179285> @ imm = #-1866
-    7d72:      	str	r0, [sp, #8]
-    7d74:      	b	0x7d76 <rtt_target::print::print_impl::write_str::{{closure}}::h8286a5c883d9a032+0x1c> @ imm = #-2
-    7d76:      	ldr	r0, [sp, #8]
-    7d78:      	movs	r1, #1
-    7d7a:      	ands	r0, r1
-    7d7c:      	bl	0x70ea <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h824f7b02f54f5a05E> @ imm = #-3222
-    7d80:      	b	0x7d82 <rtt_target::print::print_impl::write_str::{{closure}}::h8286a5c883d9a032+0x28> @ imm = #-2
-    7d82:      	ldr	r0, [sp, #4]
-    7d84:      	bl	0x6f9c <core::ptr::drop_in_place<rtt_target::TerminalWriter>::hbc7a82d78699968f> @ imm = #-3564
-    7d88:      	b	0x7d8a <rtt_target::print::print_impl::write_str::{{closure}}::h8286a5c883d9a032+0x30> @ imm = #-2
-    7d8a:      	add	sp, #16
-    7d8c:      	pop	{r7, pc}
-
-00007d8e <rtt_target::print::print_impl::write_fmt::h2608b8473bd2efde>:
-    7d8e:      	push	{r7, lr}
-    7d90:      	add	r7, sp, #0
-    7d92:      	sub	sp, #8
-    7d94:      	add	r2, sp, #4
-    7d96:      	strb	r0, [r2]
-    7d98:      	str	r1, [sp]
-    7d9a:      	ldr	r1, [sp]
-    7d9c:      	bl	0x7bb4 <rtt_target::print::print_impl::with_writer::h0c0c75429d5f5bd2> @ imm = #-492
-    7da0:      	b	0x7da2 <rtt_target::print::print_impl::write_fmt::h2608b8473bd2efde+0x14> @ imm = #-2
-    7da2:      	add	sp, #8
-    7da4:      	pop	{r7, pc}
-
-00007da6 <rtt_target::print::print_impl::write_fmt::{{closure}}::he229448fc03cc8d9>:
-    7da6:      	push	{r4, r5, r6, r7, lr}
-    7da8:      	add	r7, sp, #12
-    7daa:      	sub	sp, #36
-    7dac:      	str	r1, [sp]
-    7dae:      	mov	r1, r0
-    7db0:      	ldr	r0, [sp]
-    7db2:      	str	r1, [sp, #32]
-    7db4:      	ldr	r3, [r1]
-    7db6:      	add	r1, sp, #8
-    7db8:      	mov	r2, r1
-    7dba:      	ldm	r3!, {r4, r5, r6}
-    7dbc:      	stm	r2!, {r4, r5, r6}
-    7dbe:      	ldm	r3!, {r4, r5, r6}
-    7dc0:      	stm	r2!, {r4, r5, r6}
-    7dc2:      	bl	0x7308 <core::fmt::Write::write_fmt::h517fbdb63d1c3dc5> @ imm = #-2750
-    7dc6:      	str	r0, [sp, #4]
-    7dc8:      	b	0x7dca <rtt_target::print::print_impl::write_fmt::{{closure}}::he229448fc03cc8d9+0x24> @ imm = #-2
-    7dca:      	ldr	r0, [sp, #4]
-    7dcc:      	movs	r1, #1
-    7dce:      	ands	r0, r1
-    7dd0:      	bl	0x70ea <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h824f7b02f54f5a05E> @ imm = #-3306
-    7dd4:      	b	0x7dd6 <rtt_target::print::print_impl::write_fmt::{{closure}}::he229448fc03cc8d9+0x30> @ imm = #-2
-    7dd6:      	ldr	r0, [sp]
-    7dd8:      	bl	0x6f9c <core::ptr::drop_in_place<rtt_target::TerminalWriter>::hbc7a82d78699968f> @ imm = #-3648
-    7ddc:      	b	0x7dde <rtt_target::print::print_impl::write_fmt::{{closure}}::he229448fc03cc8d9+0x38> @ imm = #-2
-    7dde:      	add	sp, #36
-    7de0:      	pop	{r4, r5, r6, r7, pc}
-
-00007de2 <core::fmt::ArgumentV1::new::h81b8e67c8f326c50>:
-    7de2:      	sub	sp, #36
-    7de4:      	str	r0, [sp, #4]
-    7de6:      	str	r0, [sp, #20]
-    7de8:      	str	r1, [sp, #24]
-    7dea:      	str	r1, [sp, #28]
-    7dec:      	ldr	r0, [sp, #28]
-    7dee:      	str	r0, [sp, #8]
-    7df0:      	b	0x7df2 <core::fmt::ArgumentV1::new::h81b8e67c8f326c50+0x10> @ imm = #-2
-    7df2:      	ldr	r0, [sp, #4]
-    7df4:      	str	r0, [sp, #32]
-    7df6:      	ldr	r0, [sp, #32]
-    7df8:      	str	r0, [sp]
-    7dfa:      	b	0x7dfc <core::fmt::ArgumentV1::new::h81b8e67c8f326c50+0x1a> @ imm = #-2
-    7dfc:      	ldr	r0, [sp, #8]
-    7dfe:      	ldr	r1, [sp]
-    7e00:      	str	r1, [sp, #12]
-    7e02:      	str	r0, [sp, #16]
-    7e04:      	ldr	r0, [sp, #12]
-    7e06:      	ldr	r1, [sp, #16]
-    7e08:      	add	sp, #36
-    7e0a:      	bx	lr
-
-00007e0c <core::fmt::ArgumentV1::new::ha735e2928536ca1c>:
-    7e0c:      	sub	sp, #36
-    7e0e:      	str	r0, [sp, #4]
-    7e10:      	str	r0, [sp, #20]
-    7e12:      	str	r1, [sp, #24]
-    7e14:      	str	r1, [sp, #28]
-    7e16:      	ldr	r0, [sp, #28]
-    7e18:      	str	r0, [sp, #8]
-    7e1a:      	b	0x7e1c <core::fmt::ArgumentV1::new::ha735e2928536ca1c+0x10> @ imm = #-2
-    7e1c:      	ldr	r0, [sp, #4]
-    7e1e:      	str	r0, [sp, #32]
-    7e20:      	ldr	r0, [sp, #32]
-    7e22:      	str	r0, [sp]
-    7e24:      	b	0x7e26 <core::fmt::ArgumentV1::new::ha735e2928536ca1c+0x1a> @ imm = #-2
-    7e26:      	ldr	r0, [sp, #8]
-    7e28:      	ldr	r1, [sp]
-    7e2a:      	str	r1, [sp, #12]
-    7e2c:      	str	r0, [sp, #16]
-    7e2e:      	ldr	r0, [sp, #12]
-    7e30:      	ldr	r1, [sp, #16]
-    7e32:      	add	sp, #36
-    7e34:      	bx	lr
-    7e36:      	bmi	0x7de2 <core::fmt::ArgumentV1::new::h81b8e67c8f326c50> @ imm = #-88
-
-00007e38 <core::fmt::Arguments::new_v1::h36bfcae551ebdf87>:
-    7e38:      	push	{r4, r5, r7, lr}
-    7e3a:      	add	r7, sp, #8
-    7e3c:      	sub	sp, #56
-    7e3e:      	str	r3, [sp, #8]
-    7e40:      	str	r2, [sp, #12]
-    7e42:      	str	r1, [sp, #16]
-    7e44:      	str	r0, [sp, #20]
-    7e46:      	ldr	r0, [r7, #8]
-    7e48:      	str	r0, [sp, #24]
-    7e4a:      	str	r1, [sp, #40]
-    7e4c:      	str	r2, [sp, #44]
-    7e4e:      	str	r3, [sp, #48]
-    7e50:      	str	r0, [sp, #52]
-    7e52:      	cmp	r2, r0
-    7e54:      	blo	0x7e76 <core::fmt::Arguments::new_v1::h36bfcae551ebdf87+0x3e> @ imm = #30
-    7e56:      	b	0x7e58 <core::fmt::Arguments::new_v1::h36bfcae551ebdf87+0x20> @ imm = #-2
-    7e58:      	ldr	r1, [sp, #12]
-    7e5a:      	ldr	r0, [sp, #24]
-    7e5c:      	adds	r2, r0, #1
-    7e5e:      	movs	r0, #1
-    7e60:      	movs	r3, #0
-    7e62:      	str	r3, [sp]
-    7e64:      	cmp	r1, r2
-    7e66:      	str	r0, [sp, #4]
-    7e68:      	bhi	0x7e6e <core::fmt::Arguments::new_v1::h36bfcae551ebdf87+0x36> @ imm = #2
-    7e6a:      	ldr	r0, [sp]
-    7e6c:      	str	r0, [sp, #4]
-    7e6e:      	ldr	r0, [sp, #4]
-    7e70:      	add	r1, sp, #28
-    7e72:      	strb	r0, [r1]
-    7e74:      	b	0x7e7e <core::fmt::Arguments::new_v1::h36bfcae551ebdf87+0x46> @ imm = #6
-    7e76:      	add	r1, sp, #28
-    7e78:      	movs	r0, #1
-    7e7a:      	strb	r0, [r1]
-    7e7c:      	b	0x7e7e <core::fmt::Arguments::new_v1::h36bfcae551ebdf87+0x46> @ imm = #-2
-    7e7e:      	add	r0, sp, #28
-    7e80:      	ldrb	r0, [r0]
-    7e82:      	lsls	r0, r0, #31
-    7e84:      	cmp	r0, #0
-    7e86:      	bne	0x7eb0 <core::fmt::Arguments::new_v1::h36bfcae551ebdf87+0x78> @ imm = #38
-    7e88:      	b	0x7e8a <core::fmt::Arguments::new_v1::h36bfcae551ebdf87+0x52> @ imm = #-2
-    7e8a:      	ldr	r0, [sp, #24]
-    7e8c:      	ldr	r1, [sp, #20]
-    7e8e:      	ldr	r2, [sp, #8]
-    7e90:      	ldr	r3, [sp, #12]
-    7e92:      	ldr	r4, [sp, #16]
-    7e94:      	movs	r5, #0
-    7e96:      	str	r5, [sp, #36]
-    7e98:      	str	r5, [sp, #32]
-    7e9a:      	str	r5, [sp, #32]
-    7e9c:      	str	r4, [r1]
-    7e9e:      	str	r3, [r1, #4]
-    7ea0:      	ldr	r4, [sp, #32]
-    7ea2:      	ldr	r3, [sp, #36]
-    7ea4:      	str	r4, [r1, #8]
-    7ea6:      	str	r3, [r1, #12]
-    7ea8:      	str	r2, [r1, #16]
-    7eaa:      	str	r0, [r1, #20]
-    7eac:      	add	sp, #56
-    7eae:      	pop	{r4, r5, r7, pc}
-    7eb0:      	ldr	r0, [pc, #8] <$d.3>
-    7eb2:      	ldr	r2, [pc, #12] <$d.3+0x6>
-    7eb4:      	movs	r1, #12
-    7eb6:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #1678
-    7eba:      	trap
-
-00007ebc <$d.3>:
-    7ebc:	fc b7 00 00	.word	0x0000b7fc
-    7ec0:	54 b8 00 00	.word	0x0000b854
-
-00007ec4 <core::ptr::write_volatile::h2231ac4850343f7f>:
-    7ec4:      	sub	sp, #8
-    7ec6:      	str	r0, [sp]
-    7ec8:      	str	r1, [sp, #4]
-    7eca:      	str	r1, [r0]
-    7ecc:      	b	0x7ece <core::ptr::write_volatile::h2231ac4850343f7f+0xa> @ imm = #-2
-    7ece:      	add	sp, #8
-    7ed0:      	bx	lr
-
-00007ed2 <core::ptr::write_volatile::hb6fd14ae999ddd5d>:
-    7ed2:      	sub	sp, #8
-    7ed4:      	str	r0, [sp]
-    7ed6:      	str	r1, [sp, #4]
-    7ed8:      	str	r1, [r0]
-    7eda:      	b	0x7edc <core::ptr::write_volatile::hb6fd14ae999ddd5d+0xa> @ imm = #-2
-    7edc:      	add	sp, #8
-    7ede:      	bx	lr
-
-00007ee0 <core::ptr::write_volatile::hbd2619430a2c7d61>:
-    7ee0:      	sub	sp, #8
-    7ee2:      	str	r0, [sp]
-    7ee4:      	str	r1, [sp, #4]
-    7ee6:      	str	r1, [r0]
-    7ee8:      	b	0x7eea <core::ptr::write_volatile::hbd2619430a2c7d61+0xa> @ imm = #-2
-    7eea:      	add	sp, #8
-    7eec:      	bx	lr
-
-00007eee <core::ptr::slice_from_raw_parts::h33886107cb0882ef>:
-    7eee:      	push	{r7, lr}
-    7ef0:      	add	r7, sp, #0
-    7ef2:      	sub	sp, #24
-    7ef4:      	str	r1, [sp, #8]
-    7ef6:      	str	r0, [sp, #16]
-    7ef8:      	str	r1, [sp, #20]
-    7efa:      	bl	0x7168 <core::ptr::const_ptr::<impl *const T>::cast::h04f8cbf1460ff280> @ imm = #-3478
-    7efe:      	str	r0, [sp, #12]
-    7f00:      	b	0x7f02 <core::ptr::slice_from_raw_parts::h33886107cb0882ef+0x14> @ imm = #-2
-    7f02:      	ldr	r1, [sp, #8]
-    7f04:      	ldr	r0, [sp, #12]
-    7f06:      	bl	0x7204 <core::ptr::metadata::from_raw_parts::h933e008c49d91e86> @ imm = #-3334
-    7f0a:      	str	r0, [sp]
-    7f0c:      	str	r1, [sp, #4]
-    7f0e:      	b	0x7f10 <core::ptr::slice_from_raw_parts::h33886107cb0882ef+0x22> @ imm = #-2
-    7f10:      	ldr	r1, [sp, #4]
-    7f12:      	ldr	r0, [sp]
-    7f14:      	add	sp, #24
-    7f16:      	pop	{r7, pc}
-
-00007f18 <core::ptr::slice_from_raw_parts_mut::h3561eefef668cfef>:
-    7f18:      	push	{r7, lr}
-    7f1a:      	add	r7, sp, #0
-    7f1c:      	sub	sp, #32
-    7f1e:      	str	r1, [sp, #12]
-    7f20:      	str	r0, [sp, #20]
-    7f22:      	str	r1, [sp, #24]
-    7f24:      	str	r0, [sp, #28]
-    7f26:      	str	r0, [sp, #16]
-    7f28:      	b	0x7f2a <core::ptr::slice_from_raw_parts_mut::h3561eefef668cfef+0x12> @ imm = #-2
-    7f2a:      	ldr	r1, [sp, #12]
-    7f2c:      	ldr	r0, [sp, #16]
-    7f2e:      	bl	0x721e <core::ptr::metadata::from_raw_parts_mut::hff425b9af894d7a6> @ imm = #-3348
-    7f32:      	str	r0, [sp, #4]
-    7f34:      	str	r1, [sp, #8]
-    7f36:      	b	0x7f38 <core::ptr::slice_from_raw_parts_mut::h3561eefef668cfef+0x20> @ imm = #-2
-    7f38:      	ldr	r1, [sp, #8]
-    7f3a:      	ldr	r0, [sp, #4]
-    7f3c:      	add	sp, #32
-    7f3e:      	pop	{r7, pc}
-
-00007f40 <core::ptr::write::h41a9cae531f9444c>:
-    7f40:      	sub	sp, #16
-    7f42:      	str	r1, [sp]
-    7f44:      	mov	r1, r0
-    7f46:      	ldr	r0, [sp]
-    7f48:      	str	r0, [sp, #4]
-    7f4a:      	add	r0, sp, #4
-    7f4c:      	strb	r2, [r0, #4]
-    7f4e:      	str	r1, [sp, #12]
-    7f50:      	ldr	r0, [sp, #8]
-    7f52:      	str	r0, [r1, #4]
-    7f54:      	ldr	r0, [sp, #4]
-    7f56:      	str	r0, [r1]
-    7f58:      	add	sp, #16
-    7f5a:      	bx	lr
-
-00007f5c <core::cmp::Ord::min::hb5540146184285dd>:
-    7f5c:      	push	{r7, lr}
-    7f5e:      	add	r7, sp, #0
-    7f60:      	sub	sp, #16
-    7f62:      	str	r0, [sp, #8]
-    7f64:      	str	r1, [sp, #12]
-    7f66:      	bl	0x7f8c <core::cmp::min_by::h336bf3b2bd513afc> @ imm = #34
-    7f6a:      	str	r0, [sp, #4]
-    7f6c:      	b	0x7f6e <core::cmp::Ord::min::hb5540146184285dd+0x12> @ imm = #-2
-    7f6e:      	ldr	r0, [sp, #4]
-    7f70:      	add	sp, #16
-    7f72:      	pop	{r7, pc}
-
-00007f74 <core::cmp::min::hda110f1328bdc05b>:
-    7f74:      	push	{r7, lr}
-    7f76:      	add	r7, sp, #0
-    7f78:      	sub	sp, #16
-    7f7a:      	str	r0, [sp, #8]
-    7f7c:      	str	r1, [sp, #12]
-    7f7e:      	bl	0x7f5c <core::cmp::Ord::min::hb5540146184285dd> @ imm = #-38
-    7f82:      	str	r0, [sp, #4]
-    7f84:      	b	0x7f86 <core::cmp::min::hda110f1328bdc05b+0x12> @ imm = #-2
-    7f86:      	ldr	r0, [sp, #4]
-    7f88:      	add	sp, #16
-    7f8a:      	pop	{r7, pc}
-
-00007f8c <core::cmp::min_by::h336bf3b2bd513afc>:
-    7f8c:      	push	{r7, lr}
-    7f8e:      	add	r7, sp, #0
-    7f90:      	sub	sp, #40
-    7f92:      	str	r0, [sp, #4]
-    7f94:      	str	r1, [sp, #8]
-    7f96:      	add	r2, sp, #32
-    7f98:      	movs	r0, #0
-    7f9a:      	strb	r0, [r2]
-    7f9c:      	add	r1, sp, #28
-    7f9e:      	strb	r0, [r1]
-    7fa0:      	movs	r0, #1
-    7fa2:      	strb	r0, [r2]
-    7fa4:      	strb	r0, [r1]
-    7fa6:      	add	r0, sp, #4
-    7fa8:      	str	r0, [sp, #20]
-    7faa:      	add	r0, sp, #8
-    7fac:      	str	r0, [sp, #24]
-    7fae:      	ldr	r0, [sp, #20]
-    7fb0:      	ldr	r1, [sp, #24]
-    7fb2:      	bl	0x6f34 <core::ops::function::FnOnce::call_once::h078bdd863c7ce609> @ imm = #-4226
-    7fb6:      	add	r1, sp, #16
-    7fb8:      	strb	r0, [r1]
-    7fba:      	b	0x7fbc <core::cmp::min_by::h336bf3b2bd513afc+0x30> @ imm = #-2
-    7fbc:      	add	r0, sp, #16
-    7fbe:      	ldrb	r0, [r0]
-    7fc0:      	adds	r0, r0, #1
-    7fc2:      	uxtb	r0, r0
-    7fc4:      	cmp	r0, #2
-    7fc6:      	blo	0x7fce <core::cmp::min_by::h336bf3b2bd513afc+0x42> @ imm = #4
-    7fc8:      	b	0x7fca <core::cmp::min_by::h336bf3b2bd513afc+0x3e> @ imm = #-2
-    7fca:      	b	0x7fda <core::cmp::min_by::h336bf3b2bd513afc+0x4e> @ imm = #12
-    7fcc:      	trap
-    7fce:      	add	r1, sp, #32
-    7fd0:      	movs	r0, #0
-    7fd2:      	strb	r0, [r1]
-    7fd4:      	ldr	r0, [sp, #4]
-    7fd6:      	str	r0, [sp, #12]
-    7fd8:      	b	0x7fe6 <core::cmp::min_by::h336bf3b2bd513afc+0x5a> @ imm = #10
-    7fda:      	add	r1, sp, #28
-    7fdc:      	movs	r0, #0
-    7fde:      	strb	r0, [r1]
-    7fe0:      	ldr	r0, [sp, #8]
-    7fe2:      	str	r0, [sp, #12]
-    7fe4:      	b	0x7fe6 <core::cmp::min_by::h336bf3b2bd513afc+0x5a> @ imm = #-2
-    7fe6:      	add	r0, sp, #28
-    7fe8:      	ldrb	r0, [r0]
-    7fea:      	lsls	r0, r0, #31
-    7fec:      	cmp	r0, #0
-    7fee:      	bne	0x7ffe <core::cmp::min_by::h336bf3b2bd513afc+0x72> @ imm = #12
-    7ff0:      	b	0x7ff2 <core::cmp::min_by::h336bf3b2bd513afc+0x66> @ imm = #-2
-    7ff2:      	add	r0, sp, #32
-    7ff4:      	ldrb	r0, [r0]
-    7ff6:      	lsls	r0, r0, #31
-    7ff8:      	cmp	r0, #0
-    7ffa:      	bne	0x8006 <core::cmp::min_by::h336bf3b2bd513afc+0x7a> @ imm = #8
-    7ffc:      	b	0x8000 <core::cmp::min_by::h336bf3b2bd513afc+0x74> @ imm = #0
-    7ffe:      	b	0x7ff2 <core::cmp::min_by::h336bf3b2bd513afc+0x66> @ imm = #-16
-    8000:      	ldr	r0, [sp, #12]
-    8002:      	add	sp, #40
-    8004:      	pop	{r7, pc}
-    8006:      	b	0x8000 <core::cmp::min_by::h336bf3b2bd513afc+0x74> @ imm = #-10
-
-00008008 <core::slice::index::<impl core::ops::index::Index<I> for [T]>::index::h287369d2223dfeb3>:
-    8008:      	push	{r7, lr}
-    800a:      	add	r7, sp, #0
-    800c:      	sub	sp, #24
-    800e:      	str	r2, [sp]
-    8010:      	mov	r2, r1
-    8012:      	mov	r1, r0
-    8014:      	ldr	r0, [sp]
-    8016:      	str	r1, [sp, #12]
-    8018:      	str	r2, [sp, #16]
-    801a:      	str	r0, [sp, #20]
-    801c:      	bl	0x7826 <<core::ops::range::RangeFrom<usize> as core::slice::index::SliceIndex<[T]>>::index::hd072b581b4aa1a9d> @ imm = #-2042
-    8020:      	str	r0, [sp, #4]
-    8022:      	str	r1, [sp, #8]
-    8024:      	b	0x8026 <core::slice::index::<impl core::ops::index::Index<I> for [T]>::index::h287369d2223dfeb3+0x1e> @ imm = #-2
-    8026:      	ldr	r1, [sp, #8]
-    8028:      	ldr	r0, [sp, #4]
-    802a:      	add	sp, #24
-    802c:      	pop	{r7, pc}
-
-0000802e <core::slice::index::<impl core::ops::index::IndexMut<I> for [T]>::index_mut::h94ec7aa701508980>:
-    802e:      	push	{r7, lr}
-    8030:      	add	r7, sp, #0
-    8032:      	sub	sp, #24
-    8034:      	str	r0, [sp, #12]
-    8036:      	str	r1, [sp, #16]
-    8038:      	bl	0x7864 <<core::ops::range::RangeFull as core::slice::index::SliceIndex<[T]>>::index_mut::h341d3d585fc4b276> @ imm = #-2008
-    803c:      	str	r0, [sp, #4]
-    803e:      	str	r1, [sp, #8]
-    8040:      	b	0x8042 <core::slice::index::<impl core::ops::index::IndexMut<I> for [T]>::index_mut::h94ec7aa701508980+0x14> @ imm = #-2
-    8042:      	ldr	r1, [sp, #8]
-    8044:      	ldr	r0, [sp, #4]
-    8046:      	add	sp, #24
-    8048:      	pop	{r7, pc}
-
-0000804a <core::slice::index::<impl core::ops::index::IndexMut<I> for [T]>::index_mut::h9bb66623713ef6cf>:
-    804a:      	push	{r7, lr}
-    804c:      	add	r7, sp, #0
-    804e:      	sub	sp, #24
-    8050:      	str	r2, [sp]
-    8052:      	mov	r2, r1
-    8054:      	mov	r1, r0
-    8056:      	ldr	r0, [sp]
-    8058:      	str	r1, [sp, #12]
-    805a:      	str	r2, [sp, #16]
-    805c:      	str	r0, [sp, #20]
-    805e:      	bl	0x77b2 <<core::ops::range::RangeTo<usize> as core::slice::index::SliceIndex<[T]>>::index_mut::h96d92709bd33603d> @ imm = #-2224
-    8062:      	str	r0, [sp, #4]
-    8064:      	str	r1, [sp, #8]
-    8066:      	b	0x8068 <core::slice::index::<impl core::ops::index::IndexMut<I> for [T]>::index_mut::h9bb66623713ef6cf+0x1e> @ imm = #-2
-    8068:      	ldr	r1, [sp, #8]
-    806a:      	ldr	r0, [sp, #4]
-    806c:      	add	sp, #24
-    806e:      	pop	{r7, pc}
-
-00008070 <core::ptr::read_volatile::hf4c692006cd65b29>:
-    8070:      	sub	sp, #12
-    8072:      	str	r0, [sp, #4]
-    8074:      	ldr	r0, [r0]
-    8076:      	str	r0, [sp, #8]
-    8078:      	ldr	r0, [sp, #8]
-    807a:      	str	r0, [sp]
-    807c:      	b	0x807e <core::ptr::read_volatile::hf4c692006cd65b29+0xe> @ imm = #-2
-    807e:      	ldr	r0, [sp]
-    8080:      	add	sp, #12
-    8082:      	bx	lr
-
-00008084 <core::ptr::write_volatile::h8d4daf2714a04997>:
-    8084:      	sub	sp, #8
-    8086:      	str	r0, [sp]
-    8088:      	str	r1, [sp, #4]
-    808a:      	str	r1, [r0]
-    808c:      	b	0x808e <core::ptr::write_volatile::h8d4daf2714a04997+0xa> @ imm = #-2
-    808e:      	add	sp, #8
-    8090:      	bx	lr
-
-00008092 <__cpsid>:
-    8092:      	cpsid i
-    8094:      	bx	lr
-
-00008096 <__cpsie>:
-    8096:      	cpsie i
-    8098:      	bx	lr
-
-0000809a <__nop>:
-    809a:      	nop
-    809c:      	bx	lr
-
-0000809e <__primask_r>:
-    809e:      	mrs	r0, primask
-    80a2:      	bx	lr
-
-000080a4 <bare_metal::CriticalSection::new::h63eca2240f158320>:
-    80a4:      	bx	lr
-    80a6:      	bmi	0x8052 <core::slice::index::<impl core::ops::index::IndexMut<I> for [T]>::index_mut::h9bb66623713ef6cf+0x8> @ imm = #-88
-
-000080a8 <<max116xx_10bit::AdcError as core::fmt::Debug>::fmt::h2591c103d430bfb2>:
-    80a8:      	push	{r7, lr}
-    80aa:      	add	r7, sp, #0
-    80ac:      	sub	sp, #24
-    80ae:      	str	r1, [sp]
-    80b0:      	str	r0, [sp, #16]
-    80b2:      	str	r1, [sp, #20]
-    80b4:      	str	r0, [sp, #12]
-    80b6:      	ldr	r0, [sp, #12]
-    80b8:      	ldrb	r0, [r0]
-    80ba:      	str	r0, [sp, #4]
-    80bc:      	ldr	r0, [sp, #4]
-    80be:      	lsls	r1, r0, #2
-    80c0:      	adr	r0, #4 <<max116xx_10bit::AdcError as core::fmt::Debug>::fmt::h2591c103d430bfb2+0x1d>
-    80c2:      	ldr	r0, [r0, r1]
-    80c4:      	mov	pc, r0
-    80c6:      	mov	r8, r8
-
-000080c8 <$d.15>:
-    80c8:	e7 80 00 00	.word	0x000080e7
-    80cc:	f7 80 00 00	.word	0x000080f7
-    80d0:	07 81 00 00	.word	0x00008107
-    80d4:	17 81 00 00	.word	0x00008117
-    80d8:	27 81 00 00	.word	0x00008127
-    80dc:	37 81 00 00	.word	0x00008137
-    80e0:	47 81 00 00	.word	0x00008147
-
-000080e4 <$t.16>:
-    80e4:      	trap
-    80e6:      	ldr	r0, [sp]
-    80e8:      	ldr	r1, [pc, #140] <$d.17+0x18>
-    80ea:      	movs	r2, #14
-    80ec:      	bl	0x938c <<core::fmt::Formatter as core::fmt::Write>::write_str::h5daf2d485e2f455c> @ imm = #4764
-    80f0:      	add	r1, sp, #8
-    80f2:      	strb	r0, [r1]
-    80f4:      	b	0x8156 <$t.16+0x72>     @ imm = #94
-    80f6:      	ldr	r0, [sp]
-    80f8:      	ldr	r1, [pc, #120] <$d.17+0x14>
-    80fa:      	movs	r2, #14
-    80fc:      	bl	0x938c <<core::fmt::Formatter as core::fmt::Write>::write_str::h5daf2d485e2f455c> @ imm = #4748
-    8100:      	add	r1, sp, #8
-    8102:      	strb	r0, [r1]
-    8104:      	b	0x8156 <$t.16+0x72>     @ imm = #78
-    8106:      	ldr	r0, [sp]
-    8108:      	ldr	r1, [pc, #100] <$d.17+0x10>
-    810a:      	movs	r2, #14
-    810c:      	bl	0x938c <<core::fmt::Formatter as core::fmt::Write>::write_str::h5daf2d485e2f455c> @ imm = #4732
-    8110:      	add	r1, sp, #8
-    8112:      	strb	r0, [r1]
-    8114:      	b	0x8156 <$t.16+0x72>     @ imm = #62
-    8116:      	ldr	r0, [sp]
-    8118:      	ldr	r1, [pc, #80] <$d.17+0xc>
-    811a:      	movs	r2, #16
-    811c:      	bl	0x938c <<core::fmt::Formatter as core::fmt::Write>::write_str::h5daf2d485e2f455c> @ imm = #4716
-    8120:      	add	r1, sp, #8
-    8122:      	strb	r0, [r1]
-    8124:      	b	0x8156 <$t.16+0x72>     @ imm = #46
-    8126:      	ldr	r0, [sp]
-    8128:      	ldr	r1, [pc, #60] <$d.17+0x8>
-    812a:      	movs	r2, #16
-    812c:      	bl	0x938c <<core::fmt::Formatter as core::fmt::Write>::write_str::h5daf2d485e2f455c> @ imm = #4700
-    8130:      	add	r1, sp, #8
-    8132:      	strb	r0, [r1]
-    8134:      	b	0x8156 <$t.16+0x72>     @ imm = #30
-    8136:      	ldr	r0, [sp]
-    8138:      	ldr	r1, [pc, #40] <$d.17+0x4>
-    813a:      	movs	r2, #18
-    813c:      	bl	0x938c <<core::fmt::Formatter as core::fmt::Write>::write_str::h5daf2d485e2f455c> @ imm = #4684
-    8140:      	add	r1, sp, #8
-    8142:      	strb	r0, [r1]
-    8144:      	b	0x8156 <$t.16+0x72>     @ imm = #14
-    8146:      	ldr	r0, [sp]
-    8148:      	ldr	r1, [pc, #20] <$d.17>
-    814a:      	movs	r2, #16
-    814c:      	bl	0x938c <<core::fmt::Formatter as core::fmt::Write>::write_str::h5daf2d485e2f455c> @ imm = #4668
-    8150:      	add	r1, sp, #8
-    8152:      	strb	r0, [r1]
-    8154:      	b	0x8156 <$t.16+0x72>     @ imm = #-2
-    8156:      	add	r0, sp, #8
-    8158:      	ldrb	r0, [r0]
-    815a:      	add	sp, #24
-    815c:      	pop	{r7, pc}
-    815e:      	mov	r8, r8
-
-00008160 <$d.17>:
-    8160:	bc b5 00 00	.word	0x0000b5bc
-    8164:	64 b8 00 00	.word	0x0000b864
-    8168:	cc b5 00 00	.word	0x0000b5cc
-    816c:	dc b5 00 00	.word	0x0000b5dc
-    8170:	76 b8 00 00	.word	0x0000b876
-    8174:	84 b8 00 00	.word	0x0000b884
-    8178:	92 b8 00 00	.word	0x0000b892
-
-0000817c <core::slice::<impl [T]>::iter::hcf5f5b4e98ae1b51>:
-    817c:      	push	{r7, lr}
-    817e:      	add	r7, sp, #0
-    8180:      	sub	sp, #16
-    8182:      	str	r0, [sp, #8]
-    8184:      	str	r1, [sp, #12]
-    8186:      	bl	0x823a <core::slice::iter::Iter<T>::new::he2f95210e269a08d> @ imm = #176
-    818a:      	str	r0, [sp]
-    818c:      	str	r1, [sp, #4]
-    818e:      	b	0x8190 <core::slice::<impl [T]>::iter::hcf5f5b4e98ae1b51+0x14> @ imm = #-2
-    8190:      	ldr	r1, [sp, #4]
-    8192:      	ldr	r0, [sp]
-    8194:      	add	sp, #16
-    8196:      	pop	{r7, pc}
-
-00008198 <core::slice::<impl [T]>::as_ptr::had785fb836f3ca27>:
-    8198:      	sub	sp, #8
-    819a:      	str	r0, [sp]
-    819c:      	str	r1, [sp, #4]
-    819e:      	add	sp, #8
-    81a0:      	bx	lr
-
-000081a2 <core::ptr::non_null::NonNull<T>::new_unchecked::h5e332c41042b69a9>:
-    81a2:      	sub	sp, #8
-    81a4:      	str	r0, [sp, #4]
-    81a6:      	str	r0, [sp]
-    81a8:      	ldr	r0, [sp]
-    81aa:      	add	sp, #8
-    81ac:      	bx	lr
-
-000081ae <core::ptr::non_null::NonNull<T>::as_ptr::h72809eea50b8d4c1>:
-    81ae:      	sub	sp, #4
-    81b0:      	str	r0, [sp]
-    81b2:      	add	sp, #4
-    81b4:      	bx	lr
-
-000081b6 <core::ptr::mut_ptr::<impl *mut T>::guaranteed_eq::hbe8386ebf759a860>:
-    81b6:      	sub	sp, #16
-    81b8:      	str	r0, [sp, #4]
-    81ba:      	str	r1, [sp, #8]
-    81bc:      	subs	r0, r0, r1
-    81be:      	rsbs	r1, r0, #0
-    81c0:      	adcs	r0, r1
-    81c2:      	add	r1, sp, #12
-    81c4:      	strb	r0, [r1]
-    81c6:      	ldr	r0, [sp, #12]
-    81c8:      	str	r0, [sp]
-    81ca:      	b	0x81cc <core::ptr::mut_ptr::<impl *mut T>::guaranteed_eq::hbe8386ebf759a860+0x16> @ imm = #-2
-    81cc:      	ldr	r0, [sp]
-    81ce:      	movs	r1, #1
-    81d0:      	ands	r0, r1
-    81d2:      	add	sp, #16
-    81d4:      	bx	lr
-
-000081d6 <core::ptr::mut_ptr::<impl *mut T>::is_null::hc0a677e4f9e2ab6d>:
-    81d6:      	push	{r7, lr}
-    81d8:      	add	r7, sp, #0
-    81da:      	sub	sp, #16
-    81dc:      	str	r0, [sp, #8]
-    81de:      	str	r0, [sp, #12]
-    81e0:      	b	0x81e2 <core::ptr::mut_ptr::<impl *mut T>::is_null::hc0a677e4f9e2ab6d+0xc> @ imm = #-2
-    81e2:      	ldr	r0, [sp, #8]
-    81e4:      	movs	r1, #0
-    81e6:      	bl	0x81b6 <core::ptr::mut_ptr::<impl *mut T>::guaranteed_eq::hbe8386ebf759a860> @ imm = #-52
-    81ea:      	str	r0, [sp, #4]
-    81ec:      	b	0x81ee <core::ptr::mut_ptr::<impl *mut T>::is_null::hc0a677e4f9e2ab6d+0x18> @ imm = #-2
-    81ee:      	ldr	r0, [sp, #4]
-    81f0:      	movs	r1, #1
-    81f2:      	ands	r0, r1
-    81f4:      	add	sp, #16
-    81f6:      	pop	{r7, pc}
-
-000081f8 <core::ptr::const_ptr::<impl *const T>::guaranteed_eq::h245be40b802aa25c>:
-    81f8:      	sub	sp, #16
-    81fa:      	str	r0, [sp, #4]
-    81fc:      	str	r1, [sp, #8]
-    81fe:      	subs	r0, r0, r1
-    8200:      	rsbs	r1, r0, #0
-    8202:      	adcs	r0, r1
-    8204:      	add	r1, sp, #12
-    8206:      	strb	r0, [r1]
-    8208:      	ldr	r0, [sp, #12]
-    820a:      	str	r0, [sp]
-    820c:      	b	0x820e <core::ptr::const_ptr::<impl *const T>::guaranteed_eq::h245be40b802aa25c+0x16> @ imm = #-2
-    820e:      	ldr	r0, [sp]
-    8210:      	movs	r1, #1
-    8212:      	ands	r0, r1
-    8214:      	add	sp, #16
-    8216:      	bx	lr
-
-00008218 <core::ptr::const_ptr::<impl *const T>::is_null::he5afc16fb51f8cc2>:
-    8218:      	push	{r7, lr}
-    821a:      	add	r7, sp, #0
-    821c:      	sub	sp, #16
-    821e:      	str	r0, [sp, #8]
-    8220:      	str	r0, [sp, #12]
-    8222:      	b	0x8224 <core::ptr::const_ptr::<impl *const T>::is_null::he5afc16fb51f8cc2+0xc> @ imm = #-2
-    8224:      	ldr	r0, [sp, #8]
-    8226:      	movs	r1, #0
-    8228:      	bl	0x81f8 <core::ptr::const_ptr::<impl *const T>::guaranteed_eq::h245be40b802aa25c> @ imm = #-52
-    822c:      	str	r0, [sp, #4]
-    822e:      	b	0x8230 <core::ptr::const_ptr::<impl *const T>::is_null::he5afc16fb51f8cc2+0x18> @ imm = #-2
-    8230:      	ldr	r0, [sp, #4]
-    8232:      	movs	r1, #1
-    8234:      	ands	r0, r1
-    8236:      	add	sp, #16
-    8238:      	pop	{r7, pc}
-
-0000823a <core::slice::iter::Iter<T>::new::he2f95210e269a08d>:
-    823a:      	push	{r7, lr}
-    823c:      	add	r7, sp, #0
-    823e:      	sub	sp, #80
-    8240:      	str	r1, [sp, #8]
-    8242:      	str	r0, [sp, #28]
-    8244:      	str	r1, [sp, #32]
-    8246:      	bl	0x8198 <core::slice::<impl [T]>::as_ptr::had785fb836f3ca27> @ imm = #-178
-    824a:      	mov	r1, r0
-    824c:      	str	r1, [sp, #12]
-    824e:      	str	r0, [sp, #36]
-    8250:      	b	0x8252 <core::slice::iter::Iter<T>::new::he2f95210e269a08d+0x18> @ imm = #-2
-    8252:      	ldr	r0, [sp, #12]
-    8254:      	bl	0x8218 <core::ptr::const_ptr::<impl *const T>::is_null::he5afc16fb51f8cc2> @ imm = #-64
-    8258:      	b	0x825a <core::slice::iter::Iter<T>::new::he2f95210e269a08d+0x20> @ imm = #-2
-    825a:      	b	0x825c <core::slice::iter::Iter<T>::new::he2f95210e269a08d+0x22> @ imm = #-2
-    825c:      	b	0x825e <core::slice::iter::Iter<T>::new::he2f95210e269a08d+0x24> @ imm = #-2
-    825e:      	movs	r0, #1
-    8260:      	cmp	r0, #0
-    8262:      	bne	0x827c <core::slice::iter::Iter<T>::new::he2f95210e269a08d+0x42> @ imm = #22
-    8264:      	b	0x8266 <core::slice::iter::Iter<T>::new::he2f95210e269a08d+0x2c> @ imm = #-2
-    8266:      	ldr	r0, [sp, #12]
-    8268:      	ldr	r1, [sp, #8]
-    826a:      	str	r0, [sp, #60]
-    826c:      	str	r1, [sp, #64]
-    826e:      	str	r0, [sp, #68]
-    8270:      	str	r1, [sp, #72]
-    8272:      	adds	r0, r0, r1
-    8274:      	str	r0, [sp, #76]
-    8276:      	ldr	r0, [sp, #76]
-    8278:      	str	r0, [sp, #4]
-    827a:      	b	0x829e <core::slice::iter::Iter<T>::new::he2f95210e269a08d+0x64> @ imm = #32
-    827c:      	ldr	r0, [sp, #12]
-    827e:      	ldr	r1, [sp, #8]
-    8280:      	str	r0, [sp, #40]
-    8282:      	str	r1, [sp, #44]
-    8284:      	str	r0, [sp, #48]
-    8286:      	str	r1, [sp, #52]
-    8288:      	adds	r0, r0, r1
-    828a:      	str	r0, [sp, #56]
-    828c:      	ldr	r0, [sp, #56]
-    828e:      	str	r0, [sp, #24]
-    8290:      	b	0x8292 <core::slice::iter::Iter<T>::new::he2f95210e269a08d+0x58> @ imm = #-2
-    8292:      	b	0x8294 <core::slice::iter::Iter<T>::new::he2f95210e269a08d+0x5a> @ imm = #-2
-    8294:      	ldr	r0, [sp, #12]
-    8296:      	bl	0x81a2 <core::ptr::non_null::NonNull<T>::new_unchecked::h5e332c41042b69a9> @ imm = #-248
-    829a:      	str	r0, [sp]
-    829c:      	b	0x82a4 <core::slice::iter::Iter<T>::new::he2f95210e269a08d+0x6a> @ imm = #4
-    829e:      	ldr	r0, [sp, #4]
-    82a0:      	str	r0, [sp, #24]
-    82a2:      	b	0x8294 <core::slice::iter::Iter<T>::new::he2f95210e269a08d+0x5a> @ imm = #-18
-    82a4:      	ldr	r1, [sp]
-    82a6:      	ldr	r0, [sp, #24]
-    82a8:      	str	r1, [sp, #16]
-    82aa:      	str	r0, [sp, #20]
-    82ac:      	ldr	r0, [sp, #16]
-    82ae:      	ldr	r1, [sp, #20]
-    82b0:      	add	sp, #80
-    82b2:      	pop	{r7, pc}
-
-000082b4 <<I as core::iter::traits::collect::IntoIterator>::into_iter::hd3a73902742f3156>:
-    82b4:      	sub	sp, #8
-    82b6:      	str	r0, [sp]
-    82b8:      	str	r1, [sp, #4]
-    82ba:      	add	sp, #8
-    82bc:      	bx	lr
-
-000082be <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f>:
-    82be:      	push	{r7, lr}
-    82c0:      	add	r7, sp, #0
-    82c2:      	sub	sp, #64
-    82c4:      	str	r0, [sp, #20]
-    82c6:      	str	r0, [sp, #32]
-    82c8:      	ldr	r0, [r0]
-    82ca:      	bl	0x81ae <core::ptr::non_null::NonNull<T>::as_ptr::h72809eea50b8d4c1> @ imm = #-288
-    82ce:      	str	r0, [sp, #24]
-    82d0:      	b	0x82d2 <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f+0x14> @ imm = #-2
-    82d2:      	ldr	r0, [sp, #24]
-    82d4:      	bl	0x81d6 <core::ptr::mut_ptr::<impl *mut T>::is_null::hc0a677e4f9e2ab6d> @ imm = #-258
-    82d8:      	b	0x82da <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f+0x1c> @ imm = #-2
-    82da:      	b	0x82dc <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f+0x1e> @ imm = #-2
-    82dc:      	b	0x82de <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f+0x20> @ imm = #-2
-    82de:      	movs	r0, #1
-    82e0:      	cmp	r0, #0
-    82e2:      	bne	0x82e8 <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f+0x2a> @ imm = #2
-    82e4:      	b	0x82e6 <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f+0x28> @ imm = #-2
-    82e6:      	b	0x82f6 <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f+0x38> @ imm = #12
-    82e8:      	ldr	r0, [sp, #20]
-    82ea:      	ldr	r0, [r0, #4]
-    82ec:      	bl	0x8218 <core::ptr::const_ptr::<impl *const T>::is_null::he5afc16fb51f8cc2> @ imm = #-216
-    82f0:      	b	0x82f2 <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f+0x34> @ imm = #-2
-    82f2:      	b	0x82f4 <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f+0x36> @ imm = #-2
-    82f4:      	b	0x82f6 <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f+0x38> @ imm = #-2
-    82f6:      	ldr	r0, [sp, #20]
-    82f8:      	ldr	r0, [r0]
-    82fa:      	bl	0x81ae <core::ptr::non_null::NonNull<T>::as_ptr::h72809eea50b8d4c1> @ imm = #-336
-    82fe:      	str	r0, [sp, #16]
-    8300:      	b	0x8302 <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f+0x44> @ imm = #-2
-    8302:      	ldr	r0, [sp, #16]
-    8304:      	ldr	r1, [sp, #20]
-    8306:      	ldr	r1, [r1, #4]
-    8308:      	cmp	r0, r1
-    830a:      	beq	0x834c <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f+0x8e> @ imm = #62
-    830c:      	b	0x830e <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f+0x50> @ imm = #-2
-    830e:      	ldr	r0, [sp, #20]
-    8310:      	str	r0, [sp, #40]
-    8312:      	movs	r1, #1
-    8314:      	str	r1, [sp, #4]
-    8316:      	str	r1, [sp, #44]
-    8318:      	ldr	r0, [r0]
-    831a:      	bl	0x81ae <core::ptr::non_null::NonNull<T>::as_ptr::h72809eea50b8d4c1> @ imm = #-368
-    831e:      	mov	r1, r0
-    8320:      	ldr	r0, [sp, #20]
-    8322:      	str	r1, [sp, #8]
-    8324:      	str	r1, [sp, #48]
-    8326:      	ldr	r0, [r0]
-    8328:      	bl	0x81ae <core::ptr::non_null::NonNull<T>::as_ptr::h72809eea50b8d4c1> @ imm = #-382
-    832c:      	ldr	r1, [sp, #4]
-    832e:      	str	r0, [sp, #52]
-    8330:      	str	r1, [sp, #56]
-    8332:      	adds	r0, r0, #1
-    8334:      	str	r0, [sp, #60]
-    8336:      	ldr	r0, [sp, #60]
-    8338:      	bl	0x81a2 <core::ptr::non_null::NonNull<T>::new_unchecked::h5e332c41042b69a9> @ imm = #-410
-    833c:      	ldr	r2, [sp, #20]
-    833e:      	mov	r1, r0
-    8340:      	ldr	r0, [sp, #8]
-    8342:      	str	r1, [r2]
-    8344:      	str	r0, [sp, #36]
-    8346:      	ldr	r0, [sp, #36]
-    8348:      	str	r0, [sp, #12]
-    834a:      	b	0x8358 <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f+0x9a> @ imm = #10
-    834c:      	movs	r0, #0
-    834e:      	str	r0, [sp, #28]
-    8350:      	b	0x8352 <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f+0x94> @ imm = #-2
-    8352:      	ldr	r0, [sp, #28]
-    8354:      	add	sp, #64
-    8356:      	pop	{r7, pc}
-    8358:      	ldr	r0, [sp, #12]
-    835a:      	str	r0, [sp, #28]
-    835c:      	b	0x8352 <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f+0x94> @ imm = #-14
-
-0000835e <SysTick>:
-    835e:      	push	{r7, lr}
-    8360:      	add	r7, sp, #0
-    8362:      	sub	sp, #8
-    8364:      	b	0x8366 <SysTick+0x8>    @ imm = #-2
-    8366:      	add	r1, sp, #4
-    8368:      	movs	r0, #4
-    836a:      	strb	r0, [r1]
-    836c:      	ldr	r0, [sp, #4]
-    836e:      	bl	0x8378 <core::sync::atomic::compiler_fence::ha129344cb21afc37> @ imm = #6
-    8372:      	b	0x8366 <SysTick+0x8>    @ imm = #-16
-
-00008374 <__pre_init>:
-    8374:      	bx	lr
-    8376:      	bmi	0x8322 <<core::slice::iter::Iter<T> as core::iter::traits::iterator::Iterator>::next::h2fbdd815f4eb5b6f+0x64> @ imm = #-88
-
-00008378 <core::sync::atomic::compiler_fence::ha129344cb21afc37>:
-    8378:      	push	{r7, lr}
-    837a:      	add	r7, sp, #0
-    837c:      	sub	sp, #8
-    837e:      	mov	r1, r0
-    8380:      	add	r0, sp, #4
-    8382:      	strb	r1, [r0]
-    8384:      	ldrb	r0, [r0]
-    8386:      	str	r0, [sp]
-    8388:      	ldr	r0, [sp]
-    838a:      	lsls	r1, r0, #2
-    838c:      	adr	r0, #4 <core::sync::atomic::compiler_fence::ha129344cb21afc37+0x19>
-    838e:      	ldr	r0, [r0, r1]
-    8390:      	mov	pc, r0
-    8392:      	mov	r8, r8
-
-00008394 <$d.1>:
-    8394:	ab 83 00 00	.word	0x000083ab
-    8398:	b7 83 00 00	.word	0x000083b7
-    839c:	b9 83 00 00	.word	0x000083b9
-    83a0:	bb 83 00 00	.word	0x000083bb
-    83a4:	bd 83 00 00	.word	0x000083bd
-
-000083a8 <$t.2>:
-    83a8:      	trap
-    83aa:      	ldr	r0, [pc, #24] <$d.3+0x2>
-    83ac:      	ldr	r2, [pc, #24] <$d.3+0x4>
-    83ae:      	movs	r1, #50
-    83b0:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #404
-    83b4:      	trap
-    83b6:      	b	0x83be <$t.2+0x16>      @ imm = #4
-    83b8:      	b	0x83be <$t.2+0x16>      @ imm = #2
-    83ba:      	b	0x83be <$t.2+0x16>      @ imm = #0
-    83bc:      	b	0x83be <$t.2+0x16>      @ imm = #-2
-    83be:      	add	sp, #8
-    83c0:      	pop	{r7, pc}
-    83c2:      	mov	r8, r8
-
-000083c4 <$d.3>:
-    83c4:	a0 b8 00 00	.word	0x0000b8a0
-    83c8:	24 b9 00 00	.word	0x0000b924
-
-000083cc <core::ops::function::FnOnce::call_once::h5388216f32b8b71c>:
-    83cc:      	ldr	r0, [r0]
-    83ce:      	b	0x83ce <core::ops::function::FnOnce::call_once::h5388216f32b8b71c+0x2> @ imm = #-4
-
-000083d0 <core::ptr::drop_in_place<&core::iter::adapters::copied::Copied<core::slice::iter::Iter<u8>>>::h8713c5178970da4b>:
-    83d0:      	bx	lr
-    83d2:      	bmi	0x837e <core::sync::atomic::compiler_fence::ha129344cb21afc37+0x6> @ imm = #-88
-
-000083d4 <<core::ops::range::Range<Idx> as core::fmt::Debug>::fmt::h48dae2b7618cde52>:
-    83d4:      	push	{r4, r5, r6, r7, lr}
-    83d6:      	add	r7, sp, #12
-    83d8:      	sub	sp, #28
-    83da:      	mov	r4, r1
-    83dc:      	mov	r5, r0
-    83de:      	bl	0x9dd0 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795> @ imm = #6638
-    83e2:      	movs	r6, #1
-    83e4:      	cmp	r0, #0
-    83e6:      	bne	0x8414 <<core::ops::range::Range<Idx> as core::fmt::Debug>::fmt::h48dae2b7618cde52+0x40> @ imm = #42
-    83e8:      	ldr	r0, [r4, #24]
-    83ea:      	ldr	r1, [r4, #28]
-    83ec:      	movs	r2, #0
-    83ee:      	str	r2, [sp, #24]
-    83f0:      	ldr	r3, [pc, #40] <$d.147>
-    83f2:      	str	r3, [sp, #20]
-    83f4:      	str	r2, [sp, #16]
-    83f6:      	str	r2, [sp, #12]
-    83f8:      	movs	r2, #1
-    83fa:      	str	r2, [sp, #8]
-    83fc:      	ldr	r2, [pc, #32] <$d.147+0x4>
-    83fe:      	str	r2, [sp, #4]
-    8400:      	add	r2, sp, #4
-    8402:      	bl	0x8bdc <core::fmt::write::hff185d7d684cc368> @ imm = #2006
-    8406:      	cmp	r0, #0
-    8408:      	bne	0x8414 <<core::ops::range::Range<Idx> as core::fmt::Debug>::fmt::h48dae2b7618cde52+0x40> @ imm = #8
-    840a:      	adds	r0, r5, #4
-    840c:      	mov	r1, r4
-    840e:      	bl	0x9dd0 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795> @ imm = #6590
-    8412:      	mov	r6, r0
-    8414:      	mov	r0, r6
-    8416:      	add	sp, #28
-    8418:      	pop	{r4, r5, r6, r7, pc}
-    841a:      	mov	r8, r8
-
-0000841c <$d.147>:
-    841c:	34 b9 00 00	.word	0x0000b934
-    8420:	38 b9 00 00	.word	0x0000b938
-
-00008424 <<T as core::any::Any>::type_id::hee7be9e0237c393a>:
-    8424:      	ldr	r0, [pc, #4] <$d.149>
-    8426:      	ldr	r1, [pc, #8] <$d.149+0x6>
-    8428:      	bx	lr
-    842a:      	mov	r8, r8
-
-0000842c <$d.149>:
-    842c:	92 04 b4 f1	.word	0xf1b40492
-    8430:	d2 a7 f8 00	.word	0x00f8a7d2
-
-00008434 <<core::panic::panic_info::PanicInfo as core::fmt::Display>::fmt::h980d98f06e764e0e>:
-    8434:      	push	{r4, r5, r6, r7, lr}
-    8436:      	add	r7, sp, #12
-    8438:      	sub	sp, #68
-    843a:      	mov	r4, r0
-    843c:      	ldr	r5, [r1, #24]
-    843e:      	ldr	r6, [r1, #28]
-    8440:      	ldr	r3, [r6, #12]
-    8442:      	ldr	r1, [pc, #224] <$d.248+0x2>
-    8444:      	movs	r2, #12
-    8446:      	mov	r0, r5
-    8448:      	blx	r3
-    844a:      	movs	r2, #1
-    844c:      	cmp	r0, #0
-    844e:      	bne	0x8490 <<core::panic::panic_info::PanicInfo as core::fmt::Display>::fmt::h980d98f06e764e0e+0x5c> @ imm = #62
-    8450:      	str	r6, [sp, #12]
-    8452:      	ldr	r0, [r4, #8]
-    8454:      	cmp	r0, #0
-    8456:      	str	r4, [sp, #8]
-    8458:      	beq	0x8496 <<core::panic::panic_info::PanicInfo as core::fmt::Display>::fmt::h980d98f06e764e0e+0x62> @ imm = #58
-    845a:      	str	r0, [sp, #16]
-    845c:      	ldr	r0, [pc, #200] <$d.248+0x4>
-    845e:      	str	r0, [sp, #24]
-    8460:      	add	r0, sp, #16
-    8462:      	str	r0, [sp, #20]
-    8464:      	movs	r0, #1
-    8466:      	str	r0, [sp, #64]
-    8468:      	add	r0, sp, #20
-    846a:      	str	r0, [sp, #60]
-    846c:      	movs	r0, #0
-    846e:      	str	r0, [sp, #56]
-    8470:      	str	r0, [sp, #52]
-    8472:      	movs	r0, #2
-    8474:      	str	r0, [sp, #48]
-    8476:      	ldr	r0, [pc, #180] <$d.248+0xa>
-    8478:      	str	r0, [sp, #44]
-    847a:      	mov	r6, r2
-    847c:      	add	r2, sp, #44
-    847e:      	mov	r4, r5
-    8480:      	mov	r0, r5
-    8482:      	ldr	r5, [sp, #12]
-    8484:      	mov	r1, r5
-    8486:      	bl	0x8bdc <core::fmt::write::hff185d7d684cc368> @ imm = #1874
-    848a:      	mov	r2, r6
-    848c:      	cmp	r0, #0
-    848e:      	beq	0x84e0 <<core::panic::panic_info::PanicInfo as core::fmt::Display>::fmt::h980d98f06e764e0e+0xac> @ imm = #78
-    8490:      	mov	r0, r2
-    8492:      	add	sp, #68
-    8494:      	pop	{r4, r5, r6, r7, pc}
-    8496:      	ldm	r4!, {r0, r1}
-    8498:      	ldr	r1, [r1, #12]
-    849a:      	mov	r6, r0
-    849c:      	str	r2, [sp, #4]
-    849e:      	blx	r1
-    84a0:      	ldr	r2, [pc, #140] <$d.248+0xc>
-    84a2:      	eors	r2, r1
-    84a4:      	ldr	r1, [pc, #140] <$d.248+0x10>
-    84a6:      	eors	r1, r0
-    84a8:      	orrs	r1, r2
-    84aa:      	mov	r4, r5
-    84ac:      	ldr	r5, [sp, #12]
-    84ae:      	bne	0x84e0 <<core::panic::panic_info::PanicInfo as core::fmt::Display>::fmt::h980d98f06e764e0e+0xac> @ imm = #46
-    84b0:      	str	r6, [sp, #16]
-    84b2:      	ldr	r0, [pc, #132] <$d.248+0x16>
-    84b4:      	str	r0, [sp, #24]
-    84b6:      	add	r0, sp, #16
-    84b8:      	str	r0, [sp, #20]
-    84ba:      	movs	r0, #1
-    84bc:      	str	r0, [sp, #64]
-    84be:      	add	r0, sp, #20
-    84c0:      	str	r0, [sp, #60]
-    84c2:      	movs	r0, #0
-    84c4:      	str	r0, [sp, #56]
-    84c6:      	str	r0, [sp, #52]
-    84c8:      	movs	r0, #2
-    84ca:      	str	r0, [sp, #48]
-    84cc:      	ldr	r0, [pc, #92] <$d.248+0x8>
-    84ce:      	str	r0, [sp, #44]
-    84d0:      	add	r2, sp, #44
-    84d2:      	mov	r0, r4
-    84d4:      	mov	r1, r5
-    84d6:      	bl	0x8bdc <core::fmt::write::hff185d7d684cc368> @ imm = #1794
-    84da:      	ldr	r2, [sp, #4]
-    84dc:      	cmp	r0, #0
-    84de:      	bne	0x8490 <<core::panic::panic_info::PanicInfo as core::fmt::Display>::fmt::h980d98f06e764e0e+0x5c> @ imm = #-82
-    84e0:      	ldr	r0, [sp, #8]
-    84e2:      	ldr	r0, [r0, #12]
-    84e4:      	ldr	r1, [pc, #84] <$d.248+0x18>
-    84e6:      	str	r1, [sp, #40]
-    84e8:      	mov	r2, r0
-    84ea:      	adds	r2, #12
-    84ec:      	str	r2, [sp, #36]
-    84ee:      	str	r1, [sp, #32]
-    84f0:      	mov	r1, r0
-    84f2:      	adds	r1, #8
-    84f4:      	str	r1, [sp, #28]
-    84f6:      	ldr	r1, [pc, #72] <$d.248+0x1e>
-    84f8:      	str	r1, [sp, #24]
-    84fa:      	str	r0, [sp, #20]
-    84fc:      	movs	r0, #3
-    84fe:      	str	r0, [sp, #64]
-    8500:      	add	r1, sp, #20
-    8502:      	str	r1, [sp, #60]
-    8504:      	movs	r1, #0
-    8506:      	str	r1, [sp, #56]
-    8508:      	str	r1, [sp, #52]
-    850a:      	str	r0, [sp, #48]
-    850c:      	ldr	r0, [pc, #52] <$d.248+0x20>
-    850e:      	str	r0, [sp, #44]
-    8510:      	add	r2, sp, #44
-    8512:      	mov	r0, r4
-    8514:      	mov	r1, r5
-    8516:      	bl	0x8bdc <core::fmt::write::hff185d7d684cc368> @ imm = #1730
-    851a:      	mov	r2, r0
-    851c:      	mov	r0, r2
-    851e:      	add	sp, #68
-    8520:      	pop	{r4, r5, r6, r7, pc}
-    8522:      	mov	r8, r8
-
-00008524 <$d.248>:
-    8524:	94 b9 00 00	.word	0x0000b994
-    8528:	af a2 00 00	.word	0x0000a2af
-    852c:	a4 b9 00 00	.word	0x0000b9a4
-    8530:	1e a9 f2 7e	.word	0x7ef2a91e
-    8534:	f4 bc c7 ec	.word	0xecc7bcf4
-    8538:	9d a2 00 00	.word	0x0000a29d
-    853c:	85 a1 00 00	.word	0x0000a185
-    8540:	8d a2 00 00	.word	0x0000a28d
-    8544:	6c b9 00 00	.word	0x0000b96c
-
-00008548 <core::panicking::panic::hd188a7f3102defa3>:
-    8548:      	push	{r7, lr}
-    854a:      	add	r7, sp, #0
-    854c:      	sub	sp, #32
-    854e:      	movs	r3, #0
-    8550:      	str	r3, [sp, #20]
-    8552:      	ldr	r4, [pc, #28] <$d.250+0x2>
-    8554:      	str	r4, [sp, #16]
-    8556:      	str	r3, [sp, #12]
-    8558:      	str	r3, [sp, #8]
-    855a:      	movs	r3, #1
-    855c:      	str	r3, [sp, #4]
-    855e:      	add	r3, sp, #24
-    8560:      	str	r3, [sp]
-    8562:      	str	r1, [sp, #28]
-    8564:      	str	r0, [sp, #24]
-    8566:      	mov	r0, sp
-    8568:      	mov	r1, r2
-    856a:      	bl	0x85b4 <core::panicking::panic_fmt::h884220a03f3bce26> @ imm = #70
-    856e:      	trap
-
-00008570 <$d.250>:
-    8570:	34 b9 00 00	.word	0x0000b934
-
-00008574 <core::panicking::panic_bounds_check::h5d2fdbe20d7940cc>:
-    8574:      	push	{r7, lr}
-    8576:      	add	r7, sp, #0
-    8578:      	sub	sp, #48
-    857a:      	str	r1, [sp, #4]
-    857c:      	str	r0, [sp]
-    857e:      	movs	r0, #2
-    8580:      	str	r0, [sp, #28]
-    8582:      	add	r1, sp, #32
-    8584:      	str	r1, [sp, #24]
-    8586:      	movs	r1, #0
-    8588:      	str	r1, [sp, #20]
-    858a:      	str	r1, [sp, #16]
-    858c:      	str	r0, [sp, #12]
-    858e:      	ldr	r0, [pc, #28] <$d.256+0x2>
-    8590:      	str	r0, [sp, #8]
-    8592:      	ldr	r0, [pc, #28] <$d.256+0x6>
-    8594:      	str	r0, [sp, #44]
-    8596:      	mov	r1, sp
-    8598:      	str	r1, [sp, #40]
-    859a:      	str	r0, [sp, #36]
-    859c:      	add	r0, sp, #4
-    859e:      	str	r0, [sp, #32]
-    85a0:      	add	r0, sp, #8
-    85a2:      	mov	r1, r2
-    85a4:      	bl	0x85b4 <core::panicking::panic_fmt::h884220a03f3bce26> @ imm = #12
-    85a8:      	trap
-    85aa:      	mov	r8, r8
-
-000085ac <$d.256>:
-    85ac:	c8 b9 00 00	.word	0x0000b9c8
-    85b0:	85 a1 00 00	.word	0x0000a185
-
-000085b4 <core::panicking::panic_fmt::h884220a03f3bce26>:
-    85b4:      	push	{r7, lr}
-    85b6:      	add	r7, sp, #0
-    85b8:      	sub	sp, #16
-    85ba:      	str	r1, [sp, #12]
-    85bc:      	str	r0, [sp, #8]
-    85be:      	ldr	r0, [pc, #16] <$d.258+0x2>
-    85c0:      	str	r0, [sp, #4]
-    85c2:      	ldr	r0, [pc, #16] <$d.258+0x6>
-    85c4:      	str	r0, [sp]
-    85c6:      	mov	r0, sp
-    85c8:      	bl	0xa3a0 <rust_begin_unwind> @ imm = #7636
-    85cc:      	trap
-    85ce:      	mov	r8, r8
-
-000085d0 <$d.258>:
-    85d0:	84 b9 00 00	.word	0x0000b984
-    85d4:	34 b9 00 00	.word	0x0000b934
-
-000085d8 <core::result::unwrap_failed::hab9917f6469ee00f>:
-    85d8:      	push	{r7, lr}
-    85da:      	add	r7, sp, #0
-    85dc:      	sub	sp, #56
-    85de:      	str	r1, [sp, #4]
-    85e0:      	str	r0, [sp]
-    85e2:      	str	r3, [sp, #12]
-    85e4:      	str	r2, [sp, #8]
-    85e6:      	movs	r0, #2
-    85e8:      	str	r0, [sp, #36]
-    85ea:      	add	r1, sp, #40
-    85ec:      	str	r1, [sp, #32]
-    85ee:      	movs	r1, #0
-    85f0:      	str	r1, [sp, #28]
-    85f2:      	str	r1, [sp, #24]
-    85f4:      	str	r0, [sp, #20]
-    85f6:      	ldr	r0, [pc, #28] <$d.267+0x2>
-    85f8:      	str	r0, [sp, #16]
-    85fa:      	ldr	r0, [pc, #28] <$d.267+0x6>
-    85fc:      	str	r0, [sp, #52]
-    85fe:      	add	r0, sp, #8
-    8600:      	str	r0, [sp, #48]
-    8602:      	ldr	r0, [pc, #24] <$d.267+0xa>
-    8604:      	str	r0, [sp, #44]
-    8606:      	mov	r0, sp
-    8608:      	str	r0, [sp, #40]
-    860a:      	add	r0, sp, #16
-    860c:      	ldr	r1, [r7, #8]
-    860e:      	bl	0x85b4 <core::panicking::panic_fmt::h884220a03f3bce26> @ imm = #-94
-    8612:      	trap
-
-00008614 <$d.267>:
-    8614:	dc b9 00 00	.word	0x0000b9dc
-    8618:	7d a2 00 00	.word	0x0000a27d
-    861c:	8d a2 00 00	.word	0x0000a28d
-
-00008620 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213>:
-    8620:      	push	{r4, r5, r6, r7, lr}
-    8622:      	add	r7, sp, #12
-    8624:      	sub	sp, #44
-    8626:      	cmp	r2, #0
-    8628:      	bne	0x862c <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0xc> @ imm = #0
-    862a:      	b	0x88a4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x284> @ imm = #630
-    862c:      	mov	r4, r2
-    862e:      	mov	r5, r1
-    8630:      	ldr	r1, [r0]
-    8632:      	str	r1, [sp, #8]
-    8634:      	ldr	r1, [r0, #4]
-    8636:      	str	r1, [sp, #4]
-    8638:      	ldr	r0, [r0, #8]
-    863a:      	str	r0, [sp, #12]
-    863c:      	movs	r0, #1
-    863e:      	str	r0, [sp, #36]
-    8640:      	b	0x864a <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x2a> @ imm = #6
-    8642:      	adds	r5, r5, r6
-    8644:      	subs	r4, r4, r6
-    8646:      	bne	0x864a <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x2a> @ imm = #0
-    8648:      	b	0x88a4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x284> @ imm = #600
-    864a:      	ldr	r0, [sp, #12]
-    864c:      	ldrb	r0, [r0]
-    864e:      	cmp	r0, #0
-    8650:      	beq	0x8664 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x44> @ imm = #16
-    8652:      	ldr	r0, [sp, #4]
-    8654:      	ldr	r3, [r0, #12]
-    8656:      	movs	r2, #4
-    8658:      	ldr	r0, [sp, #8]
-    865a:      	ldr	r1, [pc, #652] <$d.271+0xe>
-    865c:      	blx	r3
-    865e:      	cmp	r0, #0
-    8660:      	beq	0x8664 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x44> @ imm = #0
-    8662:      	b	0x88aa <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x28a> @ imm = #580
-    8664:      	movs	r2, #0
-    8666:      	mov	r1, r4
-    8668:      	str	r4, [sp, #28]
-    866a:      	str	r5, [sp, #24]
-    866c:      	b	0x8674 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x54> @ imm = #4
-    866e:      	cmp	r2, r4
-    8670:      	bls	0x8674 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x54> @ imm = #0
-    8672:      	b	0x8878 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x258> @ imm = #514
-    8674:      	adds	r0, r5, r2
-    8676:      	cmp	r1, #8
-    8678:      	str	r0, [sp, #40]
-    867a:      	bhs	0x86a0 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x80> @ imm = #34
-    867c:      	cmp	r1, #0
-    867e:      	bne	0x8682 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x62> @ imm = #0
-    8680:      	b	0x8876 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x256> @ imm = #498
-    8682:      	ldrb	r0, [r0]
-    8684:      	movs	r3, #0
-    8686:      	cmp	r0, #10
-    8688:      	bne	0x868c <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x6c> @ imm = #0
-    868a:      	b	0x87e4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1c4> @ imm = #342
-    868c:      	cmp	r1, #1
-    868e:      	bne	0x8692 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x72> @ imm = #0
-    8690:      	b	0x8878 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x258> @ imm = #484
-    8692:      	ldr	r0, [sp, #40]
-    8694:      	ldrb	r0, [r0, #1]
-    8696:      	cmp	r0, #10
-    8698:      	beq	0x869c <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x7c> @ imm = #0
-    869a:      	b	0x87a2 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x182> @ imm = #260
-    869c:      	movs	r3, #1
-    869e:      	b	0x87e4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1c4> @ imm = #322
-    86a0:      	mov	r4, r0
-    86a2:      	adds	r0, r0, #3
-    86a4:      	movs	r3, #3
-    86a6:      	bics	r0, r3
-    86a8:      	subs	r3, r0, r4
-    86aa:      	str	r2, [sp, #20]
-    86ac:      	str	r1, [sp, #16]
-    86ae:      	beq	0x870c <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0xec> @ imm = #90
-    86b0:      	cmp	r3, r1
-    86b2:      	mov	r0, r1
-    86b4:      	bhi	0x86b8 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x98> @ imm = #0
-    86b6:      	mov	r0, r3
-    86b8:      	ldr	r1, [sp, #40]
-    86ba:      	adds	r6, r1, r0
-    86bc:      	movs	r3, #0
-    86be:      	ldr	r1, [sp, #40]
-    86c0:      	ldrb	r5, [r1, r3]
-    86c2:      	cmp	r5, #10
-    86c4:      	bne	0x86c8 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0xa8> @ imm = #0
-    86c6:      	b	0x87e0 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1c0> @ imm = #278
-    86c8:      	adds	r5, r1, r3
-    86ca:      	adds	r5, r5, #1
-    86cc:      	cmp	r5, r6
-    86ce:      	beq	0x86f6 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0xd6> @ imm = #36
-    86d0:      	ldrb	r4, [r5]
-    86d2:      	cmp	r4, #10
-    86d4:      	beq	0x87c6 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1a6> @ imm = #238
-    86d6:      	adds	r5, r5, #1
-    86d8:      	cmp	r5, r6
-    86da:      	beq	0x86f6 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0xd6> @ imm = #24
-    86dc:      	ldrb	r4, [r5]
-    86de:      	cmp	r4, #10
-    86e0:      	beq	0x87ce <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1ae> @ imm = #234
-    86e2:      	adds	r5, r5, #1
-    86e4:      	cmp	r5, r6
-    86e6:      	beq	0x86f6 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0xd6> @ imm = #12
-    86e8:      	ldrb	r4, [r5]
-    86ea:      	cmp	r4, #10
-    86ec:      	beq	0x87de <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1be> @ imm = #238
-    86ee:      	adds	r3, r3, #4
-    86f0:      	adds	r4, r5, #1
-    86f2:      	cmp	r4, r6
-    86f4:      	bne	0x86be <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x9e> @ imm = #-58
-    86f6:      	ldr	r1, [sp, #16]
-    86f8:      	mov	r3, r1
-    86fa:      	subs	r3, #8
-    86fc:      	str	r3, [sp, #32]
-    86fe:      	cmp	r0, r3
-    8700:      	ldr	r4, [sp, #28]
-    8702:      	ldr	r5, [sp, #24]
-    8704:      	bls	0x8714 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0xf4> @ imm = #12
-    8706:      	cmp	r0, r1
-    8708:      	bne	0x875e <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x13e> @ imm = #82
-    870a:      	b	0x8876 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x256> @ imm = #360
-    870c:      	mov	r0, r1
-    870e:      	subs	r0, #8
-    8710:      	str	r0, [sp, #32]
-    8712:      	movs	r0, #0
-    8714:      	ldr	r2, [sp, #40]
-    8716:      	adds	r5, r2, r0
-    8718:      	ldr	r5, [r5, #4]
-    871a:      	ldr	r4, [pc, #452] <$d.271+0x6>
-    871c:      	bics	r4, r5
-    871e:      	ldr	r3, [pc, #444] <$d.271+0x2>
-    8720:      	eors	r5, r3
-    8722:      	ldr	r1, [pc, #448] <$d.271+0xa>
-    8724:      	adds	r6, r5, r1
-    8726:      	ands	r6, r4
-    8728:      	subs	r4, r6, #1
-    872a:      	sbcs	r6, r4
-    872c:      	ldr	r4, [r2, r0]
-    872e:      	ldr	r5, [pc, #432] <$d.271+0x6>
-    8730:      	bics	r5, r4
-    8732:      	eors	r4, r3
-    8734:      	adds	r4, r4, r1
-    8736:      	tst	r5, r4
-    8738:      	ldr	r5, [sp, #36]
-    873a:      	bne	0x873e <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x11e> @ imm = #0
-    873c:      	mov	r5, r6
-    873e:      	cmp	r5, #0
-    8740:      	bne	0x874a <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x12a> @ imm = #6
-    8742:      	adds	r0, #8
-    8744:      	ldr	r1, [sp, #32]
-    8746:      	cmp	r0, r1
-    8748:      	bls	0x8714 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0xf4> @ imm = #-56
-    874a:      	ldr	r1, [sp, #16]
-    874c:      	cmp	r0, r1
-    874e:      	bls	0x8752 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x132> @ imm = #0
-    8750:      	b	0x88b0 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x290> @ imm = #348
-    8752:      	ldr	r4, [sp, #28]
-    8754:      	ldr	r5, [sp, #24]
-    8756:      	ldr	r2, [sp, #20]
-    8758:      	cmp	r0, r1
-    875a:      	bne	0x875e <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x13e> @ imm = #0
-    875c:      	b	0x8876 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x256> @ imm = #278
-    875e:      	mov	r3, r2
-    8760:      	ldr	r2, [sp, #40]
-    8762:      	adds	r2, r2, r1
-    8764:      	adds	r1, r0, r3
-    8766:      	adds	r6, r5, r1
-    8768:      	movs	r1, #0
-    876a:      	ldrb	r3, [r6, r1]
-    876c:      	cmp	r3, #10
-    876e:      	beq	0x87d4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1b4> @ imm = #98
-    8770:      	adds	r3, r6, r1
-    8772:      	adds	r5, r3, #1
-    8774:      	movs	r3, #0
-    8776:      	cmp	r5, r2
-    8778:      	beq	0x8844 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x224> @ imm = #200
-    877a:      	ldrb	r4, [r5]
-    877c:      	cmp	r4, #10
-    877e:      	beq	0x87c2 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1a2> @ imm = #64
-    8780:      	adds	r5, r5, #1
-    8782:      	cmp	r5, r2
-    8784:      	beq	0x8844 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x224> @ imm = #188
-    8786:      	ldrb	r4, [r5]
-    8788:      	cmp	r4, #10
-    878a:      	beq	0x87ca <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1aa> @ imm = #60
-    878c:      	adds	r5, r5, #1
-    878e:      	cmp	r5, r2
-    8790:      	beq	0x8844 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x224> @ imm = #176
-    8792:      	ldrb	r4, [r5]
-    8794:      	cmp	r4, #10
-    8796:      	beq	0x87d2 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1b2> @ imm = #56
-    8798:      	adds	r1, r1, #4
-    879a:      	adds	r4, r5, #1
-    879c:      	cmp	r4, r2
-    879e:      	bne	0x876a <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x14a> @ imm = #-56
-    87a0:      	b	0x8844 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x224> @ imm = #160
-    87a2:      	cmp	r1, #2
-    87a4:      	beq	0x8878 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x258> @ imm = #208
-    87a6:      	ldr	r0, [sp, #40]
-    87a8:      	ldrb	r0, [r0, #2]
-    87aa:      	cmp	r0, #10
-    87ac:      	bne	0x87b2 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x192> @ imm = #2
-    87ae:      	movs	r3, #2
-    87b0:      	b	0x87e4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1c4> @ imm = #48
-    87b2:      	cmp	r1, #3
-    87b4:      	beq	0x8878 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x258> @ imm = #192
-    87b6:      	ldr	r0, [sp, #40]
-    87b8:      	ldrb	r0, [r0, #3]
-    87ba:      	cmp	r0, #10
-    87bc:      	bne	0x8814 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1f4> @ imm = #84
-    87be:      	movs	r3, #3
-    87c0:      	b	0x87e4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1c4> @ imm = #32
-    87c2:      	adds	r1, r1, #1
-    87c4:      	b	0x87d4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1b4> @ imm = #12
-    87c6:      	adds	r3, r3, #1
-    87c8:      	b	0x87e0 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1c0> @ imm = #20
-    87ca:      	adds	r1, r1, #2
-    87cc:      	b	0x87d4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1b4> @ imm = #4
-    87ce:      	adds	r3, r3, #2
-    87d0:      	b	0x87e0 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1c0> @ imm = #12
-    87d2:      	adds	r1, r1, #3
-    87d4:      	adds	r3, r1, r0
-    87d6:      	ldr	r4, [sp, #28]
-    87d8:      	ldr	r5, [sp, #24]
-    87da:      	ldr	r2, [sp, #20]
-    87dc:      	b	0x87e4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1c4> @ imm = #4
-    87de:      	adds	r3, r3, #3
-    87e0:      	ldr	r4, [sp, #28]
-    87e2:      	ldr	r5, [sp, #24]
-    87e4:      	adds	r0, r3, r2
-    87e6:      	adds	r2, r0, #1
-    87e8:      	cmp	r2, r4
-    87ea:      	bhi	0x87f4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1d4> @ imm = #6
-    87ec:      	movs	r1, #0
-    87ee:      	cmp	r2, r0
-    87f0:      	blo	0x87fa <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1da> @ imm = #6
-    87f2:      	b	0x87fc <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1dc> @ imm = #6
-    87f4:      	movs	r1, #1
-    87f6:      	cmp	r2, r0
-    87f8:      	bhs	0x87fc <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1dc> @ imm = #0
-    87fa:      	ldr	r1, [sp, #36]
-    87fc:      	cmp	r1, #1
-    87fe:      	beq	0x8806 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1e6> @ imm = #4
-    8800:      	ldrb	r0, [r5, r0]
-    8802:      	cmp	r0, #10
-    8804:      	beq	0x8898 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x278> @ imm = #144
-    8806:      	subs	r1, r4, r2
-    8808:      	movs	r3, #0
-    880a:      	cmp	r4, r2
-    880c:      	blo	0x8810 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1f0> @ imm = #0
-    880e:      	b	0x866e <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x4e> @ imm = #-420
-    8810:      	mov	r1, r3
-    8812:      	b	0x866e <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x4e> @ imm = #-424
-    8814:      	cmp	r1, #4
-    8816:      	beq	0x8878 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x258> @ imm = #94
-    8818:      	ldr	r0, [sp, #40]
-    881a:      	ldrb	r0, [r0, #4]
-    881c:      	cmp	r0, #10
-    881e:      	bne	0x8824 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x204> @ imm = #2
-    8820:      	movs	r3, #4
-    8822:      	b	0x87e4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1c4> @ imm = #-66
-    8824:      	cmp	r1, #5
-    8826:      	beq	0x8878 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x258> @ imm = #78
-    8828:      	ldr	r0, [sp, #40]
-    882a:      	ldrb	r0, [r0, #5]
-    882c:      	cmp	r0, #10
-    882e:      	bne	0x8834 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x214> @ imm = #2
-    8830:      	movs	r3, #5
-    8832:      	b	0x87e4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1c4> @ imm = #-82
-    8834:      	cmp	r1, #6
-    8836:      	beq	0x8878 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x258> @ imm = #62
-    8838:      	ldr	r0, [sp, #40]
-    883a:      	ldrb	r0, [r0, #6]
-    883c:      	cmp	r0, #10
-    883e:      	bne	0x8878 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x258> @ imm = #54
-    8840:      	movs	r3, #6
-    8842:      	b	0x87e4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1c4> @ imm = #-98
-    8844:      	ldr	r4, [sp, #28]
-    8846:      	mov	r2, r4
-    8848:      	ldr	r5, [sp, #24]
-    884a:      	ldr	r0, [sp, #12]
-    884c:      	strb	r3, [r0]
-    884e:      	cmp	r4, r2
-    8850:      	bls	0x8882 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x262> @ imm = #46
-    8852:      	ldrsb	r0, [r5, r2]
-    8854:      	movs	r1, #64
-    8856:      	mvns	r4, r1
-    8858:      	cmp	r0, r4
-    885a:      	ble	0x88b8 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x298> @ imm = #90
-    885c:      	ldr	r0, [sp, #4]
-    885e:      	ldr	r3, [r0, #12]
-    8860:      	ldr	r0, [sp, #8]
-    8862:      	mov	r1, r5
-    8864:      	mov	r6, r2
-    8866:      	blx	r3
-    8868:      	cmp	r0, #0
-    886a:      	bne	0x88aa <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x28a> @ imm = #60
-    886c:      	ldrsb	r0, [r5, r6]
-    886e:      	cmp	r0, r4
-    8870:      	ldr	r4, [sp, #28]
-    8872:      	ble	0x88ca <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x2aa> @ imm = #84
-    8874:      	b	0x8642 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x22> @ imm = #-566
-    8876:      	movs	r3, #0
-    8878:      	mov	r2, r4
-    887a:      	ldr	r0, [sp, #12]
-    887c:      	strb	r3, [r0]
-    887e:      	cmp	r4, r2
-    8880:      	bhi	0x8852 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x232> @ imm = #-50
-    8882:      	bne	0x88b8 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x298> @ imm = #50
-    8884:      	ldr	r0, [sp, #4]
-    8886:      	ldr	r3, [r0, #12]
-    8888:      	ldr	r0, [sp, #8]
-    888a:      	mov	r1, r5
-    888c:      	mov	r6, r2
-    888e:      	blx	r3
-    8890:      	cmp	r0, #0
-    8892:      	ldr	r4, [sp, #28]
-    8894:      	bne	0x88aa <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x28a> @ imm = #18
-    8896:      	b	0x8642 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x22> @ imm = #-600
-    8898:      	movs	r3, #1
-    889a:      	ldr	r0, [sp, #12]
-    889c:      	strb	r3, [r0]
-    889e:      	cmp	r4, r2
-    88a0:      	bhi	0x8852 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x232> @ imm = #-82
-    88a2:      	b	0x8882 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x262> @ imm = #-36
-    88a4:      	movs	r0, #0
-    88a6:      	add	sp, #44
-    88a8:      	pop	{r4, r5, r6, r7, pc}
-    88aa:      	ldr	r0, [sp, #36]
-    88ac:      	add	sp, #44
-    88ae:      	pop	{r4, r5, r6, r7, pc}
-    88b0:      	ldr	r2, [pc, #56] <$d.271+0x10>
-    88b2:      	bl	0x95ac <core::slice::index::slice_start_index_len_fail::h3080a8211123744d> @ imm = #3318
-    88b6:      	trap
-    88b8:      	ldr	r0, [pc, #52] <$d.271+0x14>
-    88ba:      	str	r0, [sp]
-    88bc:      	mov	r3, r2
-    88be:      	movs	r2, #0
-    88c0:      	mov	r0, r5
-    88c2:      	ldr	r1, [sp, #28]
-    88c4:      	bl	0x966c <core::str::slice_error_fail::h26c332087be94791> @ imm = #3492
-    88c8:      	trap
-    88ca:      	ldr	r0, [pc, #40] <$d.271+0x1a>
-    88cc:      	str	r0, [sp]
-    88ce:      	mov	r0, r5
-    88d0:      	mov	r1, r4
-    88d2:      	mov	r2, r6
-    88d4:      	mov	r3, r4
-    88d6:      	bl	0x966c <core::str::slice_error_fail::h26c332087be94791> @ imm = #3474
-    88da:      	trap
-
-000088dc <$d.271>:
-    88dc:	0a 0a 0a 0a	.word	0x0a0a0a0a
-    88e0:	80 80 80 80	.word	0x80808080
-    88e4:	ff fe fe fe	.word	0xfefefeff
-    88e8:	7c ac 00 00	.word	0x0000ac7c
-    88ec:	3c bb 00 00	.word	0x0000bb3c
-    88f0:	04 ba 00 00	.word	0x0000ba04
-    88f4:	14 ba 00 00	.word	0x0000ba14
-
-000088f8 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186>:
-    88f8:      	push	{r4, r5, r6, r7, lr}
-    88fa:      	add	r7, sp, #12
-    88fc:      	sub	sp, #68
-    88fe:      	mov	r4, r0
-    8900:      	ldrb	r0, [r0, #8]
-    8902:      	cmp	r0, #0
-    8904:      	beq	0x890c <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0x14> @ imm = #4
-    8906:      	ldr	r0, [r4, #4]
-    8908:      	movs	r6, #1
-    890a:      	b	0x89c2 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0xca> @ imm = #180
-    890c:      	mov	r6, r1
-    890e:      	ldr	r5, [r4]
-    8910:      	ldr	r3, [r4, #4]
-    8912:      	ldrb	r0, [r5]
-    8914:      	lsls	r0, r0, #29
-    8916:      	str	r3, [sp, #12]
-    8918:      	str	r2, [sp, #8]
-    891a:      	bmi	0x892e <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0x36> @ imm = #16
-    891c:      	cmp	r3, #0
-    891e:      	str	r6, [sp, #4]
-    8920:      	beq	0x899c <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0xa4> @ imm = #120
-    8922:      	ldr	r1, [pc, #188] <$d.279+0x12>
-    8924:      	movs	r6, #1
-    8926:      	cmp	r3, #0
-    8928:      	mov	r2, r6
-    892a:      	bne	0x89a6 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0xae> @ imm = #120
-    892c:      	b	0x89a8 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0xb0> @ imm = #120
-    892e:      	cmp	r3, #0
-    8930:      	bne	0x8948 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0x50> @ imm = #20
-    8932:      	ldr	r0, [r5, #24]
-    8934:      	ldr	r1, [r5, #28]
-    8936:      	ldr	r3, [r1, #12]
-    8938:      	ldr	r1, [pc, #148] <$d.279>
-    893a:      	movs	r2, #2
-    893c:      	blx	r3
-    893e:      	cmp	r0, #0
-    8940:      	beq	0x8948 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0x50> @ imm = #4
-    8942:      	movs	r0, #0
-    8944:      	movs	r6, #1
-    8946:      	b	0x89c2 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0xca> @ imm = #120
-    8948:      	add	r0, sp, #28
-    894a:      	str	r6, [sp, #4]
-    894c:      	movs	r6, #1
-    894e:      	strb	r6, [r0]
-    8950:      	movs	r2, #32
-    8952:      	ldrb	r3, [r5, r2]
-    8954:      	add	r1, sp, #32
-    8956:      	strb	r3, [r1, r2]
-    8958:      	str	r0, [sp, #24]
-    895a:      	ldr	r0, [pc, #120] <$d.279+0x6>
-    895c:      	str	r0, [sp, #60]
-    895e:      	add	r0, sp, #16
-    8960:      	str	r0, [sp, #56]
-    8962:      	ldr	r0, [r5, #28]
-    8964:      	str	r0, [sp, #20]
-    8966:      	ldr	r0, [r5, #24]
-    8968:      	str	r0, [sp, #16]
-    896a:      	ldr	r0, [r5, #4]
-    896c:      	str	r0, [sp, #36]
-    896e:      	ldr	r0, [r5]
-    8970:      	str	r0, [sp, #32]
-    8972:      	ldr	r0, [r5, #20]
-    8974:      	str	r0, [sp, #52]
-    8976:      	ldr	r0, [r5, #16]
-    8978:      	str	r0, [sp, #48]
-    897a:      	ldr	r0, [r5, #12]
-    897c:      	str	r0, [sp, #44]
-    897e:      	ldr	r0, [r5, #8]
-    8980:      	str	r0, [sp, #40]
-    8982:      	ldr	r0, [sp, #8]
-    8984:      	ldr	r2, [r0, #12]
-    8986:      	ldr	r0, [sp, #4]
-    8988:      	blx	r2
-    898a:      	cmp	r0, #0
-    898c:      	bne	0x89c0 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0xc8> @ imm = #48
-    898e:      	ldr	r0, [sp, #60]
-    8990:      	ldr	r3, [r0, #12]
-    8992:      	ldr	r0, [sp, #56]
-    8994:      	ldr	r1, [pc, #64] <$d.279+0x8>
-    8996:      	movs	r2, #2
-    8998:      	blx	r3
-    899a:      	b	0x89be <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0xc6> @ imm = #32
-    899c:      	ldr	r1, [pc, #60] <$d.279+0xc>
-    899e:      	movs	r6, #1
-    89a0:      	cmp	r3, #0
-    89a2:      	mov	r2, r6
-    89a4:      	beq	0x89a8 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0xb0> @ imm = #0
-    89a6:      	movs	r2, #2
-    89a8:      	ldr	r0, [r5, #24]
-    89aa:      	ldr	r3, [r5, #28]
-    89ac:      	ldr	r3, [r3, #12]
-    89ae:      	blx	r3
-    89b0:      	cmp	r0, #0
-    89b2:      	bne	0x89c0 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0xc8> @ imm = #10
-    89b4:      	ldr	r0, [sp, #8]
-    89b6:      	ldr	r2, [r0, #12]
-    89b8:      	ldr	r0, [sp, #4]
-    89ba:      	mov	r1, r5
-    89bc:      	blx	r2
-    89be:      	mov	r6, r0
-    89c0:      	ldr	r0, [sp, #12]
-    89c2:      	strb	r6, [r4, #8]
-    89c4:      	adds	r0, r0, #1
-    89c6:      	str	r0, [r4, #4]
-    89c8:      	mov	r0, r4
-    89ca:      	add	sp, #68
-    89cc:      	pop	{r4, r5, r6, r7, pc}
-    89ce:      	mov	r8, r8
-
-000089d0 <$d.279>:
-    89d0:	28 ba 00 00	.word	0x0000ba28
-    89d4:	ec b9 00 00	.word	0x0000b9ec
-    89d8:	24 ba 00 00	.word	0x0000ba24
-    89dc:	2a ba 00 00	.word	0x0000ba2a
-    89e0:	26 ba 00 00	.word	0x0000ba26
-
-000089e4 <core::fmt::builders::DebugTuple::finish::h6d0cc63ecbd49307>:
-    89e4:      	push	{r4, r5, r7, lr}
-    89e6:      	add	r7, sp, #8
-    89e8:      	mov	r4, r0
-    89ea:      	ldrb	r1, [r0, #8]
-    89ec:      	ldr	r0, [r0, #4]
-    89ee:      	cmp	r0, #0
-    89f0:      	beq	0x8a02 <core::fmt::builders::DebugTuple::finish::h6d0cc63ecbd49307+0x1e> @ imm = #14
-    89f2:      	movs	r5, #1
-    89f4:      	cmp	r1, #0
-    89f6:      	beq	0x8a0c <core::fmt::builders::DebugTuple::finish::h6d0cc63ecbd49307+0x28> @ imm = #18
-    89f8:      	strb	r5, [r4, #8]
-    89fa:      	subs	r0, r5, #1
-    89fc:      	sbcs	r5, r0
-    89fe:      	mov	r0, r5
-    8a00:      	pop	{r4, r5, r7, pc}
-    8a02:      	mov	r5, r1
-    8a04:      	subs	r0, r5, #1
-    8a06:      	sbcs	r5, r0
-    8a08:      	mov	r0, r5
-    8a0a:      	pop	{r4, r5, r7, pc}
-    8a0c:      	cmp	r0, #1
-    8a0e:      	bne	0x8a2e <core::fmt::builders::DebugTuple::finish::h6d0cc63ecbd49307+0x4a> @ imm = #28
-    8a10:      	ldrb	r0, [r4, #9]
-    8a12:      	cmp	r0, #0
-    8a14:      	beq	0x8a2e <core::fmt::builders::DebugTuple::finish::h6d0cc63ecbd49307+0x4a> @ imm = #22
-    8a16:      	ldr	r1, [r4]
-    8a18:      	ldrb	r0, [r1]
-    8a1a:      	lsls	r0, r0, #29
-    8a1c:      	bmi	0x8a2e <core::fmt::builders::DebugTuple::finish::h6d0cc63ecbd49307+0x4a> @ imm = #14
-    8a1e:      	ldr	r0, [r1, #24]
-    8a20:      	ldr	r1, [r1, #28]
-    8a22:      	ldr	r3, [r1, #12]
-    8a24:      	ldr	r1, [pc, #32] <$d.281>
-    8a26:      	movs	r2, #1
-    8a28:      	blx	r3
-    8a2a:      	cmp	r0, #0
-    8a2c:      	bne	0x89f8 <core::fmt::builders::DebugTuple::finish::h6d0cc63ecbd49307+0x14> @ imm = #-56
-    8a2e:      	ldr	r1, [r4]
-    8a30:      	ldr	r0, [r1, #24]
-    8a32:      	ldr	r1, [r1, #28]
-    8a34:      	ldr	r3, [r1, #12]
-    8a36:      	ldr	r1, [pc, #20] <$d.281+0x6>
-    8a38:      	movs	r2, #1
-    8a3a:      	blx	r3
-    8a3c:      	mov	r5, r0
-    8a3e:      	strb	r0, [r4, #8]
-    8a40:      	subs	r0, r5, #1
-    8a42:      	sbcs	r5, r0
-    8a44:      	mov	r0, r5
-    8a46:      	pop	{r4, r5, r7, pc}
-
-00008a48 <$d.281>:
-    8a48:	2b ba 00 00	.word	0x0000ba2b
-    8a4c:	2c ba 00 00	.word	0x0000ba2c
-
-00008a50 <core::fmt::Write::write_char::h632cc6199d3eda54>:
-    8a50:      	push	{r4, r6, r7, lr}
-    8a52:      	add	r7, sp, #8
-    8a54:      	sub	sp, #8
-    8a56:      	movs	r2, #0
-    8a58:      	str	r2, [sp, #4]
-    8a5a:      	cmp	r1, #128
-    8a5c:      	bhs	0x8a6e <core::fmt::Write::write_char::h632cc6199d3eda54+0x1e> @ imm = #14
-    8a5e:      	add	r2, sp, #4
-    8a60:      	strb	r1, [r2]
-    8a62:      	movs	r2, #1
-    8a64:      	add	r1, sp, #4
-    8a66:      	bl	0x8620 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213> @ imm = #-1098
-    8a6a:      	add	sp, #8
-    8a6c:      	pop	{r4, r6, r7, pc}
-    8a6e:      	lsrs	r2, r1, #11
-    8a70:      	bne	0x8a90 <core::fmt::Write::write_char::h632cc6199d3eda54+0x40> @ imm = #28
-    8a72:      	movs	r2, #63
-    8a74:      	ands	r2, r1
-    8a76:      	adds	r2, #128
-    8a78:      	add	r3, sp, #4
-    8a7a:      	strb	r2, [r3, #1]
-    8a7c:      	lsrs	r1, r1, #6
-    8a7e:      	movs	r2, #192
-    8a80:      	orrs	r2, r1
-    8a82:      	strb	r2, [r3]
-    8a84:      	movs	r2, #2
-    8a86:      	add	r1, sp, #4
-    8a88:      	bl	0x8620 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213> @ imm = #-1132
-    8a8c:      	add	sp, #8
-    8a8e:      	pop	{r4, r6, r7, pc}
-    8a90:      	lsrs	r2, r1, #16
-    8a92:      	bne	0x8aba <core::fmt::Write::write_char::h632cc6199d3eda54+0x6a> @ imm = #36
-    8a94:      	movs	r2, #63
-    8a96:      	ands	r2, r1
-    8a98:      	adds	r2, #128
-    8a9a:      	add	r3, sp, #4
-    8a9c:      	strb	r2, [r3, #2]
-    8a9e:      	lsrs	r2, r1, #12
-    8aa0:      	movs	r4, #224
-    8aa2:      	orrs	r4, r2
-    8aa4:      	strb	r4, [r3]
-    8aa6:      	lsls	r1, r1, #20
-    8aa8:      	lsrs	r1, r1, #26
-    8aaa:      	adds	r1, #128
-    8aac:      	strb	r1, [r3, #1]
-    8aae:      	movs	r2, #3
-    8ab0:      	add	r1, sp, #4
-    8ab2:      	bl	0x8620 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213> @ imm = #-1174
-    8ab6:      	add	sp, #8
-    8ab8:      	pop	{r4, r6, r7, pc}
-    8aba:      	movs	r2, #63
-    8abc:      	ands	r2, r1
-    8abe:      	adds	r2, #128
-    8ac0:      	add	r3, sp, #4
-    8ac2:      	strb	r2, [r3, #3]
-    8ac4:      	lsrs	r2, r1, #18
-    8ac6:      	movs	r4, #240
-    8ac8:      	orrs	r4, r2
-    8aca:      	strb	r4, [r3]
-    8acc:      	lsls	r2, r1, #20
-    8ace:      	lsrs	r2, r2, #26
-    8ad0:      	adds	r2, #128
-    8ad2:      	strb	r2, [r3, #2]
-    8ad4:      	lsls	r1, r1, #14
-    8ad6:      	lsrs	r1, r1, #26
-    8ad8:      	adds	r1, #128
-    8ada:      	strb	r1, [r3, #1]
-    8adc:      	movs	r2, #4
-    8ade:      	add	r1, sp, #4
-    8ae0:      	bl	0x8620 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213> @ imm = #-1220
-    8ae4:      	add	sp, #8
-    8ae6:      	pop	{r4, r6, r7, pc}
-
-00008ae8 <core::fmt::Write::write_fmt::h9ea100d7d5f8b553>:
-    8ae8:      	push	{r4, r5, r7, lr}
-    8aea:      	add	r7, sp, #8
-    8aec:      	sub	sp, #32
-    8aee:      	str	r0, [sp, #4]
-    8af0:      	add	r2, sp, #8
-    8af2:      	mov	r0, r2
-    8af4:      	ldm	r1!, {r3, r4, r5}
-    8af6:      	stm	r0!, {r3, r4, r5}
-    8af8:      	ldm	r1!, {r3, r4, r5}
-    8afa:      	stm	r0!, {r3, r4, r5}
-    8afc:      	add	r0, sp, #4
-    8afe:      	ldr	r1, [pc, #8] <$d.336+0x2>
-    8b00:      	bl	0x8bdc <core::fmt::write::hff185d7d684cc368> @ imm = #216
-    8b04:      	add	sp, #32
-    8b06:      	pop	{r4, r5, r7, pc}
-
-00008b08 <$d.336>:
-    8b08:	24 bb 00 00	.word	0x0000bb24
-
-00008b0c <<&mut W as core::fmt::Write>::write_str::h3fd67887be6af066>:
-    8b0c:      	push	{r7, lr}
-    8b0e:      	add	r7, sp, #0
-    8b10:      	ldr	r0, [r0]
-    8b12:      	bl	0x8620 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213> @ imm = #-1270
-    8b16:      	pop	{r7, pc}
-
-00008b18 <<&mut W as core::fmt::Write>::write_char::he2d9b8b9670e89e5>:
-    8b18:      	push	{r4, r6, r7, lr}
-    8b1a:      	add	r7, sp, #8
-    8b1c:      	sub	sp, #8
-    8b1e:      	ldr	r0, [r0]
-    8b20:      	movs	r2, #0
-    8b22:      	str	r2, [sp, #4]
-    8b24:      	cmp	r1, #128
-    8b26:      	bhs	0x8b38 <<&mut W as core::fmt::Write>::write_char::he2d9b8b9670e89e5+0x20> @ imm = #14
-    8b28:      	add	r2, sp, #4
-    8b2a:      	strb	r1, [r2]
-    8b2c:      	movs	r2, #1
-    8b2e:      	add	r1, sp, #4
-    8b30:      	bl	0x8620 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213> @ imm = #-1300
-    8b34:      	add	sp, #8
-    8b36:      	pop	{r4, r6, r7, pc}
-    8b38:      	lsrs	r2, r1, #11
-    8b3a:      	bne	0x8b5a <<&mut W as core::fmt::Write>::write_char::he2d9b8b9670e89e5+0x42> @ imm = #28
-    8b3c:      	movs	r2, #63
-    8b3e:      	ands	r2, r1
-    8b40:      	adds	r2, #128
-    8b42:      	add	r3, sp, #4
-    8b44:      	strb	r2, [r3, #1]
-    8b46:      	lsrs	r1, r1, #6
-    8b48:      	movs	r2, #192
-    8b4a:      	orrs	r2, r1
-    8b4c:      	strb	r2, [r3]
-    8b4e:      	movs	r2, #2
-    8b50:      	add	r1, sp, #4
-    8b52:      	bl	0x8620 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213> @ imm = #-1334
-    8b56:      	add	sp, #8
-    8b58:      	pop	{r4, r6, r7, pc}
-    8b5a:      	lsrs	r2, r1, #16
-    8b5c:      	bne	0x8b84 <<&mut W as core::fmt::Write>::write_char::he2d9b8b9670e89e5+0x6c> @ imm = #36
-    8b5e:      	movs	r2, #63
-    8b60:      	ands	r2, r1
-    8b62:      	adds	r2, #128
-    8b64:      	add	r3, sp, #4
-    8b66:      	strb	r2, [r3, #2]
-    8b68:      	lsrs	r2, r1, #12
-    8b6a:      	movs	r4, #224
-    8b6c:      	orrs	r4, r2
-    8b6e:      	strb	r4, [r3]
-    8b70:      	lsls	r1, r1, #20
-    8b72:      	lsrs	r1, r1, #26
-    8b74:      	adds	r1, #128
-    8b76:      	strb	r1, [r3, #1]
-    8b78:      	movs	r2, #3
-    8b7a:      	add	r1, sp, #4
-    8b7c:      	bl	0x8620 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213> @ imm = #-1376
-    8b80:      	add	sp, #8
-    8b82:      	pop	{r4, r6, r7, pc}
-    8b84:      	movs	r2, #63
-    8b86:      	ands	r2, r1
-    8b88:      	adds	r2, #128
-    8b8a:      	add	r3, sp, #4
-    8b8c:      	strb	r2, [r3, #3]
-    8b8e:      	lsrs	r2, r1, #18
-    8b90:      	movs	r4, #240
-    8b92:      	orrs	r4, r2
-    8b94:      	strb	r4, [r3]
-    8b96:      	lsls	r2, r1, #20
-    8b98:      	lsrs	r2, r2, #26
-    8b9a:      	adds	r2, #128
-    8b9c:      	strb	r2, [r3, #2]
-    8b9e:      	lsls	r1, r1, #14
-    8ba0:      	lsrs	r1, r1, #26
-    8ba2:      	adds	r1, #128
-    8ba4:      	strb	r1, [r3, #1]
-    8ba6:      	movs	r2, #4
-    8ba8:      	add	r1, sp, #4
-    8baa:      	bl	0x8620 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213> @ imm = #-1422
-    8bae:      	add	sp, #8
-    8bb0:      	pop	{r4, r6, r7, pc}
-    8bb2:      	bmi	0x8b5e <<&mut W as core::fmt::Write>::write_char::he2d9b8b9670e89e5+0x46> @ imm = #-88
-
-00008bb4 <<&mut W as core::fmt::Write>::write_fmt::h7a6edd189755017a>:
-    8bb4:      	push	{r4, r5, r7, lr}
-    8bb6:      	add	r7, sp, #8
-    8bb8:      	sub	sp, #32
-    8bba:      	ldr	r0, [r0]
-    8bbc:      	str	r0, [sp, #4]
-    8bbe:      	add	r2, sp, #8
-    8bc0:      	mov	r0, r2
-    8bc2:      	ldm	r1!, {r3, r4, r5}
-    8bc4:      	stm	r0!, {r3, r4, r5}
-    8bc6:      	ldm	r1!, {r3, r4, r5}
-    8bc8:      	stm	r0!, {r3, r4, r5}
-    8bca:      	add	r0, sp, #4
-    8bcc:      	ldr	r1, [pc, #8] <$d.340>
-    8bce:      	bl	0x8bdc <core::fmt::write::hff185d7d684cc368> @ imm = #10
-    8bd2:      	add	sp, #32
-    8bd4:      	pop	{r4, r5, r7, pc}
-    8bd6:      	mov	r8, r8
-
-00008bd8 <$d.340>:
-    8bd8:	24 bb 00 00	.word	0x0000bb24
-
-00008bdc <core::fmt::write::hff185d7d684cc368>:
-    8bdc:      	push	{r4, r5, r6, r7, lr}
-    8bde:      	add	r7, sp, #12
-    8be0:      	sub	sp, #68
-    8be2:      	movs	r4, #32
-    8be4:      	add	r5, sp, #32
-    8be6:      	movs	r3, #3
-    8be8:      	str	r5, [sp, #28]
-    8bea:      	strb	r3, [r5, r4]
-    8bec:      	str	r4, [sp, #36]
-    8bee:      	movs	r3, #0
-    8bf0:      	str	r3, [sp, #32]
-    8bf2:      	str	r1, [sp, #60]
-    8bf4:      	str	r0, [sp, #56]
-    8bf6:      	str	r3, [sp, #48]
-    8bf8:      	str	r3, [sp, #40]
-    8bfa:      	ldr	r5, [r2, #8]
-    8bfc:      	cmp	r5, #0
-    8bfe:      	beq	0x8cbc <core::fmt::write::hff185d7d684cc368+0xe0> @ imm = #186
-    8c00:      	ldr	r0, [r2, #12]
-    8c02:      	cmp	r0, #0
-    8c04:      	mov	r4, r3
-    8c06:      	beq	0x8d04 <core::fmt::write::hff185d7d684cc368+0x128> @ imm = #250
-    8c08:      	str	r3, [sp, #8]
-    8c0a:      	ldr	r1, [sp, #28]
-    8c0c:      	adds	r1, #32
-    8c0e:      	str	r1, [sp, #28]
-    8c10:      	str	r2, [sp, #24]
-    8c12:      	ldr	r4, [r2]
-    8c14:      	lsls	r0, r0, #5
-    8c16:      	str	r0, [sp, #16]
-    8c18:      	subs	r0, #32
-    8c1a:      	lsrs	r0, r0, #5
-    8c1c:      	adds	r0, r0, #1
-    8c1e:      	str	r0, [sp, #4]
-    8c20:      	movs	r6, #0
-    8c22:      	str	r5, [sp, #20]
-    8c24:      	ldr	r2, [r4, #4]
-    8c26:      	cmp	r2, #0
-    8c28:      	beq	0x8c38 <core::fmt::write::hff185d7d684cc368+0x5c> @ imm = #12
-    8c2a:      	ldr	r0, [sp, #60]
-    8c2c:      	ldr	r3, [r0, #12]
-    8c2e:      	ldr	r1, [r4]
-    8c30:      	ldr	r0, [sp, #56]
-    8c32:      	blx	r3
-    8c34:      	cmp	r0, #0
-    8c36:      	bne	0x8d2a <core::fmt::write::hff185d7d684cc368+0x14e> @ imm = #240
-    8c38:      	adds	r2, r5, r6
-    8c3a:      	ldrb	r0, [r2, #28]
-    8c3c:      	ldr	r1, [sp, #28]
-    8c3e:      	strb	r0, [r1]
-    8c40:      	ldr	r0, [r2, #4]
-    8c42:      	str	r0, [sp, #36]
-    8c44:      	ldr	r0, [r2, #8]
-    8c46:      	str	r0, [sp, #32]
-    8c48:      	ldr	r0, [r2, #20]
-    8c4a:      	ldr	r3, [r2, #24]
-    8c4c:      	ldr	r1, [sp, #24]
-    8c4e:      	ldr	r1, [r1, #16]
-    8c50:      	movs	r5, #0
-    8c52:      	cmp	r0, #0
-    8c54:      	beq	0x8c72 <core::fmt::write::hff185d7d684cc368+0x96> @ imm = #26
-    8c56:      	cmp	r0, #1
-    8c58:      	mov	r0, r5
-    8c5a:      	bne	0x8c74 <core::fmt::write::hff185d7d684cc368+0x98> @ imm = #22
-    8c5c:      	lsls	r0, r3, #3
-    8c5e:      	str	r0, [sp, #12]
-    8c60:      	adds	r0, r1, r0
-    8c62:      	ldr	r0, [r0, #4]
-    8c64:      	ldr	r3, [pc, #208] <$d.347>
-    8c66:      	cmp	r0, r3
-    8c68:      	mov	r0, r5
-    8c6a:      	bne	0x8c74 <core::fmt::write::hff185d7d684cc368+0x98> @ imm = #6
-    8c6c:      	ldr	r0, [sp, #12]
-    8c6e:      	ldr	r0, [r1, r0]
-    8c70:      	ldr	r3, [r0]
-    8c72:      	movs	r0, #1
-    8c74:      	str	r3, [sp, #44]
-    8c76:      	str	r0, [sp, #40]
-    8c78:      	ldr	r0, [r2, #12]
-    8c7a:      	ldr	r2, [r2, #16]
-    8c7c:      	cmp	r0, #0
-    8c7e:      	beq	0x8c94 <core::fmt::write::hff185d7d684cc368+0xb8> @ imm = #18
-    8c80:      	cmp	r0, #1
-    8c82:      	bne	0x8c98 <core::fmt::write::hff185d7d684cc368+0xbc> @ imm = #18
-    8c84:      	lsls	r0, r2, #3
-    8c86:      	adds	r2, r1, r0
-    8c88:      	ldr	r2, [r2, #4]
-    8c8a:      	ldr	r3, [pc, #172] <$d.347+0x2>
-    8c8c:      	cmp	r2, r3
-    8c8e:      	bne	0x8c98 <core::fmt::write::hff185d7d684cc368+0xbc> @ imm = #6
-    8c90:      	ldr	r0, [r1, r0]
-    8c92:      	ldr	r2, [r0]
-    8c94:      	movs	r5, #1
-    8c96:      	b	0x8c98 <core::fmt::write::hff185d7d684cc368+0xbc> @ imm = #-2
-    8c98:      	str	r2, [sp, #52]
-    8c9a:      	str	r5, [sp, #48]
-    8c9c:      	ldr	r5, [sp, #20]
-    8c9e:      	ldr	r0, [r5, r6]
-    8ca0:      	lsls	r2, r0, #3
-    8ca2:      	ldr	r0, [r1, r2]
-    8ca4:      	adds	r1, r1, r2
-    8ca6:      	ldr	r2, [r1, #4]
-    8ca8:      	add	r1, sp, #32
-    8caa:      	blx	r2
-    8cac:      	cmp	r0, #0
-    8cae:      	bne	0x8d2a <core::fmt::write::hff185d7d684cc368+0x14e> @ imm = #120
-    8cb0:      	adds	r6, #32
-    8cb2:      	adds	r4, #8
-    8cb4:      	ldr	r0, [sp, #16]
-    8cb6:      	cmp	r0, r6
-    8cb8:      	bne	0x8c24 <core::fmt::write::hff185d7d684cc368+0x48> @ imm = #-152
-    8cba:      	b	0x8cfe <core::fmt::write::hff185d7d684cc368+0x122> @ imm = #64
-    8cbc:      	ldr	r0, [r2, #20]
-    8cbe:      	cmp	r0, #0
-    8cc0:      	mov	r4, r3
-    8cc2:      	beq	0x8d04 <core::fmt::write::hff185d7d684cc368+0x128> @ imm = #62
-    8cc4:      	str	r3, [sp, #8]
-    8cc6:      	ldr	r4, [r2]
-    8cc8:      	str	r2, [sp, #24]
-    8cca:      	ldr	r5, [r2, #16]
-    8ccc:      	lsls	r0, r0, #3
-    8cce:      	subs	r0, #8
-    8cd0:      	lsrs	r0, r0, #3
-    8cd2:      	adds	r6, r0, #1
-    8cd4:      	str	r6, [sp, #4]
-    8cd6:      	ldr	r2, [r4, #4]
-    8cd8:      	cmp	r2, #0
-    8cda:      	beq	0x8cea <core::fmt::write::hff185d7d684cc368+0x10e> @ imm = #12
-    8cdc:      	ldr	r0, [sp, #60]
-    8cde:      	ldr	r3, [r0, #12]
-    8ce0:      	ldr	r1, [r4]
-    8ce2:      	ldr	r0, [sp, #56]
-    8ce4:      	blx	r3
-    8ce6:      	cmp	r0, #0
-    8ce8:      	bne	0x8d2a <core::fmt::write::hff185d7d684cc368+0x14e> @ imm = #62
-    8cea:      	ldm	r5!, {r0, r2}
-    8cec:      	add	r1, sp, #32
-    8cee:      	subs	r5, #8
-    8cf0:      	blx	r2
-    8cf2:      	cmp	r0, #0
-    8cf4:      	bne	0x8d2a <core::fmt::write::hff185d7d684cc368+0x14e> @ imm = #50
-    8cf6:      	adds	r5, #8
-    8cf8:      	adds	r4, #8
-    8cfa:      	subs	r6, r6, #1
-    8cfc:      	bne	0x8cd6 <core::fmt::write::hff185d7d684cc368+0xfa> @ imm = #-42
-    8cfe:      	ldr	r3, [sp, #8]
-    8d00:      	ldr	r2, [sp, #24]
-    8d02:      	ldr	r4, [sp, #4]
-    8d04:      	ldr	r0, [r2, #4]
-    8d06:      	cmp	r4, r0
-    8d08:      	blo	0x8d12 <core::fmt::write::hff185d7d684cc368+0x136> @ imm = #6
-    8d0a:      	mov	r2, r3
-    8d0c:      	cmp	r4, r0
-    8d0e:      	blo	0x8d1c <core::fmt::write::hff185d7d684cc368+0x140> @ imm = #10
-    8d10:      	b	0x8d30 <core::fmt::write::hff185d7d684cc368+0x154> @ imm = #28
-    8d12:      	lsls	r1, r4, #3
-    8d14:      	ldr	r2, [r2]
-    8d16:      	adds	r2, r2, r1
-    8d18:      	cmp	r4, r0
-    8d1a:      	bhs	0x8d30 <core::fmt::write::hff185d7d684cc368+0x154> @ imm = #18
-    8d1c:      	ldr	r0, [sp, #60]
-    8d1e:      	ldr	r3, [r0, #12]
-    8d20:      	ldm	r2, {r1, r2}
-    8d22:      	ldr	r0, [sp, #56]
-    8d24:      	blx	r3
-    8d26:      	cmp	r0, #0
-    8d28:      	beq	0x8d30 <core::fmt::write::hff185d7d684cc368+0x154> @ imm = #4
-    8d2a:      	movs	r0, #1
-    8d2c:      	add	sp, #68
-    8d2e:      	pop	{r4, r5, r6, r7, pc}
-    8d30:      	movs	r0, #0
-    8d32:      	add	sp, #68
-    8d34:      	pop	{r4, r5, r6, r7, pc}
-    8d36:      	mov	r8, r8
-
-00008d38 <$d.347>:
-    8d38:	cd 83 00 00	.word	0x000083cd
-
-00008d3c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a>:
-    8d3c:      	push	{r4, r5, r6, r7, lr}
-    8d3e:      	add	r7, sp, #12
-    8d40:      	sub	sp, #44
-    8d42:      	str	r3, [sp, #32]
-    8d44:      	str	r2, [sp, #36]
-    8d46:      	mov	r4, r0
-    8d48:      	ldr	r5, [r7, #12]
-    8d4a:      	cmp	r1, #0
-    8d4c:      	beq	0x8d5a <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x1e> @ imm = #10
-    8d4e:      	ldr	r3, [r4]
-    8d50:      	movs	r0, #1
-    8d52:      	ands	r0, r3
-    8d54:      	beq	0x8d8c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x50> @ imm = #52
-    8d56:      	movs	r1, #43
-    8d58:      	b	0x8d90 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x54> @ imm = #52
-    8d5a:      	ldr	r3, [r4]
-    8d5c:      	adds	r2, r5, #1
-    8d5e:      	movs	r0, #45
-    8d60:      	str	r0, [sp, #28]
-    8d62:      	lsls	r1, r3, #29
-    8d64:      	movs	r0, #0
-    8d66:      	cmp	r1, #0
-    8d68:      	bpl	0x8d9c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x60> @ imm = #48
-    8d6a:      	ldr	r1, [sp, #32]
-    8d6c:      	cmp	r1, #0
-    8d6e:      	str	r3, [sp, #16]
-    8d70:      	beq	0x8dc6 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x8a> @ imm = #82
-    8d72:      	movs	r6, #3
-    8d74:      	mov	r0, r1
-    8d76:      	ands	r0, r6
-    8d78:      	str	r0, [sp, #12]
-    8d7a:      	subs	r0, r1, #1
-    8d7c:      	cmp	r0, #3
-    8d7e:      	bhs	0x8dca <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x8e> @ imm = #72
-    8d80:      	movs	r1, #0
-    8d82:      	ldr	r3, [sp, #36]
-    8d84:      	ldr	r0, [sp, #12]
-    8d86:      	cmp	r0, #0
-    8d88:      	bne	0x8e38 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xfc> @ imm = #172
-    8d8a:      	b	0x8e6a <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x12e> @ imm = #220
-    8d8c:      	movs	r1, #17
-    8d8e:      	lsls	r1, r1, #16
-    8d90:      	str	r1, [sp, #28]
-    8d92:      	adds	r2, r0, r5
-    8d94:      	lsls	r1, r3, #29
-    8d96:      	movs	r0, #0
-    8d98:      	cmp	r1, #0
-    8d9a:      	bmi	0x8d6a <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x2e> @ imm = #-52
-    8d9c:      	str	r0, [sp, #36]
-    8d9e:      	mov	r1, r0
-    8da0:      	ldr	r6, [r7, #8]
-    8da2:      	ldr	r0, [r4, #8]
-    8da4:      	cmp	r0, #1
-    8da6:      	beq	0x8e78 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x13c> @ imm = #206
-    8da8:      	mov	r0, r4
-    8daa:      	mov	r3, r1
-    8dac:      	ldr	r1, [sp, #28]
-    8dae:      	ldr	r2, [sp, #36]
-    8db0:      	bl	0x9058 <core::fmt::Formatter::pad_integral::write_prefix::hdb27e999f5442c06> @ imm = #676
-    8db4:      	cmp	r0, #0
-    8db6:      	beq	0x8dba <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x7e> @ imm = #0
-    8db8:      	b	0x8f42 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x206> @ imm = #390
-    8dba:      	ldr	r0, [r4, #24]
-    8dbc:      	ldr	r1, [r4, #28]
-    8dbe:      	ldr	r3, [r1, #12]
-    8dc0:      	mov	r1, r6
-    8dc2:      	mov	r2, r5
-    8dc4:      	b	0x8ec2 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x186> @ imm = #250
-    8dc6:      	movs	r1, #0
-    8dc8:      	b	0x8e6a <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x12e> @ imm = #158
-    8dca:      	str	r2, [sp, #8]
-    8dcc:      	str	r5, [sp, #20]
-    8dce:      	str	r4, [sp, #24]
-    8dd0:      	mov	r0, r1
-    8dd2:      	bics	r0, r6
-    8dd4:      	rsbs	r5, r0, #0
-    8dd6:      	movs	r1, #0
-    8dd8:      	str	r1, [sp, #40]
-    8dda:      	ldr	r3, [sp, #36]
-    8ddc:      	b	0x8de4 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xa8> @ imm = #4
-    8dde:      	adds	r3, r3, #4
-    8de0:      	adds	r5, r5, #4
-    8de2:      	beq	0x8e2c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xf0> @ imm = #70
-    8de4:      	mov	r2, r6
-    8de6:      	movs	r4, #1
-    8de8:      	ldr	r0, [sp, #40]
-    8dea:      	ldrsb	r6, [r3, r0]
-    8dec:      	movs	r0, #64
-    8dee:      	mvns	r0, r0
-    8df0:      	cmp	r6, r0
-    8df2:      	bgt	0x8e0c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xd0> @ imm = #22
-    8df4:      	ldrsb	r4, [r3, r4]
-    8df6:      	cmp	r4, r0
-    8df8:      	mov	r6, r2
-    8dfa:      	bgt	0x8e16 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xda> @ imm = #24
-    8dfc:      	movs	r4, #2
-    8dfe:      	ldrsb	r4, [r3, r4]
-    8e00:      	cmp	r4, r0
-    8e02:      	bgt	0x8e20 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xe4> @ imm = #26
-    8e04:      	ldrsb	r4, [r3, r6]
-    8e06:      	cmp	r4, r0
-    8e08:      	ble	0x8dde <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xa2> @ imm = #-46
-    8e0a:      	b	0x8e28 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xec> @ imm = #26
-    8e0c:      	adds	r1, r1, #1
-    8e0e:      	ldrsb	r4, [r3, r4]
-    8e10:      	cmp	r4, r0
-    8e12:      	mov	r6, r2
-    8e14:      	ble	0x8dfc <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xc0> @ imm = #-28
-    8e16:      	adds	r1, r1, #1
-    8e18:      	movs	r4, #2
-    8e1a:      	ldrsb	r4, [r3, r4]
-    8e1c:      	cmp	r4, r0
-    8e1e:      	ble	0x8e04 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xc8> @ imm = #-30
-    8e20:      	adds	r1, r1, #1
-    8e22:      	ldrsb	r4, [r3, r6]
-    8e24:      	cmp	r4, r0
-    8e26:      	ble	0x8dde <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xa2> @ imm = #-76
-    8e28:      	adds	r1, r1, #1
-    8e2a:      	b	0x8dde <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xa2> @ imm = #-80
-    8e2c:      	ldr	r4, [sp, #24]
-    8e2e:      	ldr	r5, [sp, #20]
-    8e30:      	ldr	r2, [sp, #8]
-    8e32:      	ldr	r0, [sp, #12]
-    8e34:      	cmp	r0, #0
-    8e36:      	beq	0x8e6a <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x12e> @ imm = #48
-    8e38:      	mov	r6, r2
-    8e3a:      	movs	r0, #0
-    8e3c:      	ldrsb	r2, [r3, r0]
-    8e3e:      	movs	r0, #64
-    8e40:      	mvns	r0, r0
-    8e42:      	cmp	r2, r0
-    8e44:      	ble	0x8e48 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x10c> @ imm = #0
-    8e46:      	adds	r1, r1, #1
-    8e48:      	ldr	r2, [sp, #12]
-    8e4a:      	cmp	r2, #1
-    8e4c:      	beq	0x8e68 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x12c> @ imm = #24
-    8e4e:      	movs	r2, #1
-    8e50:      	ldrsb	r2, [r3, r2]
-    8e52:      	cmp	r2, r0
-    8e54:      	ble	0x8e58 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x11c> @ imm = #0
-    8e56:      	adds	r1, r1, #1
-    8e58:      	ldr	r2, [sp, #12]
-    8e5a:      	cmp	r2, #2
-    8e5c:      	beq	0x8e68 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x12c> @ imm = #8
-    8e5e:      	movs	r2, #2
-    8e60:      	ldrsb	r2, [r3, r2]
-    8e62:      	cmp	r2, r0
-    8e64:      	ble	0x8e68 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x12c> @ imm = #0
-    8e66:      	adds	r1, r1, #1
-    8e68:      	mov	r2, r6
-    8e6a:      	adds	r2, r1, r2
-    8e6c:      	ldr	r1, [sp, #32]
-    8e6e:      	ldr	r3, [sp, #16]
-    8e70:      	ldr	r6, [r7, #8]
-    8e72:      	ldr	r0, [r4, #8]
-    8e74:      	cmp	r0, #1
-    8e76:      	bne	0x8da8 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x6c> @ imm = #-210
-    8e78:      	str	r5, [sp, #20]
-    8e7a:      	ldr	r5, [r4, #12]
-    8e7c:      	cmp	r5, r2
-    8e7e:      	bls	0x8ea8 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x16c> @ imm = #38
-    8e80:      	str	r1, [sp, #32]
-    8e82:      	str	r4, [sp, #24]
-    8e84:      	lsls	r0, r3, #28
-    8e86:      	str	r6, [sp, #12]
-    8e88:      	bmi	0x8ecc <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x190> @ imm = #64
-    8e8a:      	movs	r0, #32
-    8e8c:      	ldr	r1, [sp, #24]
-    8e8e:      	ldrb	r1, [r1, r0]
-    8e90:      	cmp	r1, #3
-    8e92:      	bne	0x8e96 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x15a> @ imm = #0
-    8e94:      	movs	r1, #1
-    8e96:      	subs	r0, r5, r2
-    8e98:      	lsls	r2, r1, #30
-    8e9a:      	beq	0x8f1a <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x1de> @ imm = #124
-    8e9c:      	cmp	r1, #1
-    8e9e:      	bne	0x8f1e <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x1e2> @ imm = #124
-    8ea0:      	movs	r1, #0
-    8ea2:      	str	r1, [sp, #8]
-    8ea4:      	mov	r1, r0
-    8ea6:      	b	0x8f26 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x1ea> @ imm = #124
-    8ea8:      	mov	r0, r4
-    8eaa:      	mov	r3, r1
-    8eac:      	ldr	r1, [sp, #28]
-    8eae:      	ldr	r2, [sp, #36]
-    8eb0:      	bl	0x9058 <core::fmt::Formatter::pad_integral::write_prefix::hdb27e999f5442c06> @ imm = #420
-    8eb4:      	cmp	r0, #0
-    8eb6:      	bne	0x8f42 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x206> @ imm = #136
-    8eb8:      	ldr	r0, [r4, #24]
-    8eba:      	ldr	r1, [r4, #28]
-    8ebc:      	ldr	r3, [r1, #12]
-    8ebe:      	mov	r1, r6
-    8ec0:      	ldr	r2, [sp, #20]
-    8ec2:      	blx	r3
-    8ec4:      	mov	r2, r0
-    8ec6:      	mov	r0, r2
-    8ec8:      	add	sp, #44
-    8eca:      	pop	{r4, r5, r6, r7, pc}
-    8ecc:      	mov	r6, r2
-    8ece:      	movs	r0, #32
-    8ed0:      	ldr	r4, [sp, #24]
-    8ed2:      	ldrb	r1, [r4, r0]
-    8ed4:      	str	r1, [sp, #8]
-    8ed6:      	movs	r1, #1
-    8ed8:      	str	r1, [sp, #16]
-    8eda:      	strb	r1, [r4, r0]
-    8edc:      	ldr	r0, [r4, #4]
-    8ede:      	str	r0, [sp, #4]
-    8ee0:      	movs	r0, #48
-    8ee2:      	str	r0, [r4, #4]
-    8ee4:      	mov	r0, r4
-    8ee6:      	ldr	r1, [sp, #28]
-    8ee8:      	ldr	r2, [sp, #36]
-    8eea:      	ldr	r3, [sp, #32]
-    8eec:      	bl	0x9058 <core::fmt::Formatter::pad_integral::write_prefix::hdb27e999f5442c06> @ imm = #360
-    8ef0:      	cmp	r0, #0
-    8ef2:      	beq	0x8efc <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x1c0> @ imm = #6
-    8ef4:      	ldr	r2, [sp, #16]
-    8ef6:      	mov	r0, r2
-    8ef8:      	add	sp, #44
-    8efa:      	pop	{r4, r5, r6, r7, pc}
-    8efc:      	adds	r4, #32
-    8efe:      	ldrb	r1, [r4]
-    8f00:      	cmp	r1, #3
-    8f02:      	bne	0x8f06 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x1ca> @ imm = #0
-    8f04:      	movs	r1, #1
-    8f06:      	subs	r0, r5, r6
-    8f08:      	lsls	r2, r1, #30
-    8f0a:      	str	r4, [sp, #28]
-    8f0c:      	beq	0x8f80 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x244> @ imm = #112
-    8f0e:      	cmp	r1, #1
-    8f10:      	bne	0x8f84 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x248> @ imm = #112
-    8f12:      	movs	r1, #0
-    8f14:      	str	r1, [sp, #36]
-    8f16:      	mov	r1, r0
-    8f18:      	b	0x8f8c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x250> @ imm = #112
-    8f1a:      	movs	r1, #0
-    8f1c:      	b	0x8f24 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x1e8> @ imm = #4
-    8f1e:      	lsrs	r1, r0, #1
-    8f20:      	adds	r0, r0, #1
-    8f22:      	lsrs	r0, r0, #1
-    8f24:      	str	r0, [sp, #8]
-    8f26:      	ldr	r0, [sp, #24]
-    8f28:      	adds	r4, r1, #1
-    8f2a:      	ldr	r1, [r0, #4]
-    8f2c:      	str	r1, [sp, #40]
-    8f2e:      	ldr	r6, [r0, #24]
-    8f30:      	ldr	r5, [r0, #28]
-    8f32:      	subs	r4, r4, #1
-    8f34:      	beq	0x8f4a <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x20e> @ imm = #18
-    8f36:      	ldr	r2, [r5, #16]
-    8f38:      	mov	r0, r6
-    8f3a:      	ldr	r1, [sp, #40]
-    8f3c:      	blx	r2
-    8f3e:      	cmp	r0, #0
-    8f40:      	beq	0x8f32 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x1f6> @ imm = #-18
-    8f42:      	movs	r2, #1
-    8f44:      	mov	r0, r2
-    8f46:      	add	sp, #44
-    8f48:      	pop	{r4, r5, r6, r7, pc}
-    8f4a:      	movs	r0, #17
-    8f4c:      	lsls	r0, r0, #16
-    8f4e:      	ldr	r1, [sp, #40]
-    8f50:      	cmp	r1, r0
-    8f52:      	bne	0x8f58 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x21c> @ imm = #2
-    8f54:      	movs	r1, #0
-    8f56:      	str	r1, [sp, #8]
-    8f58:      	ldr	r4, [sp, #24]
-    8f5a:      	ldr	r5, [sp, #20]
-    8f5c:      	ldr	r6, [sp, #12]
-    8f5e:      	movs	r2, #1
-    8f60:      	ldr	r1, [sp, #40]
-    8f62:      	cmp	r1, r0
-    8f64:      	beq	0x8ec6 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x18a> @ imm = #-162
-    8f66:      	str	r2, [sp, #16]
-    8f68:      	mov	r0, r4
-    8f6a:      	ldr	r1, [sp, #28]
-    8f6c:      	ldr	r2, [sp, #36]
-    8f6e:      	ldr	r3, [sp, #32]
-    8f70:      	bl	0x9058 <core::fmt::Formatter::pad_integral::write_prefix::hdb27e999f5442c06> @ imm = #228
-    8f74:      	cmp	r0, #0
-    8f76:      	beq	0x8fe0 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x2a4> @ imm = #102
-    8f78:      	ldr	r2, [sp, #16]
-    8f7a:      	mov	r0, r2
-    8f7c:      	add	sp, #44
-    8f7e:      	pop	{r4, r5, r6, r7, pc}
-    8f80:      	movs	r1, #0
-    8f82:      	b	0x8f8a <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x24e> @ imm = #4
-    8f84:      	lsrs	r1, r0, #1
-    8f86:      	adds	r0, r0, #1
-    8f88:      	lsrs	r0, r0, #1
-    8f8a:      	str	r0, [sp, #36]
-    8f8c:      	ldr	r0, [sp, #24]
-    8f8e:      	adds	r4, r1, #1
-    8f90:      	ldr	r1, [r0, #4]
-    8f92:      	str	r1, [sp, #40]
-    8f94:      	ldr	r6, [r0, #24]
-    8f96:      	ldr	r5, [r0, #28]
-    8f98:      	subs	r4, r4, #1
-    8f9a:      	beq	0x8fb0 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x274> @ imm = #18
-    8f9c:      	ldr	r2, [r5, #16]
-    8f9e:      	mov	r0, r6
-    8fa0:      	ldr	r1, [sp, #40]
-    8fa2:      	blx	r2
-    8fa4:      	cmp	r0, #0
-    8fa6:      	beq	0x8f98 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x25c> @ imm = #-18
-    8fa8:      	ldr	r2, [sp, #16]
-    8faa:      	mov	r0, r2
-    8fac:      	add	sp, #44
-    8fae:      	pop	{r4, r5, r6, r7, pc}
-    8fb0:      	movs	r0, #17
-    8fb2:      	lsls	r0, r0, #16
-    8fb4:      	ldr	r3, [sp, #40]
-    8fb6:      	cmp	r3, r0
-    8fb8:      	bne	0x8fbe <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x282> @ imm = #2
-    8fba:      	movs	r1, #0
-    8fbc:      	str	r1, [sp, #36]
-    8fbe:      	ldr	r5, [sp, #24]
-    8fc0:      	ldr	r1, [sp, #12]
-    8fc2:      	ldr	r2, [sp, #16]
-    8fc4:      	cmp	r3, r0
-    8fc6:      	bne	0x8fca <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x28e> @ imm = #0
-    8fc8:      	b	0x8ec6 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x18a> @ imm = #-262
-    8fca:      	ldr	r0, [r5, #24]
-    8fcc:      	ldr	r2, [r5, #28]
-    8fce:      	ldr	r3, [r2, #12]
-    8fd0:      	ldr	r2, [sp, #20]
-    8fd2:      	blx	r3
-    8fd4:      	cmp	r0, #0
-    8fd6:      	beq	0x9014 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x2d8> @ imm = #58
-    8fd8:      	ldr	r2, [sp, #16]
-    8fda:      	mov	r0, r2
-    8fdc:      	add	sp, #44
-    8fde:      	pop	{r4, r5, r6, r7, pc}
-    8fe0:      	ldr	r0, [r4, #24]
-    8fe2:      	ldr	r1, [r4, #28]
-    8fe4:      	ldr	r3, [r1, #12]
-    8fe6:      	mov	r1, r6
-    8fe8:      	mov	r2, r5
-    8fea:      	blx	r3
-    8fec:      	cmp	r0, #0
-    8fee:      	ldr	r2, [sp, #16]
-    8ff0:      	beq	0x8ff4 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x2b8> @ imm = #0
-    8ff2:      	b	0x8ec6 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x18a> @ imm = #-304
-    8ff4:      	ldr	r0, [r4, #24]
-    8ff6:      	str	r0, [sp, #36]
-    8ff8:      	ldr	r6, [r4, #28]
-    8ffa:      	movs	r4, #0
-    8ffc:      	ldr	r5, [sp, #8]
-    8ffe:      	cmp	r5, r4
-    9000:      	beq	0x9048 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x30c> @ imm = #68
-    9002:      	ldr	r2, [r6, #16]
-    9004:      	ldr	r0, [sp, #36]
-    9006:      	ldr	r1, [sp, #40]
-    9008:      	blx	r2
-    900a:      	adds	r4, r4, #1
-    900c:      	cmp	r0, #0
-    900e:      	beq	0x8ffe <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x2c2> @ imm = #-20
-    9010:      	subs	r0, r4, #1
-    9012:      	b	0x904a <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x30e> @ imm = #52
-    9014:      	ldr	r0, [r5, #24]
-    9016:      	str	r0, [sp, #32]
-    9018:      	ldr	r6, [r5, #28]
-    901a:      	movs	r4, #0
-    901c:      	ldr	r0, [sp, #36]
-    901e:      	cmp	r0, r4
-    9020:      	beq	0x903c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x300> @ imm = #24
-    9022:      	ldr	r2, [r6, #16]
-    9024:      	ldr	r0, [sp, #32]
-    9026:      	ldr	r1, [sp, #40]
-    9028:      	blx	r2
-    902a:      	ldr	r2, [sp, #16]
-    902c:      	adds	r4, r4, #1
-    902e:      	cmp	r0, #0
-    9030:      	beq	0x901c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x2e0> @ imm = #-24
-    9032:      	subs	r0, r4, #1
-    9034:      	ldr	r1, [sp, #36]
-    9036:      	cmp	r0, r1
-    9038:      	bhs	0x903c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x300> @ imm = #0
-    903a:      	b	0x8ec6 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x18a> @ imm = #-376
-    903c:      	ldr	r0, [sp, #8]
-    903e:      	ldr	r1, [sp, #28]
-    9040:      	strb	r0, [r1]
-    9042:      	ldr	r0, [sp, #4]
-    9044:      	str	r0, [r5, #4]
-    9046:      	b	0x9050 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x314> @ imm = #6
-    9048:      	mov	r0, r5
-    904a:      	cmp	r0, r5
-    904c:      	bhs	0x9050 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x314> @ imm = #0
-    904e:      	b	0x8f42 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x206> @ imm = #-272
-    9050:      	movs	r2, #0
-    9052:      	mov	r0, r2
-    9054:      	add	sp, #44
-    9056:      	pop	{r4, r5, r6, r7, pc}
-
-00009058 <core::fmt::Formatter::pad_integral::write_prefix::hdb27e999f5442c06>:
-    9058:      	push	{r4, r5, r6, r7, lr}
-    905a:      	add	r7, sp, #12
-    905c:      	sub	sp, #4
-    905e:      	mov	r4, r3
-    9060:      	mov	r5, r2
-    9062:      	mov	r6, r0
-    9064:      	movs	r0, #17
-    9066:      	lsls	r0, r0, #16
-    9068:      	cmp	r1, r0
-    906a:      	beq	0x907e <core::fmt::Formatter::pad_integral::write_prefix::hdb27e999f5442c06+0x26> @ imm = #16
-    906c:      	ldr	r0, [r6, #24]
-    906e:      	ldr	r2, [r6, #28]
-    9070:      	ldr	r2, [r2, #16]
-    9072:      	blx	r2
-    9074:      	cmp	r0, #0
-    9076:      	beq	0x907e <core::fmt::Formatter::pad_integral::write_prefix::hdb27e999f5442c06+0x26> @ imm = #4
-    9078:      	movs	r0, #1
-    907a:      	add	sp, #4
-    907c:      	pop	{r4, r5, r6, r7, pc}
-    907e:      	cmp	r5, #0
-    9080:      	beq	0x9092 <core::fmt::Formatter::pad_integral::write_prefix::hdb27e999f5442c06+0x3a> @ imm = #14
-    9082:      	ldr	r0, [r6, #24]
-    9084:      	ldr	r1, [r6, #28]
-    9086:      	ldr	r3, [r1, #12]
-    9088:      	mov	r1, r5
-    908a:      	mov	r2, r4
-    908c:      	blx	r3
-    908e:      	add	sp, #4
-    9090:      	pop	{r4, r5, r6, r7, pc}
-    9092:      	movs	r0, #0
-    9094:      	add	sp, #4
-    9096:      	pop	{r4, r5, r6, r7, pc}
-
-00009098 <core::fmt::Formatter::pad::haa777c0a9492680f>:
-    9098:      	push	{r4, r5, r6, r7, lr}
-    909a:      	add	r7, sp, #12
-    909c:      	sub	sp, #44
-    909e:      	mov	r3, r0
-    90a0:      	ldr	r0, [r0, #16]
-    90a2:      	ldr	r4, [r3, #8]
-    90a4:      	cmp	r4, #1
-    90a6:      	str	r3, [sp, #36]
-    90a8:      	bne	0x90b0 <core::fmt::Formatter::pad::haa777c0a9492680f+0x18> @ imm = #4
-    90aa:      	cmp	r0, #1
-    90ac:      	beq	0x90b6 <core::fmt::Formatter::pad::haa777c0a9492680f+0x1e> @ imm = #6
-    90ae:      	b	0x920e <core::fmt::Formatter::pad::haa777c0a9492680f+0x176> @ imm = #348
-    90b0:      	cmp	r0, #1
-    90b2:      	beq	0x90b6 <core::fmt::Formatter::pad::haa777c0a9492680f+0x1e> @ imm = #0
-    90b4:      	b	0x9304 <core::fmt::Formatter::pad::haa777c0a9492680f+0x26c> @ imm = #588
-    90b6:      	str	r4, [sp, #16]
-    90b8:      	str	r2, [sp, #32]
-    90ba:      	adds	r0, r1, r2
-    90bc:      	mov	r5, r1
-    90be:      	ldr	r4, [r3, #20]
-    90c0:      	cmp	r4, #0
-    90c2:      	str	r1, [sp, #28]
-    90c4:      	beq	0x9168 <core::fmt::Formatter::pad::haa777c0a9492680f+0xd0> @ imm = #160
-    90c6:      	movs	r1, #17
-    90c8:      	lsls	r1, r1, #16
-    90ca:      	str	r1, [sp, #12]
-    90cc:      	movs	r1, #7
-    90ce:      	str	r0, [sp, #40]
-    90d0:      	lsls	r0, r1, #18
-    90d2:      	str	r0, [sp, #8]
-    90d4:      	ldr	r0, [sp, #40]
-    90d6:      	movs	r2, #0
-    90d8:      	b	0x9110 <core::fmt::Formatter::pad::haa777c0a9492680f+0x78> @ imm = #52
-    90da:      	ldrb	r0, [r5]
-    90dc:      	str	r0, [sp, #20]
-    90de:      	movs	r0, #63
-    90e0:      	str	r2, [sp, #4]
-    90e2:      	ldr	r2, [sp, #20]
-    90e4:      	ands	r0, r2
-    90e6:      	ldr	r2, [sp, #4]
-    90e8:      	str	r0, [sp, #20]
-    90ea:      	adds	r5, r5, #1
-    90ec:      	lsls	r6, r6, #18
-    90ee:      	ldr	r0, [sp, #8]
-    90f0:      	ands	r6, r0
-    90f2:      	lsls	r1, r1, #12
-    90f4:      	adds	r1, r1, r6
-    90f6:      	ldr	r0, [sp, #24]
-    90f8:      	lsls	r6, r0, #6
-    90fa:      	adds	r1, r1, r6
-    90fc:      	ldr	r0, [sp, #20]
-    90fe:      	adds	r1, r1, r0
-    9100:      	ldr	r6, [sp, #12]
-    9102:      	cmp	r1, r6
-    9104:      	ldr	r0, [sp, #40]
-    9106:      	beq	0x91c8 <core::fmt::Formatter::pad::haa777c0a9492680f+0x130> @ imm = #190
-    9108:      	subs	r1, r2, r3
-    910a:      	adds	r2, r1, r5
-    910c:      	subs	r4, r4, #1
-    910e:      	beq	0x916a <core::fmt::Formatter::pad::haa777c0a9492680f+0xd2> @ imm = #88
-    9110:      	cmp	r5, r0
-    9112:      	beq	0x91c8 <core::fmt::Formatter::pad::haa777c0a9492680f+0x130> @ imm = #178
-    9114:      	mov	r3, r5
-    9116:      	movs	r1, #0
-    9118:      	ldrsb	r6, [r5, r1]
-    911a:      	adds	r5, r5, #1
-    911c:      	cmp	r6, #0
-    911e:      	bpl	0x9108 <core::fmt::Formatter::pad::haa777c0a9492680f+0x70> @ imm = #-26
-    9120:      	cmp	r5, r0
-    9122:      	mov	r5, r0
-    9124:      	beq	0x912e <core::fmt::Formatter::pad::haa777c0a9492680f+0x96> @ imm = #6
-    9126:      	ldrb	r5, [r3, #1]
-    9128:      	movs	r1, #63
-    912a:      	ands	r1, r5
-    912c:      	adds	r5, r3, #2
-    912e:      	uxtb	r6, r6
-    9130:      	cmp	r6, #224
-    9132:      	blo	0x9108 <core::fmt::Formatter::pad::haa777c0a9492680f+0x70> @ imm = #-46
-    9134:      	cmp	r5, r0
-    9136:      	beq	0x9152 <core::fmt::Formatter::pad::haa777c0a9492680f+0xba> @ imm = #24
-    9138:      	ldrb	r0, [r5]
-    913a:      	str	r0, [sp, #24]
-    913c:      	str	r6, [sp, #20]
-    913e:      	movs	r6, #63
-    9140:      	ldr	r0, [sp, #24]
-    9142:      	ands	r6, r0
-    9144:      	ldr	r0, [sp, #40]
-    9146:      	str	r6, [sp, #24]
-    9148:      	ldr	r6, [sp, #20]
-    914a:      	adds	r5, r5, #1
-    914c:      	cmp	r6, #240
-    914e:      	blo	0x9108 <core::fmt::Formatter::pad::haa777c0a9492680f+0x70> @ imm = #-74
-    9150:      	b	0x915c <core::fmt::Formatter::pad::haa777c0a9492680f+0xc4> @ imm = #8
-    9152:      	movs	r5, #0
-    9154:      	str	r5, [sp, #24]
-    9156:      	mov	r5, r0
-    9158:      	cmp	r6, #240
-    915a:      	blo	0x9108 <core::fmt::Formatter::pad::haa777c0a9492680f+0x70> @ imm = #-86
-    915c:      	cmp	r5, r0
-    915e:      	bne	0x90da <core::fmt::Formatter::pad::haa777c0a9492680f+0x42> @ imm = #-136
-    9160:      	movs	r5, #0
-    9162:      	str	r5, [sp, #20]
-    9164:      	mov	r5, r0
-    9166:      	b	0x90ec <core::fmt::Formatter::pad::haa777c0a9492680f+0x54> @ imm = #-126
-    9168:      	movs	r2, #0
-    916a:      	cmp	r5, r0
-    916c:      	beq	0x91c8 <core::fmt::Formatter::pad::haa777c0a9492680f+0x130> @ imm = #88
-    916e:      	movs	r3, #0
-    9170:      	ldrsb	r1, [r5, r3]
-    9172:      	cmp	r1, #0
-    9174:      	bpl	0x91d4 <core::fmt::Formatter::pad::haa777c0a9492680f+0x13c> @ imm = #92
-    9176:      	uxtb	r1, r1
-    9178:      	adds	r4, r5, #1
-    917a:      	cmp	r4, r0
-    917c:      	mov	r6, r0
-    917e:      	beq	0x9188 <core::fmt::Formatter::pad::haa777c0a9492680f+0xf0> @ imm = #6
-    9180:      	adds	r6, r5, #2
-    9182:      	ldrb	r3, [r5, #1]
-    9184:      	lsls	r3, r3, #26
-    9186:      	lsrs	r3, r3, #20
-    9188:      	cmp	r1, #224
-    918a:      	blo	0x91d4 <core::fmt::Formatter::pad::haa777c0a9492680f+0x13c> @ imm = #70
-    918c:      	cmp	r6, r0
-    918e:      	beq	0x919e <core::fmt::Formatter::pad::haa777c0a9492680f+0x106> @ imm = #12
-    9190:      	ldrb	r5, [r6]
-    9192:      	movs	r4, #63
-    9194:      	ands	r4, r5
-    9196:      	adds	r5, r6, #1
-    9198:      	cmp	r1, #240
-    919a:      	bhs	0x91a6 <core::fmt::Formatter::pad::haa777c0a9492680f+0x10e> @ imm = #8
-    919c:      	b	0x91d4 <core::fmt::Formatter::pad::haa777c0a9492680f+0x13c> @ imm = #52
-    919e:      	movs	r4, #0
-    91a0:      	mov	r5, r0
-    91a2:      	cmp	r1, #240
-    91a4:      	blo	0x91d4 <core::fmt::Formatter::pad::haa777c0a9492680f+0x13c> @ imm = #44
-    91a6:      	orrs	r4, r3
-    91a8:      	cmp	r5, r0
-    91aa:      	beq	0x91b4 <core::fmt::Formatter::pad::haa777c0a9492680f+0x11c> @ imm = #6
-    91ac:      	ldrb	r3, [r5]
-    91ae:      	movs	r0, #63
-    91b0:      	ands	r0, r3
-    91b2:      	b	0x91b6 <core::fmt::Formatter::pad::haa777c0a9492680f+0x11e> @ imm = #0
-    91b4:      	movs	r0, #0
-    91b6:      	lsls	r3, r4, #6
-    91b8:      	lsls	r1, r1, #29
-    91ba:      	lsrs	r1, r1, #11
-    91bc:      	adds	r1, r3, r1
-    91be:      	adds	r0, r1, r0
-    91c0:      	movs	r1, #17
-    91c2:      	lsls	r1, r1, #16
-    91c4:      	cmp	r0, r1
-    91c6:      	bne	0x91d4 <core::fmt::Formatter::pad::haa777c0a9492680f+0x13c> @ imm = #10
-    91c8:      	add	r3, sp, #28
-    91ca:      	ldm	r3, {r1, r2, r3}
-    91cc:      	ldr	r4, [sp, #16]
-    91ce:      	cmp	r4, #1
-    91d0:      	beq	0x920e <core::fmt::Formatter::pad::haa777c0a9492680f+0x176> @ imm = #58
-    91d2:      	b	0x9304 <core::fmt::Formatter::pad::haa777c0a9492680f+0x26c> @ imm = #302
-    91d4:      	cmp	r2, #0
-    91d6:      	mov	r5, r2
-    91d8:      	ldr	r2, [sp, #32]
-    91da:      	ldr	r1, [sp, #28]
-    91dc:      	beq	0x91fa <core::fmt::Formatter::pad::haa777c0a9492680f+0x162> @ imm = #26
-    91de:      	cmp	r5, r2
-    91e0:      	bhs	0x91f2 <core::fmt::Formatter::pad::haa777c0a9492680f+0x15a> @ imm = #14
-    91e2:      	ldrsb	r4, [r1, r5]
-    91e4:      	movs	r0, #63
-    91e6:      	mvns	r3, r0
-    91e8:      	movs	r0, #0
-    91ea:      	cmp	r4, r3
-    91ec:      	mov	r3, r0
-    91ee:      	bge	0x91fa <core::fmt::Formatter::pad::haa777c0a9492680f+0x162> @ imm = #8
-    91f0:      	b	0x91fe <core::fmt::Formatter::pad::haa777c0a9492680f+0x166> @ imm = #10
-    91f2:      	movs	r0, #0
-    91f4:      	cmp	r5, r2
-    91f6:      	mov	r3, r0
-    91f8:      	bne	0x91fe <core::fmt::Formatter::pad::haa777c0a9492680f+0x166> @ imm = #2
-    91fa:      	mov	r0, r1
-    91fc:      	mov	r3, r5
-    91fe:      	cmp	r0, #0
-    9200:      	bne	0x92f4 <core::fmt::Formatter::pad::haa777c0a9492680f+0x25c> @ imm = #240
-    9202:      	cmp	r0, #0
-    9204:      	ldr	r3, [sp, #36]
-    9206:      	ldr	r4, [sp, #16]
-    9208:      	bne	0x92fe <core::fmt::Formatter::pad::haa777c0a9492680f+0x266> @ imm = #242
-    920a:      	cmp	r4, #1
-    920c:      	bne	0x9304 <core::fmt::Formatter::pad::haa777c0a9492680f+0x26c> @ imm = #244
-    920e:      	ldr	r6, [r3, #12]
-    9210:      	cmp	r2, #0
-    9212:      	str	r2, [sp, #32]
-    9214:      	str	r1, [sp, #28]
-    9216:      	beq	0x922e <core::fmt::Formatter::pad::haa777c0a9492680f+0x196> @ imm = #20
-    9218:      	movs	r5, #3
-    921a:      	mov	r3, r2
-    921c:      	ands	r3, r5
-    921e:      	subs	r0, r2, #1
-    9220:      	cmp	r0, #3
-    9222:      	bhs	0x9232 <core::fmt::Formatter::pad::haa777c0a9492680f+0x19a> @ imm = #12
-    9224:      	movs	r2, #0
-    9226:      	mov	r4, r1
-    9228:      	cmp	r3, #0
-    922a:      	bne	0x9296 <core::fmt::Formatter::pad::haa777c0a9492680f+0x1fe> @ imm = #104
-    922c:      	b	0x92c0 <core::fmt::Formatter::pad::haa777c0a9492680f+0x228> @ imm = #144
-    922e:      	movs	r2, #0
-    9230:      	b	0x92c0 <core::fmt::Formatter::pad::haa777c0a9492680f+0x228> @ imm = #140
-    9232:      	str	r3, [sp, #20]
-    9234:      	str	r6, [sp, #24]
-    9236:      	mov	r0, r2
-    9238:      	bics	r0, r5
-    923a:      	rsbs	r6, r0, #0
-    923c:      	movs	r2, #0
-    923e:      	str	r2, [sp, #40]
-    9240:      	mov	r4, r1
-    9242:      	mov	r1, r5
-    9244:      	b	0x924c <core::fmt::Formatter::pad::haa777c0a9492680f+0x1b4> @ imm = #4
-    9246:      	adds	r4, r4, #4
-    9248:      	adds	r6, r6, #4
-    924a:      	beq	0x928e <core::fmt::Formatter::pad::haa777c0a9492680f+0x1f6> @ imm = #64
-    924c:      	movs	r3, #1
-    924e:      	ldr	r0, [sp, #40]
-    9250:      	ldrsb	r5, [r4, r0]
-    9252:      	movs	r0, #64
-    9254:      	mvns	r0, r0
-    9256:      	cmp	r5, r0
-    9258:      	bgt	0x9270 <core::fmt::Formatter::pad::haa777c0a9492680f+0x1d8> @ imm = #20
-    925a:      	ldrsb	r3, [r4, r3]
-    925c:      	cmp	r3, r0
-    925e:      	bgt	0x9278 <core::fmt::Formatter::pad::haa777c0a9492680f+0x1e0> @ imm = #22
-    9260:      	movs	r3, #2
-    9262:      	ldrsb	r3, [r4, r3]
-    9264:      	cmp	r3, r0
-    9266:      	bgt	0x9282 <core::fmt::Formatter::pad::haa777c0a9492680f+0x1ea> @ imm = #24
-    9268:      	ldrsb	r3, [r4, r1]
-    926a:      	cmp	r3, r0
-    926c:      	ble	0x9246 <core::fmt::Formatter::pad::haa777c0a9492680f+0x1ae> @ imm = #-42
-    926e:      	b	0x928a <core::fmt::Formatter::pad::haa777c0a9492680f+0x1f2> @ imm = #24
-    9270:      	adds	r2, r2, #1
-    9272:      	ldrsb	r3, [r4, r3]
-    9274:      	cmp	r3, r0
-    9276:      	ble	0x9260 <core::fmt::Formatter::pad::haa777c0a9492680f+0x1c8> @ imm = #-26
-    9278:      	adds	r2, r2, #1
-    927a:      	movs	r3, #2
-    927c:      	ldrsb	r3, [r4, r3]
-    927e:      	cmp	r3, r0
-    9280:      	ble	0x9268 <core::fmt::Formatter::pad::haa777c0a9492680f+0x1d0> @ imm = #-28
-    9282:      	adds	r2, r2, #1
-    9284:      	ldrsb	r3, [r4, r1]
-    9286:      	cmp	r3, r0
-    9288:      	ble	0x9246 <core::fmt::Formatter::pad::haa777c0a9492680f+0x1ae> @ imm = #-70
-    928a:      	adds	r2, r2, #1
-    928c:      	b	0x9246 <core::fmt::Formatter::pad::haa777c0a9492680f+0x1ae> @ imm = #-74
-    928e:      	ldr	r6, [sp, #24]
-    9290:      	ldr	r3, [sp, #20]
-    9292:      	cmp	r3, #0
-    9294:      	beq	0x92c0 <core::fmt::Formatter::pad::haa777c0a9492680f+0x228> @ imm = #40
-    9296:      	movs	r0, #0
-    9298:      	ldrsb	r1, [r4, r0]
-    929a:      	movs	r0, #64
-    929c:      	mvns	r0, r0
-    929e:      	cmp	r1, r0
-    92a0:      	ble	0x92a4 <core::fmt::Formatter::pad::haa777c0a9492680f+0x20c> @ imm = #0
-    92a2:      	adds	r2, r2, #1
-    92a4:      	cmp	r3, #1
-    92a6:      	beq	0x92c0 <core::fmt::Formatter::pad::haa777c0a9492680f+0x228> @ imm = #22
-    92a8:      	movs	r1, #1
-    92aa:      	ldrsb	r1, [r4, r1]
-    92ac:      	cmp	r1, r0
-    92ae:      	ble	0x92b2 <core::fmt::Formatter::pad::haa777c0a9492680f+0x21a> @ imm = #0
-    92b0:      	adds	r2, r2, #1
-    92b2:      	cmp	r3, #2
-    92b4:      	beq	0x92c0 <core::fmt::Formatter::pad::haa777c0a9492680f+0x228> @ imm = #8
-    92b6:      	movs	r1, #2
-    92b8:      	ldrsb	r1, [r4, r1]
-    92ba:      	cmp	r1, r0
-    92bc:      	ble	0x92c0 <core::fmt::Formatter::pad::haa777c0a9492680f+0x228> @ imm = #0
-    92be:      	adds	r2, r2, #1
-    92c0:      	cmp	r6, r2
-    92c2:      	bls	0x92e4 <core::fmt::Formatter::pad::haa777c0a9492680f+0x24c> @ imm = #30
-    92c4:      	movs	r0, #32
-    92c6:      	ldr	r4, [sp, #36]
-    92c8:      	ldrb	r0, [r4, r0]
-    92ca:      	movs	r1, #0
-    92cc:      	cmp	r0, #3
-    92ce:      	mov	r3, r1
-    92d0:      	beq	0x92d4 <core::fmt::Formatter::pad::haa777c0a9492680f+0x23c> @ imm = #0
-    92d2:      	mov	r3, r0
-    92d4:      	subs	r0, r6, r2
-    92d6:      	lsls	r2, r3, #30
-    92d8:      	beq	0x931a <core::fmt::Formatter::pad::haa777c0a9492680f+0x282> @ imm = #62
-    92da:      	cmp	r3, #1
-    92dc:      	bne	0x9314 <core::fmt::Formatter::pad::haa777c0a9492680f+0x27c> @ imm = #52
-    92de:      	movs	r1, #0
-    92e0:      	str	r1, [sp, #24]
-    92e2:      	b	0x931e <core::fmt::Formatter::pad::haa777c0a9492680f+0x286> @ imm = #56
-    92e4:      	ldr	r0, [sp, #36]
-    92e6:      	ldr	r1, [r0, #24]
-    92e8:      	ldr	r0, [r0, #28]
-    92ea:      	ldr	r3, [r0, #12]
-    92ec:      	mov	r0, r1
-    92ee:      	ldr	r1, [sp, #28]
-    92f0:      	ldr	r2, [sp, #32]
-    92f2:      	b	0x930a <core::fmt::Formatter::pad::haa777c0a9492680f+0x272> @ imm = #20
-    92f4:      	mov	r2, r3
-    92f6:      	cmp	r0, #0
-    92f8:      	ldr	r3, [sp, #36]
-    92fa:      	ldr	r4, [sp, #16]
-    92fc:      	beq	0x920a <core::fmt::Formatter::pad::haa777c0a9492680f+0x172> @ imm = #-246
-    92fe:      	mov	r1, r0
-    9300:      	cmp	r4, #1
-    9302:      	beq	0x920e <core::fmt::Formatter::pad::haa777c0a9492680f+0x176> @ imm = #-248
-    9304:      	ldr	r0, [r3, #24]
-    9306:      	ldr	r3, [r3, #28]
-    9308:      	ldr	r3, [r3, #12]
-    930a:      	blx	r3
-    930c:      	mov	r5, r0
-    930e:      	mov	r0, r5
-    9310:      	add	sp, #44
-    9312:      	pop	{r4, r5, r6, r7, pc}
-    9314:      	lsrs	r1, r0, #1
-    9316:      	adds	r0, r0, #1
-    9318:      	lsrs	r0, r0, #1
-    931a:      	str	r0, [sp, #24]
-    931c:      	mov	r0, r1
-    931e:      	adds	r5, r0, #1
-    9320:      	ldr	r6, [r4, #4]
-    9322:      	ldr	r0, [r4, #24]
-    9324:      	str	r0, [sp, #40]
-    9326:      	ldr	r4, [r4, #28]
-    9328:      	subs	r5, r5, #1
-    932a:      	beq	0x9340 <core::fmt::Formatter::pad::haa777c0a9492680f+0x2a8> @ imm = #18
-    932c:      	ldr	r2, [r4, #16]
-    932e:      	ldr	r0, [sp, #40]
-    9330:      	mov	r1, r6
-    9332:      	blx	r2
-    9334:      	cmp	r0, #0
-    9336:      	beq	0x9328 <core::fmt::Formatter::pad::haa777c0a9492680f+0x290> @ imm = #-18
-    9338:      	movs	r5, #1
-    933a:      	mov	r0, r5
-    933c:      	add	sp, #44
-    933e:      	pop	{r4, r5, r6, r7, pc}
-    9340:      	movs	r0, #17
-    9342:      	lsls	r2, r0, #16
-    9344:      	cmp	r6, r2
-    9346:      	bne	0x934c <core::fmt::Formatter::pad::haa777c0a9492680f+0x2b4> @ imm = #2
-    9348:      	movs	r1, #0
-    934a:      	str	r1, [sp, #24]
-    934c:      	ldr	r0, [sp, #40]
-    934e:      	mov	r1, r4
-    9350:      	movs	r5, #1
-    9352:      	cmp	r6, r2
-    9354:      	beq	0x930e <core::fmt::Formatter::pad::haa777c0a9492680f+0x276> @ imm = #-74
-    9356:      	ldr	r3, [r1, #12]
-    9358:      	ldr	r1, [sp, #28]
-    935a:      	ldr	r2, [sp, #32]
-    935c:      	blx	r3
-    935e:      	cmp	r0, #0
-    9360:      	bne	0x930e <core::fmt::Formatter::pad::haa777c0a9492680f+0x276> @ imm = #-86
-    9362:      	movs	r5, #0
-    9364:      	ldr	r1, [sp, #24]
-    9366:      	cmp	r1, r5
-    9368:      	beq	0x937e <core::fmt::Formatter::pad::haa777c0a9492680f+0x2e6> @ imm = #18
-    936a:      	ldr	r2, [r4, #16]
-    936c:      	ldr	r0, [sp, #40]
-    936e:      	mov	r1, r6
-    9370:      	blx	r2
-    9372:      	adds	r5, r5, #1
-    9374:      	cmp	r0, #0
-    9376:      	beq	0x9364 <core::fmt::Formatter::pad::haa777c0a9492680f+0x2cc> @ imm = #-22
-    9378:      	subs	r0, r5, #1
-    937a:      	ldr	r1, [sp, #24]
-    937c:      	b	0x9380 <core::fmt::Formatter::pad::haa777c0a9492680f+0x2e8> @ imm = #0
-    937e:      	mov	r0, r1
-    9380:      	cmp	r0, r1
-    9382:      	blo	0x9338 <core::fmt::Formatter::pad::haa777c0a9492680f+0x2a0> @ imm = #-78
-    9384:      	movs	r5, #0
-    9386:      	mov	r0, r5
-    9388:      	add	sp, #44
-    938a:      	pop	{r4, r5, r6, r7, pc}
-
-0000938c <<core::fmt::Formatter as core::fmt::Write>::write_str::h5daf2d485e2f455c>:
-    938c:      	push	{r4, r6, r7, lr}
-    938e:      	add	r7, sp, #8
-    9390:      	ldr	r3, [r0, #24]
-    9392:      	ldr	r0, [r0, #28]
-    9394:      	ldr	r4, [r0, #12]
-    9396:      	mov	r0, r3
-    9398:      	blx	r4
-    939a:      	pop	{r4, r6, r7, pc}
-
-0000939c <core::fmt::Formatter::debug_tuple::ha4e1a3ea9953bf09>:
-    939c:      	push	{r4, r5, r6, r7, lr}
-    939e:      	add	r7, sp, #12
-    93a0:      	sub	sp, #4
-    93a2:      	mov	r5, r3
-    93a4:      	mov	r6, r1
-    93a6:      	mov	r4, r0
-    93a8:      	ldr	r0, [r1, #24]
-    93aa:      	ldr	r1, [r1, #28]
-    93ac:      	ldr	r3, [r1, #12]
-    93ae:      	mov	r1, r2
-    93b0:      	mov	r2, r5
-    93b2:      	blx	r3
-    93b4:      	strb	r0, [r4, #8]
-    93b6:      	str	r6, [r4]
-    93b8:      	rsbs	r0, r5, #0
-    93ba:      	adcs	r0, r5
-    93bc:      	strb	r0, [r4, #9]
-    93be:      	movs	r0, #0
-    93c0:      	str	r0, [r4, #4]
-    93c2:      	add	sp, #4
-    93c4:      	pop	{r4, r5, r6, r7, pc}
-
-000093c6 <<core::convert::Infallible as core::fmt::Display>::fmt::h7dd09e474324225f>:
-    93c6:      	trap
-
-000093c8 <<char as core::fmt::Debug>::fmt::hb4dfd653beebf513>:
-    93c8:      	push	{r4, r5, r6, r7, lr}
-    93ca:      	add	r7, sp, #12
-    93cc:      	sub	sp, #28
-    93ce:      	mov	r6, r0
-    93d0:      	ldr	r0, [r1, #24]
-    93d2:      	ldr	r1, [r1, #28]
-    93d4:      	ldr	r2, [r1, #16]
-    93d6:      	movs	r1, #39
-    93d8:      	str	r0, [sp, #20]
-    93da:      	str	r2, [sp, #16]
-    93dc:      	blx	r2
-    93de:      	movs	r1, #1
-    93e0:      	cmp	r0, #0
-    93e2:      	beq	0x93e6 <<char as core::fmt::Debug>::fmt::hb4dfd653beebf513+0x1e> @ imm = #0
-    93e4:      	b	0x9596 <$t.401+0x90>    @ imm = #430
-    93e6:      	ldr	r5, [r6]
-    93e8:      	mov	r0, r5
-    93ea:      	subs	r0, #9
-    93ec:      	movs	r4, #2
-    93ee:      	cmp	r0, #30
-    93f0:      	str	r1, [sp]
-    93f2:      	bhi	0x9480 <$t.397+0x4>     @ imm = #138
-    93f4:      	movs	r1, #116
-    93f6:      	str	r1, [sp, #24]
-    93f8:      	lsls	r0, r0, #2
-    93fa:      	adr	r1, #4 <<char as core::fmt::Debug>::fmt::hb4dfd653beebf513+0x37>
-    93fc:      	ldr	r0, [r1, r0]
-    93fe:      	mov	pc, r0
-
-00009400 <$d.396>:
-    9400:	b9 94 00 00	.word	0x000094b9
-    9404:	7d 94 00 00	.word	0x0000947d
-    9408:	85 94 00 00	.word	0x00009485
-    940c:	85 94 00 00	.word	0x00009485
-    9410:	9d 94 00 00	.word	0x0000949d
-    9414:	85 94 00 00	.word	0x00009485
-    9418:	85 94 00 00	.word	0x00009485
-    941c:	85 94 00 00	.word	0x00009485
-    9420:	85 94 00 00	.word	0x00009485
-    9424:	85 94 00 00	.word	0x00009485
-    9428:	85 94 00 00	.word	0x00009485
-    942c:	85 94 00 00	.word	0x00009485
-    9430:	85 94 00 00	.word	0x00009485
-    9434:	85 94 00 00	.word	0x00009485
-    9438:	85 94 00 00	.word	0x00009485
-    943c:	85 94 00 00	.word	0x00009485
-    9440:	85 94 00 00	.word	0x00009485
-    9444:	85 94 00 00	.word	0x00009485
-    9448:	85 94 00 00	.word	0x00009485
-    944c:	85 94 00 00	.word	0x00009485
-    9450:	85 94 00 00	.word	0x00009485
-    9454:	85 94 00 00	.word	0x00009485
-    9458:	85 94 00 00	.word	0x00009485
-    945c:	85 94 00 00	.word	0x00009485
-    9460:	85 94 00 00	.word	0x00009485
-    9464:	85 94 00 00	.word	0x00009485
-    9468:	85 94 00 00	.word	0x00009485
-    946c:	85 94 00 00	.word	0x00009485
-    9470:	85 94 00 00	.word	0x00009485
-    9474:	85 94 00 00	.word	0x00009485
-    9478:	9b 94 00 00	.word	0x0000949b
-
-0000947c <$t.397>:
-    947c:      	movs	r0, #110
-    947e:      	b	0x949e <$t.397+0x22>    @ imm = #28
-    9480:      	cmp	r5, #92
-    9482:      	beq	0x949a <$t.397+0x1e>    @ imm = #20
-    9484:      	mov	r0, r5
-    9486:      	bl	0xa2d4 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5> @ imm = #3658
-    948a:      	cmp	r0, #0
-    948c:      	bne	0x94a2 <$t.397+0x26>    @ imm = #18
-    948e:      	mov	r0, r5
-    9490:      	bl	0x9a74 <core::unicode::printable::is_printable::h6cdd76e17613ee9f> @ imm = #1504
-    9494:      	cmp	r0, #0
-    9496:      	beq	0x94a2 <$t.397+0x26>    @ imm = #8
-    9498:      	movs	r4, #1
-    949a:      	b	0x94b6 <$t.397+0x3a>    @ imm = #24
-    949c:      	movs	r0, #114
-    949e:      	str	r0, [sp, #24]
-    94a0:      	b	0x94b8 <$t.397+0x3c>    @ imm = #20
-    94a2:      	movs	r0, #1
-    94a4:      	orrs	r0, r5
-    94a6:      	bl	0xa874 <__clzsi2>       @ imm = #5066
-    94aa:      	lsrs	r0, r0, #2
-    94ac:      	movs	r1, #7
-    94ae:      	eors	r1, r0
-    94b0:      	str	r1, [sp, #12]
-    94b2:      	movs	r6, #5
-    94b4:      	movs	r4, #3
-    94b6:      	str	r5, [sp, #24]
-    94b8:      	movs	r0, #255
-    94ba:      	mvns	r0, r0
-    94bc:      	str	r0, [sp, #8]
-    94be:      	movs	r5, #0
-    94c0:      	mvns	r0, r5
-    94c2:      	str	r0, [sp, #4]
-    94c4:      	b	0x94d0 <$t.397+0x54>    @ imm = #8
-    94c6:      	ldr	r0, [sp, #20]
-    94c8:      	ldr	r2, [sp, #16]
-    94ca:      	blx	r2
-    94cc:      	cmp	r0, #0
-    94ce:      	bne	0x9594 <$t.401+0x8e>    @ imm = #194
-    94d0:      	lsls	r0, r4, #2
-    94d2:      	adr	r1, #8 <$t.397+0x5c>
-    94d4:      	ldr	r0, [r1, r0]
-    94d6:      	mov	r4, r5
-    94d8:      	ldr	r1, [sp, #24]
-    94da:      	mov	pc, r0
-
-000094dc <$d.398>:
-    94dc:	9d 95 00 00	.word	0x0000959d
-    94e0:	f3 94 00 00	.word	0x000094f3
-    94e4:	ed 94 00 00	.word	0x000094ed
-    94e8:	f5 94 00 00	.word	0x000094f5
-
-000094ec <$t.399>:
-    94ec:      	movs	r1, #92
-    94ee:      	movs	r4, #1
-    94f0:      	b	0x94c6 <$t.397+0x4a>    @ imm = #-46
-    94f2:      	b	0x94c6 <$t.397+0x4a>    @ imm = #-48
-    94f4:      	uxtb	r0, r6
-    94f6:      	mov	r8, r8
-    94f8:      	add	r0, pc
-    94fa:      	ldrb	r0, [r0, #4]
-    94fc:      	lsls	r0, r0, #1
-    94fe:      	add	pc, r0
-
-00009500 <$d.400>:
-    9500:	4d 02 0b 1c	.word	0x1c0b024d
-    9504:	27 31		.short	0x3127
-
-00009506 <$t.401>:
-    9506:      	ldr	r0, [sp, #12]
-    9508:      	ldr	r1, [sp, #4]
-    950a:      	ands	r0, r1
-    950c:      	str	r0, [sp, #12]
-    950e:      	ldr	r0, [sp, #8]
-    9510:      	ands	r6, r0
-    9512:      	movs	r1, #125
-    9514:      	movs	r4, #3
-    9516:      	b	0x94c6 <$t.397+0x4a>    @ imm = #-84
-    9518:      	ldr	r2, [sp, #12]
-    951a:      	lsls	r0, r2, #29
-    951c:      	lsrs	r0, r0, #27
-    951e:      	ldr	r1, [sp, #24]
-    9520:      	lsrs	r1, r0
-    9522:      	movs	r0, #15
-    9524:      	ands	r0, r1
-    9526:      	cmp	r0, #10
-    9528:      	blo	0x957a <$t.401+0x74>    @ imm = #78
-    952a:      	movs	r1, #87
-    952c:      	adds	r1, r1, r0
-    952e:      	cmp	r2, #0
-    9530:      	beq	0x9582 <$t.401+0x7c>    @ imm = #78
-    9532:      	subs	r2, r2, #1
-    9534:      	str	r2, [sp, #12]
-    9536:      	movs	r4, #3
-    9538:      	b	0x94c6 <$t.397+0x4a>    @ imm = #-118
-    953a:      	ldr	r0, [sp, #12]
-    953c:      	ldr	r1, [sp, #4]
-    953e:      	ands	r0, r1
-    9540:      	str	r0, [sp, #12]
-    9542:      	ldr	r0, [sp, #8]
-    9544:      	ands	r6, r0
-    9546:      	movs	r0, #2
-    9548:      	orrs	r6, r0
-    954a:      	movs	r1, #123
-    954c:      	movs	r4, #3
-    954e:      	b	0x94c6 <$t.397+0x4a>    @ imm = #-140
-    9550:      	ldr	r0, [sp, #12]
-    9552:      	ldr	r1, [sp, #4]
-    9554:      	ands	r0, r1
-    9556:      	str	r0, [sp, #12]
-    9558:      	ldr	r0, [sp, #8]
-    955a:      	ands	r6, r0
-    955c:      	movs	r4, #3
-    955e:      	orrs	r6, r4
-    9560:      	movs	r1, #117
-    9562:      	b	0x94c6 <$t.397+0x4a>    @ imm = #-160
-    9564:      	ldr	r0, [sp, #12]
-    9566:      	ldr	r1, [sp, #4]
-    9568:      	ands	r0, r1
-    956a:      	str	r0, [sp, #12]
-    956c:      	ldr	r0, [sp, #8]
-    956e:      	ands	r6, r0
-    9570:      	movs	r0, #4
-    9572:      	orrs	r6, r0
-    9574:      	movs	r1, #92
-    9576:      	movs	r4, #3
-    9578:      	b	0x94c6 <$t.397+0x4a>    @ imm = #-182
-    957a:      	movs	r1, #48
-    957c:      	adds	r1, r1, r0
-    957e:      	cmp	r2, #0
-    9580:      	bne	0x9532 <$t.401+0x2c>    @ imm = #-82
-    9582:      	ldr	r0, [sp, #4]
-    9584:      	ands	r2, r0
-    9586:      	str	r2, [sp, #12]
-    9588:      	ldr	r0, [sp, #8]
-    958a:      	ands	r6, r0
-    958c:      	movs	r0, #1
-    958e:      	orrs	r6, r0
-    9590:      	movs	r4, #3
-    9592:      	b	0x94c6 <$t.397+0x4a>    @ imm = #-208
-    9594:      	ldr	r1, [sp]
-    9596:      	mov	r0, r1
-    9598:      	add	sp, #28
-    959a:      	pop	{r4, r5, r6, r7, pc}
-    959c:      	movs	r1, #39
-    959e:      	ldr	r0, [sp, #20]
-    95a0:      	ldr	r2, [sp, #16]
-    95a2:      	blx	r2
-    95a4:      	mov	r1, r0
-    95a6:      	mov	r0, r1
-    95a8:      	add	sp, #28
-    95aa:      	pop	{r4, r5, r6, r7, pc}
-
-000095ac <core::slice::index::slice_start_index_len_fail::h3080a8211123744d>:
-    95ac:      	push	{r7, lr}
-    95ae:      	add	r7, sp, #0
-    95b0:      	sub	sp, #48
-    95b2:      	str	r1, [sp, #4]
-    95b4:      	str	r0, [sp]
-    95b6:      	movs	r0, #2
-    95b8:      	str	r0, [sp, #28]
-    95ba:      	add	r1, sp, #32
-    95bc:      	str	r1, [sp, #24]
-    95be:      	movs	r1, #0
-    95c0:      	str	r1, [sp, #20]
-    95c2:      	str	r1, [sp, #16]
-    95c4:      	str	r0, [sp, #12]
-    95c6:      	ldr	r0, [pc, #28] <$d.427+0x2>
-    95c8:      	str	r0, [sp, #8]
-    95ca:      	ldr	r0, [pc, #28] <$d.427+0x6>
-    95cc:      	str	r0, [sp, #44]
-    95ce:      	add	r1, sp, #4
-    95d0:      	str	r1, [sp, #40]
-    95d2:      	str	r0, [sp, #36]
-    95d4:      	mov	r0, sp
-    95d6:      	str	r0, [sp, #32]
-    95d8:      	add	r0, sp, #8
-    95da:      	mov	r1, r2
-    95dc:      	bl	0x85b4 <core::panicking::panic_fmt::h884220a03f3bce26> @ imm = #-4140
-    95e0:      	trap
-    95e2:      	mov	r8, r8
-
-000095e4 <$d.427>:
-    95e4:	80 bb 00 00	.word	0x0000bb80
-    95e8:	85 a1 00 00	.word	0x0000a185
-
-000095ec <core::slice::index::slice_end_index_len_fail::h4968a5fa708ed4f2>:
-    95ec:      	push	{r7, lr}
-    95ee:      	add	r7, sp, #0
-    95f0:      	sub	sp, #48
-    95f2:      	str	r1, [sp, #4]
-    95f4:      	str	r0, [sp]
-    95f6:      	movs	r0, #2
-    95f8:      	str	r0, [sp, #28]
-    95fa:      	add	r1, sp, #32
-    95fc:      	str	r1, [sp, #24]
-    95fe:      	movs	r1, #0
-    9600:      	str	r1, [sp, #20]
-    9602:      	str	r1, [sp, #16]
-    9604:      	str	r0, [sp, #12]
-    9606:      	ldr	r0, [pc, #28] <$d.429+0x2>
-    9608:      	str	r0, [sp, #8]
-    960a:      	ldr	r0, [pc, #28] <$d.429+0x6>
-    960c:      	str	r0, [sp, #44]
-    960e:      	add	r1, sp, #4
-    9610:      	str	r1, [sp, #40]
-    9612:      	str	r0, [sp, #36]
-    9614:      	mov	r0, sp
-    9616:      	str	r0, [sp, #32]
-    9618:      	add	r0, sp, #8
-    961a:      	mov	r1, r2
-    961c:      	bl	0x85b4 <core::panicking::panic_fmt::h884220a03f3bce26> @ imm = #-4204
-    9620:      	trap
-    9622:      	mov	r8, r8
-
-00009624 <$d.429>:
-    9624:	90 bb 00 00	.word	0x0000bb90
-    9628:	85 a1 00 00	.word	0x0000a185
-
-0000962c <core::slice::index::slice_index_order_fail::h35619d5607b7eea8>:
-    962c:      	push	{r7, lr}
-    962e:      	add	r7, sp, #0
-    9630:      	sub	sp, #48
-    9632:      	str	r1, [sp, #4]
-    9634:      	str	r0, [sp]
-    9636:      	movs	r0, #2
-    9638:      	str	r0, [sp, #28]
-    963a:      	add	r1, sp, #32
-    963c:      	str	r1, [sp, #24]
-    963e:      	movs	r1, #0
-    9640:      	str	r1, [sp, #20]
-    9642:      	str	r1, [sp, #16]
-    9644:      	str	r0, [sp, #12]
-    9646:      	ldr	r0, [pc, #28] <$d.431+0x2>
-    9648:      	str	r0, [sp, #8]
-    964a:      	ldr	r0, [pc, #28] <$d.431+0x6>
-    964c:      	str	r0, [sp, #44]
-    964e:      	add	r1, sp, #4
-    9650:      	str	r1, [sp, #40]
-    9652:      	str	r0, [sp, #36]
-    9654:      	mov	r0, sp
-    9656:      	str	r0, [sp, #32]
-    9658:      	add	r0, sp, #8
-    965a:      	mov	r1, r2
-    965c:      	bl	0x85b4 <core::panicking::panic_fmt::h884220a03f3bce26> @ imm = #-4268
-    9660:      	trap
-    9662:      	mov	r8, r8
-
-00009664 <$d.431>:
-    9664:	c4 bb 00 00	.word	0x0000bbc4
-    9668:	85 a1 00 00	.word	0x0000a185
-
-0000966c <core::str::slice_error_fail::h26c332087be94791>:
-    966c:      	push	{r7, lr}
-    966e:      	add	r7, sp, #0
-    9670:      	sub	sp, #128
-    9672:      	str	r3, [sp, #28]
-    9674:      	str	r2, [sp, #24]
-    9676:      	movs	r5, #1
-    9678:      	lsls	r6, r5, #8
-    967a:      	adds	r4, r6, #1
-    967c:      	cmp	r1, r4
-    967e:      	bhs	0x9696 <core::str::slice_error_fail::h26c332087be94791+0x2a> @ imm = #20
-    9680:      	str	r1, [sp, #36]
-    9682:      	str	r0, [sp, #32]
-    9684:      	ldr	r4, [pc, #968] <$d.487+0x8>
-    9686:      	str	r4, [sp, #40]
-    9688:      	movs	r6, #0
-    968a:      	ldr	r4, [r7, #8]
-    968c:      	str	r6, [sp, #44]
-    968e:      	cmp	r2, r1
-    9690:      	bhi	0x9694 <core::str::slice_error_fail::h26c332087be94791+0x28> @ imm = #0
-    9692:      	b	0x9864 <core::str::slice_error_fail::h26c332087be94791+0x1f8> @ imm = #462
-    9694:      	b	0x989c <core::str::slice_error_fail::h26c332087be94791+0x230> @ imm = #516
-    9696:      	str	r2, [sp, #12]
-    9698:      	str	r5, [sp, #16]
-    969a:      	movs	r4, #0
-    969c:      	str	r0, [sp, #20]
-    969e:      	adds	r5, r0, r4
-    96a0:      	mov	r0, r6
-    96a2:      	ldrsb	r2, [r5, r6]
-    96a4:      	movs	r6, #64
-    96a6:      	mvns	r6, r6
-    96a8:      	cmp	r2, r6
-    96aa:      	ble	0x96ae <core::str::slice_error_fail::h26c332087be94791+0x42> @ imm = #0
-    96ac:      	b	0x97b8 <core::str::slice_error_fail::h26c332087be94791+0x14c> @ imm = #264
-    96ae:      	movs	r2, #255
-    96b0:      	ldrsb	r2, [r5, r2]
-    96b2:      	cmp	r2, r6
-    96b4:      	ble	0x96b8 <core::str::slice_error_fail::h26c332087be94791+0x4c> @ imm = #0
-    96b6:      	b	0x97bc <core::str::slice_error_fail::h26c332087be94791+0x150> @ imm = #258
-    96b8:      	movs	r2, #254
-    96ba:      	ldrsb	r2, [r5, r2]
-    96bc:      	cmp	r2, r6
-    96be:      	bgt	0x97c0 <core::str::slice_error_fail::h26c332087be94791+0x154> @ imm = #254
-    96c0:      	movs	r2, #253
-    96c2:      	ldrsb	r2, [r5, r2]
-    96c4:      	cmp	r2, r6
-    96c6:      	bgt	0x97c4 <core::str::slice_error_fail::h26c332087be94791+0x158> @ imm = #250
-    96c8:      	movs	r2, #252
-    96ca:      	ldrsb	r2, [r5, r2]
-    96cc:      	cmp	r2, r6
-    96ce:      	bgt	0x97c8 <core::str::slice_error_fail::h26c332087be94791+0x15c> @ imm = #246
-    96d0:      	movs	r2, #251
-    96d2:      	ldrsb	r2, [r5, r2]
-    96d4:      	cmp	r2, r6
-    96d6:      	bgt	0x97cc <core::str::slice_error_fail::h26c332087be94791+0x160> @ imm = #242
-    96d8:      	movs	r2, #250
-    96da:      	ldrsb	r2, [r5, r2]
-    96dc:      	cmp	r2, r6
-    96de:      	bgt	0x97d0 <core::str::slice_error_fail::h26c332087be94791+0x164> @ imm = #238
-    96e0:      	movs	r2, #249
-    96e2:      	ldrsb	r2, [r5, r2]
-    96e4:      	cmp	r2, r6
-    96e6:      	bgt	0x97d4 <core::str::slice_error_fail::h26c332087be94791+0x168> @ imm = #234
-    96e8:      	movs	r2, #248
-    96ea:      	ldrsb	r2, [r5, r2]
-    96ec:      	cmp	r2, r6
-    96ee:      	bgt	0x97d8 <core::str::slice_error_fail::h26c332087be94791+0x16c> @ imm = #230
-    96f0:      	movs	r2, #247
-    96f2:      	ldrsb	r2, [r5, r2]
-    96f4:      	cmp	r2, r6
-    96f6:      	bgt	0x97dc <core::str::slice_error_fail::h26c332087be94791+0x170> @ imm = #226
-    96f8:      	movs	r2, #246
-    96fa:      	ldrsb	r2, [r5, r2]
-    96fc:      	cmp	r2, r6
-    96fe:      	bgt	0x97e0 <core::str::slice_error_fail::h26c332087be94791+0x174> @ imm = #222
-    9700:      	movs	r2, #245
-    9702:      	ldrsb	r2, [r5, r2]
-    9704:      	cmp	r2, r6
-    9706:      	bgt	0x97e4 <core::str::slice_error_fail::h26c332087be94791+0x178> @ imm = #218
-    9708:      	movs	r2, #244
-    970a:      	ldrsb	r2, [r5, r2]
-    970c:      	cmp	r2, r6
-    970e:      	bgt	0x97e8 <core::str::slice_error_fail::h26c332087be94791+0x17c> @ imm = #214
-    9710:      	movs	r2, #243
-    9712:      	ldrsb	r2, [r5, r2]
-    9714:      	cmp	r2, r6
-    9716:      	bgt	0x97ec <core::str::slice_error_fail::h26c332087be94791+0x180> @ imm = #210
-    9718:      	movs	r2, #242
-    971a:      	ldrsb	r2, [r5, r2]
-    971c:      	cmp	r2, r6
-    971e:      	bgt	0x97f0 <core::str::slice_error_fail::h26c332087be94791+0x184> @ imm = #206
-    9720:      	movs	r2, #241
-    9722:      	ldrsb	r2, [r5, r2]
-    9724:      	cmp	r2, r6
-    9726:      	bgt	0x97f4 <core::str::slice_error_fail::h26c332087be94791+0x188> @ imm = #202
-    9728:      	movs	r2, #240
-    972a:      	ldrsb	r2, [r5, r2]
-    972c:      	cmp	r2, r6
-    972e:      	bgt	0x97f8 <core::str::slice_error_fail::h26c332087be94791+0x18c> @ imm = #198
-    9730:      	movs	r2, #239
-    9732:      	ldrsb	r2, [r5, r2]
-    9734:      	cmp	r2, r6
-    9736:      	bgt	0x97fc <core::str::slice_error_fail::h26c332087be94791+0x190> @ imm = #194
-    9738:      	movs	r2, #238
-    973a:      	ldrsb	r2, [r5, r2]
-    973c:      	cmp	r2, r6
-    973e:      	bgt	0x9800 <core::str::slice_error_fail::h26c332087be94791+0x194> @ imm = #190
-    9740:      	movs	r2, #237
-    9742:      	ldrsb	r2, [r5, r2]
-    9744:      	cmp	r2, r6
-    9746:      	bgt	0x9804 <core::str::slice_error_fail::h26c332087be94791+0x198> @ imm = #186
-    9748:      	movs	r2, #236
-    974a:      	ldrsb	r2, [r5, r2]
-    974c:      	cmp	r2, r6
-    974e:      	bgt	0x9808 <core::str::slice_error_fail::h26c332087be94791+0x19c> @ imm = #182
-    9750:      	movs	r2, #235
-    9752:      	ldrsb	r2, [r5, r2]
-    9754:      	cmp	r2, r6
-    9756:      	bgt	0x980c <core::str::slice_error_fail::h26c332087be94791+0x1a0> @ imm = #178
-    9758:      	movs	r2, #234
-    975a:      	ldrsb	r2, [r5, r2]
-    975c:      	cmp	r2, r6
-    975e:      	bgt	0x9810 <core::str::slice_error_fail::h26c332087be94791+0x1a4> @ imm = #174
-    9760:      	movs	r2, #233
-    9762:      	ldrsb	r2, [r5, r2]
-    9764:      	cmp	r2, r6
-    9766:      	bgt	0x9814 <core::str::slice_error_fail::h26c332087be94791+0x1a8> @ imm = #170
-    9768:      	movs	r2, #232
-    976a:      	ldrsb	r2, [r5, r2]
-    976c:      	cmp	r2, r6
-    976e:      	bgt	0x9818 <core::str::slice_error_fail::h26c332087be94791+0x1ac> @ imm = #166
-    9770:      	movs	r2, #231
-    9772:      	ldrsb	r2, [r5, r2]
-    9774:      	cmp	r2, r6
-    9776:      	bgt	0x981c <core::str::slice_error_fail::h26c332087be94791+0x1b0> @ imm = #162
-    9778:      	movs	r2, #230
-    977a:      	ldrsb	r2, [r5, r2]
-    977c:      	cmp	r2, r6
-    977e:      	bgt	0x9820 <core::str::slice_error_fail::h26c332087be94791+0x1b4> @ imm = #158
-    9780:      	movs	r2, #229
-    9782:      	ldrsb	r2, [r5, r2]
-    9784:      	cmp	r2, r6
-    9786:      	bgt	0x9824 <core::str::slice_error_fail::h26c332087be94791+0x1b8> @ imm = #154
-    9788:      	movs	r2, #228
-    978a:      	ldrsb	r2, [r5, r2]
-    978c:      	cmp	r2, r6
-    978e:      	bgt	0x9828 <core::str::slice_error_fail::h26c332087be94791+0x1bc> @ imm = #150
-    9790:      	movs	r2, #227
-    9792:      	ldrsb	r2, [r5, r2]
-    9794:      	cmp	r2, r6
-    9796:      	bgt	0x982c <core::str::slice_error_fail::h26c332087be94791+0x1c0> @ imm = #146
-    9798:      	movs	r2, #226
-    979a:      	ldrsb	r2, [r5, r2]
-    979c:      	cmp	r2, r6
-    979e:      	bgt	0x9830 <core::str::slice_error_fail::h26c332087be94791+0x1c4> @ imm = #142
-    97a0:      	movs	r2, #225
-    97a2:      	ldrsb	r2, [r5, r2]
-    97a4:      	cmp	r2, r6
-    97a6:      	bgt	0x9834 <core::str::slice_error_fail::h26c332087be94791+0x1c8> @ imm = #138
-    97a8:      	subs	r4, #32
-    97aa:      	mov	r6, r0
-    97ac:      	adds	r2, r4, r0
-    97ae:      	ldr	r0, [sp, #20]
-    97b0:      	beq	0x97b4 <core::str::slice_error_fail::h26c332087be94791+0x148> @ imm = #0
-    97b2:      	b	0x969e <core::str::slice_error_fail::h26c332087be94791+0x32> @ imm = #-280
-    97b4:      	movs	r2, #0
-    97b6:      	b	0x984e <core::str::slice_error_fail::h26c332087be94791+0x1e2> @ imm = #148
-    97b8:      	adds	r4, r4, r0
-    97ba:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #120
-    97bc:      	adds	r4, #255
-    97be:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #116
-    97c0:      	adds	r4, #254
-    97c2:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #112
-    97c4:      	adds	r4, #253
-    97c6:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #108
-    97c8:      	adds	r4, #252
-    97ca:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #104
-    97cc:      	adds	r4, #251
-    97ce:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #100
-    97d0:      	adds	r4, #250
-    97d2:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #96
-    97d4:      	adds	r4, #249
-    97d6:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #92
-    97d8:      	adds	r4, #248
-    97da:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #88
-    97dc:      	adds	r4, #247
-    97de:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #84
-    97e0:      	adds	r4, #246
-    97e2:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #80
-    97e4:      	adds	r4, #245
-    97e6:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #76
-    97e8:      	adds	r4, #244
-    97ea:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #72
-    97ec:      	adds	r4, #243
-    97ee:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #68
-    97f0:      	adds	r4, #242
-    97f2:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #64
-    97f4:      	adds	r4, #241
-    97f6:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #60
-    97f8:      	adds	r4, #240
-    97fa:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #56
-    97fc:      	adds	r4, #239
-    97fe:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #52
-    9800:      	adds	r4, #238
-    9802:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #48
-    9804:      	adds	r4, #237
-    9806:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #44
-    9808:      	adds	r4, #236
-    980a:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #40
-    980c:      	adds	r4, #235
-    980e:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #36
-    9810:      	adds	r4, #234
-    9812:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #32
-    9814:      	adds	r4, #233
-    9816:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #28
-    9818:      	adds	r4, #232
-    981a:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #24
-    981c:      	adds	r4, #231
-    981e:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #20
-    9820:      	adds	r4, #230
-    9822:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #16
-    9824:      	adds	r4, #229
-    9826:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #12
-    9828:      	adds	r4, #228
-    982a:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #8
-    982c:      	adds	r4, #227
-    982e:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #4
-    9830:      	adds	r4, #226
-    9832:      	b	0x9836 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #0
-    9834:      	adds	r4, #225
-    9836:      	cmp	r4, r1
-    9838:      	bhs	0x9848 <core::str::slice_error_fail::h26c332087be94791+0x1dc> @ imm = #12
-    983a:      	ldr	r2, [sp, #20]
-    983c:      	ldrsb	r0, [r2, r4]
-    983e:      	cmp	r0, r6
-    9840:      	mov	r0, r2
-    9842:      	ble	0x98d8 <core::str::slice_error_fail::h26c332087be94791+0x26c> @ imm = #146
-    9844:      	mov	r2, r4
-    9846:      	b	0x984e <core::str::slice_error_fail::h26c332087be94791+0x1e2> @ imm = #4
-    9848:      	mov	r2, r1
-    984a:      	ldr	r0, [sp, #20]
-    984c:      	bne	0x98d8 <core::str::slice_error_fail::h26c332087be94791+0x26c> @ imm = #136
-    984e:      	str	r2, [sp, #36]
-    9850:      	str	r0, [sp, #32]
-    9852:      	ldr	r2, [pc, #504] <$d.487+0x6>
-    9854:      	str	r2, [sp, #40]
-    9856:      	movs	r6, #5
-    9858:      	ldr	r5, [sp, #16]
-    985a:      	ldr	r2, [sp, #12]
-    985c:      	ldr	r4, [r7, #8]
-    985e:      	str	r6, [sp, #44]
-    9860:      	cmp	r2, r1
-    9862:      	bhi	0x989c <core::str::slice_error_fail::h26c332087be94791+0x230> @ imm = #54
-    9864:      	cmp	r3, r1
-    9866:      	bhi	0x989c <core::str::slice_error_fail::h26c332087be94791+0x230> @ imm = #50
-    9868:      	cmp	r2, r3
-    986a:      	bls	0x98e6 <core::str::slice_error_fail::h26c332087be94791+0x27a> @ imm = #120
-    986c:      	movs	r0, #4
-    986e:      	str	r0, [sp, #84]
-    9870:      	add	r1, sp, #88
-    9872:      	str	r1, [sp, #80]
-    9874:      	movs	r1, #0
-    9876:      	str	r1, [sp, #76]
-    9878:      	str	r1, [sp, #72]
-    987a:      	str	r0, [sp, #68]
-    987c:      	ldr	r0, [pc, #492] <$d.487+0x24>
-    987e:      	str	r0, [sp, #64]
-    9880:      	ldr	r0, [pc, #468] <$d.487+0x10>
-    9882:      	str	r0, [sp, #116]
-    9884:      	add	r1, sp, #40
-    9886:      	str	r1, [sp, #112]
-    9888:      	str	r0, [sp, #108]
-    988a:      	add	r0, sp, #32
-    988c:      	str	r0, [sp, #104]
-    988e:      	ldr	r0, [pc, #468] <$d.487+0x1e>
-    9890:      	str	r0, [sp, #100]
-    9892:      	add	r1, sp, #28
-    9894:      	str	r1, [sp, #96]
-    9896:      	str	r0, [sp, #92]
-    9898:      	add	r0, sp, #24
-    989a:      	b	0x98cc <core::str::slice_error_fail::h26c332087be94791+0x260> @ imm = #46
-    989c:      	cmp	r2, r1
-    989e:      	bhi	0x98a2 <core::str::slice_error_fail::h26c332087be94791+0x236> @ imm = #0
-    98a0:      	mov	r2, r3
-    98a2:      	str	r2, [sp, #56]
-    98a4:      	movs	r0, #3
-    98a6:      	str	r0, [sp, #84]
-    98a8:      	add	r1, sp, #88
-    98aa:      	str	r1, [sp, #80]
-    98ac:      	movs	r1, #0
-    98ae:      	str	r1, [sp, #76]
-    98b0:      	str	r1, [sp, #72]
-    98b2:      	str	r0, [sp, #68]
-    98b4:      	ldr	r0, [pc, #440] <$d.487+0x28>
-    98b6:      	str	r0, [sp, #64]
-    98b8:      	ldr	r0, [pc, #412] <$d.487+0x10>
-    98ba:      	str	r0, [sp, #108]
-    98bc:      	add	r1, sp, #40
-    98be:      	str	r1, [sp, #104]
-    98c0:      	str	r0, [sp, #100]
-    98c2:      	add	r0, sp, #32
-    98c4:      	str	r0, [sp, #96]
-    98c6:      	ldr	r0, [pc, #412] <$d.487+0x1e>
-    98c8:      	str	r0, [sp, #92]
-    98ca:      	add	r0, sp, #56
-    98cc:      	str	r0, [sp, #88]
-    98ce:      	add	r0, sp, #64
-    98d0:      	mov	r1, r4
-    98d2:      	bl	0x85b4 <core::panicking::panic_fmt::h884220a03f3bce26> @ imm = #-4898
-    98d6:      	trap
-    98d8:      	ldr	r2, [pc, #364] <$d.487>
-    98da:      	str	r2, [sp]
-    98dc:      	movs	r2, #0
-    98de:      	mov	r3, r4
-    98e0:      	bl	0x966c <core::str::slice_error_fail::h26c332087be94791> @ imm = #-632
-    98e4:      	trap
-    98e6:      	cmp	r2, #0
-    98e8:      	bne	0x9902 <core::str::slice_error_fail::h26c332087be94791+0x296> @ imm = #22
-    98ea:      	str	r3, [sp, #48]
-    98ec:      	cmp	r3, #0
-    98ee:      	bne	0x9944 <core::str::slice_error_fail::h26c332087be94791+0x2d8> @ imm = #82
-    98f0:      	movs	r3, #0
-    98f2:      	cmp	r3, r1
-    98f4:      	bne	0x991a <core::str::slice_error_fail::h26c332087be94791+0x2ae> @ imm = #34
-    98f6:      	ldr	r0, [pc, #368] <$d.487+0x22>
-    98f8:      	movs	r1, #43
-    98fa:      	mov	r2, r4
-    98fc:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #-5048
-    9900:      	trap
-    9902:      	cmp	r2, r1
-    9904:      	bhs	0x9932 <core::str::slice_error_fail::h26c332087be94791+0x2c6> @ imm = #42
-    9906:      	str	r4, [sp, #16]
-    9908:      	mov	r4, r2
-    990a:      	ldrsb	r6, [r0, r2]
-    990c:      	movs	r2, #64
-    990e:      	mvns	r2, r2
-    9910:      	cmp	r6, r2
-    9912:      	mov	r2, r4
-    9914:      	ldr	r4, [sp, #16]
-    9916:      	bgt	0x98ea <core::str::slice_error_fail::h26c332087be94791+0x27e> @ imm = #-48
-    9918:      	b	0x9936 <core::str::slice_error_fail::h26c332087be94791+0x2ca> @ imm = #26
-    991a:      	str	r5, [sp, #16]
-    991c:      	mov	r2, r0
-    991e:      	adds	r6, r0, r3
-    9920:      	movs	r0, #0
-    9922:      	str	r0, [sp, #12]
-    9924:      	ldrsb	r0, [r6, r0]
-    9926:      	uxtb	r5, r0
-    9928:      	cmp	r0, #0
-    992a:      	bmi	0x9962 <core::str::slice_error_fail::h26c332087be94791+0x2f6> @ imm = #52
-    992c:      	str	r5, [sp, #52]
-    992e:      	ldr	r5, [sp, #16]
-    9930:      	b	0x9a06 <core::str::slice_error_fail::h26c332087be94791+0x39a> @ imm = #210
-    9932:      	cmp	r1, r2
-    9934:      	beq	0x98ea <core::str::slice_error_fail::h26c332087be94791+0x27e> @ imm = #-78
-    9936:      	str	r2, [sp, #48]
-    9938:      	mov	r3, r2
-    993a:      	b	0x9944 <core::str::slice_error_fail::h26c332087be94791+0x2d8> @ imm = #6
-    993c:      	cmp	r1, r3
-    993e:      	beq	0x98f6 <core::str::slice_error_fail::h26c332087be94791+0x28a> @ imm = #-76
-    9940:      	subs	r3, r3, #1
-    9942:      	beq	0x98f0 <core::str::slice_error_fail::h26c332087be94791+0x284> @ imm = #-86
-    9944:      	cmp	r3, r1
-    9946:      	bhs	0x993c <core::str::slice_error_fail::h26c332087be94791+0x2d0> @ imm = #-14
-    9948:      	ldrsb	r6, [r0, r3]
-    994a:      	movs	r2, #63
-    994c:      	mvns	r2, r2
-    994e:      	cmp	r6, r2
-    9950:      	blt	0x9940 <core::str::slice_error_fail::h26c332087be94791+0x2d4> @ imm = #-20
-    9952:      	cmp	r3, r1
-    9954:      	bhs	0x9996 <core::str::slice_error_fail::h26c332087be94791+0x32a> @ imm = #62
-    9956:      	ldrsb	r6, [r0, r3]
-    9958:      	movs	r2, #64
-    995a:      	mvns	r2, r2
-    995c:      	cmp	r6, r2
-    995e:      	bgt	0x98f2 <core::str::slice_error_fail::h26c332087be94791+0x286> @ imm = #-112
-    9960:      	b	0x999a <core::str::slice_error_fail::h26c332087be94791+0x32e> @ imm = #54
-    9962:      	str	r5, [sp, #8]
-    9964:      	adds	r1, r2, r1
-    9966:      	adds	r0, r6, #1
-    9968:      	movs	r2, #31
-    996a:      	cmp	r0, r1
-    996c:      	mov	r0, r1
-    996e:      	beq	0x997a <core::str::slice_error_fail::h26c332087be94791+0x30e> @ imm = #8
-    9970:      	ldrb	r0, [r6, #1]
-    9972:      	movs	r5, #63
-    9974:      	ands	r5, r0
-    9976:      	str	r5, [sp, #12]
-    9978:      	adds	r0, r6, #2
-    997a:      	ldr	r5, [sp, #8]
-    997c:      	ands	r2, r5
-    997e:      	cmp	r5, #223
-    9980:      	bls	0x998c <core::str::slice_error_fail::h26c332087be94791+0x320> @ imm = #8
-    9982:      	cmp	r0, r1
-    9984:      	bne	0x99a6 <core::str::slice_error_fail::h26c332087be94791+0x33a> @ imm = #30
-    9986:      	movs	r6, #0
-    9988:      	str	r1, [sp, #20]
-    998a:      	b	0x99b0 <core::str::slice_error_fail::h26c332087be94791+0x344> @ imm = #34
-    998c:      	lsls	r0, r2, #6
-    998e:      	ldr	r1, [sp, #12]
-    9990:      	adds	r0, r1, r0
-    9992:      	ldr	r5, [sp, #16]
-    9994:      	b	0x99ee <core::str::slice_error_fail::h26c332087be94791+0x382> @ imm = #86
-    9996:      	cmp	r1, r3
-    9998:      	beq	0x98f6 <core::str::slice_error_fail::h26c332087be94791+0x28a> @ imm = #-166
-    999a:      	str	r4, [sp]
-    999c:      	mov	r2, r3
-    999e:      	mov	r3, r1
-    99a0:      	bl	0x966c <core::str::slice_error_fail::h26c332087be94791> @ imm = #-824
-    99a4:      	trap
-    99a6:      	ldrb	r5, [r0]
-    99a8:      	movs	r6, #63
-    99aa:      	ands	r6, r5
-    99ac:      	adds	r0, r0, #1
-    99ae:      	str	r0, [sp, #20]
-    99b0:      	ldr	r0, [sp, #12]
-    99b2:      	lsls	r0, r0, #6
-    99b4:      	adds	r0, r6, r0
-    99b6:      	ldr	r5, [sp, #8]
-    99b8:      	cmp	r5, #240
-    99ba:      	blo	0x99c6 <core::str::slice_error_fail::h26c332087be94791+0x35a> @ imm = #8
-    99bc:      	ldr	r5, [sp, #20]
-    99be:      	cmp	r5, r1
-    99c0:      	bne	0x99ce <core::str::slice_error_fail::h26c332087be94791+0x362> @ imm = #10
-    99c2:      	movs	r1, #0
-    99c4:      	b	0x99da <core::str::slice_error_fail::h26c332087be94791+0x36e> @ imm = #18
-    99c6:      	lsls	r1, r2, #12
-    99c8:      	adds	r0, r0, r1
-    99ca:      	ldr	r5, [sp, #16]
-    99cc:      	b	0x99ee <core::str::slice_error_fail::h26c332087be94791+0x382> @ imm = #30
-    99ce:      	mov	r1, r5
-    99d0:      	mov	r5, r2
-    99d2:      	ldrb	r2, [r1]
-    99d4:      	movs	r1, #63
-    99d6:      	ands	r1, r2
-    99d8:      	mov	r2, r5
-    99da:      	ldr	r5, [sp, #16]
-    99dc:      	lsls	r0, r0, #6
-    99de:      	lsls	r2, r2, #29
-    99e0:      	lsrs	r2, r2, #11
-    99e2:      	adds	r0, r0, r2
-    99e4:      	adds	r0, r0, r1
-    99e6:      	movs	r1, #17
-    99e8:      	lsls	r1, r1, #16
-    99ea:      	cmp	r0, r1
-    99ec:      	beq	0x98f6 <core::str::slice_error_fail::h26c332087be94791+0x28a> @ imm = #-250
-    99ee:      	str	r0, [sp, #52]
-    99f0:      	cmp	r0, #128
-    99f2:      	blo	0x9a06 <core::str::slice_error_fail::h26c332087be94791+0x39a> @ imm = #16
-    99f4:      	lsrs	r1, r0, #11
-    99f6:      	bne	0x99fc <core::str::slice_error_fail::h26c332087be94791+0x390> @ imm = #2
-    99f8:      	movs	r5, #2
-    99fa:      	b	0x9a06 <core::str::slice_error_fail::h26c332087be94791+0x39a> @ imm = #8
-    99fc:      	lsrs	r0, r0, #16
-    99fe:      	beq	0x9a04 <core::str::slice_error_fail::h26c332087be94791+0x398> @ imm = #2
-    9a00:      	movs	r5, #4
-    9a02:      	b	0x9a06 <core::str::slice_error_fail::h26c332087be94791+0x39a> @ imm = #0
-    9a04:      	movs	r5, #3
-    9a06:      	str	r3, [sp, #56]
-    9a08:      	adds	r0, r5, r3
-    9a0a:      	str	r0, [sp, #60]
-    9a0c:      	movs	r0, #5
-    9a0e:      	str	r0, [sp, #84]
-    9a10:      	add	r1, sp, #88
-    9a12:      	str	r1, [sp, #80]
-    9a14:      	movs	r1, #0
-    9a16:      	str	r1, [sp, #76]
-    9a18:      	str	r1, [sp, #72]
-    9a1a:      	str	r0, [sp, #68]
-    9a1c:      	ldr	r0, [pc, #52] <$d.487+0xc>
-    9a1e:      	str	r0, [sp, #64]
-    9a20:      	ldr	r0, [pc, #52] <$d.487+0x10>
-    9a22:      	str	r0, [sp, #124]
-    9a24:      	add	r1, sp, #40
-    9a26:      	str	r1, [sp, #120]
-    9a28:      	str	r0, [sp, #116]
-    9a2a:      	add	r0, sp, #32
-    9a2c:      	str	r0, [sp, #112]
-    9a2e:      	ldr	r0, [pc, #44] <$d.487+0x16>
-    9a30:      	str	r0, [sp, #108]
-    9a32:      	add	r0, sp, #56
-    9a34:      	str	r0, [sp, #104]
-    9a36:      	ldr	r0, [pc, #40] <$d.487+0x1a>
-    9a38:      	str	r0, [sp, #100]
-    9a3a:      	add	r0, sp, #52
-    9a3c:      	str	r0, [sp, #96]
-    9a3e:      	ldr	r0, [pc, #36] <$d.487+0x1e>
-    9a40:      	str	r0, [sp, #92]
-    9a42:      	add	r0, sp, #48
-    9a44:      	b	0x98cc <core::str::slice_error_fail::h26c332087be94791+0x260> @ imm = #-380
-    9a46:      	mov	r8, r8
-
-00009a48 <$d.487>:
-    9a48:	00 bc 00 00	.word	0x0000bc00
-    9a4c:	10 bc 00 00	.word	0x0000bc10
-    9a50:	34 b9 00 00	.word	0x0000b934
-    9a54:	ac bc 00 00	.word	0x0000bcac
-    9a58:	8d a2 00 00	.word	0x0000a28d
-    9a5c:	d5 83 00 00	.word	0x000083d5
-    9a60:	c9 93 00 00	.word	0x000093c9
-    9a64:	85 a1 00 00	.word	0x0000a185
-    9a68:	40 b9 00 00	.word	0x0000b940
-    9a6c:	60 bc 00 00	.word	0x0000bc60
-    9a70:	38 bc 00 00	.word	0x0000bc38
-
-00009a74 <core::unicode::printable::is_printable::h6cdd76e17613ee9f>:
-    9a74:      	push	{r4, r5, r6, r7, lr}
-    9a76:      	add	r7, sp, #12
-    9a78:      	sub	sp, #20
-    9a7a:      	mov	r6, r0
-    9a7c:      	lsrs	r0, r0, #16
-    9a7e:      	bne	0x9b68 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xf4> @ imm = #230
-    9a80:      	uxtb	r5, r6
-    9a82:      	movs	r0, #9
-    9a84:      	lsls	r0, r0, #5
-    9a86:      	str	r0, [sp, #8]
-    9a88:      	str	r6, [sp]
-    9a8a:      	lsrs	r0, r6, #8
-    9a8c:      	uxtb	r0, r0
-    9a8e:      	str	r0, [sp, #16]
-    9a90:      	ldr	r1, [pc, #684] <$d.527+0x48>
-    9a92:      	movs	r3, #0
-    9a94:      	movs	r0, #1
-    9a96:      	str	r0, [sp, #12]
-    9a98:      	b	0x9aa0 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x2c> @ imm = #4
-    9a9a:      	cmp	r0, #0
-    9a9c:      	mov	r3, r6
-    9a9e:      	bne	0x9b1c <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xa8> @ imm = #122
-    9aa0:      	ldrb	r6, [r1, #1]
-    9aa2:      	adds	r2, r3, r6
-    9aa4:      	ldrb	r0, [r1]
-    9aa6:      	adds	r1, r1, #2
-    9aa8:      	ldr	r4, [sp, #16]
-    9aaa:      	cmp	r0, r4
-    9aac:      	bne	0x9afc <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x88> @ imm = #76
-    9aae:      	cmp	r2, r3
-    9ab0:      	bhs	0x9ab4 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x40> @ imm = #0
-    9ab2:      	b	0x9cc6 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x252> @ imm = #528
-    9ab4:      	str	r2, [sp, #4]
-    9ab6:      	ldr	r0, [sp, #8]
-    9ab8:      	cmp	r2, r0
-    9aba:      	bls	0x9abe <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x4a> @ imm = #0
-    9abc:      	b	0x9cd2 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x25e> @ imm = #530
-    9abe:      	ldr	r0, [pc, #644] <$d.527+0x4e>
-    9ac0:      	adds	r0, r0, r3
-    9ac2:      	adds	r3, r0, r6
-    9ac4:      	cmp	r6, #0
-    9ac6:      	beq	0x9b12 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x9e> @ imm = #72
-    9ac8:      	ldrb	r4, [r0]
-    9aca:      	movs	r2, #0
-    9acc:      	cmp	r4, r5
-    9ace:      	beq	0x9b60 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #142
-    9ad0:      	adds	r4, r0, #1
-    9ad2:      	cmp	r4, r3
-    9ad4:      	beq	0x9b12 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x9e> @ imm = #58
-    9ad6:      	ldrb	r4, [r0, #1]
-    9ad8:      	cmp	r4, r5
-    9ada:      	beq	0x9b60 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #130
-    9adc:      	adds	r4, r0, #2
-    9ade:      	cmp	r4, r3
-    9ae0:      	beq	0x9b12 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x9e> @ imm = #46
-    9ae2:      	ldrb	r4, [r0, #2]
-    9ae4:      	cmp	r4, r5
-    9ae6:      	beq	0x9b60 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #118
-    9ae8:      	adds	r4, r0, #3
-    9aea:      	cmp	r4, r3
-    9aec:      	beq	0x9b12 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x9e> @ imm = #34
-    9aee:      	subs	r6, r6, #4
-    9af0:      	adds	r4, r0, #4
-    9af2:      	ldrb	r0, [r0, #3]
-    9af4:      	cmp	r0, r5
-    9af6:      	mov	r0, r4
-    9af8:      	bne	0x9ac4 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x50> @ imm = #-56
-    9afa:      	b	0x9b60 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #98
-    9afc:      	mov	r6, r2
-    9afe:      	ldr	r2, [pc, #576] <$d.527+0x4a>
-    9b00:      	subs	r3, r1, r2
-    9b02:      	subs	r3, #80
-    9b04:      	rsbs	r2, r3, #0
-    9b06:      	adcs	r2, r3
-    9b08:      	cmp	r0, r4
-    9b0a:      	ldr	r0, [sp, #12]
-    9b0c:      	bhi	0x9a9a <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x26> @ imm = #-118
-    9b0e:      	mov	r0, r2
-    9b10:      	b	0x9a9a <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x26> @ imm = #-122
-    9b12:      	ldr	r0, [pc, #556] <$d.527+0x4a>
-    9b14:      	adds	r0, #80
-    9b16:      	cmp	r1, r0
-    9b18:      	ldr	r3, [sp, #4]
-    9b1a:      	bne	0x9aa0 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x2c> @ imm = #-126
-    9b1c:      	ldr	r0, [sp]
-    9b1e:      	uxth	r0, r0
-    9b20:      	ldr	r1, [pc, #548] <$d.527+0x50>
-    9b22:      	ldr	r2, [sp, #12]
-    9b24:      	mov	r3, r1
-    9b26:      	adds	r6, r3, #1
-    9b28:      	ldrb	r4, [r3]
-    9b2a:      	sxtb	r5, r4
-    9b2c:      	cmp	r5, #0
-    9b2e:      	bmi	0x9b38 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xc4> @ imm = #6
-    9b30:      	mov	r3, r6
-    9b32:      	subs	r0, r0, r4
-    9b34:      	bpl	0x9b52 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xde> @ imm = #26
-    9b36:      	b	0x9b60 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #38
-    9b38:      	movs	r4, #255
-    9b3a:      	adds	r4, #48
-    9b3c:      	adds	r4, r1, r4
-    9b3e:      	cmp	r6, r4
-    9b40:      	bne	0x9b44 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xd0> @ imm = #0
-    9b42:      	b	0x9cea <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x276> @ imm = #420
-    9b44:      	ldrb	r4, [r3, #1]
-    9b46:      	lsls	r5, r5, #25
-    9b48:      	lsrs	r5, r5, #17
-    9b4a:      	adds	r4, r5, r4
-    9b4c:      	adds	r3, r3, #2
-    9b4e:      	subs	r0, r0, r4
-    9b50:      	bmi	0x9b60 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #12
-    9b52:      	movs	r4, #1
-    9b54:      	eors	r2, r4
-    9b56:      	movs	r4, #255
-    9b58:      	adds	r4, #48
-    9b5a:      	adds	r4, r1, r4
-    9b5c:      	cmp	r3, r4
-    9b5e:      	bne	0x9b26 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xb2> @ imm = #-60
-    9b60:      	movs	r0, #1
-    9b62:      	ands	r0, r2
-    9b64:      	add	sp, #20
-    9b66:      	pop	{r4, r5, r6, r7, pc}
-    9b68:      	lsrs	r0, r6, #17
-    9b6a:      	bne	0x9c48 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x1d4> @ imm = #218
-    9b6c:      	uxtb	r5, r6
-    9b6e:      	str	r6, [sp]
-    9b70:      	lsrs	r0, r6, #8
-    9b72:      	uxtb	r0, r0
-    9b74:      	str	r0, [sp, #12]
-    9b76:      	ldr	r4, [pc, #432] <$d.527+0x32>
-    9b78:      	movs	r1, #0
-    9b7a:      	movs	r2, #1
-    9b7c:      	str	r2, [sp, #8]
-    9b7e:      	b	0x9b86 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x112> @ imm = #4
-    9b80:      	cmp	r2, #0
-    9b82:      	ldr	r4, [sp, #16]
-    9b84:      	bne	0x9c04 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x190> @ imm = #124
-    9b86:      	mov	r3, r1
-    9b88:      	ldrb	r0, [r4, #1]
-    9b8a:      	adds	r1, r1, r0
-    9b8c:      	ldrb	r2, [r4]
-    9b8e:      	adds	r4, r4, #2
-    9b90:      	ldr	r6, [sp, #12]
-    9b92:      	cmp	r2, r6
-    9b94:      	str	r4, [sp, #16]
-    9b96:      	bne	0x9be4 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x170> @ imm = #74
-    9b98:      	cmp	r1, r3
-    9b9a:      	bhs	0x9b9e <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x12a> @ imm = #0
-    9b9c:      	b	0x9cc8 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x254> @ imm = #296
-    9b9e:      	str	r1, [sp, #4]
-    9ba0:      	cmp	r1, #192
-    9ba2:      	bls	0x9ba6 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x132> @ imm = #0
-    9ba4:      	b	0x9cde <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x26a> @ imm = #310
-    9ba6:      	ldr	r1, [pc, #388] <$d.527+0x36>
-    9ba8:      	adds	r6, r1, r3
-    9baa:      	adds	r3, r6, r0
-    9bac:      	cmp	r0, #0
-    9bae:      	beq	0x9bf8 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x184> @ imm = #70
-    9bb0:      	ldrb	r4, [r6]
-    9bb2:      	movs	r2, #0
-    9bb4:      	cmp	r4, r5
-    9bb6:      	beq	0x9b60 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #-90
-    9bb8:      	adds	r4, r6, #1
-    9bba:      	cmp	r4, r3
-    9bbc:      	beq	0x9bf8 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x184> @ imm = #56
-    9bbe:      	ldrb	r4, [r6, #1]
-    9bc0:      	cmp	r4, r5
-    9bc2:      	beq	0x9b60 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #-102
-    9bc4:      	adds	r4, r6, #2
-    9bc6:      	cmp	r4, r3
-    9bc8:      	beq	0x9bf8 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x184> @ imm = #44
-    9bca:      	ldrb	r4, [r6, #2]
-    9bcc:      	cmp	r4, r5
-    9bce:      	beq	0x9b60 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #-114
-    9bd0:      	adds	r4, r6, #3
-    9bd2:      	cmp	r4, r3
-    9bd4:      	beq	0x9bf8 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x184> @ imm = #32
-    9bd6:      	subs	r0, r0, #4
-    9bd8:      	adds	r4, r6, #4
-    9bda:      	ldrb	r6, [r6, #3]
-    9bdc:      	cmp	r6, r5
-    9bde:      	mov	r6, r4
-    9be0:      	bne	0x9bac <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x138> @ imm = #-56
-    9be2:      	b	0x9b60 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #-134
-    9be4:      	ldr	r0, [pc, #320] <$d.527+0x30>
-    9be6:      	subs	r3, r4, r0
-    9be8:      	subs	r3, #84
-    9bea:      	rsbs	r0, r3, #0
-    9bec:      	adcs	r0, r3
-    9bee:      	cmp	r2, r6
-    9bf0:      	ldr	r2, [sp, #8]
-    9bf2:      	bhi	0x9b80 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x10c> @ imm = #-118
-    9bf4:      	mov	r2, r0
-    9bf6:      	b	0x9b80 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x10c> @ imm = #-122
-    9bf8:      	ldr	r0, [pc, #300] <$d.527+0x30>
-    9bfa:      	adds	r0, #84
-    9bfc:      	ldr	r4, [sp, #16]
-    9bfe:      	cmp	r4, r0
-    9c00:      	ldr	r1, [sp, #4]
-    9c02:      	bne	0x9b86 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x112> @ imm = #-128
-    9c04:      	ldr	r0, [sp]
-    9c06:      	uxth	r0, r0
-    9c08:      	ldr	r1, [pc, #292] <$d.527+0x38>
-    9c0a:      	ldr	r2, [sp, #8]
-    9c0c:      	mov	r3, r1
-    9c0e:      	adds	r6, r3, #1
-    9c10:      	ldrb	r4, [r3]
-    9c12:      	sxtb	r5, r4
-    9c14:      	cmp	r5, #0
-    9c16:      	bmi	0x9c20 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x1ac> @ imm = #6
-    9c18:      	mov	r3, r6
-    9c1a:      	subs	r0, r0, r4
-    9c1c:      	bpl	0x9c38 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x1c4> @ imm = #24
-    9c1e:      	b	0x9b60 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #-194
-    9c20:      	movs	r4, #219
-    9c22:      	lsls	r4, r4, #1
-    9c24:      	adds	r4, r1, r4
-    9c26:      	cmp	r6, r4
-    9c28:      	beq	0x9cea <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x276> @ imm = #190
-    9c2a:      	ldrb	r4, [r3, #1]
-    9c2c:      	lsls	r5, r5, #25
-    9c2e:      	lsrs	r5, r5, #17
-    9c30:      	adds	r4, r5, r4
-    9c32:      	adds	r3, r3, #2
-    9c34:      	subs	r0, r0, r4
-    9c36:      	bmi	0x9b60 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #-218
-    9c38:      	movs	r4, #1
-    9c3a:      	eors	r2, r4
-    9c3c:      	movs	r4, #219
-    9c3e:      	lsls	r4, r4, #1
-    9c40:      	adds	r4, r1, r4
-    9c42:      	cmp	r3, r4
-    9c44:      	bne	0x9c0e <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x19a> @ imm = #-58
-    9c46:      	b	0x9b60 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #-234
-    9c48:      	ldr	r1, [pc, #172] <$d.527>
-    9c4a:      	mov	r0, r1
-    9c4c:      	adds	r0, #30
-    9c4e:      	ands	r0, r6
-    9c50:      	ldr	r2, [pc, #168] <$d.527+0x4>
-    9c52:      	subs	r0, r0, r2
-    9c54:      	subs	r2, r0, #1
-    9c56:      	sbcs	r0, r2
-    9c58:      	ands	r1, r6
-    9c5a:      	ldr	r2, [pc, #164] <$d.527+0xa>
-    9c5c:      	subs	r2, r1, r2
-    9c5e:      	subs	r1, r2, #1
-    9c60:      	sbcs	r2, r1
-    9c62:      	ldr	r1, [pc, #160] <$d.527+0xe>
-    9c64:      	adds	r4, r6, r1
-    9c66:      	movs	r1, #1
-    9c68:      	movs	r3, #0
-    9c6a:      	cmp	r4, #6
-    9c6c:      	mov	r4, r1
-    9c6e:      	bhi	0x9c72 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x1fe> @ imm = #0
-    9c70:      	mov	r4, r3
-    9c72:      	ands	r2, r4
-    9c74:      	ands	r2, r0
-    9c76:      	ldr	r0, [pc, #144] <$d.527+0x12>
-    9c78:      	adds	r0, r6, r0
-    9c7a:      	cmp	r0, #13
-    9c7c:      	mov	r0, r1
-    9c7e:      	bhi	0x9c82 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x20e> @ imm = #0
-    9c80:      	mov	r0, r3
-    9c82:      	ands	r2, r0
-    9c84:      	ldr	r0, [pc, #132] <$d.527+0x14>
-    9c86:      	adds	r0, r6, r0
-    9c88:      	ldr	r4, [pc, #132] <$d.527+0x18>
-    9c8a:      	cmp	r0, r4
-    9c8c:      	mov	r0, r1
-    9c8e:      	bhi	0x9c92 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x21e> @ imm = #0
-    9c90:      	mov	r0, r3
-    9c92:      	ands	r2, r0
-    9c94:      	ldr	r0, [pc, #124] <$d.527+0x1c>
-    9c96:      	adds	r0, r6, r0
-    9c98:      	ldr	r4, [pc, #124] <$d.527+0x20>
-    9c9a:      	cmp	r0, r4
-    9c9c:      	mov	r0, r1
-    9c9e:      	bhi	0x9ca2 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x22e> @ imm = #0
-    9ca0:      	mov	r0, r3
-    9ca2:      	ands	r2, r0
-    9ca4:      	ldr	r0, [pc, #116] <$d.527+0x24>
-    9ca6:      	adds	r0, r6, r0
-    9ca8:      	ldr	r4, [pc, #116] <$d.527+0x28>
-    9caa:      	cmp	r0, r4
-    9cac:      	mov	r0, r1
-    9cae:      	bhi	0x9cb2 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x23e> @ imm = #0
-    9cb0:      	mov	r0, r3
-    9cb2:      	ands	r2, r0
-    9cb4:      	ldr	r0, [pc, #108] <$d.527+0x2c>
-    9cb6:      	cmp	r6, r0
-    9cb8:      	blo	0x9cbc <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x248> @ imm = #0
-    9cba:      	mov	r1, r3
-    9cbc:      	ands	r2, r1
-    9cbe:      	movs	r0, #1
-    9cc0:      	ands	r0, r2
-    9cc2:      	add	sp, #20
-    9cc4:      	pop	{r4, r5, r6, r7, pc}
-    9cc6:      	mov	r1, r2
-    9cc8:      	ldr	r2, [pc, #112] <$d.527+0x44>
-    9cca:      	mov	r0, r3
-    9ccc:      	bl	0x962c <core::slice::index::slice_index_order_fail::h35619d5607b7eea8> @ imm = #-1700
-    9cd0:      	trap
-    9cd2:      	ldr	r2, [pc, #104] <$d.527+0x46>
-    9cd4:      	ldr	r0, [sp, #4]
-    9cd6:      	ldr	r1, [sp, #8]
-    9cd8:      	bl	0x95ec <core::slice::index::slice_end_index_len_fail::h4968a5fa708ed4f2> @ imm = #-1776
-    9cdc:      	trap
-    9cde:      	movs	r1, #192
-    9ce0:      	ldr	r2, [pc, #88] <$d.527+0x44>
-    9ce2:      	ldr	r0, [sp, #4]
-    9ce4:      	bl	0x95ec <core::slice::index::slice_end_index_len_fail::h4968a5fa708ed4f2> @ imm = #-1788
-    9ce8:      	trap
-    9cea:      	ldr	r0, [pc, #72] <$d.527+0x3e>
-    9cec:      	movs	r1, #43
-    9cee:      	ldr	r2, [pc, #72] <$d.527+0x42>
-    9cf0:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #-6060
-    9cf4:      	trap
-    9cf6:      	mov	r8, r8
-
-00009cf8 <$d.527>:
-    9cf8:	e0 ff 1f 00	.word	0x001fffe0
-    9cfc:	1e b8 02 00	.word	0x0002b81e
-    9d00:	e0 a6 02 00	.word	0x0002a6e0
-    9d04:	c7 48 fd ff	.word	0xfffd48c7
-    9d08:	5e 31 fd ff	.word	0xfffd315e
-    9d0c:	1f 14 fd ff	.word	0xfffd141f
-    9d10:	1e 0c 00 00	.word	0x00000c1e
-    9d14:	e2 05 fd ff	.word	0xfffd05e2
-    9d18:	e1 05 00 00	.word	0x000005e1
-    9d1c:	b5 ec fc ff	.word	0xfffcecb5
-    9d20:	b4 ed 0a 00	.word	0x000aedb4
-    9d24:	f0 01 0e 00	.word	0x000e01f0
-    9d28:	bb bf 00 00	.word	0x0000bfbb
-    9d2c:	0f c0 00 00	.word	0x0000c00f
-    9d30:	cf c0 00 00	.word	0x0000c0cf
-    9d34:	40 b9 00 00	.word	0x0000b940
-    9d38:	0c bd 00 00	.word	0x0000bd0c
-    9d3c:	fc bc 00 00	.word	0x0000bcfc
-    9d40:	1c bd 00 00	.word	0x0000bd1c
-    9d44:	6c bd 00 00	.word	0x0000bd6c
-    9d48:	8c be 00 00	.word	0x0000be8c
-
-00009d4c <core::fmt::num::<impl core::fmt::UpperHex for usize>::fmt::hfc47d2b9a0a2d699>:
-    9d4c:      	push	{r4, r5, r7, lr}
-    9d4e:      	add	r7, sp, #8
-    9d50:      	sub	sp, #136
-    9d52:      	ldr	r0, [r0]
-    9d54:      	movs	r2, #129
-    9d56:      	b	0x9d6a <core::fmt::num::<impl core::fmt::UpperHex for usize>::fmt::hfc47d2b9a0a2d699+0x1e> @ imm = #16
-    9d58:      	movs	r3, #55
-    9d5a:      	adds	r3, r3, r4
-    9d5c:      	add	r4, sp, #8
-    9d5e:      	adds	r4, r4, r2
-    9d60:      	subs	r4, r4, #3
-    9d62:      	strb	r3, [r4]
-    9d64:      	subs	r2, r2, #2
-    9d66:      	lsrs	r0, r0, #8
-    9d68:      	beq	0x9d98 <core::fmt::num::<impl core::fmt::UpperHex for usize>::fmt::hfc47d2b9a0a2d699+0x4c> @ imm = #44
-    9d6a:      	movs	r3, #15
-    9d6c:      	mov	r4, r0
-    9d6e:      	ands	r4, r3
-    9d70:      	cmp	r4, #10
-    9d72:      	blo	0x9d78 <core::fmt::num::<impl core::fmt::UpperHex for usize>::fmt::hfc47d2b9a0a2d699+0x2c> @ imm = #2
-    9d74:      	movs	r5, #55
-    9d76:      	b	0x9d7a <core::fmt::num::<impl core::fmt::UpperHex for usize>::fmt::hfc47d2b9a0a2d699+0x2e> @ imm = #0
-    9d78:      	movs	r5, #48
-    9d7a:      	adds	r4, r5, r4
-    9d7c:      	add	r5, sp, #8
-    9d7e:      	adds	r5, r5, r2
-    9d80:      	subs	r5, r5, #2
-    9d82:      	strb	r4, [r5]
-    9d84:      	lsrs	r4, r0, #4
-    9d86:      	beq	0x9d92 <core::fmt::num::<impl core::fmt::UpperHex for usize>::fmt::hfc47d2b9a0a2d699+0x46> @ imm = #8
-    9d88:      	ands	r4, r3
-    9d8a:      	cmp	r4, #10
-    9d8c:      	bhs	0x9d58 <core::fmt::num::<impl core::fmt::UpperHex for usize>::fmt::hfc47d2b9a0a2d699+0xc> @ imm = #-56
-    9d8e:      	movs	r3, #48
-    9d90:      	b	0x9d5a <core::fmt::num::<impl core::fmt::UpperHex for usize>::fmt::hfc47d2b9a0a2d699+0xe> @ imm = #-58
-    9d92:      	subs	r0, r2, #2
-    9d94:      	subs	r2, r2, #1
-    9d96:      	b	0x9d9a <core::fmt::num::<impl core::fmt::UpperHex for usize>::fmt::hfc47d2b9a0a2d699+0x4e> @ imm = #0
-    9d98:      	subs	r0, r2, #1
-    9d9a:      	cmp	r0, #129
-    9d9c:      	bhs	0x9dbc <core::fmt::num::<impl core::fmt::UpperHex for usize>::fmt::hfc47d2b9a0a2d699+0x70> @ imm = #28
-    9d9e:      	movs	r3, #129
-    9da0:      	subs	r2, r3, r2
-    9da2:      	str	r2, [sp, #4]
-    9da4:      	add	r2, sp, #8
-    9da6:      	adds	r0, r2, r0
-    9da8:      	str	r0, [sp]
-    9daa:      	movs	r4, #1
-    9dac:      	ldr	r2, [pc, #24] <$d.855>
-    9dae:      	movs	r3, #2
-    9db0:      	mov	r0, r1
-    9db2:      	mov	r1, r4
-    9db4:      	bl	0x8d3c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a> @ imm = #-4220
-    9db8:      	add	sp, #136
-    9dba:      	pop	{r4, r5, r7, pc}
-    9dbc:      	movs	r1, #128
-    9dbe:      	ldr	r2, [pc, #12] <$d.855+0x6>
-    9dc0:      	bl	0x95ac <core::slice::index::slice_start_index_len_fail::h3080a8211123744d> @ imm = #-2072
-    9dc4:      	trap
-    9dc6:      	mov	r8, r8
-
-00009dc8 <$d.855>:
-    9dc8:	58 ba 00 00	.word	0x0000ba58
-    9dcc:	48 ba 00 00	.word	0x0000ba48
-
-00009dd0 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795>:
-    9dd0:      	push	{r4, r5, r6, r7, lr}
-    9dd2:      	add	r7, sp, #12
-    9dd4:      	sub	sp, #148
-    9dd6:      	mov	r6, r1
-    9dd8:      	ldr	r1, [r1]
-    9dda:      	lsls	r2, r1, #27
-    9ddc:      	bmi	0x9e94 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0xc4> @ imm = #180
-    9dde:      	lsls	r1, r1, #26
-    9de0:      	bmi	0x9edc <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x10c> @ imm = #248
-    9de2:      	str	r6, [sp, #8]
-    9de4:      	ldr	r2, [r0]
-    9de6:      	ldr	r4, [pc, #420] <$d.873+0xa>
-    9de8:      	movs	r6, #39
-    9dea:      	cmp	r2, r4
-    9dec:      	bls	0x9e4c <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x7c> @ imm = #92
-    9dee:      	mov	r5, r2
-    9df0:      	str	r6, [sp, #16]
-    9df2:      	mov	r0, r5
-    9df4:      	ldr	r1, [pc, #408] <$d.873+0xc>
-    9df6:      	bl	0xa5b6 <__aeabi_uidiv>  @ imm = #1980
-    9dfa:      	str	r0, [sp, #12]
-    9dfc:      	adds	r1, r4, #1
-    9dfe:      	muls	r1, r0, r1
-    9e00:      	subs	r1, r5, r1
-    9e02:      	uxth	r2, r1
-    9e04:      	lsrs	r2, r2, #2
-    9e06:      	ldr	r0, [pc, #396] <$d.873+0x12>
-    9e08:      	muls	r2, r0, r2
-    9e0a:      	lsrs	r2, r2, #17
-    9e0c:      	lsls	r3, r2, #1
-    9e0e:      	ldr	r0, [pc, #392] <$d.873+0x16>
-    9e10:      	ldrb	r0, [r0, r3]
-    9e12:      	add	r4, sp, #20
-    9e14:      	adds	r4, r4, r6
-    9e16:      	subs	r6, r4, #4
-    9e18:      	strb	r0, [r6]
-    9e1a:      	ldr	r0, [pc, #380] <$d.873+0x16>
-    9e1c:      	adds	r0, r0, r3
-    9e1e:      	ldrb	r0, [r0, #1]
-    9e20:      	strb	r0, [r6, #1]
-    9e22:      	ldr	r6, [sp, #16]
-    9e24:      	movs	r0, #100
-    9e26:      	muls	r0, r2, r0
-    9e28:      	subs	r0, r1, r0
-    9e2a:      	uxth	r0, r0
-    9e2c:      	lsls	r0, r0, #1
-    9e2e:      	ldr	r2, [pc, #360] <$d.873+0x16>
-    9e30:      	ldrb	r1, [r2, r0]
-    9e32:      	mov	r3, r2
-    9e34:      	subs	r2, r4, #2
-    9e36:      	ldr	r4, [pc, #340] <$d.873+0xa>
-    9e38:      	strb	r1, [r2]
-    9e3a:      	adds	r0, r3, r0
-    9e3c:      	ldrb	r0, [r0, #1]
-    9e3e:      	strb	r0, [r2, #1]
-    9e40:      	ldr	r2, [sp, #12]
-    9e42:      	subs	r6, r6, #4
-    9e44:      	ldr	r0, [pc, #340] <$d.873+0x18>
-    9e46:      	cmp	r5, r0
-    9e48:      	mov	r5, r2
-    9e4a:      	bhi	0x9df0 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x20> @ imm = #-94
-    9e4c:      	cmp	r2, #99
-    9e4e:      	bgt	0x9e52 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x82> @ imm = #0
-    9e50:      	b	0x9f58 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x188> @ imm = #260
-    9e52:      	uxth	r0, r2
-    9e54:      	lsrs	r0, r0, #2
-    9e56:      	ldr	r1, [pc, #316] <$d.873+0x12>
-    9e58:      	muls	r1, r0, r1
-    9e5a:      	lsrs	r1, r1, #17
-    9e5c:      	movs	r0, #100
-    9e5e:      	muls	r0, r1, r0
-    9e60:      	subs	r0, r2, r0
-    9e62:      	uxth	r0, r0
-    9e64:      	lsls	r0, r0, #1
-    9e66:      	ldr	r2, [pc, #304] <$d.873+0x16>
-    9e68:      	ldrb	r3, [r2, r0]
-    9e6a:      	subs	r6, r6, #2
-    9e6c:      	add	r4, sp, #20
-    9e6e:      	strb	r3, [r4, r6]
-    9e70:      	adds	r3, r4, r6
-    9e72:      	adds	r0, r2, r0
-    9e74:      	ldrb	r0, [r0, #1]
-    9e76:      	strb	r0, [r3, #1]
-    9e78:      	ldr	r0, [sp, #8]
-    9e7a:      	cmp	r1, #10
-    9e7c:      	blt	0x9f60 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x190> @ imm = #224
-    9e7e:      	lsls	r1, r1, #1
-    9e80:      	ldr	r2, [pc, #276] <$d.873+0x14>
-    9e82:      	ldrb	r3, [r2, r1]
-    9e84:      	subs	r5, r6, #2
-    9e86:      	add	r4, sp, #20
-    9e88:      	strb	r3, [r4, r5]
-    9e8a:      	adds	r3, r4, r5
-    9e8c:      	adds	r1, r2, r1
-    9e8e:      	ldrb	r1, [r1, #1]
-    9e90:      	strb	r1, [r3, #1]
-    9e92:      	b	0x9f68 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x198> @ imm = #210
-    9e94:      	ldr	r2, [r0]
-    9e96:      	movs	r0, #1
-    9e98:      	lsls	r0, r0, #8
-    9e9a:      	movs	r1, #129
-    9e9c:      	b	0x9eb4 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0xe4> @ imm = #20
-    9e9e:      	movs	r3, #87
-    9ea0:      	adds	r3, r3, r4
-    9ea2:      	add	r4, sp, #20
-    9ea4:      	adds	r4, r4, r1
-    9ea6:      	subs	r4, r4, #3
-    9ea8:      	strb	r3, [r4]
-    9eaa:      	subs	r1, r1, #2
-    9eac:      	lsrs	r3, r2, #8
-    9eae:      	cmp	r2, r0
-    9eb0:      	mov	r2, r3
-    9eb2:      	blo	0x9f48 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x178> @ imm = #146
-    9eb4:      	movs	r3, #15
-    9eb6:      	mov	r4, r2
-    9eb8:      	ands	r4, r3
-    9eba:      	cmp	r4, #10
-    9ebc:      	blo	0x9ec2 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0xf2> @ imm = #2
-    9ebe:      	movs	r5, #87
-    9ec0:      	b	0x9ec4 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0xf4> @ imm = #0
-    9ec2:      	movs	r5, #48
-    9ec4:      	adds	r4, r5, r4
-    9ec6:      	add	r5, sp, #20
-    9ec8:      	adds	r5, r5, r1
-    9eca:      	subs	r5, r5, #2
-    9ecc:      	strb	r4, [r5]
-    9ece:      	lsrs	r4, r2, #4
-    9ed0:      	beq	0x9f24 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x154> @ imm = #80
-    9ed2:      	ands	r4, r3
-    9ed4:      	cmp	r4, #10
-    9ed6:      	bhs	0x9e9e <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0xce> @ imm = #-60
-    9ed8:      	movs	r3, #48
-    9eda:      	b	0x9ea0 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0xd0> @ imm = #-62
-    9edc:      	ldr	r2, [r0]
-    9ede:      	movs	r0, #1
-    9ee0:      	lsls	r0, r0, #8
-    9ee2:      	movs	r1, #129
-    9ee4:      	b	0x9efc <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x12c> @ imm = #20
-    9ee6:      	movs	r3, #55
-    9ee8:      	adds	r3, r3, r4
-    9eea:      	add	r4, sp, #20
-    9eec:      	adds	r4, r4, r1
-    9eee:      	subs	r4, r4, #3
-    9ef0:      	strb	r3, [r4]
-    9ef2:      	subs	r1, r1, #2
-    9ef4:      	lsrs	r3, r2, #8
-    9ef6:      	cmp	r2, r0
-    9ef8:      	mov	r2, r3
-    9efa:      	blo	0x9f48 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x178> @ imm = #74
-    9efc:      	movs	r3, #15
-    9efe:      	mov	r4, r2
-    9f00:      	ands	r4, r3
-    9f02:      	cmp	r4, #10
-    9f04:      	blo	0x9f0a <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x13a> @ imm = #2
-    9f06:      	movs	r5, #55
-    9f08:      	b	0x9f0c <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x13c> @ imm = #0
-    9f0a:      	movs	r5, #48
-    9f0c:      	adds	r4, r5, r4
-    9f0e:      	add	r5, sp, #20
-    9f10:      	adds	r5, r5, r1
-    9f12:      	subs	r5, r5, #2
-    9f14:      	strb	r4, [r5]
-    9f16:      	lsrs	r4, r2, #4
-    9f18:      	beq	0x9f24 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x154> @ imm = #8
-    9f1a:      	ands	r4, r3
-    9f1c:      	cmp	r4, #10
-    9f1e:      	bhs	0x9ee6 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x116> @ imm = #-60
-    9f20:      	movs	r3, #48
-    9f22:      	b	0x9ee8 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x118> @ imm = #-62
-    9f24:      	subs	r0, r1, #2
-    9f26:      	subs	r1, r1, #1
-    9f28:      	cmp	r0, #129
-    9f2a:      	bhs	0x9f4e <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x17e> @ imm = #32
-    9f2c:      	movs	r2, #129
-    9f2e:      	subs	r1, r2, r1
-    9f30:      	str	r1, [sp, #4]
-    9f32:      	add	r1, sp, #20
-    9f34:      	adds	r0, r1, r0
-    9f36:      	str	r0, [sp]
-    9f38:      	movs	r1, #1
-    9f3a:      	ldr	r2, [pc, #72] <$d.873+0x2>
-    9f3c:      	movs	r3, #2
-    9f3e:      	mov	r0, r6
-    9f40:      	bl	0x8d3c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a> @ imm = #-4616
-    9f44:      	add	sp, #148
-    9f46:      	pop	{r4, r5, r6, r7, pc}
-    9f48:      	subs	r0, r1, #1
-    9f4a:      	cmp	r0, #129
-    9f4c:      	blo	0x9f2c <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x15c> @ imm = #-36
-    9f4e:      	movs	r1, #128
-    9f50:      	ldr	r2, [pc, #52] <$d.873+0x4>
-    9f52:      	bl	0x95ac <core::slice::index::slice_start_index_len_fail::h3080a8211123744d> @ imm = #-2474
-    9f56:      	trap
-    9f58:      	mov	r1, r2
-    9f5a:      	ldr	r0, [sp, #8]
-    9f5c:      	cmp	r1, #10
-    9f5e:      	bge	0x9e7e <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0xae> @ imm = #-228
-    9f60:      	subs	r5, r6, #1
-    9f62:      	adds	r1, #48
-    9f64:      	add	r2, sp, #20
-    9f66:      	strb	r1, [r2, r5]
-    9f68:      	movs	r1, #39
-    9f6a:      	subs	r1, r1, r5
-    9f6c:      	str	r1, [sp, #4]
-    9f6e:      	add	r1, sp, #20
-    9f70:      	adds	r1, r1, r5
-    9f72:      	str	r1, [sp]
-    9f74:      	movs	r1, #1
-    9f76:      	ldr	r2, [pc, #40] <$d.873+0x1e>
-    9f78:      	movs	r3, #0
-    9f7a:      	bl	0x8d3c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a> @ imm = #-4674
-    9f7e:      	add	sp, #148
-    9f80:      	pop	{r4, r5, r6, r7, pc}
-    9f82:      	mov	r8, r8
-
-00009f84 <$d.873>:
-    9f84:	58 ba 00 00	.word	0x0000ba58
-    9f88:	48 ba 00 00	.word	0x0000ba48
-    9f8c:	0f 27 00 00	.word	0x0000270f
-    9f90:	10 27 00 00	.word	0x00002710
-    9f94:	7b 14 00 00	.word	0x0000147b
-    9f98:	5a ba 00 00	.word	0x0000ba5a
-    9f9c:	ff e0 f5 05	.word	0x05f5e0ff
-    9fa0:	34 b9 00 00	.word	0x0000b934
-
-00009fa4 <core::fmt::num::imp::<impl core::fmt::Display for u16>::fmt::h604aa11fce4661b4>:
-    9fa4:      	push	{r4, r5, r6, r7, lr}
-    9fa6:      	add	r7, sp, #12
-    9fa8:      	sub	sp, #52
-    9faa:      	mov	r5, r1
-    9fac:      	ldrh	r1, [r0]
-    9fae:      	add	r0, sp, #12
-    9fb0:      	adds	r0, #35
-    9fb2:      	ldr	r3, [pc, #184] <$d.881+0x2>
-    9fb4:      	cmp	r1, r3
-    9fb6:      	bls	0x9ffc <core::fmt::num::imp::<impl core::fmt::Display for u16>::fmt::h604aa11fce4661b4+0x58> @ imm = #66
-    9fb8:      	uxth	r2, r1
-    9fba:      	lsrs	r2, r2, #4
-    9fbc:      	str	r5, [sp, #8]
-    9fbe:      	ldr	r5, [pc, #184] <$d.881+0xe>
-    9fc0:      	muls	r5, r2, r5
-    9fc2:      	lsrs	r2, r5, #19
-    9fc4:      	adds	r3, r3, #1
-    9fc6:      	muls	r3, r2, r3
-    9fc8:      	subs	r1, r1, r3
-    9fca:      	uxth	r3, r1
-    9fcc:      	lsrs	r3, r3, #2
-    9fce:      	ldr	r5, [pc, #160] <$d.881+0x6>
-    9fd0:      	muls	r5, r3, r5
-    9fd2:      	lsrs	r3, r5, #17
-    9fd4:      	lsls	r5, r3, #1
-    9fd6:      	ldr	r6, [pc, #156] <$d.881+0xa>
-    9fd8:      	ldrb	r4, [r6, r5]
-    9fda:      	strb	r4, [r0]
-    9fdc:      	adds	r4, r6, r5
-    9fde:      	ldr	r5, [sp, #8]
-    9fe0:      	ldrb	r4, [r4, #1]
-    9fe2:      	strb	r4, [r0, #1]
-    9fe4:      	movs	r4, #100
-    9fe6:      	muls	r4, r3, r4
-    9fe8:      	subs	r1, r1, r4
-    9fea:      	uxth	r1, r1
-    9fec:      	lsls	r1, r1, #1
-    9fee:      	ldrb	r3, [r6, r1]
-    9ff0:      	strb	r3, [r0, #2]
-    9ff2:      	adds	r1, r6, r1
-    9ff4:      	ldrb	r1, [r1, #1]
-    9ff6:      	strb	r1, [r0, #3]
-    9ff8:      	movs	r0, #35
-    9ffa:      	b	0xa046 <core::fmt::num::imp::<impl core::fmt::Display for u16>::fmt::h604aa11fce4661b4+0xa2> @ imm = #72
-    9ffc:      	cmp	r1, #99
-    9ffe:      	bls	0xa03e <core::fmt::num::imp::<impl core::fmt::Display for u16>::fmt::h604aa11fce4661b4+0x9a> @ imm = #60
-    a000:      	uxth	r2, r1
-    a002:      	lsrs	r2, r2, #2
-    a004:      	ldr	r3, [pc, #104] <$d.881+0x4>
-    a006:      	muls	r3, r2, r3
-    a008:      	lsrs	r2, r3, #17
-    a00a:      	movs	r3, #100
-    a00c:      	muls	r3, r2, r3
-    a00e:      	subs	r1, r1, r3
-    a010:      	uxth	r1, r1
-    a012:      	lsls	r1, r1, #1
-    a014:      	ldr	r3, [pc, #92] <$d.881+0x8>
-    a016:      	ldrb	r4, [r3, r1]
-    a018:      	strb	r4, [r0, #2]
-    a01a:      	adds	r1, r3, r1
-    a01c:      	ldrb	r1, [r1, #1]
-    a01e:      	strb	r1, [r0, #3]
-    a020:      	movs	r0, #37
-    a022:      	mov	r1, r2
-    a024:      	cmp	r1, #10
-    a026:      	blo	0xa044 <core::fmt::num::imp::<impl core::fmt::Display for u16>::fmt::h604aa11fce4661b4+0xa0> @ imm = #26
-    a028:      	lsls	r1, r1, #1
-    a02a:      	ldr	r2, [pc, #72] <$d.881+0xa>
-    a02c:      	ldrb	r3, [r2, r1]
-    a02e:      	subs	r0, r0, #2
-    a030:      	add	r4, sp, #12
-    a032:      	strb	r3, [r4, r0]
-    a034:      	adds	r3, r4, r0
-    a036:      	adds	r1, r2, r1
-    a038:      	ldrb	r1, [r1, #1]
-    a03a:      	strb	r1, [r3, #1]
-    a03c:      	b	0xa04e <core::fmt::num::imp::<impl core::fmt::Display for u16>::fmt::h604aa11fce4661b4+0xaa> @ imm = #14
-    a03e:      	movs	r0, #39
-    a040:      	cmp	r1, #10
-    a042:      	bhs	0xa028 <core::fmt::num::imp::<impl core::fmt::Display for u16>::fmt::h604aa11fce4661b4+0x84> @ imm = #-30
-    a044:      	mov	r2, r1
-    a046:      	subs	r0, r0, #1
-    a048:      	adds	r2, #48
-    a04a:      	add	r1, sp, #12
-    a04c:      	strb	r2, [r1, r0]
-    a04e:      	movs	r1, #39
-    a050:      	subs	r1, r1, r0
-    a052:      	str	r1, [sp, #4]
-    a054:      	add	r1, sp, #12
-    a056:      	adds	r0, r1, r0
-    a058:      	str	r0, [sp]
-    a05a:      	movs	r1, #1
-    a05c:      	ldr	r2, [pc, #28] <$d.881+0x10>
-    a05e:      	movs	r3, #0
-    a060:      	mov	r0, r5
-    a062:      	bl	0x8d3c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a> @ imm = #-4906
-    a066:      	add	sp, #52
-    a068:      	pop	{r4, r5, r6, r7, pc}
-    a06a:      	mov	r8, r8
-
-0000a06c <$d.881>:
-    a06c:	0f 27 00 00	.word	0x0000270f
-    a070:	7b 14 00 00	.word	0x0000147b
-    a074:	5a ba 00 00	.word	0x0000ba5a
-    a078:	47 03 00 00	.word	0x00000347
-    a07c:	34 b9 00 00	.word	0x0000b934
-
-0000a080 <core::fmt::num::imp::<impl core::fmt::Display for isize>::fmt::hf394190e68450548>:
-    a080:      	push	{r4, r5, r6, r7, lr}
-    a082:      	add	r7, sp, #12
-    a084:      	sub	sp, #68
-    a086:      	str	r1, [sp, #16]
-    a088:      	ldr	r0, [r0]
-    a08a:      	asrs	r1, r0, #31
-    a08c:      	str	r0, [sp, #12]
-    a08e:      	adds	r2, r0, r1
-    a090:      	eors	r2, r1
-    a092:      	ldr	r4, [pc, #216] <$d.883+0x2>
-    a094:      	movs	r6, #39
-    a096:      	cmp	r2, r4
-    a098:      	bls	0xa0f8 <core::fmt::num::imp::<impl core::fmt::Display for isize>::fmt::hf394190e68450548+0x78> @ imm = #92
-    a09a:      	mov	r5, r2
-    a09c:      	str	r6, [sp, #24]
-    a09e:      	mov	r0, r5
-    a0a0:      	ldr	r1, [pc, #204] <$d.883+0x4>
-    a0a2:      	bl	0xa5b6 <__aeabi_uidiv>  @ imm = #1296
-    a0a6:      	str	r0, [sp, #20]
-    a0a8:      	adds	r1, r4, #1
-    a0aa:      	muls	r1, r0, r1
-    a0ac:      	subs	r1, r5, r1
-    a0ae:      	uxth	r2, r1
-    a0b0:      	lsrs	r2, r2, #2
-    a0b2:      	ldr	r0, [pc, #192] <$d.883+0xa>
-    a0b4:      	muls	r2, r0, r2
-    a0b6:      	lsrs	r2, r2, #17
-    a0b8:      	lsls	r3, r2, #1
-    a0ba:      	ldr	r0, [pc, #188] <$d.883+0xe>
-    a0bc:      	ldrb	r0, [r0, r3]
-    a0be:      	add	r4, sp, #28
-    a0c0:      	adds	r4, r4, r6
-    a0c2:      	subs	r6, r4, #4
-    a0c4:      	strb	r0, [r6]
-    a0c6:      	ldr	r0, [pc, #176] <$d.883+0xe>
-    a0c8:      	adds	r0, r0, r3
-    a0ca:      	ldrb	r0, [r0, #1]
-    a0cc:      	strb	r0, [r6, #1]
-    a0ce:      	ldr	r6, [sp, #24]
-    a0d0:      	movs	r0, #100
-    a0d2:      	muls	r0, r2, r0
-    a0d4:      	subs	r0, r1, r0
-    a0d6:      	uxth	r0, r0
-    a0d8:      	lsls	r0, r0, #1
-    a0da:      	ldr	r2, [pc, #156] <$d.883+0xe>
-    a0dc:      	ldrb	r1, [r2, r0]
-    a0de:      	mov	r3, r2
-    a0e0:      	subs	r2, r4, #2
-    a0e2:      	ldr	r4, [pc, #136] <$d.883+0x2>
-    a0e4:      	strb	r1, [r2]
-    a0e6:      	adds	r0, r3, r0
-    a0e8:      	ldrb	r0, [r0, #1]
-    a0ea:      	strb	r0, [r2, #1]
-    a0ec:      	ldr	r2, [sp, #20]
-    a0ee:      	subs	r6, r6, #4
-    a0f0:      	ldr	r0, [pc, #136] <$d.883+0x10>
-    a0f2:      	cmp	r5, r0
-    a0f4:      	mov	r5, r2
-    a0f6:      	bhi	0xa09c <core::fmt::num::imp::<impl core::fmt::Display for isize>::fmt::hf394190e68450548+0x1c> @ imm = #-94
-    a0f8:      	cmp	r2, #99
-    a0fa:      	ble	0xa13c <core::fmt::num::imp::<impl core::fmt::Display for isize>::fmt::hf394190e68450548+0xbc> @ imm = #62
-    a0fc:      	uxth	r0, r2
-    a0fe:      	lsrs	r0, r0, #2
-    a100:      	ldr	r1, [pc, #112] <$d.883+0x8>
-    a102:      	muls	r1, r0, r1
-    a104:      	lsrs	r1, r1, #17
-    a106:      	movs	r0, #100
-    a108:      	muls	r0, r1, r0
-    a10a:      	subs	r0, r2, r0
-    a10c:      	uxth	r0, r0
-    a10e:      	lsls	r0, r0, #1
-    a110:      	ldr	r2, [pc, #100] <$d.883+0xc>
-    a112:      	ldrb	r3, [r2, r0]
-    a114:      	subs	r6, r6, #2
-    a116:      	add	r4, sp, #28
-    a118:      	strb	r3, [r4, r6]
-    a11a:      	adds	r3, r4, r6
-    a11c:      	adds	r0, r2, r0
-    a11e:      	ldrb	r0, [r0, #1]
-    a120:      	strb	r0, [r3, #1]
-    a122:      	cmp	r1, #10
-    a124:      	blt	0xa142 <core::fmt::num::imp::<impl core::fmt::Display for isize>::fmt::hf394190e68450548+0xc2> @ imm = #26
-    a126:      	lsls	r1, r1, #1
-    a128:      	ldr	r2, [pc, #76] <$d.883+0xc>
-    a12a:      	ldrb	r3, [r2, r1]
-    a12c:      	subs	r0, r6, #2
-    a12e:      	add	r4, sp, #28
-    a130:      	strb	r3, [r4, r0]
-    a132:      	adds	r3, r4, r0
-    a134:      	adds	r1, r2, r1
-    a136:      	ldrb	r1, [r1, #1]
-    a138:      	strb	r1, [r3, #1]
-    a13a:      	b	0xa14a <core::fmt::num::imp::<impl core::fmt::Display for isize>::fmt::hf394190e68450548+0xca> @ imm = #12
-    a13c:      	mov	r1, r2
-    a13e:      	cmp	r1, #10
-    a140:      	bge	0xa126 <core::fmt::num::imp::<impl core::fmt::Display for isize>::fmt::hf394190e68450548+0xa6> @ imm = #-30
-    a142:      	subs	r0, r6, #1
-    a144:      	adds	r1, #48
-    a146:      	add	r2, sp, #28
-    a148:      	strb	r1, [r2, r0]
-    a14a:      	movs	r1, #39
-    a14c:      	subs	r1, r1, r0
-    a14e:      	str	r1, [sp, #4]
-    a150:      	add	r1, sp, #28
-    a152:      	adds	r0, r1, r0
-    a154:      	str	r0, [sp]
-    a156:      	ldr	r0, [sp, #12]
-    a158:      	mvns	r0, r0
-    a15a:      	lsrs	r1, r0, #31
-    a15c:      	ldr	r2, [pc, #32] <$d.883+0x14>
-    a15e:      	movs	r3, #0
-    a160:      	ldr	r0, [sp, #16]
-    a162:      	bl	0x8d3c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a> @ imm = #-5162
-    a166:      	add	sp, #68
-    a168:      	pop	{r4, r5, r6, r7, pc}
-    a16a:      	mov	r8, r8
-
-0000a16c <$d.883>:
-    a16c:	0f 27 00 00	.word	0x0000270f
-    a170:	10 27 00 00	.word	0x00002710
-    a174:	7b 14 00 00	.word	0x0000147b
-    a178:	5a ba 00 00	.word	0x0000ba5a
-    a17c:	ff e0 f5 05	.word	0x05f5e0ff
-    a180:	34 b9 00 00	.word	0x0000b934
-
-0000a184 <core::fmt::num::imp::<impl core::fmt::Display for usize>::fmt::h5a264564fe0b0ea0>:
-    a184:      	push	{r4, r5, r6, r7, lr}
-    a186:      	add	r7, sp, #12
-    a188:      	sub	sp, #60
-    a18a:      	str	r1, [sp, #8]
-    a18c:      	ldr	r2, [r0]
-    a18e:      	ldr	r4, [pc, #212] <$d.885+0x2>
-    a190:      	movs	r6, #39
-    a192:      	cmp	r2, r4
-    a194:      	bls	0xa1f4 <core::fmt::num::imp::<impl core::fmt::Display for usize>::fmt::h5a264564fe0b0ea0+0x70> @ imm = #92
-    a196:      	mov	r5, r2
-    a198:      	str	r6, [sp, #16]
-    a19a:      	mov	r0, r5
-    a19c:      	ldr	r1, [pc, #200] <$d.885+0x4>
-    a19e:      	bl	0xa5b6 <__aeabi_uidiv>  @ imm = #1044
-    a1a2:      	str	r0, [sp, #12]
-    a1a4:      	adds	r1, r4, #1
-    a1a6:      	muls	r1, r0, r1
-    a1a8:      	subs	r1, r5, r1
-    a1aa:      	uxth	r2, r1
-    a1ac:      	lsrs	r2, r2, #2
-    a1ae:      	ldr	r0, [pc, #188] <$d.885+0xa>
-    a1b0:      	muls	r2, r0, r2
-    a1b2:      	lsrs	r2, r2, #17
-    a1b4:      	lsls	r3, r2, #1
-    a1b6:      	ldr	r0, [pc, #184] <$d.885+0xe>
-    a1b8:      	ldrb	r0, [r0, r3]
-    a1ba:      	add	r4, sp, #20
-    a1bc:      	adds	r4, r4, r6
-    a1be:      	subs	r6, r4, #4
-    a1c0:      	strb	r0, [r6]
-    a1c2:      	ldr	r0, [pc, #172] <$d.885+0xe>
-    a1c4:      	adds	r0, r0, r3
-    a1c6:      	ldrb	r0, [r0, #1]
-    a1c8:      	strb	r0, [r6, #1]
-    a1ca:      	ldr	r6, [sp, #16]
-    a1cc:      	movs	r0, #100
-    a1ce:      	muls	r0, r2, r0
-    a1d0:      	subs	r0, r1, r0
-    a1d2:      	uxth	r0, r0
-    a1d4:      	lsls	r0, r0, #1
-    a1d6:      	ldr	r2, [pc, #152] <$d.885+0xe>
-    a1d8:      	ldrb	r1, [r2, r0]
-    a1da:      	mov	r3, r2
-    a1dc:      	subs	r2, r4, #2
-    a1de:      	ldr	r4, [pc, #132] <$d.885+0x2>
-    a1e0:      	strb	r1, [r2]
-    a1e2:      	adds	r0, r3, r0
-    a1e4:      	ldrb	r0, [r0, #1]
-    a1e6:      	strb	r0, [r2, #1]
-    a1e8:      	ldr	r2, [sp, #12]
-    a1ea:      	subs	r6, r6, #4
-    a1ec:      	ldr	r0, [pc, #132] <$d.885+0x10>
-    a1ee:      	cmp	r5, r0
-    a1f0:      	mov	r5, r2
-    a1f2:      	bhi	0xa198 <core::fmt::num::imp::<impl core::fmt::Display for usize>::fmt::h5a264564fe0b0ea0+0x14> @ imm = #-94
-    a1f4:      	cmp	r2, #99
-    a1f6:      	ble	0xa238 <core::fmt::num::imp::<impl core::fmt::Display for usize>::fmt::h5a264564fe0b0ea0+0xb4> @ imm = #62
-    a1f8:      	uxth	r0, r2
-    a1fa:      	lsrs	r0, r0, #2
-    a1fc:      	ldr	r1, [pc, #108] <$d.885+0x8>
-    a1fe:      	muls	r1, r0, r1
-    a200:      	lsrs	r1, r1, #17
-    a202:      	movs	r0, #100
-    a204:      	muls	r0, r1, r0
-    a206:      	subs	r0, r2, r0
-    a208:      	uxth	r0, r0
-    a20a:      	lsls	r0, r0, #1
-    a20c:      	ldr	r2, [pc, #96] <$d.885+0xc>
-    a20e:      	ldrb	r3, [r2, r0]
-    a210:      	subs	r6, r6, #2
-    a212:      	add	r4, sp, #20
-    a214:      	strb	r3, [r4, r6]
-    a216:      	adds	r3, r4, r6
-    a218:      	adds	r0, r2, r0
-    a21a:      	ldrb	r0, [r0, #1]
-    a21c:      	strb	r0, [r3, #1]
-    a21e:      	cmp	r1, #10
-    a220:      	blt	0xa23e <core::fmt::num::imp::<impl core::fmt::Display for usize>::fmt::h5a264564fe0b0ea0+0xba> @ imm = #26
-    a222:      	lsls	r1, r1, #1
-    a224:      	ldr	r2, [pc, #72] <$d.885+0xc>
-    a226:      	ldrb	r3, [r2, r1]
-    a228:      	subs	r0, r6, #2
-    a22a:      	add	r4, sp, #20
-    a22c:      	strb	r3, [r4, r0]
-    a22e:      	adds	r3, r4, r0
-    a230:      	adds	r1, r2, r1
-    a232:      	ldrb	r1, [r1, #1]
-    a234:      	strb	r1, [r3, #1]
-    a236:      	b	0xa246 <core::fmt::num::imp::<impl core::fmt::Display for usize>::fmt::h5a264564fe0b0ea0+0xc2> @ imm = #12
-    a238:      	mov	r1, r2
-    a23a:      	cmp	r1, #10
-    a23c:      	bge	0xa222 <core::fmt::num::imp::<impl core::fmt::Display for usize>::fmt::h5a264564fe0b0ea0+0x9e> @ imm = #-30
-    a23e:      	subs	r0, r6, #1
-    a240:      	adds	r1, #48
-    a242:      	add	r2, sp, #20
-    a244:      	strb	r1, [r2, r0]
-    a246:      	movs	r1, #39
-    a248:      	subs	r1, r1, r0
-    a24a:      	str	r1, [sp, #4]
-    a24c:      	add	r1, sp, #20
-    a24e:      	adds	r0, r1, r0
-    a250:      	str	r0, [sp]
-    a252:      	movs	r1, #1
-    a254:      	ldr	r2, [pc, #32] <$d.885+0x14>
-    a256:      	movs	r3, #0
-    a258:      	ldr	r0, [sp, #8]
-    a25a:      	bl	0x8d3c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a> @ imm = #-5410
-    a25e:      	add	sp, #60
-    a260:      	pop	{r4, r5, r6, r7, pc}
-    a262:      	mov	r8, r8
-
-0000a264 <$d.885>:
-    a264:	0f 27 00 00	.word	0x0000270f
-    a268:	10 27 00 00	.word	0x00002710
-    a26c:	7b 14 00 00	.word	0x0000147b
-    a270:	5a ba 00 00	.word	0x0000ba5a
-    a274:	ff e0 f5 05	.word	0x05f5e0ff
-    a278:	34 b9 00 00	.word	0x0000b934
-
-0000a27c <<&T as core::fmt::Debug>::fmt::h8d6d0cd170979dee>:
-    a27c:      	push	{r7, lr}
-    a27e:      	add	r7, sp, #0
-    a280:      	ldr	r2, [r0]
-    a282:      	ldr	r0, [r0, #4]
-    a284:      	ldr	r3, [r0, #12]
-    a286:      	mov	r0, r2
-    a288:      	blx	r3
-    a28a:      	pop	{r7, pc}
-
-0000a28c <<&T as core::fmt::Display>::fmt::ha2fc02d9d303d404>:
-    a28c:      	push	{r7, lr}
-    a28e:      	add	r7, sp, #0
-    a290:      	mov	r3, r1
-    a292:      	ldm	r0!, {r1, r2}
-    a294:      	mov	r0, r3
-    a296:      	bl	0x9098 <core::fmt::Formatter::pad::haa777c0a9492680f> @ imm = #-4610
-    a29a:      	pop	{r7, pc}
-
-0000a29c <<&T as core::fmt::Display>::fmt::hd97a7489159c6164>:
-    a29c:      	push	{r7, lr}
-    a29e:      	add	r7, sp, #0
-    a2a0:      	mov	r3, r1
-    a2a2:      	ldr	r0, [r0]
-    a2a4:      	ldm	r0!, {r1, r2}
-    a2a6:      	mov	r0, r3
-    a2a8:      	bl	0x9098 <core::fmt::Formatter::pad::haa777c0a9492680f> @ imm = #-4628
-    a2ac:      	pop	{r7, pc}
-
-0000a2ae <<&T as core::fmt::Display>::fmt::hf610f8399ba96788>:
-    a2ae:      	push	{r4, r5, r6, r7, lr}
-    a2b0:      	add	r7, sp, #12
-    a2b2:      	sub	sp, #28
-    a2b4:      	ldr	r2, [r1, #24]
-    a2b6:      	str	r2, [sp]
-    a2b8:      	ldr	r1, [r1, #28]
-    a2ba:      	ldr	r0, [r0]
-    a2bc:      	add	r2, sp, #4
-    a2be:      	mov	r4, r2
-    a2c0:      	ldm	r0!, {r3, r5, r6}
-    a2c2:      	stm	r4!, {r3, r5, r6}
-    a2c4:      	ldm	r0!, {r3, r5, r6}
-    a2c6:      	stm	r4!, {r3, r5, r6}
-    a2c8:      	ldr	r0, [sp]
-    a2ca:      	bl	0x8bdc <core::fmt::write::hff185d7d684cc368> @ imm = #-5874
-    a2ce:      	add	sp, #28
-    a2d0:      	pop	{r4, r5, r6, r7, pc}
-    a2d2:      	bmi	0xa27e <<&T as core::fmt::Debug>::fmt::h8d6d0cd170979dee+0x2> @ imm = #-88
-
-0000a2d4 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5>:
-    a2d4:      	push	{r4, r5, r6, r7, lr}
-    a2d6:      	add	r7, sp, #12
-    a2d8:      	sub	sp, #4
-    a2da:      	lsls	r1, r0, #11
-    a2dc:      	movs	r3, #0
-    a2de:      	movs	r5, #32
-    a2e0:      	ldr	r2, [pc, #160] <$d.1200>
-    a2e2:      	mov	r4, r5
-    a2e4:      	b	0xa2ec <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x18> @ imm = #4
-    a2e6:      	adds	r3, r5, #1
-    a2e8:      	subs	r5, r4, r3
-    a2ea:      	bls	0xa308 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x34> @ imm = #26
-    a2ec:      	lsrs	r5, r5, #1
-    a2ee:      	adds	r5, r5, r3
-    a2f0:      	lsls	r6, r5, #2
-    a2f2:      	ldr	r6, [r2, r6]
-    a2f4:      	lsls	r6, r6, #11
-    a2f6:      	cmp	r1, r6
-    a2f8:      	bhi	0xa2e6 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x12> @ imm = #-22
-    a2fa:      	cmp	r6, r1
-    a2fc:      	beq	0xa306 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x32> @ imm = #6
-    a2fe:      	mov	r4, r5
-    a300:      	subs	r5, r4, r3
-    a302:      	bhi	0xa2ec <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x18> @ imm = #-26
-    a304:      	b	0xa308 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x34> @ imm = #0
-    a306:      	adds	r3, r5, #1
-    a308:      	cmp	r3, #31
-    a30a:      	bhi	0xa372 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x9e> @ imm = #100
-    a30c:      	lsls	r5, r3, #2
-    a30e:      	ldr	r4, [pc, #124] <$d.1200+0xa>
-    a310:      	cmp	r3, #31
-    a312:      	beq	0xa31a <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x46> @ imm = #4
-    a314:      	adds	r4, r5, r2
-    a316:      	ldr	r4, [r4, #4]
-    a318:      	lsrs	r4, r4, #21
-    a31a:      	subs	r3, r3, #1
-    a31c:      	bhs	0xa322 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x4e> @ imm = #2
-    a31e:      	movs	r6, #0
-    a320:      	b	0xa32e <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x5a> @ imm = #10
-    a322:      	cmp	r3, #32
-    a324:      	bhs	0xa378 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0xa4> @ imm = #80
-    a326:      	lsls	r3, r3, #2
-    a328:      	ldr	r3, [r2, r3]
-    a32a:      	ldr	r6, [pc, #104] <$d.1200+0x12>
-    a32c:      	ands	r6, r3
-    a32e:      	ldr	r2, [r2, r5]
-    a330:      	lsrs	r2, r2, #21
-    a332:      	adds	r3, r2, #1
-    a334:      	cmp	r4, r3
-    a336:      	beq	0xa35e <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x8a> @ imm = #36
-    a338:      	ldr	r5, [pc, #80] <$d.1200+0x8>
-    a33a:      	cmp	r2, r5
-    a33c:      	mov	r3, r2
-    a33e:      	bhi	0xa342 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x6e> @ imm = #0
-    a340:      	mov	r3, r5
-    a342:      	subs	r5, r0, r6
-    a344:      	subs	r0, r4, #1
-    a346:      	movs	r4, #0
-    a348:      	ldr	r1, [pc, #76] <$d.1200+0x14>
-    a34a:      	cmp	r3, r2
-    a34c:      	beq	0xa366 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x92> @ imm = #22
-    a34e:      	ldrb	r6, [r1, r2]
-    a350:      	adds	r4, r4, r6
-    a352:      	cmp	r4, r5
-    a354:      	bhi	0xa35e <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x8a> @ imm = #6
-    a356:      	adds	r2, r2, #1
-    a358:      	cmp	r0, r2
-    a35a:      	bne	0xa34a <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x76> @ imm = #-20
-    a35c:      	mov	r2, r0
-    a35e:      	movs	r0, #1
-    a360:      	ands	r0, r2
-    a362:      	add	sp, #4
-    a364:      	pop	{r4, r5, r6, r7, pc}
-    a366:      	ldr	r2, [pc, #52] <$d.1200+0x1a>
-    a368:      	mov	r0, r3
-    a36a:      	ldr	r1, [pc, #32] <$d.1200+0xa>
-    a36c:      	bl	0x8574 <core::panicking::panic_bounds_check::h5d2fdbe20d7940cc> @ imm = #-7676
-    a370:      	trap
-    a372:      	movs	r1, #32
-    a374:      	ldr	r2, [pc, #16] <$d.1200+0x4>
-    a376:      	b	0xa37c <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0xa8> @ imm = #2
-    a378:      	movs	r1, #32
-    a37a:      	ldr	r2, [pc, #20] <$d.1200+0xe>
-    a37c:      	mov	r0, r3
-    a37e:      	bl	0x8574 <core::panicking::panic_bounds_check::h5d2fdbe20d7940cc> @ imm = #-7694
-    a382:      	trap
-
-0000a384 <$d.1200>:
-    a384:	e0 c2 00 00	.word	0x0000c2e0
-    a388:	b0 c2 00 00	.word	0x0000c2b0
-    a38c:	c3 02 00 00	.word	0x000002c3
-    a390:	d0 c2 00 00	.word	0x0000c2d0
-    a394:	ff ff 1f 00	.word	0x001fffff
-    a398:	60 c3 00 00	.word	0x0000c360
-    a39c:	c0 c2 00 00	.word	0x0000c2c0
-
-0000a3a0 <rust_begin_unwind>:
-    a3a0:      	push	{r7, lr}
-    a3a2:      	add	r7, sp, #0
-    a3a4:      	sub	sp, #80
-    a3a6:      	str	r0, [sp, #16]
-    a3a8:      	bl	0xa430 <cortex_m::interrupt::disable::hbadef76649d160af> @ imm = #132
-    a3ac:      	b	0xa3ae <rust_begin_unwind+0xe> @ imm = #-2
-    a3ae:      	movs	r0, #0
-    a3b0:      	bl	0x73f8 <rtt_target::UpChannel::conjure::h386844067325a205> @ imm = #-12220
-    a3b4:      	str	r1, [sp, #24]
-    a3b6:      	str	r0, [sp, #20]
-    a3b8:      	b	0xa3ba <rust_begin_unwind+0x1a> @ imm = #-2
-    a3ba:      	ldr	r0, [sp, #20]
-    a3bc:      	cmp	r0, #1
-    a3be:      	bne	0xa3d4 <rust_begin_unwind+0x34> @ imm = #18
-    a3c0:      	b	0xa3c2 <rust_begin_unwind+0x22> @ imm = #-2
-    a3c2:      	ldr	r0, [sp, #24]
-    a3c4:      	str	r0, [sp, #28]
-    a3c6:      	movs	r0, #2
-    a3c8:      	str	r0, [sp, #32]
-    a3ca:      	ldr	r1, [sp, #32]
-    a3cc:      	add	r0, sp, #28
-    a3ce:      	bl	0x73d6 <rtt_target::UpChannel::set_mode::hfe6707b5980fe5db> @ imm = #-12284
-    a3d2:      	b	0xa3e2 <rust_begin_unwind+0x42> @ imm = #12
-    a3d4:      	add	r1, sp, #72
-    a3d6:      	movs	r0, #4
-    a3d8:      	strb	r0, [r1]
-    a3da:      	ldr	r0, [sp, #72]
-    a3dc:      	bl	0xa43c <core::sync::atomic::compiler_fence::h9160733cee977f97> @ imm = #92
-    a3e0:      	b	0xa3d4 <rust_begin_unwind+0x34> @ imm = #-16
-    a3e2:      	add	r0, sp, #16
-    a3e4:      	str	r0, [sp, #68]
-    a3e6:      	ldr	r0, [sp, #68]
-    a3e8:      	str	r0, [sp, #76]
-    a3ea:      	ldr	r1, [pc, #60] <$d.1+0x2>
-    a3ec:      	bl	0xa490 <core::fmt::ArgumentV1::new::hc9cd582ea09578a6> @ imm = #160
-    a3f0:      	str	r0, [sp, #8]
-    a3f2:      	str	r1, [sp, #12]
-    a3f4:      	b	0xa3f6 <rust_begin_unwind+0x56> @ imm = #-2
-    a3f6:      	ldr	r0, [sp, #12]
-    a3f8:      	ldr	r1, [sp, #8]
-    a3fa:      	str	r1, [sp, #60]
-    a3fc:      	str	r0, [sp, #64]
-    a3fe:      	movs	r0, #1
-    a400:      	str	r0, [sp]
-    a402:      	ldr	r1, [pc, #40] <$d.1+0x6>
-    a404:      	add	r0, sp, #36
-    a406:      	movs	r2, #2
-    a408:      	add	r3, sp, #60
-    a40a:      	bl	0xa4bc <core::fmt::Arguments::new_v1::h83425105c6dd26b0> @ imm = #174
-    a40e:      	b	0xa410 <rust_begin_unwind+0x70> @ imm = #-2
-    a410:      	add	r0, sp, #28
-    a412:      	add	r1, sp, #36
-    a414:      	bl	0x7490 <<rtt_target::UpChannel as core::fmt::Write>::write_fmt::h0cac0a5a45fd5955> @ imm = #-12168
-    a418:      	str	r0, [sp, #4]
-    a41a:      	b	0xa41c <rust_begin_unwind+0x7c> @ imm = #-2
-    a41c:      	ldr	r0, [sp, #4]
-    a41e:      	movs	r1, #1
-    a420:      	ands	r0, r1
-    a422:      	bl	0x70ea <_ZN4core6result19Result$LT$T$C$E$GT$2ok17h824f7b02f54f5a05E> @ imm = #-13116
-    a426:      	b	0xa3d4 <rust_begin_unwind+0x34> @ imm = #-86
-
-0000a428 <$d.1>:
-    a428:	49 a5 00 00	.word	0x0000a549
-    a42c:	24 c6 00 00	.word	0x0000c624
-
-0000a430 <cortex_m::interrupt::disable::hbadef76649d160af>:
-    a430:      	push	{r7, lr}
-    a432:      	add	r7, sp, #0
-    a434:      	bl	0x8092 <__cpsid>        @ imm = #-9126
-    a438:      	b	0xa43a <cortex_m::interrupt::disable::hbadef76649d160af+0xa> @ imm = #-2
-    a43a:      	pop	{r7, pc}
-
-0000a43c <core::sync::atomic::compiler_fence::h9160733cee977f97>:
-    a43c:      	push	{r7, lr}
-    a43e:      	add	r7, sp, #0
-    a440:      	sub	sp, #8
-    a442:      	mov	r1, r0
-    a444:      	add	r0, sp, #4
-    a446:      	strb	r1, [r0]
-    a448:      	ldrb	r0, [r0]
-    a44a:      	str	r0, [sp]
-    a44c:      	ldr	r0, [sp]
-    a44e:      	lsls	r1, r0, #2
-    a450:      	adr	r0, #4 <core::sync::atomic::compiler_fence::h9160733cee977f97+0x19>
-    a452:      	ldr	r0, [r0, r1]
-    a454:      	mov	pc, r0
-    a456:      	mov	r8, r8
-
-0000a458 <$d.1>:
-    a458:	6f a4 00 00	.word	0x0000a46f
-    a45c:	7b a4 00 00	.word	0x0000a47b
-    a460:	7d a4 00 00	.word	0x0000a47d
-    a464:	7f a4 00 00	.word	0x0000a47f
-    a468:	81 a4 00 00	.word	0x0000a481
-
-0000a46c <$t.2>:
-    a46c:      	trap
-    a46e:      	ldr	r0, [pc, #24] <$d.3+0x2>
-    a470:      	ldr	r2, [pc, #24] <$d.3+0x4>
-    a472:      	movs	r1, #50
-    a474:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #-7984
-    a478:      	trap
-    a47a:      	b	0xa482 <$t.2+0x16>      @ imm = #4
-    a47c:      	b	0xa482 <$t.2+0x16>      @ imm = #2
-    a47e:      	b	0xa482 <$t.2+0x16>      @ imm = #0
-    a480:      	b	0xa482 <$t.2+0x16>      @ imm = #-2
-    a482:      	add	sp, #8
-    a484:      	pop	{r7, pc}
-    a486:      	mov	r8, r8
-
-0000a488 <$d.3>:
-    a488:	34 c6 00 00	.word	0x0000c634
-    a48c:	b8 c6 00 00	.word	0x0000c6b8
-
-0000a490 <core::fmt::ArgumentV1::new::hc9cd582ea09578a6>:
-    a490:      	sub	sp, #36
-    a492:      	str	r0, [sp, #4]
-    a494:      	str	r0, [sp, #20]
-    a496:      	str	r1, [sp, #24]
-    a498:      	str	r1, [sp, #28]
-    a49a:      	ldr	r0, [sp, #28]
-    a49c:      	str	r0, [sp, #8]
-    a49e:      	b	0xa4a0 <core::fmt::ArgumentV1::new::hc9cd582ea09578a6+0x10> @ imm = #-2
-    a4a0:      	ldr	r0, [sp, #4]
-    a4a2:      	str	r0, [sp, #32]
-    a4a4:      	ldr	r0, [sp, #32]
-    a4a6:      	str	r0, [sp]
-    a4a8:      	b	0xa4aa <core::fmt::ArgumentV1::new::hc9cd582ea09578a6+0x1a> @ imm = #-2
-    a4aa:      	ldr	r0, [sp, #8]
-    a4ac:      	ldr	r1, [sp]
-    a4ae:      	str	r1, [sp, #12]
-    a4b0:      	str	r0, [sp, #16]
-    a4b2:      	ldr	r0, [sp, #12]
-    a4b4:      	ldr	r1, [sp, #16]
-    a4b6:      	add	sp, #36
-    a4b8:      	bx	lr
-    a4ba:      	bmi	0xa466 <$d.1+0xe>       @ imm = #-88
-
-0000a4bc <core::fmt::Arguments::new_v1::h83425105c6dd26b0>:
-    a4bc:      	push	{r4, r5, r7, lr}
-    a4be:      	add	r7, sp, #8
-    a4c0:      	sub	sp, #56
-    a4c2:      	str	r3, [sp, #8]
-    a4c4:      	str	r2, [sp, #12]
-    a4c6:      	str	r1, [sp, #16]
-    a4c8:      	str	r0, [sp, #20]
-    a4ca:      	ldr	r0, [r7, #8]
-    a4cc:      	str	r0, [sp, #24]
-    a4ce:      	str	r1, [sp, #40]
-    a4d0:      	str	r2, [sp, #44]
-    a4d2:      	str	r3, [sp, #48]
-    a4d4:      	str	r0, [sp, #52]
-    a4d6:      	cmp	r2, r0
-    a4d8:      	blo	0xa4fa <core::fmt::Arguments::new_v1::h83425105c6dd26b0+0x3e> @ imm = #30
-    a4da:      	b	0xa4dc <core::fmt::Arguments::new_v1::h83425105c6dd26b0+0x20> @ imm = #-2
-    a4dc:      	ldr	r1, [sp, #12]
-    a4de:      	ldr	r0, [sp, #24]
-    a4e0:      	adds	r2, r0, #1
-    a4e2:      	movs	r0, #1
-    a4e4:      	movs	r3, #0
-    a4e6:      	str	r3, [sp]
-    a4e8:      	cmp	r1, r2
-    a4ea:      	str	r0, [sp, #4]
-    a4ec:      	bhi	0xa4f2 <core::fmt::Arguments::new_v1::h83425105c6dd26b0+0x36> @ imm = #2
-    a4ee:      	ldr	r0, [sp]
-    a4f0:      	str	r0, [sp, #4]
-    a4f2:      	ldr	r0, [sp, #4]
-    a4f4:      	add	r1, sp, #28
-    a4f6:      	strb	r0, [r1]
-    a4f8:      	b	0xa502 <core::fmt::Arguments::new_v1::h83425105c6dd26b0+0x46> @ imm = #6
-    a4fa:      	add	r1, sp, #28
-    a4fc:      	movs	r0, #1
-    a4fe:      	strb	r0, [r1]
-    a500:      	b	0xa502 <core::fmt::Arguments::new_v1::h83425105c6dd26b0+0x46> @ imm = #-2
-    a502:      	add	r0, sp, #28
-    a504:      	ldrb	r0, [r0]
-    a506:      	lsls	r0, r0, #31
-    a508:      	cmp	r0, #0
-    a50a:      	bne	0xa534 <core::fmt::Arguments::new_v1::h83425105c6dd26b0+0x78> @ imm = #38
-    a50c:      	b	0xa50e <core::fmt::Arguments::new_v1::h83425105c6dd26b0+0x52> @ imm = #-2
-    a50e:      	ldr	r0, [sp, #24]
-    a510:      	ldr	r1, [sp, #20]
-    a512:      	ldr	r2, [sp, #8]
-    a514:      	ldr	r3, [sp, #12]
-    a516:      	ldr	r4, [sp, #16]
-    a518:      	movs	r5, #0
-    a51a:      	str	r5, [sp, #36]
-    a51c:      	str	r5, [sp, #32]
-    a51e:      	str	r5, [sp, #32]
-    a520:      	str	r4, [r1]
-    a522:      	str	r3, [r1, #4]
-    a524:      	ldr	r4, [sp, #32]
-    a526:      	ldr	r3, [sp, #36]
-    a528:      	str	r4, [r1, #8]
-    a52a:      	str	r3, [r1, #12]
-    a52c:      	str	r2, [r1, #16]
-    a52e:      	str	r0, [r1, #20]
-    a530:      	add	sp, #56
-    a532:      	pop	{r4, r5, r7, pc}
-    a534:      	ldr	r0, [pc, #8] <$d.2>
-    a536:      	ldr	r2, [pc, #12] <$d.2+0x6>
-    a538:      	movs	r1, #12
-    a53a:      	bl	0x8548 <core::panicking::panic::hd188a7f3102defa3> @ imm = #-8182
-    a53e:      	trap
-
-0000a540 <$d.2>:
-    a540:	c8 c6 00 00	.word	0x0000c6c8
-    a544:	20 c7 00 00	.word	0x0000c720
-
-0000a548 <<&T as core::fmt::Display>::fmt::h08716ba74ba76d25>:
-    a548:      	push	{r7, lr}
-    a54a:      	add	r7, sp, #0
-    a54c:      	sub	sp, #16
-    a54e:      	str	r0, [sp, #8]
-    a550:      	str	r1, [sp, #12]
-    a552:      	ldr	r0, [r0]
-    a554:      	bl	0x8434 <<core::panic::panic_info::PanicInfo as core::fmt::Display>::fmt::h980d98f06e764e0e> @ imm = #-8484
-    a558:      	str	r0, [sp, #4]
-    a55a:      	b	0xa55c <<&T as core::fmt::Display>::fmt::h08716ba74ba76d25+0x14> @ imm = #-2
-    a55c:      	ldr	r0, [sp, #4]
-    a55e:      	movs	r1, #1
-    a560:      	ands	r0, r1
-    a562:      	add	sp, #16
-    a564:      	pop	{r7, pc}
-
-0000a566 <__aeabi_lmul>:
-    a566:      	push	{r4, r5, r6, r7, lr}
-    a568:      	add	r7, sp, #12
-    a56a:      	sub	sp, #20
-    a56c:      	str	r3, [sp, #12]
-    a56e:      	str	r1, [sp, #8]
-    a570:      	mov	r4, r0
-    a572:      	lsrs	r3, r0, #16
-    a574:      	mov	r1, r2
-    a576:      	str	r2, [sp]
-    a578:      	uxth	r0, r2
-    a57a:      	str	r0, [sp, #16]
-    a57c:      	mov	r5, r3
-    a57e:      	muls	r5, r0, r5
-    a580:      	uxth	r2, r4
-    a582:      	lsrs	r0, r1, #16
-    a584:      	str	r0, [sp, #4]
-    a586:      	mov	r6, r2
-    a588:      	muls	r6, r0, r6
-    a58a:      	movs	r0, #0
-    a58c:      	adds	r5, r6, r5
-    a58e:      	adcs	r0, r0
-    a590:      	lsrs	r6, r5, #16
-    a592:      	lsls	r0, r0, #16
-    a594:      	adds	r6, r0, r6
-    a596:      	ldr	r1, [sp, #8]
-    a598:      	ldr	r0, [sp]
-    a59a:      	muls	r1, r0, r1
-    a59c:      	ldr	r0, [sp, #12]
-    a59e:      	muls	r0, r4, r0
-    a5a0:      	adds	r0, r0, r1
-    a5a2:      	ldr	r1, [sp, #4]
-    a5a4:      	muls	r3, r1, r3
-    a5a6:      	adds	r1, r3, r0
-    a5a8:      	lsls	r0, r5, #16
-    a5aa:      	ldr	r3, [sp, #16]
-    a5ac:      	muls	r2, r3, r2
-    a5ae:      	adds	r0, r2, r0
-    a5b0:      	adcs	r1, r6
-    a5b2:      	add	sp, #20
-    a5b4:      	pop	{r4, r5, r6, r7, pc}
-
-0000a5b6 <__aeabi_uidiv>:
-    a5b6:      	push	{r7, lr}
-    a5b8:      	add	r7, sp, #0
-    a5ba:      	bl	0xa6e6 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5> @ imm = #296
-    a5be:      	pop	{r7, pc}
-
-0000a5c0 <memcpy>:
-    a5c0:      	push	{r4, r5, r6, r7, lr}
-    a5c2:      	add	r7, sp, #12
-    a5c4:      	sub	sp, #4
-    a5c6:      	cmp	r2, #0
-    a5c8:      	beq	0xa618 <memcpy+0x58>    @ imm = #76
-    a5ca:      	movs	r4, #3
-    a5cc:      	mov	r3, r2
-    a5ce:      	ands	r3, r4
-    a5d0:      	subs	r5, r2, #1
-    a5d2:      	cmp	r5, #3
-    a5d4:      	str	r3, [sp]
-    a5d6:      	bhs	0xa5dc <memcpy+0x1c>    @ imm = #2
-    a5d8:      	movs	r4, #0
-    a5da:      	b	0xa5fa <memcpy+0x3a>    @ imm = #28
-    a5dc:      	bics	r2, r4
-    a5de:      	movs	r4, #0
-    a5e0:      	ldrb	r5, [r1, r4]
-    a5e2:      	strb	r5, [r0, r4]
-    a5e4:      	adds	r5, r0, r4
-    a5e6:      	adds	r6, r1, r4
-    a5e8:      	ldrb	r3, [r6, #1]
-    a5ea:      	strb	r3, [r5, #1]
-    a5ec:      	ldrb	r3, [r6, #2]
-    a5ee:      	strb	r3, [r5, #2]
-    a5f0:      	ldrb	r3, [r6, #3]
-    a5f2:      	strb	r3, [r5, #3]
-    a5f4:      	adds	r4, r4, #4
-    a5f6:      	cmp	r2, r4
-    a5f8:      	bne	0xa5e0 <memcpy+0x20>    @ imm = #-28
-    a5fa:      	ldr	r5, [sp]
-    a5fc:      	cmp	r5, #0
-    a5fe:      	beq	0xa618 <memcpy+0x58>    @ imm = #22
-    a600:      	ldrb	r2, [r1, r4]
-    a602:      	strb	r2, [r0, r4]
-    a604:      	cmp	r5, #1
-    a606:      	beq	0xa618 <memcpy+0x58>    @ imm = #14
-    a608:      	adds	r2, r4, #1
-    a60a:      	ldrb	r3, [r1, r2]
-    a60c:      	strb	r3, [r0, r2]
-    a60e:      	cmp	r5, #2
-    a610:      	beq	0xa618 <memcpy+0x58>    @ imm = #4
-    a612:      	adds	r2, r4, #2
-    a614:      	ldrb	r1, [r1, r2]
-    a616:      	strb	r1, [r0, r2]
-    a618:      	add	sp, #4
-    a61a:      	pop	{r4, r5, r6, r7, pc}
-
-0000a61c <memset>:
-    a61c:      	push	{r4, r5, r7, lr}
-    a61e:      	add	r7, sp, #8
-    a620:      	cmp	r2, #0
-    a622:      	beq	0xa65c <memset+0x40>    @ imm = #54
-    a624:      	movs	r4, #3
-    a626:      	mov	r3, r2
-    a628:      	ands	r3, r4
-    a62a:      	subs	r5, r2, #1
-    a62c:      	cmp	r5, #3
-    a62e:      	bhs	0xa634 <memset+0x18>    @ imm = #2
-    a630:      	movs	r4, #0
-    a632:      	b	0xa648 <memset+0x2c>    @ imm = #18
-    a634:      	bics	r2, r4
-    a636:      	movs	r4, #0
-    a638:      	strb	r1, [r0, r4]
-    a63a:      	adds	r5, r0, r4
-    a63c:      	strb	r1, [r5, #3]
-    a63e:      	strb	r1, [r5, #2]
-    a640:      	strb	r1, [r5, #1]
-    a642:      	adds	r4, r4, #4
-    a644:      	cmp	r2, r4
-    a646:      	bne	0xa638 <memset+0x1c>    @ imm = #-18
-    a648:      	cmp	r3, #0
-    a64a:      	beq	0xa65c <memset+0x40>    @ imm = #14
-    a64c:      	strb	r1, [r0, r4]
-    a64e:      	cmp	r3, #1
-    a650:      	beq	0xa65c <memset+0x40>    @ imm = #8
-    a652:      	adds	r2, r4, r0
-    a654:      	strb	r1, [r2, #1]
-    a656:      	cmp	r3, #2
-    a658:      	beq	0xa65c <memset+0x40>    @ imm = #0
-    a65a:      	strb	r1, [r2, #2]
-    a65c:      	pop	{r4, r5, r7, pc}
-
-0000a65e <__aeabi_memcpy>:
-    a65e:      	push	{r7, lr}
-    a660:      	add	r7, sp, #0
-    a662:      	bl	0xa5c0 <memcpy>         @ imm = #-166
-    a666:      	pop	{r7, pc}
-
-0000a668 <__aeabi_memset>:
-    a668:      	push	{r7, lr}
-    a66a:      	add	r7, sp, #0
-    a66c:      	mov	r3, r1
-    a66e:      	mov	r1, r2
-    a670:      	mov	r2, r3
-    a672:      	bl	0xa61c <memset>         @ imm = #-90
-    a676:      	pop	{r7, pc}
-
-0000a678 <__aeabi_memset4>:
-    a678:      	push	{r4, r5, r6, r7, lr}
-    a67a:      	add	r7, sp, #12
-    a67c:      	sub	sp, #4
-    a67e:      	mov	r5, r2
-    a680:      	mov	r4, r1
-    a682:      	mov	r3, r0
-    a684:      	uxtb	r2, r2
-    a686:      	cmp	r1, #4
-    a688:      	blo	0xa6b8 <__aeabi_memset4+0x40> @ imm = #44
-    a68a:      	lsls	r0, r5, #24
-    a68c:      	lsls	r1, r2, #16
-    a68e:      	adds	r0, r1, r0
-    a690:      	lsls	r1, r2, #8
-    a692:      	adds	r0, r0, r1
-    a694:      	adds	r5, r0, r2
-    a696:      	subs	r1, r4, #4
-    a698:      	lsrs	r0, r1, #2
-    a69a:      	adds	r0, r0, #1
-    a69c:      	movs	r6, #3
-    a69e:      	ands	r6, r0
-    a6a0:      	str	r1, [sp]
-    a6a2:      	beq	0xa6c4 <__aeabi_memset4+0x4c> @ imm = #30
-    a6a4:      	mov	r0, r3
-    a6a6:      	stm	r0!, {r5}
-    a6a8:      	cmp	r6, #1
-    a6aa:      	beq	0xa6c8 <__aeabi_memset4+0x50> @ imm = #26
-    a6ac:      	str	r5, [r3, #4]
-    a6ae:      	cmp	r6, #2
-    a6b0:      	bne	0xa6be <__aeabi_memset4+0x46> @ imm = #10
-    a6b2:      	subs	r4, #8
-    a6b4:      	adds	r3, #8
-    a6b6:      	b	0xa6c4 <__aeabi_memset4+0x4c> @ imm = #10
-    a6b8:      	mov	r0, r3
-    a6ba:      	mov	r1, r4
-    a6bc:      	b	0xa6de <__aeabi_memset4+0x66> @ imm = #30
-    a6be:      	str	r5, [r3, #8]
-    a6c0:      	subs	r4, #12
-    a6c2:      	adds	r3, #12
-    a6c4:      	mov	r1, r4
-    a6c6:      	mov	r0, r3
-    a6c8:      	ldr	r3, [sp]
-    a6ca:      	cmp	r3, #12
-    a6cc:      	blo	0xa6de <__aeabi_memset4+0x66> @ imm = #14
-    a6ce:      	str	r5, [r0]
-    a6d0:      	str	r5, [r0, #4]
-    a6d2:      	str	r5, [r0, #8]
-    a6d4:      	str	r5, [r0, #12]
-    a6d6:      	adds	r0, #16
-    a6d8:      	subs	r1, #16
-    a6da:      	cmp	r1, #3
-    a6dc:      	bhi	0xa6ce <__aeabi_memset4+0x56> @ imm = #-18
-    a6de:      	bl	0xa668 <__aeabi_memset> @ imm = #-122
-    a6e2:      	add	sp, #4
-    a6e4:      	pop	{r4, r5, r6, r7, pc}
-
-0000a6e6 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5>:
-    a6e6:      	push	{r4, r5, r6, r7, lr}
-    a6e8:      	add	r7, sp, #12
-    a6ea:      	sub	sp, #12
-    a6ec:      	mov	r2, r0
-    a6ee:      	cmp	r0, r1
-    a6f0:      	bhs	0xa6fa <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x14> @ imm = #6
-    a6f2:      	movs	r0, #0
-    a6f4:      	mov	r1, r2
-    a6f6:      	add	sp, #12
-    a6f8:      	pop	{r4, r5, r6, r7, pc}
-    a6fa:      	lsrs	r5, r2, #16
-    a6fc:      	cmp	r1, r5
-    a6fe:      	mov	r0, r2
-    a700:      	bhi	0xa71c <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x36> @ imm = #24
-    a702:      	mov	r0, r5
-    a704:      	lsrs	r6, r0, #8
-    a706:      	cmp	r1, r6
-    a708:      	bls	0xa722 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x3c> @ imm = #22
-    a70a:      	lsrs	r3, r0, #4
-    a70c:      	cmp	r1, r3
-    a70e:      	bhi	0xa72a <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x44> @ imm = #24
-    a710:      	mov	r0, r3
-    a712:      	str	r3, [sp, #4]
-    a714:      	lsrs	r3, r0, #2
-    a716:      	cmp	r1, r3
-    a718:      	bls	0xa732 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x4c> @ imm = #22
-    a71a:      	b	0xa734 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x4e> @ imm = #22
-    a71c:      	lsrs	r6, r0, #8
-    a71e:      	cmp	r1, r6
-    a720:      	bhi	0xa70a <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x24> @ imm = #-26
-    a722:      	mov	r0, r6
-    a724:      	lsrs	r3, r0, #4
-    a726:      	cmp	r1, r3
-    a728:      	bls	0xa710 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x2a> @ imm = #-28
-    a72a:      	str	r3, [sp, #4]
-    a72c:      	lsrs	r3, r0, #2
-    a72e:      	cmp	r1, r3
-    a730:      	bhi	0xa734 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x4e> @ imm = #0
-    a732:      	mov	r0, r3
-    a734:      	str	r3, [sp, #8]
-    a736:      	lsrs	r3, r0, #1
-    a738:      	movs	r4, #1
-    a73a:      	movs	r0, #0
-    a73c:      	cmp	r1, r3
-    a73e:      	mov	r3, r4
-    a740:      	bls	0xa744 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x5e> @ imm = #0
-    a742:      	mov	r3, r0
-    a744:      	cmp	r1, r5
-    a746:      	mov	r5, r4
-    a748:      	bls	0xa74c <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x66> @ imm = #0
-    a74a:      	mov	r5, r0
-    a74c:      	str	r3, [sp]
-    a74e:      	lsls	r5, r5, #4
-    a750:      	cmp	r1, r6
-    a752:      	mov	r6, r4
-    a754:      	bls	0xa758 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x72> @ imm = #0
-    a756:      	mov	r6, r0
-    a758:      	lsls	r3, r6, #3
-    a75a:      	adds	r5, r3, r5
-    a75c:      	ldr	r3, [sp, #4]
-    a75e:      	cmp	r1, r3
-    a760:      	mov	r3, r4
-    a762:      	bls	0xa766 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x80> @ imm = #0
-    a764:      	mov	r3, r0
-    a766:      	lsls	r3, r3, #2
-    a768:      	adds	r3, r5, r3
-    a76a:      	ldr	r5, [sp, #8]
-    a76c:      	cmp	r1, r5
-    a76e:      	mov	r5, r4
-    a770:      	bls	0xa774 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x8e> @ imm = #0
-    a772:      	mov	r5, r0
-    a774:      	lsls	r0, r5, #1
-    a776:      	adds	r0, r3, r0
-    a778:      	ldr	r3, [sp]
-    a77a:      	adds	r3, r0, r3
-    a77c:      	lsls	r4, r3
-    a77e:      	mov	r5, r1
-    a780:      	lsls	r5, r3
-    a782:      	subs	r6, r2, r5
-    a784:      	cmp	r6, r1
-    a786:      	bhs	0xa792 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0xac> @ imm = #8
-    a788:      	mov	r2, r6
-    a78a:      	mov	r0, r4
-    a78c:      	mov	r1, r2
-    a78e:      	add	sp, #12
-    a790:      	pop	{r4, r5, r6, r7, pc}
-    a792:      	cmp	r5, #0
-    a794:      	bmi	0xa79e <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0xb8> @ imm = #6
-    a796:      	mov	r1, r4
-    a798:      	mov	r0, r4
-    a79a:      	mov	r2, r6
-    a79c:      	b	0xa7ca <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0xe4> @ imm = #42
-    a79e:      	lsrs	r5, r5, #1
-    a7a0:      	subs	r2, r6, r5
-    a7a2:      	subs	r3, r3, #1
-    a7a4:      	movs	r0, #31
-    a7a6:      	str	r3, [sp, #4]
-    a7a8:      	ands	r0, r3
-    a7aa:      	str	r0, [sp, #8]
-    a7ac:      	movs	r0, #1
-    a7ae:      	ldr	r3, [sp, #8]
-    a7b0:      	lsls	r0, r3
-    a7b2:      	cmp	r2, #0
-    a7b4:      	str	r0, [sp, #8]
-    a7b6:      	bge	0xa7ba <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0xd4> @ imm = #0
-    a7b8:      	movs	r0, #0
-    a7ba:      	cmp	r2, #0
-    a7bc:      	bge	0xa7c0 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0xda> @ imm = #0
-    a7be:      	mov	r2, r6
-    a7c0:      	orrs	r0, r4
-    a7c2:      	cmp	r2, r1
-    a7c4:      	ldr	r1, [sp, #8]
-    a7c6:      	ldr	r3, [sp, #4]
-    a7c8:      	blo	0xa6f4 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0xe> @ imm = #-216
-    a7ca:      	subs	r1, r1, #1
-    a7cc:      	cmp	r3, #0
-    a7ce:      	beq	0xa7fc <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x116> @ imm = #42
-    a7d0:      	str	r1, [sp, #4]
-    a7d2:      	subs	r4, r5, #1
-    a7d4:      	movs	r6, #3
-    a7d6:      	ands	r6, r3
-    a7d8:      	subs	r1, r3, #1
-    a7da:      	str	r1, [sp, #8]
-    a7dc:      	cmp	r6, #0
-    a7de:      	beq	0xa800 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x11a> @ imm = #30
-    a7e0:      	lsls	r2, r2, #1
-    a7e2:      	subs	r2, r2, r4
-    a7e4:      	asrs	r5, r2, #31
-    a7e6:      	ands	r5, r4
-    a7e8:      	adds	r5, r5, r2
-    a7ea:      	cmp	r6, #1
-    a7ec:      	bne	0xa80c <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x126> @ imm = #28
-    a7ee:      	mov	r2, r5
-    a7f0:      	ldr	r6, [sp, #8]
-    a7f2:      	ldr	r1, [sp, #8]
-    a7f4:      	cmp	r1, #3
-    a7f6:      	ldr	r1, [sp, #4]
-    a7f8:      	blo	0xa862 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x17c> @ imm = #102
-    a7fa:      	b	0xa834 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x14e> @ imm = #54
-    a7fc:      	mov	r5, r2
-    a7fe:      	b	0xa862 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x17c> @ imm = #96
-    a800:      	mov	r6, r3
-    a802:      	ldr	r1, [sp, #8]
-    a804:      	cmp	r1, #3
-    a806:      	ldr	r1, [sp, #4]
-    a808:      	blo	0xa862 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x17c> @ imm = #86
-    a80a:      	b	0xa834 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x14e> @ imm = #38
-    a80c:      	lsls	r2, r5, #1
-    a80e:      	subs	r2, r2, r4
-    a810:      	asrs	r5, r2, #31
-    a812:      	ands	r5, r4
-    a814:      	adds	r5, r5, r2
-    a816:      	cmp	r6, #2
-    a818:      	bne	0xa81e <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x138> @ imm = #2
-    a81a:      	subs	r6, r3, #2
-    a81c:      	b	0xa82a <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x144> @ imm = #10
-    a81e:      	lsls	r2, r5, #1
-    a820:      	subs	r2, r2, r4
-    a822:      	asrs	r5, r2, #31
-    a824:      	ands	r5, r4
-    a826:      	adds	r5, r5, r2
-    a828:      	subs	r6, r3, #3
-    a82a:      	mov	r2, r5
-    a82c:      	ldr	r1, [sp, #8]
-    a82e:      	cmp	r1, #3
-    a830:      	ldr	r1, [sp, #4]
-    a832:      	blo	0xa862 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x17c> @ imm = #44
-    a834:      	mov	r5, r2
-    a836:      	lsls	r2, r5, #1
-    a838:      	subs	r2, r2, r4
-    a83a:      	asrs	r5, r2, #31
-    a83c:      	ands	r5, r4
-    a83e:      	adds	r2, r5, r2
-    a840:      	lsls	r2, r2, #1
-    a842:      	subs	r2, r2, r4
-    a844:      	asrs	r5, r2, #31
-    a846:      	ands	r5, r4
-    a848:      	adds	r2, r5, r2
-    a84a:      	lsls	r2, r2, #1
-    a84c:      	subs	r2, r2, r4
-    a84e:      	asrs	r5, r2, #31
-    a850:      	ands	r5, r4
-    a852:      	adds	r2, r5, r2
-    a854:      	lsls	r2, r2, #1
-    a856:      	subs	r2, r2, r4
-    a858:      	asrs	r5, r2, #31
-    a85a:      	ands	r5, r4
-    a85c:      	adds	r5, r5, r2
-    a85e:      	subs	r6, r6, #4
-    a860:      	bne	0xa836 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x150> @ imm = #-46
-    a862:      	movs	r2, #31
-    a864:      	ands	r3, r2
-    a866:      	mov	r2, r5
-    a868:      	lsrs	r2, r3
-    a86a:      	ands	r1, r5
-    a86c:      	orrs	r0, r1
-    a86e:      	mov	r1, r2
-    a870:      	add	sp, #12
-    a872:      	pop	{r4, r5, r6, r7, pc}
-
-0000a874 <__clzsi2>:
-    a874:      	push	{r7, lr}
-    a876:      	lsrs	r3, r0, #16
-    a878:      	add	r7, sp, #0
-    a87a:      	cmp	r3, #0
-    a87c:      	beq	0xa8b4 <__clzsi2+0x40>  @ imm = #52
-    a87e:      	movs	r0, r3
-    a880:      	movs	r1, #8
-    a882:      	movs	r2, #0
-    a884:      	movs	r3, #255
-    a886:      	lsls	r3, r3, #8
-    a888:      	tst	r0, r3
-    a88a:      	beq	0xa890 <__clzsi2+0x1c>  @ imm = #2
-    a88c:      	movs	r1, r2
-    a88e:      	lsrs	r0, r0, #8
-    a890:      	movs	r3, #240
-    a892:      	tst	r3, r0
-    a894:      	beq	0xa8be <__clzsi2+0x4a>  @ imm = #38
-    a896:      	lsrs	r0, r0, #4
-    a898:      	movs	r3, #12
-    a89a:      	tst	r3, r0
-    a89c:      	beq	0xa8ba <__clzsi2+0x46>  @ imm = #26
-    a89e:      	lsrs	r0, r0, #2
-    a8a0:      	movs	r2, #1
-    a8a2:      	lsrs	r3, r0, #1
-    a8a4:      	bics	r2, r3
-    a8a6:      	movs	r3, #2
-    a8a8:      	mov	sp, r7
-    a8aa:      	rsbs	r2, r2, #0
-    a8ac:      	subs	r0, r3, r0
-    a8ae:      	ands	r0, r2
-    a8b0:      	adds	r0, r0, r1
-    a8b2:      	pop	{r7, pc}
-    a8b4:      	movs	r1, #24
-    a8b6:      	movs	r2, #16
-    a8b8:      	b	0xa884 <__clzsi2+0x10>  @ imm = #-56
-    a8ba:      	adds	r1, #2
-    a8bc:      	b	0xa8a0 <__clzsi2+0x2c>  @ imm = #-32
-    a8be:      	adds	r1, #4
-    a8c0:      	b	0xa898 <__clzsi2+0x24>  @ imm = #-44
-    a8c2:      	mov	r8, r8
-
-0000a8c4 <HardFaultTrampoline>:
-    a8c4:      	mov	r0, lr
-    a8c6:      	movs	r1, #4
-    a8c8:      	tst	r0, r1
-    a8ca:      	bne	0xa8d2 <HardFaultTrampoline+0xe> @ imm = #4
-    a8cc:      	mrs	r0, msp
-    a8d0:      	b	0xa8d8 <HardFault_>     @ imm = #4
-    a8d2:      	mrs	r0, psp
-    a8d6:      	b	0xa8d8 <HardFault_>     @ imm = #-2
-
-0000a8d8 <HardFault_>:
-    a8d8:      	push	{r7, lr}
-    a8da:      	add	r7, sp, #0
-    a8dc:      	sub	sp, #8
-    a8de:      	str	r0, [sp, #4]
-    a8e0:      	b	0xa8e2 <HardFault_+0xa> @ imm = #-2
-    a8e2:      	mov	r1, sp
-    a8e4:      	movs	r0, #4
-    a8e6:      	strb	r0, [r1]
-    a8e8:      	ldr	r0, [sp]
-    a8ea:      	bl	0x8378 <core::sync::atomic::compiler_fence::ha129344cb21afc37> @ imm = #-9590
-    a8ee:      	b	0xa8e2 <HardFault_+0xa> @ imm = #-16
diff --git a/sections/sec-release-lto.txt b/sections/sec-release-lto.txt
deleted file mode 100644
index 27d72c8..0000000
--- a/sections/sec-release-lto.txt
+++ /dev/null
@@ -1,6312 +0,0 @@
-
-max11619-adc:	file format elf32-littlearm
-
-Disassembly of section .text:
-
-000000c0 <__stext>:
-      c0:      	ldr	r4, [pc, #44] <$d>
-      c2:      	mov	lr, r4
-      c4:      	bl	0xfda <__pre_init>      @ imm = #3858
-      c8:      	mov	lr, r4
-      ca:      	ldr	r0, [pc, #40] <$d+0x6>
-      cc:      	ldr	r1, [pc, #40] <$d+0x8>
-      ce:      	movs	r2, #0
-      d0:      	cmp	r1, r0
-      d2:      	beq	0xd8 <__stext+0x18>     @ imm = #2
-      d4:      	stm	r0!, {r2}
-      d6:      	b	0xd0 <__stext+0x10>     @ imm = #-10
-      d8:      	ldr	r0, [pc, #32] <$d+0xc>
-      da:      	ldr	r1, [pc, #36] <$d+0x12>
-      dc:      	ldr	r2, [pc, #36] <$d+0x14>
-      de:      	cmp	r1, r0
-      e0:      	beq	0xe8 <__stext+0x28>     @ imm = #4
-      e2:      	ldm	r2!, {r3}
-      e4:      	stm	r0!, {r3}
-      e6:      	b	0xde <__stext+0x1e>     @ imm = #-12
-      e8:      	push	{lr}
-      ea:      	bl	0x598 <main>            @ imm = #1194
-      ee:      	udf	#0
-
-000000f0 <$d>:
-      f0:	ff ff ff ff	.word	0xffffffff
-      f4:	00 00 00 10	.word	0x10000000
-      f8:	44 04 00 10	.word	0x10000444
-      fc:	00 00 00 10	.word	0x10000000
-     100:	00 00 00 10	.word	0x10000000
-     104:	98 44 00 00	.word	0x00004498
-
-00000108 <<T as core::convert::Into<U>>::into::hb25a0bfbd844ac2a>:
-     108:      	push	{r7, lr}
-     10a:      	add	r7, sp, #0
-     10c:      	bl	0x980 <<va108xx_hal::time::Hertz as core::convert::From<va108xx_hal::time::MegaHertz>>::from::h1147aa80a554a3b5> @ imm = #2160
-     110:      	pop	{r7, pc}
-     112:      	bmi	0xbe <__eexceptions+0x7e> @ imm = #-88
-
-00000114 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::h33dc600f51d55e4c>:
-     114:      	push	{r4, r5, r6, r7, lr}
-     116:      	add	r7, sp, #12
-     118:      	sub	sp, #44
-     11a:      	mov	r6, r3
-     11c:      	str	r2, [sp, #40]
-     11e:      	str	r1, [sp, #32]
-     120:      	mov	r5, r0
-     122:      	ldr	r4, [r7, #12]
-     124:      	ldr	r0, [r7, #8]
-     126:      	cmp	r0, #0
-     128:      	beq	0x130 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::h33dc600f51d55e4c+0x1c> @ imm = #4
-     12a:      	movs	r1, #5
-     12c:      	bl	0x968 <va108xx_hal::clock::enable_peripheral_clock::hc38ebef0d89f3d24> @ imm = #2104
-     130:      	cmp	r4, #0
-     132:      	beq	0x17a <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::h33dc600f51d55e4c+0x66> @ imm = #68
-     134:      	str	r6, [sp, #36]
-     136:      	ldrb	r6, [r4, #5]
-     138:      	ldrb	r0, [r4, #4]
-     13a:      	str	r0, [sp, #12]
-     13c:      	ldr	r0, [sp, #32]
-     13e:      	bl	0x980 <<va108xx_hal::time::Hertz as core::convert::From<va108xx_hal::time::MegaHertz>>::from::h1147aa80a554a3b5> @ imm = #2110
-     142:      	ldr	r1, [sp, #40]
-     144:      	uxtb	r1, r1
-     146:      	adds	r2, r1, #1
-     148:      	ldr	r1, [r4]
-     14a:      	muls	r1, r2, r1
-     14c:      	beq	0x234 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::h33dc600f51d55e4c+0x120> @ imm = #228
-     14e:      	rsbs	r2, r6, #0
-     150:      	adcs	r2, r6
-     152:      	str	r2, [sp, #8]
-     154:      	bl	0x2f8c <__aeabi_uidiv>  @ imm = #11828
-     158:      	str	r0, [sp, #28]
-     15a:      	ldrb	r0, [r4, #8]
-     15c:      	cmp	r0, #255
-     15e:      	bne	0x162 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::h33dc600f51d55e4c+0x4e> @ imm = #0
-     160:      	movs	r0, #0
-     162:      	str	r0, [sp, #20]
-     164:      	ldr	r6, [sp, #36]
-     166:      	ldrb	r0, [r4, #7]
-     168:      	str	r0, [sp, #24]
-     16a:      	ldr	r0, [sp, #12]
-     16c:      	cmp	r0, #0
-     16e:      	beq	0x188 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::h33dc600f51d55e4c+0x74> @ imm = #22
-     170:      	mov	r0, r5
-     172:      	movs	r1, #64
-     174:      	str	r1, [sp, #4]
-     176:      	ldr	r4, [sp, #8]
-     178:      	b	0x190 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::h33dc600f51d55e4c+0x7c> @ imm = #20
-     17a:      	movs	r0, #2
-     17c:      	str	r0, [sp, #28]
-     17e:      	movs	r4, #1
-     180:      	movs	r0, #0
-     182:      	str	r0, [sp, #24]
-     184:      	str	r0, [sp, #20]
-     186:      	b	0x18a <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::h33dc600f51d55e4c+0x76> @ imm = #0
-     188:      	ldr	r4, [sp, #8]
-     18a:      	mov	r0, r5
-     18c:      	movs	r1, #0
-     18e:      	str	r1, [sp, #4]
-     190:      	ldr	r3, [sp, #40]
-     192:      	lsrs	r1, r3, #16
-     194:      	uxtb	r6, r6
-     196:      	lsls	r2, r6, #16
-     198:      	adds	r1, r1, r2
-     19a:      	str	r1, [sp, #36]
-     19c:      	lsrs	r1, r3, #8
-     19e:      	lsls	r2, r6, #24
-     1a0:      	adds	r1, r1, r2
-     1a2:      	str	r1, [sp, #12]
-     1a4:      	lsrs	r1, r3, #24
-     1a6:      	lsls	r2, r6, #8
-     1a8:      	adds	r5, r1, r2
-     1aa:      	cmp	r4, #0
-     1ac:      	str	r0, [sp, #16]
-     1ae:      	bne	0x1b4 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::h33dc600f51d55e4c+0xa0> @ imm = #2
-     1b0:      	movs	r1, #128
-     1b2:      	b	0x1b6 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::h33dc600f51d55e4c+0xa2> @ imm = #0
-     1b4:      	movs	r1, #0
-     1b6:      	ldr	r0, [sp, #40]
-     1b8:      	lsls	r2, r0, #24
-     1ba:      	lsrs	r2, r2, #16
-     1bc:      	ldr	r0, [sp, #4]
-     1be:      	adds	r0, r0, r2
-     1c0:      	adds	r4, r0, r1
-     1c2:      	bl	0x724 <<u8 as va108xx_hal::spi::Word>::word_reg::h3132459577bda1d9> @ imm = #1374
-     1c6:      	movs	r1, #15
-     1c8:      	ands	r1, r0
-     1ca:      	orrs	r1, r4
-     1cc:      	ldr	r0, [pc, #120] <$d.3+0x8>
-     1ce:      	subs	r2, r0, #4
-     1d0:      	str	r1, [r2]
-     1d2:      	ldr	r4, [sp, #24]
-     1d4:      	subs	r1, r4, #1
-     1d6:      	mov	r2, r4
-     1d8:      	sbcs	r2, r1
-     1da:      	lsls	r1, r2, #7
-     1dc:      	movs	r2, #1
-     1de:      	str	r5, [sp, #8]
-     1e0:      	ands	r2, r5
-     1e2:      	ldr	r3, [sp, #36]
-     1e4:      	lsls	r3, r3, #31
-     1e6:      	lsrs	r3, r3, #28
-     1e8:      	adds	r2, r3, r2
-     1ea:      	ldr	r5, [sp, #12]
-     1ec:      	lsls	r3, r5, #31
-     1ee:      	lsrs	r3, r3, #29
-     1f0:      	adds	r2, r2, r3
-     1f2:      	lsls	r3, r6, #31
-     1f4:      	lsrs	r3, r3, #21
-     1f6:      	adds	r2, r2, r3
-     1f8:      	adds	r1, r2, r1
-     1fa:      	ldr	r2, [sp, #20]
-     1fc:      	lsls	r2, r2, #29
-     1fe:      	lsrs	r2, r2, #25
-     200:      	adds	r1, r1, r2
-     202:      	str	r1, [r0]
-     204:      	movs	r1, #3
-     206:      	str	r1, [r0, #40]
-     208:      	ldr	r1, [sp, #28]
-     20a:      	str	r1, [r0, #12]
-     20c:      	ldr	r1, [r0]
-     20e:      	movs	r2, #2
-     210:      	orrs	r2, r1
-     212:      	str	r2, [r0]
-     214:      	ldr	r0, [sp, #32]
-     216:      	bl	0x980 <<va108xx_hal::time::Hertz as core::convert::From<va108xx_hal::time::MegaHertz>>::from::h1147aa80a554a3b5> @ imm = #1894
-     21a:      	ldr	r1, [sp, #16]
-     21c:      	strb	r4, [r1, #9]
-     21e:      	strb	r6, [r1, #8]
-     220:      	ldr	r2, [sp, #8]
-     222:      	strb	r2, [r1, #7]
-     224:      	ldr	r2, [sp, #36]
-     226:      	strb	r2, [r1, #6]
-     228:      	strb	r5, [r1, #5]
-     22a:      	ldr	r2, [sp, #40]
-     22c:      	strb	r2, [r1, #4]
-     22e:      	str	r0, [r1]
-     230:      	add	sp, #44
-     232:      	pop	{r4, r5, r6, r7, pc}
-     234:      	ldr	r0, [pc, #8] <$d.3>
-     236:      	movs	r1, #25
-     238:      	ldr	r2, [pc, #8] <$d.3+0x4>
-     23a:      	bl	0x1158 <core::panicking::panic::hd188a7f3102defa3> @ imm = #3866
-     23e:      	trap
-
-00000240 <$d.3>:
-     240:	30 33 00 00	.word	0x00003330
-     244:	1c 33 00 00	.word	0x0000331c
-     248:	04 10 05 40	.word	0x40051004
-
-0000024c <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0>:
-     24c:      	push	{r4, r5, r6, r7, lr}
-     24e:      	add	r7, sp, #12
-     250:      	sub	sp, #28
-     252:      	str	r3, [sp, #16]
-     254:      	str	r0, [sp, #8]
-     256:      	str	r2, [sp]
-     258:      	adds	r4, r1, r2
-     25a:      	adds	r0, r7, #7
-     25c:      	adds	r0, #1
-     25e:      	ldrb	r0, [r0]
-     260:      	adds	r2, r0, #1
-     262:      	uxtb	r0, r2
-     264:      	str	r0, [sp, #24]
-     266:      	str	r2, [sp, #4]
-     268:      	cmp	r0, r2
-     26a:      	str	r1, [sp, #12]
-     26c:      	beq	0x2e8 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0+0x9c> @ imm = #120
-     26e:      	movs	r3, #2
-     270:      	cmp	r1, r4
-     272:      	beq	0x336 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0+0xea> @ imm = #192
-     274:      	cmp	r1, #0
-     276:      	beq	0x336 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0+0xea> @ imm = #188
-     278:      	movs	r4, #0
-     27a:      	strb	r4, [r1]
-     27c:      	ldr	r5, [sp, #4]
-     27e:      	lsls	r0, r5, #1
-     280:      	adds	r0, r0, #1
-     282:      	uxtb	r3, r0
-     284:      	ldr	r1, [sp]
-     286:      	cmp	r3, r1
-     288:      	bhi	0x350 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0+0x104> @ imm = #196
-     28a:      	ldr	r0, [sp, #8]
-     28c:      	ldr	r1, [sp, #12]
-     28e:      	mov	r2, r3
-     290:      	bl	0x808 <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::blocking::spi::Transfer<u8>>::transfer::h46aca6f4a661c25a> @ imm = #1396
-     294:      	cmp	r1, #0
-     296:      	beq	0x35a <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0+0x10e> @ imm = #192
-     298:      	movs	r3, #7
-     29a:      	lsls	r2, r5, #24
-     29c:      	beq	0x336 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0+0xea> @ imm = #150
-     29e:      	str	r3, [sp, #12]
-     2a0:      	ldr	r2, [sp, #16]
-     2a2:      	ldr	r6, [r2]
-     2a4:      	ldr	r2, [r2, #4]
-     2a6:      	str	r2, [sp, #20]
-     2a8:      	subs	r1, r1, #1
-     2aa:      	adds	r0, r0, #2
-     2ac:      	movs	r3, #3
-     2ae:      	ldr	r2, [sp, #20]
-     2b0:      	cmp	r6, r2
-     2b2:      	beq	0x336 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0+0xea> @ imm = #128
-     2b4:      	adds	r2, r6, #2
-     2b6:      	ldr	r5, [sp, #16]
-     2b8:      	str	r2, [r5]
-     2ba:      	cmp	r6, #0
-     2bc:      	beq	0x336 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0+0xea> @ imm = #118
-     2be:      	cmp	r1, #0
-     2c0:      	beq	0x33c <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0+0xf0> @ imm = #120
-     2c2:      	cmp	r1, #1
-     2c4:      	beq	0x344 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0+0xf8> @ imm = #124
-     2c6:      	adds	r4, r4, #1
-     2c8:      	subs	r3, r0, #1
-     2ca:      	ldrb	r5, [r0]
-     2cc:      	lsrs	r5, r5, #2
-     2ce:      	ldrb	r3, [r3]
-     2d0:      	lsls	r3, r3, #6
-     2d2:      	adds	r3, r3, r5
-     2d4:      	strh	r3, [r6]
-     2d6:      	subs	r1, r1, #2
-     2d8:      	adds	r0, r0, #2
-     2da:      	uxtb	r3, r4
-     2dc:      	ldr	r5, [sp, #24]
-     2de:      	cmp	r3, r5
-     2e0:      	mov	r6, r2
-     2e2:      	blo	0x2ac <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0+0x60> @ imm = #-58
-     2e4:      	ldr	r3, [sp, #12]
-     2e6:      	b	0x336 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0+0xea> @ imm = #76
-     2e8:      	ldr	r0, [sp, #8]
-     2ea:      	ldrb	r0, [r0, #19]
-     2ec:      	str	r0, [sp, #20]
-     2ee:      	movs	r5, #0
-     2f0:      	ldr	r1, [sp, #12]
-     2f2:      	subs	r2, r1, r4
-     2f4:      	subs	r3, r2, #1
-     2f6:      	sbcs	r2, r3
-     2f8:      	movs	r3, #2
-     2fa:      	cmp	r1, r4
-     2fc:      	beq	0x336 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0+0xea> @ imm = #54
-     2fe:      	cmp	r1, #0
-     300:      	beq	0x336 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0+0xea> @ imm = #50
-     302:      	uxtb	r6, r5
-     304:      	ldr	r0, [sp, #20]
-     306:      	cmp	r0, r6
-     308:      	blo	0x334 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0+0xe8> @ imm = #40
-     30a:      	adds	r2, r1, r2
-     30c:      	lsls	r6, r5, #3
-     30e:      	movs	r0, #134
-     310:      	orrs	r0, r6
-     312:      	strb	r0, [r1]
-     314:      	subs	r1, r2, r4
-     316:      	subs	r0, r1, #1
-     318:      	sbcs	r1, r0
-     31a:      	cmp	r2, r4
-     31c:      	beq	0x336 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0+0xea> @ imm = #22
-     31e:      	cmp	r2, #0
-     320:      	beq	0x336 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0+0xea> @ imm = #18
-     322:      	adds	r5, r5, #1
-     324:      	adds	r1, r2, r1
-     326:      	movs	r0, #0
-     328:      	strb	r0, [r2]
-     32a:      	uxtb	r0, r5
-     32c:      	ldr	r2, [sp, #24]
-     32e:      	cmp	r0, r2
-     330:      	blo	0x2f2 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0+0xa6> @ imm = #-66
-     332:      	b	0x26e <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0+0x22> @ imm = #-200
-     334:      	movs	r3, #0
-     336:      	mov	r0, r3
-     338:      	add	sp, #28
-     33a:      	pop	{r4, r5, r6, r7, pc}
-     33c:      	ldr	r0, [pc, #36] <$d.1>
-     33e:      	movs	r1, #43
-     340:      	ldr	r2, [pc, #40] <$d.1+0x8>
-     342:      	b	0x34a <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0+0xfe> @ imm = #4
-     344:      	ldr	r0, [pc, #28] <$d.1>
-     346:      	movs	r1, #43
-     348:      	ldr	r2, [pc, #28] <$d.1+0x4>
-     34a:      	bl	0x1158 <core::panicking::panic::hd188a7f3102defa3> @ imm = #3594
-     34e:      	trap
-     350:      	ldr	r2, [pc, #32] <$d.1+0x10>
-     352:      	mov	r0, r3
-     354:      	bl	0x21fc <core::slice::index::slice_end_index_len_fail::h4968a5fa708ed4f2> @ imm = #7844
-     358:      	trap
-     35a:      	ldr	r0, [pc, #8] <$d.1+0x2>
-     35c:      	movs	r1, #43
-     35e:      	ldr	r2, [pc, #16] <$d.1+0xe>
-     360:      	b	0x34a <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0+0xfe> @ imm = #-26
-     362:      	mov	r8, r8
-
-00000364 <$d.1>:
-     364:	e8 33 00 00	.word	0x000033e8
-     368:	d8 33 00 00	.word	0x000033d8
-     36c:	c8 33 00 00	.word	0x000033c8
-     370:	b8 33 00 00	.word	0x000033b8
-     374:	a8 33 00 00	.word	0x000033a8
-
-00000378 <<&T as core::fmt::Debug>::fmt::h33fd5fd379fbf26b>:
-     378:      	push	{r7, lr}
-     37a:      	add	r7, sp, #0
-     37c:      	ldr	r0, [r0]
-     37e:      	bl	0xf7c <<max116xx_10bit::AdcError as core::fmt::Debug>::fmt::h7aa0b0b24f5c139a> @ imm = #3066
-     382:      	pop	{r7, pc}
-
-00000384 <core::ptr::drop_in_place<&max116xx_10bit::AdcError>::he48005ae319fcc5c>:
-     384:      	bx	lr
-     386:      	bmi	0x332 <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0+0xe6> @ imm = #-88
-
-00000388 <_ZN77_$LT$max116xx_10bit..Error$LT$SpiE$C$PinE$GT$$u20$as$u20$core..fmt..Debug$GT$3fmt17h72b89bef16459832E>:
-     388:      	push	{r4, r5, r7, lr}
-     38a:      	add	r7, sp, #8
-     38c:      	sub	sp, #16
-     38e:      	mov	r5, r0
-     390:      	mov	r4, sp
-     392:      	ldr	r2, [pc, #32] <$d.8+0x2>
-     394:      	movs	r3, #3
-     396:      	mov	r0, r4
-     398:      	bl	0x1fac <core::fmt::Formatter::debug_tuple::ha4e1a3ea9953bf09> @ imm = #7184
-     39c:      	str	r5, [sp, #12]
-     39e:      	add	r1, sp, #12
-     3a0:      	ldr	r2, [pc, #20] <$d.8+0x4>
-     3a2:      	mov	r0, r4
-     3a4:      	bl	0x1508 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186> @ imm = #4448
-     3a8:      	mov	r0, r4
-     3aa:      	bl	0x15f4 <core::fmt::builders::DebugTuple::finish::h6d0cc63ecbd49307> @ imm = #4678
-     3ae:      	add	sp, #16
-     3b0:      	pop	{r4, r5, r7, pc}
-     3b2:      	mov	r8, r8
-
-000003b4 <$d.8>:
-     3b4:	13 34 00 00	.word	0x00003413
-     3b8:	18 34 00 00	.word	0x00003418
-
-000003bc <core::ptr::drop_in_place<max116xx_10bit::Error<core::convert::Infallible,core::convert::Infallible>>::h3d962341dd0fd20c>:
-     3bc:      	bx	lr
-     3be:      	bmi	0x36a <$d.1+0x6>        @ imm = #-88
-
-000003c0 <core::option::Option<T>::unwrap::h9eee7d40ec3eff5f>:
-     3c0:      	push	{r7, lr}
-     3c2:      	add	r7, sp, #0
-     3c4:      	cmp	r0, #0
-     3c6:      	beq	0x3ca <core::option::Option<T>::unwrap::h9eee7d40ec3eff5f+0xa> @ imm = #0
-     3c8:      	pop	{r7, pc}
-     3ca:      	ldr	r0, [pc, #12] <$d.2+0x2>
-     3cc:      	movs	r1, #43
-     3ce:      	ldr	r2, [pc, #12] <$d.2+0x6>
-     3d0:      	bl	0x1158 <core::panicking::panic::hd188a7f3102defa3> @ imm = #3460
-     3d4:      	trap
-     3d6:      	mov	r8, r8
-
-000003d8 <$d.2>:
-     3d8:	28 34 00 00	.word	0x00003428
-     3dc:	0c 36 00 00	.word	0x0000360c
-
-000003e0 <va108xx::Peripherals::take::h619cff2eba763ceb>:
-     3e0:      	push	{r4, r5, r6, r7, lr}
-     3e2:      	add	r7, sp, #12
-     3e4:      	sub	sp, #4
-     3e6:      	bl	0xf74 <__primask_r>     @ imm = #2954
-     3ea:      	mov	r4, r0
-     3ec:      	movs	r6, #1
-     3ee:      	ands	r4, r6
-     3f0:      	bl	0xf68 <__cpsid>         @ imm = #2932
-     3f4:      	bl	0xf7a <bare_metal::CriticalSection::new::hf1acf5be27eacceb> @ imm = #2946
-     3f8:      	ldr	r0, [pc, #24] <$d.4>
-     3fa:      	ldrb	r5, [r0]
-     3fc:      	cmp	r5, #0
-     3fe:      	bne	0x402 <va108xx::Peripherals::take::h619cff2eba763ceb+0x22> @ imm = #0
-     400:      	strb	r6, [r0]
-     402:      	cmp	r4, #0
-     404:      	bne	0x40a <va108xx::Peripherals::take::h619cff2eba763ceb+0x2a> @ imm = #2
-     406:      	bl	0xf6c <__cpsie>         @ imm = #2914
-     40a:      	rsbs	r0, r5, #0
-     40c:      	adcs	r0, r5
-     40e:      	add	sp, #4
-     410:      	pop	{r4, r5, r6, r7, pc}
-     412:      	mov	r8, r8
-
-00000414 <$d.4>:
-     414:	34 04 00 10	.word	0x10000434
-
-00000418 <max11619_adc::spi_example_externally_clocked::h61d431dc84bdf708>:
-     418:      	push	{r7, lr}
-     41a:      	add	r7, sp, #0
-     41c:      	sub	sp, #128
-     41e:      	str	r1, [sp, #20]
-     420:      	mov	r5, r0
-     422:      	bl	0x722 <dummy_pin::dummy::DummyPin::new_low::ha5c088a543349d0a> @ imm = #764
-     426:      	ldr	r0, [pc, #316] <$d.6+0x2>
-     428:      	ldr	r1, [r0, #4]
-     42a:      	lsls	r1, r1, #30
-     42c:      	bpl	0x428 <max11619_adc::spi_example_externally_clocked::h61d431dc84bdf708+0x10> @ imm = #-8
-     42e:      	movs	r1, #16
-     430:      	str	r1, [r0]
-     432:      	ldr	r1, [r0, #4]
-     434:      	lsls	r1, r1, #30
-     436:      	bpl	0x432 <max11619_adc::spi_example_externally_clocked::h61d431dc84bdf708+0x1a> @ imm = #-8
-     438:      	movs	r1, #116
-     43a:      	str	r1, [r0]
-     43c:      	add	r0, sp, #28
-     43e:      	mov	r1, r0
-     440:      	ldm	r5!, {r2, r3, r4}
-     442:      	stm	r1!, {r2, r3, r4}
-     444:      	movs	r1, #4
-     446:      	strb	r1, [r0, #20]
-     448:      	ldr	r0, [pc, #284] <$d.6+0x4>
-     44a:      	str	r0, [sp, #44]
-     44c:      	movs	r5, #0
-     44e:      	str	r5, [sp, #40]
-     450:      	add	r0, sp, #52
-     452:      	movs	r1, #32
-     454:      	bl	0x30bc <__aeabi_memclr8> @ imm = #11364
-     458:      	str	r5, [sp, #84]
-     45a:      	add	r0, sp, #88
-     45c:      	adds	r1, r0, #6
-     45e:      	str	r1, [sp, #16]
-     460:      	adds	r1, r0, #4
-     462:      	str	r1, [sp, #12]
-     464:      	adds	r1, r0, #2
-     466:      	str	r1, [sp, #8]
-     468:      	adds	r0, #8
-     46a:      	str	r0, [sp, #24]
-     46c:      	movs	r4, #1
-     46e:      	str	r4, [sp, #116]
-     470:      	add	r0, sp, #120
-     472:      	str	r0, [sp, #112]
-     474:      	str	r5, [sp, #108]
-     476:      	str	r5, [sp, #104]
-     478:      	movs	r6, #2
-     47a:      	str	r6, [sp, #100]
-     47c:      	ldr	r0, [pc, #236] <$d.6+0x8>
-     47e:      	str	r0, [sp, #96]
-     480:      	ldr	r0, [pc, #236] <$d.6+0xc>
-     482:      	str	r0, [sp, #124]
-     484:      	add	r0, sp, #84
-     486:      	str	r0, [sp, #120]
-     488:      	add	r1, sp, #96
-     48a:      	mov	r0, r5
-     48c:      	bl	0xc90 <rtt_target::print::print_impl::write_fmt::h1a63b2b8c364c545> @ imm = #2048
-     490:      	str	r5, [sp, #92]
-     492:      	str	r5, [sp, #88]
-     494:      	ldr	r0, [sp, #24]
-     496:      	str	r0, [sp, #100]
-     498:      	add	r0, sp, #88
-     49a:      	str	r0, [sp, #96]
-     49c:      	movs	r0, #3
-     49e:      	str	r0, [sp]
-     4a0:      	add	r0, sp, #28
-     4a2:      	add	r1, sp, #52
-     4a4:      	movs	r2, #32
-     4a6:      	add	r3, sp, #96
-     4a8:      	bl	0x24c <max116xx_10bit::Max116xx10Bit<SPI,CS>::read_multiple_channels_0_to_n::he8c1fd70f18f84e0> @ imm = #-608
-     4ac:      	uxtb	r0, r0
-     4ae:      	cmp	r0, #7
-     4b0:      	bne	0x54e <max11619_adc::spi_example_externally_clocked::h61d431dc84bdf708+0x136> @ imm = #154
-     4b2:      	movs	r2, #32
-     4b4:      	mov	r0, r5
-     4b6:      	ldr	r1, [pc, #200] <$d.6+0x1e>
-     4b8:      	bl	0xc5c <rtt_target::print::print_impl::write_str::hffb1f12b8b66fdee> @ imm = #1952
-     4bc:      	str	r4, [sp, #116]
-     4be:      	add	r0, sp, #120
-     4c0:      	str	r0, [sp, #112]
-     4c2:      	str	r5, [sp, #108]
-     4c4:      	str	r5, [sp, #104]
-     4c6:      	str	r6, [sp, #100]
-     4c8:      	ldr	r0, [pc, #184] <$d.6+0x20>
-     4ca:      	str	r0, [sp, #96]
-     4cc:      	ldr	r0, [pc, #184] <$d.6+0x24>
-     4ce:      	str	r0, [sp, #124]
-     4d0:      	add	r0, sp, #88
-     4d2:      	str	r0, [sp, #120]
-     4d4:      	add	r1, sp, #96
-     4d6:      	mov	r0, r5
-     4d8:      	bl	0xc90 <rtt_target::print::print_impl::write_fmt::h1a63b2b8c364c545> @ imm = #1972
-     4dc:      	str	r4, [sp, #116]
-     4de:      	add	r0, sp, #120
-     4e0:      	str	r0, [sp, #112]
-     4e2:      	str	r5, [sp, #108]
-     4e4:      	str	r5, [sp, #104]
-     4e6:      	str	r6, [sp, #100]
-     4e8:      	ldr	r0, [pc, #160] <$d.6+0x28>
-     4ea:      	str	r0, [sp, #96]
-     4ec:      	ldr	r0, [pc, #152] <$d.6+0x24>
-     4ee:      	str	r0, [sp, #124]
-     4f0:      	ldr	r0, [sp, #8]
-     4f2:      	str	r0, [sp, #120]
-     4f4:      	add	r1, sp, #96
-     4f6:      	mov	r0, r5
-     4f8:      	bl	0xc90 <rtt_target::print::print_impl::write_fmt::h1a63b2b8c364c545> @ imm = #1940
-     4fc:      	str	r4, [sp, #116]
-     4fe:      	add	r0, sp, #120
-     500:      	str	r0, [sp, #112]
-     502:      	str	r5, [sp, #108]
-     504:      	str	r5, [sp, #104]
-     506:      	str	r6, [sp, #100]
-     508:      	ldr	r0, [pc, #132] <$d.6+0x2c>
-     50a:      	str	r0, [sp, #96]
-     50c:      	ldr	r0, [pc, #120] <$d.6+0x24>
-     50e:      	str	r0, [sp, #124]
-     510:      	ldr	r0, [sp, #12]
-     512:      	str	r0, [sp, #120]
-     514:      	add	r1, sp, #96
-     516:      	mov	r0, r5
-     518:      	bl	0xc90 <rtt_target::print::print_impl::write_fmt::h1a63b2b8c364c545> @ imm = #1908
-     51c:      	str	r4, [sp, #116]
-     51e:      	add	r0, sp, #120
-     520:      	str	r0, [sp, #112]
-     522:      	str	r5, [sp, #108]
-     524:      	str	r5, [sp, #104]
-     526:      	str	r6, [sp, #100]
-     528:      	ldr	r0, [pc, #104] <$d.6+0x30>
-     52a:      	str	r0, [sp, #96]
-     52c:      	ldr	r0, [pc, #88] <$d.6+0x24>
-     52e:      	str	r0, [sp, #124]
-     530:      	ldr	r0, [sp, #16]
-     532:      	str	r0, [sp, #120]
-     534:      	add	r1, sp, #96
-     536:      	mov	r0, r5
-     538:      	bl	0xc90 <rtt_target::print::print_impl::write_fmt::h1a63b2b8c364c545> @ imm = #1876
-     53c:      	ldr	r0, [sp, #84]
-     53e:      	adds	r0, r0, #1
-     540:      	str	r0, [sp, #84]
-     542:      	movs	r0, #125
-     544:      	lsls	r1, r0, #2
-     546:      	ldr	r0, [sp, #20]
-     548:      	bl	0x8fe <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h809c2c3943c5cc73> @ imm = #946
-     54c:      	b	0x46c <max11619_adc::spi_example_externally_clocked::h61d431dc84bdf708+0x54> @ imm = #-228
-     54e:      	add	r2, sp, #120
-     550:      	strb	r0, [r2]
-     552:      	ldr	r0, [pc, #32] <$d.6+0x12>
-     554:      	str	r0, [sp]
-     556:      	ldr	r0, [pc, #32] <$d.6+0x16>
-     558:      	movs	r1, #25
-     55a:      	ldr	r3, [pc, #32] <$d.6+0x1a>
-     55c:      	bl	0x11e8 <core::result::unwrap_failed::hab9917f6469ee00f> @ imm = #3208
-     560:      	trap
-     562:      	mov	r8, r8
-
-00000564 <$d.6>:
-     564:	08 10 05 40	.word	0x40051008
-     568:	03 01 04 04	.word	0x04040103
-     56c:	a8 34 00 00	.word	0x000034a8
-     570:	0d 2c 00 00	.word	0x00002c0d
-     574:	d4 34 00 00	.word	0x000034d4
-     578:	b8 34 00 00	.word	0x000034b8
-     57c:	54 34 00 00	.word	0x00003454
-     580:	24 35 00 00	.word	0x00003524
-     584:	74 35 00 00	.word	0x00003574
-     588:	31 2b 00 00	.word	0x00002b31
-     58c:	90 35 00 00	.word	0x00003590
-     590:	ac 35 00 00	.word	0x000035ac
-     594:	d8 35 00 00	.word	0x000035d8
-
-00000598 <main>:
-     598:      	push	{r7, lr}
-     59a:      	add	r7, sp, #0
-     59c:      	bl	0x5a4 <max11619_adc::__cortex_m_rt_main::h2e9a6cd1b0437d7b> @ imm = #4
-     5a0:      	trap
-     5a2:      	bmi	0x54e <max11619_adc::spi_example_externally_clocked::h61d431dc84bdf708+0x136> @ imm = #-88
-
-000005a4 <max11619_adc::__cortex_m_rt_main::h2e9a6cd1b0437d7b>:
-     5a4:      	push	{r7, lr}
-     5a6:      	add	r7, sp, #0
-     5a8:      	sub	sp, #120
-     5aa:      	ldr	r6, [pc, #328] <$d.9+0x2>
-     5ac:      	movs	r1, #48
-     5ae:      	mov	r0, r6
-     5b0:      	bl	0x30bc <__aeabi_memclr8> @ imm = #11016
-     5b4:      	movs	r5, #1
-     5b6:      	lsls	r0, r5, #10
-     5b8:      	str	r0, [sp]
-     5ba:      	adds	r6, #24
-     5bc:      	ldr	r1, [pc, #312] <$d.9+0x4>
-     5be:      	movs	r4, #0
-     5c0:      	ldr	r3, [pc, #312] <$d.9+0x8>
-     5c2:      	mov	r0, r6
-     5c4:      	mov	r2, r4
-     5c6:      	bl	0xaac <rtt_target::rtt::RttChannel::init::h161ee605c7839e7a> @ imm = #1250
-     5ca:      	ldr	r0, [pc, #296] <$d.9+0x2>
-     5cc:      	mov	r1, r5
-     5ce:      	mov	r2, r4
-     5d0:      	bl	0xa84 <rtt_target::rtt::RttHeader::init::hbc7f5d8502311a73> @ imm = #1200
-     5d4:      	mov	r0, r6
-     5d6:      	bl	0xe1c <rtt_target::UpChannel::new::h80d9d25389a46033> @ imm = #2114
-     5da:      	bl	0xce4 <rtt_target::print::set_print_channel::h915b9b561c18c1c6> @ imm = #1798
-     5de:      	ldr	r1, [pc, #288] <$d.9+0xe>
-     5e0:      	movs	r2, #25
-     5e2:      	str	r4, [sp, #28]
-     5e4:      	mov	r0, r4
-     5e6:      	bl	0xc5c <rtt_target::print::print_impl::write_str::hffb1f12b8b66fdee> @ imm = #1650
-     5ea:      	bl	0x3e0 <va108xx::Peripherals::take::h619cff2eba763ceb> @ imm = #-526
-     5ee:      	bl	0x3c0 <core::option::Option<T>::unwrap::h9eee7d40ec3eff5f> @ imm = #-562
-     5f2:      	movs	r0, #50
-     5f4:      	str	r0, [sp, #20]
-     5f6:      	bl	0x97c <<u32 as va108xx_hal::time::U32Ext>::mhz::hacb2732941550405> @ imm = #898
-     5fa:      	bl	0x108 <<T as core::convert::Into<U>>::into::hb25a0bfbd844ac2a> @ imm = #-1270
-     5fe:      	mov	r3, r0
-     600:      	str	r4, [sp]
-     602:      	add	r4, sp, #32
-     604:      	add	r1, sp, #116
-     606:      	str	r1, [sp, #24]
-     608:      	mov	r0, r4
-     60a:      	mov	r2, r1
-     60c:      	bl	0x82c <va108xx_hal::timer::set_up_ms_timer::hef188ac5bc4df8e7> @ imm = #540
-     610:      	add	r1, sp, #96
-     612:      	mov	r0, r1
-     614:      	ldm	r4!, {r2, r3}
-     616:      	stm	r0!, {r2, r3}
-     618:      	ldm	r4!, {r2, r3, r6}
-     61a:      	stm	r0!, {r2, r3, r6}
-     61c:      	add	r0, sp, #52
-     61e:      	str	r0, [sp, #16]
-     620:      	bl	0x8f0 <va108xx_hal::timer::Delay::new::h0274059ca631680e> @ imm = #716
-     624:      	ldr	r0, [pc, #220] <$d.9+0x10>
-     626:      	str	r5, [r0]
-     628:      	ldr	r0, [pc, #220] <$d.9+0x14>
-     62a:      	ldr	r1, [r0]
-     62c:      	ldr	r2, [pc, #220] <$d.9+0x18>
-     62e:      	orrs	r2, r1
-     630:      	str	r2, [r0]
-     632:      	lsls	r2, r5, #14
-     634:      	str	r2, [sp, #12]
-     636:      	ldr	r3, [pc, #216] <$d.9+0x1e>
-     638:      	str	r2, [r3, #16]
-     63a:      	lsls	r0, r5, #20
-     63c:      	ldr	r6, [pc, #212] <$d.9+0x20>
-     63e:      	ldr	r1, [r6, #16]
-     640:      	bics	r1, r0
-     642:      	str	r1, [r6, #16]
-     644:      	str	r2, [r3, #12]
-     646:      	lsls	r0, r5, #19
-     648:      	ldr	r1, [r6, #16]
-     64a:      	bics	r1, r0
-     64c:      	str	r1, [r6, #16]
-     64e:      	str	r2, [r3, #8]
-     650:      	lsls	r0, r5, #18
-     652:      	ldr	r1, [r6, #16]
-     654:      	bics	r1, r0
-     656:      	str	r1, [r6, #16]
-     658:      	movs	r2, #19
-     65a:      	ldr	r4, [sp, #24]
-     65c:      	mov	r0, r4
-     65e:      	mov	r1, r5
-     660:      	mov	r3, r5
-     662:      	bl	0x92c <va108xx_hal::utility::port_mux::he673b384107ff95d> @ imm = #710
-     666:      	movs	r2, #18
-     668:      	mov	r0, r4
-     66a:      	mov	r1, r5
-     66c:      	mov	r3, r5
-     66e:      	bl	0x92c <va108xx_hal::utility::port_mux::he673b384107ff95d> @ imm = #698
-     672:      	movs	r2, #17
-     674:      	mov	r0, r4
-     676:      	mov	r1, r5
-     678:      	mov	r3, r5
-     67a:      	bl	0x92c <va108xx_hal::utility::port_mux::he673b384107ff95d> @ imm = #686
-     67e:      	movs	r2, #16
-     680:      	mov	r0, r4
-     682:      	mov	r1, r5
-     684:      	mov	r3, r5
-     686:      	bl	0x92c <va108xx_hal::utility::port_mux::he673b384107ff95d> @ imm = #674
-     68a:      	ldr	r0, [sp, #28]
-     68c:      	ldr	r4, [pc, #128] <$d.9+0x1c>
-     68e:      	str	r0, [r4]
-     690:      	lsls	r0, r5, #16
-     692:      	ldr	r1, [r6, #16]
-     694:      	orrs	r1, r0
-     696:      	str	r1, [r6, #16]
-     698:      	str	r0, [r6, #4]
-     69a:      	str	r0, [r6]
-     69c:      	movs	r0, #3
-     69e:      	bl	0x97c <<u32 as va108xx_hal::time::U32Ext>::mhz::hacb2732941550405> @ imm = #730
-     6a2:      	ldr	r1, [sp, #12]
-     6a4:      	str	r1, [r4, #4]
-     6a6:      	lsls	r1, r5, #17
-     6a8:      	ldr	r2, [r6, #16]
-     6aa:      	bics	r2, r1
-     6ac:      	str	r2, [r6, #16]
-     6ae:      	bl	0x980 <<va108xx_hal::time::Hertz as core::convert::From<va108xx_hal::time::MegaHertz>>::from::h1147aa80a554a3b5> @ imm = #718
-     6b2:      	mov	r4, r0
-     6b4:      	ldr	r0, [sp, #20]
-     6b6:      	bl	0x97c <<u32 as va108xx_hal::time::U32Ext>::mhz::hacb2732941550405> @ imm = #706
-     6ba:      	mov	r1, r0
-     6bc:      	add	r0, sp, #96
-     6be:      	ldr	r3, [sp, #28]
-     6c0:      	strb	r3, [r0, #8]
-     6c2:      	lsls	r2, r5, #24
-     6c4:      	str	r2, [sp, #100]
-     6c6:      	str	r4, [sp, #96]
-     6c8:      	ldr	r2, [sp, #24]
-     6ca:      	str	r2, [sp]
-     6cc:      	str	r0, [sp, #4]
-     6ce:      	add	r4, sp, #72
-     6d0:      	mov	r0, r4
-     6d2:      	mov	r2, r3
-     6d4:      	bl	0x114 <va108xx_hal::spi::Spi<va108xx::SPIB,(Sck,Miso,Mosi),WORD>::spib::h33dc600f51d55e4c> @ imm = #-1476
-     6d8:      	add	r0, sp, #84
-     6da:      	mov	r1, r0
-     6dc:      	ldm	r4!, {r2, r3, r5}
-     6de:      	stm	r1!, {r2, r3, r5}
-     6e0:      	add	r1, sp, #96
-     6e2:      	mov	r2, r1
-     6e4:      	ldr	r6, [sp, #16]
-     6e6:      	ldm	r6!, {r3, r4}
-     6e8:      	stm	r2!, {r3, r4}
-     6ea:      	ldm	r6!, {r3, r4, r5}
-     6ec:      	stm	r2!, {r3, r4, r5}
-     6ee:      	bl	0x418 <max11619_adc::spi_example_externally_clocked::h61d431dc84bdf708> @ imm = #-730
-     6f2:      	trap
-
-000006f4 <$d.9>:
-     6f4:	00 00 00 10	.word	0x10000000
-     6f8:	e8 35 00 00	.word	0x000035e8
-     6fc:	30 00 00 10	.word	0x10000030
-     700:	f1 35 00 00	.word	0x000035f1
-     704:	00 e1 00 e0	.word	0xe000e100
-     708:	7c 00 00 40	.word	0x4000007c
-     70c:	01 00 40 01	.word	0x01400001
-     710:	40 20 00 40	.word	0x40002040
-     714:	10 00 00 50	.word	0x50000010
-
-00000718 <OC0>:
-     718:      	push	{r7, lr}
-     71a:      	add	r7, sp, #0
-     71c:      	bl	0x8a0 <va108xx_hal::timer::default_ms_irq_handler::he7f17ff31cf7bcc5> @ imm = #384
-     720:      	pop	{r7, pc}
-
-00000722 <dummy_pin::dummy::DummyPin::new_low::ha5c088a543349d0a>:
-     722:      	bx	lr
-
-00000724 <<u8 as va108xx_hal::spi::Word>::word_reg::h3132459577bda1d9>:
-     724:      	movs	r0, #7
-     726:      	bx	lr
-
-00000728 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a>:
-     728:      	push	{r4, r5, r6, r7, lr}
-     72a:      	add	r7, sp, #12
-     72c:      	sub	sp, #12
-     72e:      	ldr	r4, [pc, #204] <$d.20+0x2>
-     730:      	movs	r5, #2
-     732:      	str	r5, [r4, #40]
-     734:      	movs	r6, #1
-     736:      	str	r6, [r4, #40]
-     738:      	ldrb	r0, [r0, #9]
-     73a:      	str	r0, [sp, #4]
-     73c:      	cmp	r0, #0
-     73e:      	beq	0x748 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a+0x20> @ imm = #6
-     740:      	lsls	r0, r6, #11
-     742:      	ldr	r5, [r4]
-     744:      	orrs	r5, r0
-     746:      	str	r5, [r4]
-     748:      	str	r6, [sp]
-     74a:      	cmp	r2, #12
-     74c:      	mov	r6, r2
-     74e:      	blo	0x752 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a+0x2a> @ imm = #0
-     750:      	movs	r6, #12
-     752:      	adds	r0, r1, r2
-     754:      	cmp	r6, #0
-     756:      	beq	0x774 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a+0x4c> @ imm = #26
-     758:      	movs	r2, #0
-     75a:      	str	r6, [sp, #8]
-     75c:      	adds	r2, r2, #1
-     75e:      	cmp	r1, r0
-     760:      	beq	0x7f0 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a+0xc8> @ imm = #140
-     762:      	ldrb	r6, [r1]
-     764:      	adds	r1, r1, #1
-     766:      	ldr	r5, [r4, #8]
-     768:      	lsls	r5, r5, #30
-     76a:      	bpl	0x75e <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a+0x36> @ imm = #-16
-     76c:      	str	r6, [r4, #4]
-     76e:      	ldr	r6, [sp, #8]
-     770:      	cmp	r2, r6
-     772:      	bne	0x75c <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a+0x34> @ imm = #-26
-     774:      	ldr	r2, [sp, #4]
-     776:      	cmp	r2, #0
-     778:      	beq	0x784 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a+0x5c> @ imm = #8
-     77a:      	ldr	r2, [sp]
-     77c:      	lsls	r2, r2, #11
-     77e:      	ldr	r5, [r4]
-     780:      	bics	r5, r2
-     782:      	str	r5, [r4]
-     784:      	cmp	r3, #0
-     786:      	beq	0x7d4 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a+0xac> @ imm = #74
-     788:      	ldr	r2, [r7, #8]
-     78a:      	adds	r2, r3, r2
-     78c:      	cmp	r1, r0
-     78e:      	beq	0x7ba <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a+0x92> @ imm = #40
-     790:      	ldrb	r5, [r1]
-     792:      	ldr	r6, [r4, #8]
-     794:      	lsls	r6, r6, #30
-     796:      	bpl	0x792 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a+0x6a> @ imm = #-8
-     798:      	str	r5, [r4, #4]
-     79a:      	ldr	r5, [r4, #8]
-     79c:      	lsls	r5, r5, #29
-     79e:      	bpl	0x79a <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a+0x72> @ imm = #-8
-     7a0:      	ldr	r5, [r4, #4]
-     7a2:      	cmp	r3, r2
-     7a4:      	beq	0x7f0 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a+0xc8> @ imm = #72
-     7a6:      	adds	r1, r1, #1
-     7a8:      	strb	r5, [r3]
-     7aa:      	adds	r3, r3, #1
-     7ac:      	b	0x78c <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a+0x64> @ imm = #-36
-     7ae:      	ldr	r0, [r4, #8]
-     7b0:      	lsls	r0, r0, #29
-     7b2:      	bpl	0x7ae <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a+0x86> @ imm = #-8
-     7b4:      	ldr	r0, [r4, #4]
-     7b6:      	strb	r0, [r3]
-     7b8:      	adds	r3, r3, #1
-     7ba:      	cmp	r3, r2
-     7bc:      	bne	0x7ae <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a+0x86> @ imm = #-18
-     7be:      	b	0x7ec <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a+0xc4> @ imm = #42
-     7c0:      	ldrb	r2, [r1]
-     7c2:      	ldr	r3, [r4, #8]
-     7c4:      	lsls	r3, r3, #30
-     7c6:      	bpl	0x7c2 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a+0x9a> @ imm = #-8
-     7c8:      	str	r2, [r4, #4]
-     7ca:      	ldr	r2, [r4, #8]
-     7cc:      	lsls	r2, r2, #29
-     7ce:      	bpl	0x7ca <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a+0xa2> @ imm = #-8
-     7d0:      	ldr	r2, [r4, #4]
-     7d2:      	adds	r1, r1, #1
-     7d4:      	cmp	r1, r0
-     7d6:      	bne	0x7c0 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a+0x98> @ imm = #-26
-     7d8:      	cmp	r6, #0
-     7da:      	beq	0x7ec <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a+0xc4> @ imm = #14
-     7dc:      	movs	r0, #0
-     7de:      	ldr	r1, [r4, #8]
-     7e0:      	lsls	r1, r1, #29
-     7e2:      	bpl	0x7de <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a+0xb6> @ imm = #-8
-     7e4:      	ldr	r1, [r4, #4]
-     7e6:      	adds	r0, r0, #1
-     7e8:      	cmp	r0, r6
-     7ea:      	bne	0x7de <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a+0xb6> @ imm = #-16
-     7ec:      	add	sp, #12
-     7ee:      	pop	{r4, r5, r6, r7, pc}
-     7f0:      	ldr	r0, [pc, #12] <$d.20+0x4>
-     7f2:      	movs	r1, #43
-     7f4:      	ldr	r2, [pc, #12] <$d.20+0x8>
-     7f6:      	bl	0x1158 <core::panicking::panic::hd188a7f3102defa3> @ imm = #2398
-     7fa:      	trap
-
-000007fc <$d.20>:
-     7fc:	04 10 05 40	.word	0x40051004
-     800:	1c 36 00 00	.word	0x0000361c
-     804:	a4 36 00 00	.word	0x000036a4
-
-00000808 <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::blocking::spi::Transfer<u8>>::transfer::h46aca6f4a661c25a>:
-     808:      	push	{r4, r5, r7, lr}
-     80a:      	add	r7, sp, #8
-     80c:      	sub	sp, #8
-     80e:      	mov	r4, r2
-     810:      	mov	r5, r1
-     812:      	cmp	r2, #0
-     814:      	beq	0x822 <<va108xx_hal::spi::SpiBase<va108xx::SPIB> as embedded_hal::blocking::spi::Transfer<u8>>::transfer::h46aca6f4a661c25a+0x1a> @ imm = #10
-     816:      	str	r4, [sp]
-     818:      	mov	r1, r5
-     81a:      	mov	r2, r4
-     81c:      	mov	r3, r5
-     81e:      	bl	0x728 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a> @ imm = #-250
-     822:      	mov	r0, r5
-     824:      	mov	r1, r4
-     826:      	add	sp, #8
-     828:      	pop	{r4, r5, r7, pc}
-     82a:      	bmi	0x7d6 <va108xx_hal::spi::SpiBase<va108xx::SPIB>::transfer_internal::hbeb81ca672a34a3a+0xae> @ imm = #-88
-
-0000082c <va108xx_hal::timer::set_up_ms_timer::hef188ac5bc4df8e7>:
-     82c:      	push	{r4, r5, r6, r7, lr}
-     82e:      	add	r7, sp, #12
-     830:      	sub	sp, #4
-     832:      	str	r3, [sp]
-     834:      	mov	r4, r0
-     836:      	ldr	r0, [pc, #92] <$d.13+0x2>
-     838:      	ldr	r1, [r0]
-     83a:      	movs	r5, #1
-     83c:      	orrs	r1, r5
-     83e:      	str	r1, [r0]
-     840:      	ldr	r6, [pc, #84] <$d.13+0x4>
-     842:      	ldr	r1, [r6]
-     844:      	orrs	r1, r5
-     846:      	str	r1, [r6]
-     848:      	lsls	r1, r5, #21
-     84a:      	ldr	r2, [r0, #8]
-     84c:      	orrs	r2, r1
-     84e:      	str	r2, [r0, #8]
-     850:      	adds	r0, r7, #7
-     852:      	adds	r0, #1
-     854:      	ldrh	r0, [r0]
-     856:      	ldr	r1, [pc, #68] <$d.13+0xa>
-     858:      	str	r0, [r1]
-     85a:      	ldr	r0, [r6]
-     85c:      	movs	r1, #16
-     85e:      	orrs	r1, r0
-     860:      	str	r1, [r6]
-     862:      	ldr	r0, [r6]
-     864:      	bics	r0, r5
-     866:      	str	r0, [r6]
-     868:      	movs	r0, #125
-     86a:      	lsls	r6, r0, #3
-     86c:      	mov	r0, r3
-     86e:      	mov	r1, r6
-     870:      	bl	0x2f8c <__aeabi_uidiv>  @ imm = #10008
-     874:      	ldr	r2, [pc, #32] <$d.13+0x4>
-     876:      	str	r0, [r2, #4]
-     878:      	str	r0, [r2, #8]
-     87a:      	movs	r1, #0
-     87c:      	strb	r5, [r4, #16]
-     87e:      	str	r6, [r4]
-     880:      	ldr	r3, [sp]
-     882:      	str	r3, [r4, #4]
-     884:      	str	r0, [r4, #8]
-     886:      	str	r1, [r4, #12]
-     888:      	ldr	r0, [r2]
-     88a:      	orrs	r0, r5
-     88c:      	str	r0, [r2]
-     88e:      	add	sp, #4
-     890:      	pop	{r4, r5, r6, r7, pc}
-     892:      	mov	r8, r8
-
-00000894 <$d.13>:
-     894:	74 00 00 40	.word	0x40000074
-     898:	00 00 02 40	.word	0x40020000
-     89c:	00 11 00 40	.word	0x40001100
-
-000008a0 <va108xx_hal::timer::default_ms_irq_handler::he7f17ff31cf7bcc5>:
-     8a0:      	push	{r4, r6, r7, lr}
-     8a2:      	add	r7, sp, #8
-     8a4:      	bl	0xf74 <__primask_r>     @ imm = #1740
-     8a8:      	mov	r4, r0
-     8aa:      	bl	0xf68 <__cpsid>         @ imm = #1722
-     8ae:      	bl	0xf7a <bare_metal::CriticalSection::new::hf1acf5be27eacceb> @ imm = #1736
-     8b2:      	ldr	r0, [pc, #16] <$d.15+0x2>
-     8b4:      	ldr	r1, [r0]
-     8b6:      	adds	r1, r1, #1
-     8b8:      	str	r1, [r0]
-     8ba:      	lsls	r0, r4, #31
-     8bc:      	bne	0x8c2 <va108xx_hal::timer::default_ms_irq_handler::he7f17ff31cf7bcc5+0x22> @ imm = #2
-     8be:      	bl	0xf6c <__cpsie>         @ imm = #1706
-     8c2:      	pop	{r4, r6, r7, pc}
-
-000008c4 <$d.15>:
-     8c4:	30 04 00 10	.word	0x10000430
-
-000008c8 <va108xx_hal::timer::get_ms_ticks::h8a9a7e50fa2ed0f8>:
-     8c8:      	push	{r4, r5, r7, lr}
-     8ca:      	add	r7, sp, #8
-     8cc:      	bl	0xf74 <__primask_r>     @ imm = #1700
-     8d0:      	mov	r5, r0
-     8d2:      	bl	0xf68 <__cpsid>         @ imm = #1682
-     8d6:      	bl	0xf7a <bare_metal::CriticalSection::new::hf1acf5be27eacceb> @ imm = #1696
-     8da:      	ldr	r0, [pc, #16] <$d.17+0x2>
-     8dc:      	ldr	r4, [r0]
-     8de:      	lsls	r0, r5, #31
-     8e0:      	bne	0x8e6 <va108xx_hal::timer::get_ms_ticks::h8a9a7e50fa2ed0f8+0x1e> @ imm = #2
-     8e2:      	bl	0xf6c <__cpsie>         @ imm = #1670
-     8e6:      	mov	r0, r4
-     8e8:      	pop	{r4, r5, r7, pc}
-     8ea:      	mov	r8, r8
-
-000008ec <$d.17>:
-     8ec:	30 04 00 10	.word	0x10000430
-
-000008f0 <va108xx_hal::timer::Delay::new::h0274059ca631680e>:
-     8f0:      	push	{r4, r6, r7, lr}
-     8f2:      	add	r7, sp, #8
-     8f4:      	ldm	r1!, {r2, r3}
-     8f6:      	stm	r0!, {r2, r3}
-     8f8:      	ldm	r1!, {r2, r3, r4}
-     8fa:      	stm	r0!, {r2, r3, r4}
-     8fc:      	pop	{r4, r6, r7, pc}
-
-000008fe <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h809c2c3943c5cc73>:
-     8fe:      	push	{r4, r5, r7, lr}
-     900:      	add	r7, sp, #8
-     902:      	mov	r4, r1
-     904:      	movs	r1, #125
-     906:      	lsls	r1, r1, #3
-     908:      	ldr	r2, [r0]
-     90a:      	cmp	r2, r1
-     90c:      	bne	0x92a <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h809c2c3943c5cc73+0x2c> @ imm = #26
-     90e:      	ldrb	r0, [r0, #16]
-     910:      	cmp	r0, #0
-     912:      	beq	0x92a <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h809c2c3943c5cc73+0x2c> @ imm = #20
-     914:      	bl	0x8c8 <va108xx_hal::timer::get_ms_ticks::h8a9a7e50fa2ed0f8> @ imm = #-80
-     918:      	mov	r5, r0
-     91a:      	bl	0x8c8 <va108xx_hal::timer::get_ms_ticks::h8a9a7e50fa2ed0f8> @ imm = #-86
-     91e:      	subs	r0, r0, r5
-     920:      	cmp	r0, r4
-     922:      	bhs	0x92a <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h809c2c3943c5cc73+0x2c> @ imm = #4
-     924:      	bl	0xf70 <__nop>           @ imm = #1608
-     928:      	b	0x91a <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h809c2c3943c5cc73+0x1c> @ imm = #-18
-     92a:      	pop	{r4, r5, r7, pc}
-
-0000092c <va108xx_hal::utility::port_mux::he673b384107ff95d>:
-     92c:      	push	{r4, r6, r7, lr}
-     92e:      	add	r7, sp, #8
-     930:      	ldr	r0, [pc, #48] <$d.13>
-     932:      	cmp	r1, #0
-     934:      	beq	0x940 <va108xx_hal::utility::port_mux::he673b384107ff95d+0x14> @ imm = #8
-     936:      	uxtb	r1, r2
-     938:      	cmp	r1, #23
-     93a:      	bhi	0x946 <va108xx_hal::utility::port_mux::he673b384107ff95d+0x1a> @ imm = #8
-     93c:      	adds	r0, #128
-     93e:      	b	0x94a <va108xx_hal::utility::port_mux::he673b384107ff95d+0x1e> @ imm = #8
-     940:      	uxtb	r1, r2
-     942:      	cmp	r1, #31
-     944:      	bls	0x94a <va108xx_hal::utility::port_mux::he673b384107ff95d+0x1e> @ imm = #2
-     946:      	movs	r0, #1
-     948:      	pop	{r4, r6, r7, pc}
-     94a:      	uxtb	r1, r2
-     94c:      	lsls	r1, r1, #2
-     94e:      	ldr	r2, [r0, r1]
-     950:      	movs	r4, #7
-     952:      	lsls	r4, r4, #13
-     954:      	bics	r2, r4
-     956:      	uxtb	r3, r3
-     958:      	lsls	r3, r3, #13
-     95a:      	orrs	r3, r2
-     95c:      	str	r3, [r0, r1]
-     95e:      	movs	r0, #2
-     960:      	pop	{r4, r6, r7, pc}
-     962:      	mov	r8, r8
-
-00000964 <$d.13>:
-     964:	00 20 00 40	.word	0x40002000
-
-00000968 <va108xx_hal::clock::enable_peripheral_clock::hc38ebef0d89f3d24>:
-     968:      	uxtb	r0, r1
-     96a:      	movs	r1, #1
-     96c:      	lsls	r1, r0
-     96e:      	ldr	r0, [pc, #8] <$d.7+0x2>
-     970:      	ldr	r2, [r0]
-     972:      	orrs	r2, r1
-     974:      	str	r2, [r0]
-     976:      	bx	lr
-
-00000978 <$d.7>:
-     978:	7c 00 00 40	.word	0x4000007c
-
-0000097c <<u32 as va108xx_hal::time::U32Ext>::mhz::hacb2732941550405>:
-     97c:      	bx	lr
-     97e:      	bmi	0x92a <<va108xx_hal::timer::Delay as embedded_hal::blocking::delay::DelayMs<u32>>::delay_ms::h809c2c3943c5cc73+0x2c> @ imm = #-88
-
-00000980 <<va108xx_hal::time::Hertz as core::convert::From<va108xx_hal::time::MegaHertz>>::from::h1147aa80a554a3b5>:
-     980:      	ldr	r1, [pc, #4] <$d.11>
-     982:      	muls	r0, r1, r0
-     984:      	bx	lr
-     986:      	mov	r8, r8
-
-00000988 <$d.11>:
-     988:	40 42 0f 00	.word	0x000f4240
-
-0000098c <core::fmt::Write::write_char::h7a0176094cedcc9c>:
-     98c:      	push	{r4, r5, r7, lr}
-     98e:      	add	r7, sp, #8
-     990:      	sub	sp, #8
-     992:      	movs	r4, #0
-     994:      	str	r4, [sp, #4]
-     996:      	cmp	r1, #128
-     998:      	bhs	0x9a2 <core::fmt::Write::write_char::h7a0176094cedcc9c+0x16> @ imm = #6
-     99a:      	add	r2, sp, #4
-     99c:      	strb	r1, [r2]
-     99e:      	movs	r3, #1
-     9a0:      	b	0xa02 <core::fmt::Write::write_char::h7a0176094cedcc9c+0x76> @ imm = #94
-     9a2:      	lsrs	r2, r1, #11
-     9a4:      	bne	0x9bc <core::fmt::Write::write_char::h7a0176094cedcc9c+0x30> @ imm = #20
-     9a6:      	movs	r2, #63
-     9a8:      	ands	r2, r1
-     9aa:      	adds	r2, #128
-     9ac:      	add	r3, sp, #4
-     9ae:      	strb	r2, [r3, #1]
-     9b0:      	lsrs	r1, r1, #6
-     9b2:      	movs	r2, #192
-     9b4:      	orrs	r2, r1
-     9b6:      	strb	r2, [r3]
-     9b8:      	movs	r3, #2
-     9ba:      	b	0xa02 <core::fmt::Write::write_char::h7a0176094cedcc9c+0x76> @ imm = #68
-     9bc:      	lsrs	r2, r1, #16
-     9be:      	bne	0x9de <core::fmt::Write::write_char::h7a0176094cedcc9c+0x52> @ imm = #28
-     9c0:      	movs	r2, #63
-     9c2:      	ands	r2, r1
-     9c4:      	adds	r2, #128
-     9c6:      	add	r3, sp, #4
-     9c8:      	strb	r2, [r3, #2]
-     9ca:      	lsrs	r2, r1, #12
-     9cc:      	movs	r5, #224
-     9ce:      	orrs	r5, r2
-     9d0:      	strb	r5, [r3]
-     9d2:      	lsls	r1, r1, #20
-     9d4:      	lsrs	r1, r1, #26
-     9d6:      	adds	r1, #128
-     9d8:      	strb	r1, [r3, #1]
-     9da:      	movs	r3, #3
-     9dc:      	b	0xa02 <core::fmt::Write::write_char::h7a0176094cedcc9c+0x76> @ imm = #34
-     9de:      	movs	r2, #63
-     9e0:      	ands	r2, r1
-     9e2:      	adds	r2, #128
-     9e4:      	add	r3, sp, #4
-     9e6:      	strb	r2, [r3, #3]
-     9e8:      	lsrs	r2, r1, #18
-     9ea:      	movs	r5, #240
-     9ec:      	orrs	r5, r2
-     9ee:      	strb	r5, [r3]
-     9f0:      	lsls	r2, r1, #20
-     9f2:      	lsrs	r2, r2, #26
-     9f4:      	adds	r2, #128
-     9f6:      	strb	r2, [r3, #2]
-     9f8:      	lsls	r1, r1, #14
-     9fa:      	lsrs	r1, r1, #26
-     9fc:      	adds	r1, #128
-     9fe:      	strb	r1, [r3, #1]
-     a00:      	movs	r3, #4
-     a02:      	ldr	r1, [r0]
-     a04:      	ldr	r1, [r1, #20]
-     a06:      	movs	r2, #3
-     a08:      	ands	r2, r1
-     a0a:      	cmp	r2, #3
-     a0c:      	mov	r1, r4
-     a0e:      	beq	0xa12 <core::fmt::Write::write_char::h7a0176094cedcc9c+0x86> @ imm = #0
-     a10:      	mov	r1, r2
-     a12:      	dmb	sy
-     a16:      	add	r2, sp, #4
-     a18:      	bl	0xad0 <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a> @ imm = #180
-     a1c:      	mov	r0, r4
-     a1e:      	add	sp, #8
-     a20:      	pop	{r4, r5, r7, pc}
-
-00000a22 <core::ptr::drop_in_place<&mut rtt_target::rtt::RttWriter>::h2373b162496a6caa.llvm.15490236308705792425>:
-     a22:      	bx	lr
-
-00000a24 <<&mut W as core::fmt::Write>::write_char::h25eb2ee977acf95a>:
-     a24:      	push	{r7, lr}
-     a26:      	add	r7, sp, #0
-     a28:      	ldr	r0, [r0]
-     a2a:      	bl	0x98c <core::fmt::Write::write_char::h7a0176094cedcc9c> @ imm = #-162
-     a2e:      	movs	r0, #0
-     a30:      	pop	{r7, pc}
-     a32:      	bmi	0x9de <core::fmt::Write::write_char::h7a0176094cedcc9c+0x52> @ imm = #-88
-
-00000a34 <<&mut W as core::fmt::Write>::write_fmt::h08666185ad18b64f>:
-     a34:      	push	{r4, r5, r7, lr}
-     a36:      	add	r7, sp, #8
-     a38:      	sub	sp, #32
-     a3a:      	ldr	r0, [r0]
-     a3c:      	str	r0, [sp, #4]
-     a3e:      	add	r2, sp, #8
-     a40:      	mov	r0, r2
-     a42:      	ldm	r1!, {r3, r4, r5}
-     a44:      	stm	r0!, {r3, r4, r5}
-     a46:      	ldm	r1!, {r3, r4, r5}
-     a48:      	stm	r0!, {r3, r4, r5}
-     a4a:      	add	r0, sp, #4
-     a4c:      	ldr	r1, [pc, #8] <$d.6>
-     a4e:      	bl	0x17ec <core::fmt::write::hff185d7d684cc368> @ imm = #3482
-     a52:      	add	sp, #32
-     a54:      	pop	{r4, r5, r7, pc}
-     a56:      	mov	r8, r8
-
-00000a58 <$d.6>:
-     a58:	b4 36 00 00	.word	0x000036b4
-
-00000a5c <<&mut W as core::fmt::Write>::write_str::h83381b8399787eb9>:
-     a5c:      	push	{r4, r5, r7, lr}
-     a5e:      	add	r7, sp, #8
-     a60:      	mov	r3, r2
-     a62:      	mov	r2, r1
-     a64:      	ldr	r0, [r0]
-     a66:      	ldr	r1, [r0]
-     a68:      	ldr	r1, [r1, #20]
-     a6a:      	movs	r5, #3
-     a6c:      	ands	r5, r1
-     a6e:      	movs	r4, #0
-     a70:      	cmp	r5, #3
-     a72:      	mov	r1, r4
-     a74:      	beq	0xa78 <<&mut W as core::fmt::Write>::write_str::h83381b8399787eb9+0x1c> @ imm = #0
-     a76:      	mov	r1, r5
-     a78:      	dmb	sy
-     a7c:      	bl	0xad0 <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a> @ imm = #80
-     a80:      	mov	r0, r4
-     a82:      	pop	{r4, r5, r7, pc}
-
-00000a84 <rtt_target::rtt::RttHeader::init::hbc7f5d8502311a73>:
-     a84:      	push	{r4, r6, r7, lr}
-     a86:      	add	r7, sp, #8
-     a88:      	mov	r4, r0
-     a8a:      	str	r1, [r0, #16]
-     a8c:      	str	r2, [r0, #20]
-     a8e:      	ldr	r1, [pc, #20] <$d.9+0x2>
-     a90:      	movs	r2, #5
-     a92:      	bl	0x3034 <__aeabi_memcpy> @ imm = #9630
-     a96:      	dmb	sy
-     a9a:      	adds	r0, r4, #4
-     a9c:      	ldr	r1, [pc, #8] <$d.9+0x4>
-     a9e:      	ldm	r1!, {r2, r3, r4}
-     aa0:      	stm	r0!, {r2, r3, r4}
-     aa2:      	pop	{r4, r6, r7, pc}
-
-00000aa4 <$d.9>:
-     aa4:	cc 36 00 00	.word	0x000036cc
-     aa8:	d4 36 00 00	.word	0x000036d4
-
-00000aac <rtt_target::rtt::RttChannel::init::h161ee605c7839e7a>:
-     aac:      	push	{r4, r6, r7, lr}
-     aae:      	add	r7, sp, #8
-     ab0:      	str	r1, [r0]
-     ab2:      	ldr	r1, [r7, #8]
-     ab4:      	str	r1, [r0, #8]
-     ab6:      	ldr	r1, [r0, #20]
-     ab8:      	movs	r4, #3
-     aba:      	bics	r1, r4
-     abc:      	orrs	r1, r2
-     abe:      	dmb	sy
-     ac2:      	dmb	sy
-     ac6:      	str	r1, [r0, #20]
-     ac8:      	dmb	sy
-     acc:      	str	r3, [r0, #4]
-     ace:      	pop	{r4, r6, r7, pc}
-
-00000ad0 <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a>:
-     ad0:      	push	{r4, r5, r6, r7, lr}
-     ad2:      	add	r7, sp, #12
-     ad4:      	sub	sp, #20
-     ad6:      	str	r3, [sp, #16]
-     ad8:      	str	r2, [sp, #8]
-     ada:      	str	r1, [sp, #12]
-     adc:      	mov	r5, r0
-     ade:      	ldrb	r0, [r0, #12]
-     ae0:      	cmp	r0, #0
-     ae2:      	bne	0xba8 <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a+0xd8> @ imm = #194
-     ae4:      	ldr	r0, [sp, #16]
-     ae6:      	cmp	r0, #0
-     ae8:      	beq	0xba8 <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a+0xd8> @ imm = #188
-     aea:      	ldr	r0, [r5]
-     aec:      	ldr	r3, [r0, #12]
-     aee:      	dmb	sy
-     af2:      	ldr	r1, [r0, #16]
-     af4:      	dmb	sy
-     af8:      	ldr	r2, [r0, #8]
-     afa:      	cmp	r3, r2
-     afc:      	bhs	0xb0c <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a+0x3c> @ imm = #12
-     afe:      	cmp	r1, r2
-     b00:      	bhs	0xb0c <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a+0x3c> @ imm = #8
-     b02:      	ldr	r6, [r5, #4]
-     b04:      	cmp	r1, r6
-     b06:      	bls	0xb52 <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a+0x82> @ imm = #72
-     b08:      	mvns	r0, r6
-     b0a:      	b	0xb2a <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a+0x5a> @ imm = #28
-     b0c:      	dmb	sy
-     b10:      	movs	r1, #0
-     b12:      	str	r1, [r0, #12]
-     b14:      	dmb	sy
-     b18:      	dmb	sy
-     b1c:      	str	r1, [r0, #16]
-     b1e:      	dmb	sy
-     b22:      	ldr	r6, [r5, #4]
-     b24:      	mvns	r0, r6
-     b26:      	ldr	r1, [r5]
-     b28:      	ldr	r1, [r1, #8]
-     b2a:      	adds	r0, r1, r0
-     b2c:      	ldr	r4, [sp, #16]
-     b2e:      	cmp	r0, r4
-     b30:      	bhi	0xb34 <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a+0x64> @ imm = #0
-     b32:      	mov	r4, r0
-     b34:      	cmp	r4, #0
-     b36:      	bne	0xb68 <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a+0x98> @ imm = #46
-     b38:      	ldr	r0, [sp, #12]
-     b3a:      	cmp	r0, #2
-     b3c:      	bne	0xb5e <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a+0x8e> @ imm = #30
-     b3e:      	ldr	r0, [r5]
-     b40:      	dmb	sy
-     b44:      	str	r6, [r0, #12]
-     b46:      	dmb	sy
-     b4a:      	ldrb	r0, [r5, #12]
-     b4c:      	cmp	r0, #0
-     b4e:      	beq	0xaea <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a+0x1a> @ imm = #-104
-     b50:      	b	0xba8 <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a+0xd8> @ imm = #84
-     b52:      	cmp	r1, #0
-     b54:      	beq	0xb24 <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a+0x54> @ imm = #-52
-     b56:      	ldr	r0, [r5]
-     b58:      	ldr	r0, [r0, #8]
-     b5a:      	subs	r0, r0, r6
-     b5c:      	b	0xb2c <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a+0x5c> @ imm = #-52
-     b5e:      	ldr	r0, [sp, #12]
-     b60:      	cmp	r0, #0
-     b62:      	beq	0xba4 <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a+0xd4> @ imm = #62
-     b64:      	movs	r0, #1
-     b66:      	strb	r0, [r5, #12]
-     b68:      	ldr	r0, [r5]
-     b6a:      	str	r0, [sp, #4]
-     b6c:      	ldr	r0, [r0, #4]
-     b6e:      	adds	r0, r0, r6
-     b70:      	ldr	r1, [sp, #8]
-     b72:      	mov	r2, r4
-     b74:      	bl	0x3034 <__aeabi_memcpy> @ imm = #9404
-     b78:      	adds	r0, r4, r6
-     b7a:      	str	r0, [r5, #4]
-     b7c:      	ldr	r1, [r5, #8]
-     b7e:      	adds	r1, r1, r4
-     b80:      	str	r1, [r5, #8]
-     b82:      	ldr	r1, [sp, #4]
-     b84:      	ldr	r1, [r1, #8]
-     b86:      	cmp	r0, r1
-     b88:      	blo	0xb8e <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a+0xbe> @ imm = #2
-     b8a:      	movs	r0, #0
-     b8c:      	str	r0, [r5, #4]
-     b8e:      	ldrb	r0, [r5, #12]
-     b90:      	cmp	r0, #0
-     b92:      	bne	0xba8 <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a+0xd8> @ imm = #18
-     b94:      	ldr	r0, [sp, #8]
-     b96:      	adds	r0, r0, r4
-     b98:      	str	r0, [sp, #8]
-     b9a:      	ldr	r0, [sp, #16]
-     b9c:      	subs	r0, r0, r4
-     b9e:      	str	r0, [sp, #16]
-     ba0:      	bne	0xaea <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a+0x1a> @ imm = #-186
-     ba2:      	b	0xba8 <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a+0xd8> @ imm = #2
-     ba4:      	movs	r0, #2
-     ba6:      	strb	r0, [r5, #12]
-     ba8:      	add	sp, #20
-     baa:      	pop	{r4, r5, r6, r7, pc}
-
-00000bac <core::ops::function::FnOnce::call_once::h8fab4f7c68b3bb9c>:
-     bac:      	push	{r4, r5, r6, r7, lr}
-     bae:      	add	r7, sp, #12
-     bb0:      	sub	sp, #52
-     bb2:      	mov	r5, r0
-     bb4:      	ldrb	r2, [r0]
-     bb6:      	mov	r4, sp
-     bb8:      	ldr	r1, [pc, #68] <$d.1>
-     bba:      	mov	r0, r4
-     bbc:      	bl	0xec8 <rtt_target::TerminalChannel::write::h6dee25494c31b6a6> @ imm = #776
-     bc0:      	ldr	r0, [r5, #4]
-     bc2:      	str	r4, [sp, #24]
-     bc4:      	add	r2, sp, #28
-     bc6:      	mov	r1, r2
-     bc8:      	ldm	r0!, {r3, r5, r6}
-     bca:      	stm	r1!, {r3, r5, r6}
-     bcc:      	ldm	r0!, {r3, r5, r6}
-     bce:      	stm	r1!, {r3, r5, r6}
-     bd0:      	add	r0, sp, #24
-     bd2:      	ldr	r1, [pc, #48] <$d.1+0x6>
-     bd4:      	bl	0x17ec <core::fmt::write::hff185d7d684cc368> @ imm = #3092
-     bd8:      	ldrb	r0, [r4, #12]
-     bda:      	cmp	r0, #2
-     bdc:      	bne	0xbec <core::ops::function::FnOnce::call_once::h8fab4f7c68b3bb9c+0x40> @ imm = #12
-     bde:      	ldr	r0, [sp, #16]
-     be0:      	ldr	r1, [sp, #20]
-     be2:      	strb	r1, [r0]
-     be4:      	mov	r0, sp
-     be6:      	ldrb	r0, [r0, #12]
-     be8:      	cmp	r0, #1
-     bea:      	bhi	0xbfa <core::ops::function::FnOnce::call_once::h8fab4f7c68b3bb9c+0x4e> @ imm = #12
-     bec:      	ldr	r0, [sp, #4]
-     bee:      	ldr	r1, [sp]
-     bf0:      	dmb	sy
-     bf4:      	str	r0, [r1, #12]
-     bf6:      	dmb	sy
-     bfa:      	add	sp, #52
-     bfc:      	pop	{r4, r5, r6, r7, pc}
-     bfe:      	mov	r8, r8
-
-00000c00 <$d.1>:
-     c00:	3c 04 00 10	.word	0x1000043c
-     c04:	e4 36 00 00	.word	0x000036e4
-
-00000c08 <core::ops::function::FnOnce::call_once::hc621b782223ca8c8>:
-     c08:      	push	{r4, r5, r7, lr}
-     c0a:      	add	r7, sp, #8
-     c0c:      	sub	sp, #24
-     c0e:      	mov	r5, r0
-     c10:      	ldrb	r2, [r0]
-     c12:      	mov	r4, sp
-     c14:      	ldr	r1, [pc, #64] <$d.3>
-     c16:      	mov	r0, r4
-     c18:      	bl	0xec8 <rtt_target::TerminalChannel::write::h6dee25494c31b6a6> @ imm = #684
-     c1c:      	ldr	r0, [r5, #4]
-     c1e:      	ldm	r0!, {r2, r3}
-     c20:      	ldr	r0, [sp]
-     c22:      	ldr	r0, [r0, #20]
-     c24:      	movs	r1, #3
-     c26:      	ands	r1, r0
-     c28:      	cmp	r1, #3
-     c2a:      	bne	0xc2e <core::ops::function::FnOnce::call_once::hc621b782223ca8c8+0x26> @ imm = #0
-     c2c:      	movs	r1, #0
-     c2e:      	dmb	sy
-     c32:      	mov	r0, r4
-     c34:      	bl	0xad0 <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a> @ imm = #-360
-     c38:      	ldrb	r0, [r4, #12]
-     c3a:      	cmp	r0, #2
-     c3c:      	bne	0xc46 <core::ops::function::FnOnce::call_once::hc621b782223ca8c8+0x3e> @ imm = #6
-     c3e:      	ldr	r0, [sp, #16]
-     c40:      	ldr	r1, [sp, #20]
-     c42:      	strb	r1, [r0]
-     c44:      	b	0xc54 <core::ops::function::FnOnce::call_once::hc621b782223ca8c8+0x4c> @ imm = #12
-     c46:      	ldr	r0, [sp, #4]
-     c48:      	ldr	r1, [sp]
-     c4a:      	dmb	sy
-     c4e:      	str	r0, [r1, #12]
-     c50:      	dmb	sy
-     c54:      	add	sp, #24
-     c56:      	pop	{r4, r5, r7, pc}
-
-00000c58 <$d.3>:
-     c58:	3c 04 00 10	.word	0x1000043c
-
-00000c5c <rtt_target::print::print_impl::write_str::hffb1f12b8b66fdee>:
-     c5c:      	push	{r7, lr}
-     c5e:      	add	r7, sp, #0
-     c60:      	sub	sp, #16
-     c62:      	str	r2, [sp, #4]
-     c64:      	str	r1, [sp]
-     c66:      	ldr	r1, [pc, #32] <$d.5+0x2>
-     c68:      	ldr	r1, [r1]
-     c6a:      	dmb	sy
-     c6e:      	cmp	r1, #0
-     c70:      	beq	0xc82 <rtt_target::print::print_impl::write_str::hffb1f12b8b66fdee+0x26> @ imm = #14
-     c72:      	add	r2, sp, #8
-     c74:      	strb	r0, [r2]
-     c76:      	mov	r0, sp
-     c78:      	str	r0, [sp, #12]
-     c7a:      	ldr	r3, [r1]
-     c7c:      	ldr	r1, [pc, #12] <$d.5+0x4>
-     c7e:      	mov	r0, r2
-     c80:      	blx	r3
-     c82:      	add	sp, #16
-     c84:      	pop	{r7, pc}
-     c86:      	mov	r8, r8
-
-00000c88 <$d.5>:
-     c88:	38 04 00 10	.word	0x10000438
-     c8c:	09 0c 00 00	.word	0x00000c09
-
-00000c90 <rtt_target::print::print_impl::write_fmt::h1a63b2b8c364c545>:
-     c90:      	push	{r7, lr}
-     c92:      	add	r7, sp, #0
-     c94:      	sub	sp, #8
-     c96:      	ldr	r2, [pc, #28] <$d.7+0x2>
-     c98:      	ldr	r3, [r2]
-     c9a:      	dmb	sy
-     c9e:      	cmp	r3, #0
-     ca0:      	beq	0xcb0 <rtt_target::print::print_impl::write_fmt::h1a63b2b8c364c545+0x20> @ imm = #12
-     ca2:      	mov	r2, sp
-     ca4:      	strb	r0, [r2]
-     ca6:      	str	r1, [sp, #4]
-     ca8:      	ldr	r3, [r3]
-     caa:      	ldr	r1, [pc, #12] <$d.7+0x6>
-     cac:      	mov	r0, r2
-     cae:      	blx	r3
-     cb0:      	add	sp, #8
-     cb2:      	pop	{r7, pc}
-
-00000cb4 <$d.7>:
-     cb4:	38 04 00 10	.word	0x10000438
-     cb8:	ad 0b 00 00	.word	0x00000bad
-
-00000cbc <core::ops::function::FnOnce::call_once::heb11b3173c79ba40>:
-     cbc:      	push	{r4, r5, r6, r7, lr}
-     cbe:      	add	r7, sp, #12
-     cc0:      	sub	sp, #4
-     cc2:      	mov	r4, r1
-     cc4:      	mov	r5, r0
-     cc6:      	bl	0xf74 <__primask_r>     @ imm = #682
-     cca:      	mov	r6, r0
-     ccc:      	bl	0xf68 <__cpsid>         @ imm = #664
-     cd0:      	bl	0xf7a <bare_metal::CriticalSection::new::hf1acf5be27eacceb> @ imm = #678
-     cd4:      	mov	r0, r5
-     cd6:      	blx	r4
-     cd8:      	lsls	r0, r6, #31
-     cda:      	bne	0xce0 <core::ops::function::FnOnce::call_once::heb11b3173c79ba40+0x24> @ imm = #2
-     cdc:      	bl	0xf6c <__cpsie>         @ imm = #652
-     ce0:      	add	sp, #4
-     ce2:      	pop	{r4, r5, r6, r7, pc}
-
-00000ce4 <rtt_target::print::set_print_channel::h915b9b561c18c1c6>:
-     ce4:      	push	{r4, r5, r7, lr}
-     ce6:      	add	r7, sp, #8
-     ce8:      	mov	r4, r0
-     cea:      	bl	0xf74 <__primask_r>     @ imm = #646
-     cee:      	mov	r5, r0
-     cf0:      	bl	0xf68 <__cpsid>         @ imm = #628
-     cf4:      	bl	0xf7a <bare_metal::CriticalSection::new::hf1acf5be27eacceb> @ imm = #642
-     cf8:      	ldr	r0, [pc, #28] <$d.6>
-     cfa:      	movs	r1, #0
-     cfc:      	strb	r1, [r0, #4]
-     cfe:      	str	r4, [r0]
-     d00:      	lsls	r0, r5, #31
-     d02:      	bne	0xd08 <rtt_target::print::set_print_channel::h915b9b561c18c1c6+0x24> @ imm = #2
-     d04:      	bl	0xf6c <__cpsie>         @ imm = #612
-     d08:      	dmb	sy
-     d0c:      	ldr	r0, [pc, #12] <$d.6+0x4>
-     d0e:      	ldr	r1, [pc, #16] <$d.6+0xa>
-     d10:      	str	r1, [r0]
-     d12:      	dmb	sy
-     d16:      	pop	{r4, r5, r7, pc}
-
-00000d18 <$d.6>:
-     d18:	3c 04 00 10	.word	0x1000043c
-     d1c:	38 04 00 10	.word	0x10000438
-     d20:	e0 36 00 00	.word	0x000036e0
-
-00000d24 <core::fmt::Write::write_char::ha9dbd0dd7d91ae1c>:
-     d24:      	push	{r4, r5, r7, lr}
-     d26:      	add	r7, sp, #8
-     d28:      	sub	sp, #8
-     d2a:      	movs	r4, #0
-     d2c:      	str	r4, [sp, #4]
-     d2e:      	cmp	r1, #128
-     d30:      	bhs	0xd3a <core::fmt::Write::write_char::ha9dbd0dd7d91ae1c+0x16> @ imm = #6
-     d32:      	add	r2, sp, #4
-     d34:      	strb	r1, [r2]
-     d36:      	movs	r3, #1
-     d38:      	b	0xd9a <core::fmt::Write::write_char::ha9dbd0dd7d91ae1c+0x76> @ imm = #94
-     d3a:      	lsrs	r2, r1, #11
-     d3c:      	bne	0xd54 <core::fmt::Write::write_char::ha9dbd0dd7d91ae1c+0x30> @ imm = #20
-     d3e:      	movs	r2, #63
-     d40:      	ands	r2, r1
-     d42:      	adds	r2, #128
-     d44:      	add	r3, sp, #4
-     d46:      	strb	r2, [r3, #1]
-     d48:      	lsrs	r1, r1, #6
-     d4a:      	movs	r2, #192
-     d4c:      	orrs	r2, r1
-     d4e:      	strb	r2, [r3]
-     d50:      	movs	r3, #2
-     d52:      	b	0xd9a <core::fmt::Write::write_char::ha9dbd0dd7d91ae1c+0x76> @ imm = #68
-     d54:      	lsrs	r2, r1, #16
-     d56:      	bne	0xd76 <core::fmt::Write::write_char::ha9dbd0dd7d91ae1c+0x52> @ imm = #28
-     d58:      	movs	r2, #63
-     d5a:      	ands	r2, r1
-     d5c:      	adds	r2, #128
-     d5e:      	add	r3, sp, #4
-     d60:      	strb	r2, [r3, #2]
-     d62:      	lsrs	r2, r1, #12
-     d64:      	movs	r5, #224
-     d66:      	orrs	r5, r2
-     d68:      	strb	r5, [r3]
-     d6a:      	lsls	r1, r1, #20
-     d6c:      	lsrs	r1, r1, #26
-     d6e:      	adds	r1, #128
-     d70:      	strb	r1, [r3, #1]
-     d72:      	movs	r3, #3
-     d74:      	b	0xd9a <core::fmt::Write::write_char::ha9dbd0dd7d91ae1c+0x76> @ imm = #34
-     d76:      	movs	r2, #63
-     d78:      	ands	r2, r1
-     d7a:      	adds	r2, #128
-     d7c:      	add	r3, sp, #4
-     d7e:      	strb	r2, [r3, #3]
-     d80:      	lsrs	r2, r1, #18
-     d82:      	movs	r5, #240
-     d84:      	orrs	r5, r2
-     d86:      	strb	r5, [r3]
-     d88:      	lsls	r2, r1, #20
-     d8a:      	lsrs	r2, r2, #26
-     d8c:      	adds	r2, #128
-     d8e:      	strb	r2, [r3, #2]
-     d90:      	lsls	r1, r1, #14
-     d92:      	lsrs	r1, r1, #26
-     d94:      	adds	r1, #128
-     d96:      	strb	r1, [r3, #1]
-     d98:      	movs	r3, #4
-     d9a:      	ldr	r1, [r0]
-     d9c:      	ldr	r1, [r1, #20]
-     d9e:      	movs	r2, #3
-     da0:      	ands	r2, r1
-     da2:      	cmp	r2, #3
-     da4:      	mov	r1, r4
-     da6:      	beq	0xdaa <core::fmt::Write::write_char::ha9dbd0dd7d91ae1c+0x86> @ imm = #0
-     da8:      	mov	r1, r2
-     daa:      	dmb	sy
-     dae:      	add	r2, sp, #4
-     db0:      	bl	0xad0 <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a> @ imm = #-740
-     db4:      	mov	r0, r4
-     db6:      	add	sp, #8
-     db8:      	pop	{r4, r5, r7, pc}
-
-00000dba <core::ptr::drop_in_place<&mut rtt_target::TerminalWriter>::h449a8a17a3767bfe.llvm.1334773171787891024>:
-     dba:      	bx	lr
-
-00000dbc <<&mut W as core::fmt::Write>::write_char::h4de13d3e842f639c>:
-     dbc:      	push	{r7, lr}
-     dbe:      	add	r7, sp, #0
-     dc0:      	ldr	r0, [r0]
-     dc2:      	bl	0xd24 <core::fmt::Write::write_char::ha9dbd0dd7d91ae1c> @ imm = #-162
-     dc6:      	movs	r0, #0
-     dc8:      	pop	{r7, pc}
-     dca:      	bmi	0xd76 <core::fmt::Write::write_char::ha9dbd0dd7d91ae1c+0x52> @ imm = #-88
-
-00000dcc <<&mut W as core::fmt::Write>::write_fmt::hf4b0cac7cbe0fb80>:
-     dcc:      	push	{r4, r5, r7, lr}
-     dce:      	add	r7, sp, #8
-     dd0:      	sub	sp, #32
-     dd2:      	ldr	r0, [r0]
-     dd4:      	str	r0, [sp, #4]
-     dd6:      	add	r2, sp, #8
-     dd8:      	mov	r0, r2
-     dda:      	ldm	r1!, {r3, r4, r5}
-     ddc:      	stm	r0!, {r3, r4, r5}
-     dde:      	ldm	r1!, {r3, r4, r5}
-     de0:      	stm	r0!, {r3, r4, r5}
-     de2:      	add	r0, sp, #4
-     de4:      	ldr	r1, [pc, #8] <$d.6>
-     de6:      	bl	0x17ec <core::fmt::write::hff185d7d684cc368> @ imm = #2562
-     dea:      	add	sp, #32
-     dec:      	pop	{r4, r5, r7, pc}
-     dee:      	mov	r8, r8
-
-00000df0 <$d.6>:
-     df0:	e4 36 00 00	.word	0x000036e4
-
-00000df4 <<&mut W as core::fmt::Write>::write_str::ha58546047e92d5a8>:
-     df4:      	push	{r4, r5, r7, lr}
-     df6:      	add	r7, sp, #8
-     df8:      	mov	r3, r2
-     dfa:      	mov	r2, r1
-     dfc:      	ldr	r0, [r0]
-     dfe:      	ldr	r1, [r0]
-     e00:      	ldr	r1, [r1, #20]
-     e02:      	movs	r5, #3
-     e04:      	ands	r5, r1
-     e06:      	movs	r4, #0
-     e08:      	cmp	r5, #3
-     e0a:      	mov	r1, r4
-     e0c:      	beq	0xe10 <<&mut W as core::fmt::Write>::write_str::ha58546047e92d5a8+0x1c> @ imm = #0
-     e0e:      	mov	r1, r5
-     e10:      	dmb	sy
-     e14:      	bl	0xad0 <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a> @ imm = #-840
-     e18:      	mov	r0, r4
-     e1a:      	pop	{r4, r5, r7, pc}
-
-00000e1c <rtt_target::UpChannel::new::h80d9d25389a46033>:
-     e1c:      	bx	lr
-
-00000e1e <rtt_target::UpChannel::set_mode::haebb8f1fc86fca3d>:
-     e1e:      	ldr	r0, [r0]
-     e20:      	ldr	r2, [r0, #20]
-     e22:      	movs	r3, #3
-     e24:      	bics	r2, r3
-     e26:      	orrs	r2, r1
-     e28:      	dmb	sy
-     e2c:      	dmb	sy
-     e30:      	str	r2, [r0, #20]
-     e32:      	dmb	sy
-     e36:      	bx	lr
-
-00000e38 <rtt_target::UpChannel::conjure::h81109ceede8d3325>:
-     e38:      	ldr	r1, [pc, #24] <$d.15>
-     e3a:      	ldr	r2, [r1, #16]
-     e3c:      	cmp	r2, r0
-     e3e:      	bls	0xe50 <rtt_target::UpChannel::conjure::h81109ceede8d3325+0x18> @ imm = #14
-     e40:      	movs	r2, #24
-     e42:      	muls	r2, r0, r2
-     e44:      	adds	r1, r1, r2
-     e46:      	ldr	r0, [r1, #28]
-     e48:      	subs	r2, r0, #1
-     e4a:      	sbcs	r0, r2
-     e4c:      	adds	r1, #24
-     e4e:      	bx	lr
-     e50:      	movs	r0, #0
-     e52:      	bx	lr
-
-00000e54 <$d.15>:
-     e54:	00 00 00 10	.word	0x10000000
-
-00000e58 <<rtt_target::UpChannel as core::fmt::Write>::write_fmt::h05b44bba687d3d89>:
-     e58:      	push	{r4, r5, r6, r7, lr}
-     e5a:      	add	r7, sp, #12
-     e5c:      	sub	sp, #44
-     e5e:      	ldr	r0, [r0]
-     e60:      	ldr	r2, [r0, #12]
-     e62:      	dmb	sy
-     e66:      	ldr	r3, [r0, #16]
-     e68:      	dmb	sy
-     e6c:      	ldr	r4, [r0, #8]
-     e6e:      	cmp	r2, r4
-     e70:      	bhs	0xe76 <<rtt_target::UpChannel as core::fmt::Write>::write_fmt::h05b44bba687d3d89+0x1e> @ imm = #2
-     e72:      	cmp	r3, r4
-     e74:      	blo	0xe8c <<rtt_target::UpChannel as core::fmt::Write>::write_fmt::h05b44bba687d3d89+0x34> @ imm = #20
-     e76:      	dmb	sy
-     e7a:      	movs	r2, #0
-     e7c:      	str	r2, [r0, #12]
-     e7e:      	dmb	sy
-     e82:      	dmb	sy
-     e86:      	str	r2, [r0, #16]
-     e88:      	dmb	sy
-     e8c:      	mov	r4, sp
-     e8e:      	movs	r3, #0
-     e90:      	strb	r3, [r4, #12]
-     e92:      	add	r5, sp, #0
-     e94:      	stm	r5!, {r0, r2, r3}
-     e96:      	str	r4, [sp, #16]
-     e98:      	add	r2, sp, #20
-     e9a:      	mov	r0, r2
-     e9c:      	ldm	r1!, {r3, r5, r6}
-     e9e:      	stm	r0!, {r3, r5, r6}
-     ea0:      	ldm	r1!, {r3, r5, r6}
-     ea2:      	stm	r0!, {r3, r5, r6}
-     ea4:      	add	r0, sp, #16
-     ea6:      	ldr	r1, [pc, #28] <$d.18+0x2>
-     ea8:      	bl	0x17ec <core::fmt::write::hff185d7d684cc368> @ imm = #2368
-     eac:      	ldrb	r1, [r4, #12]
-     eae:      	cmp	r1, #1
-     eb0:      	bhi	0xec0 <<rtt_target::UpChannel as core::fmt::Write>::write_fmt::h05b44bba687d3d89+0x68> @ imm = #12
-     eb2:      	ldr	r1, [sp, #4]
-     eb4:      	ldr	r2, [sp]
-     eb6:      	dmb	sy
-     eba:      	str	r1, [r2, #12]
-     ebc:      	dmb	sy
-     ec0:      	add	sp, #44
-     ec2:      	pop	{r4, r5, r6, r7, pc}
-
-00000ec4 <$d.18>:
-     ec4:	b4 36 00 00	.word	0x000036b4
-
-00000ec8 <rtt_target::TerminalChannel::write::h6dee25494c31b6a6>:
-     ec8:      	push	{r4, r5, r6, r7, lr}
-     eca:      	add	r7, sp, #12
-     ecc:      	sub	sp, #28
-     ece:      	mov	r3, r1
-     ed0:      	mov	r4, r0
-     ed2:      	ldr	r0, [r1]
-     ed4:      	ldr	r6, [r0, #12]
-     ed6:      	dmb	sy
-     eda:      	ldr	r1, [r0, #16]
-     edc:      	dmb	sy
-     ee0:      	uxtb	r5, r2
-     ee2:      	ldr	r2, [r0, #8]
-     ee4:      	cmp	r6, r2
-     ee6:      	bhs	0xeec <rtt_target::TerminalChannel::write::h6dee25494c31b6a6+0x24> @ imm = #2
-     ee8:      	cmp	r1, r2
-     eea:      	blo	0xf02 <rtt_target::TerminalChannel::write::h6dee25494c31b6a6+0x3a> @ imm = #20
-     eec:      	dmb	sy
-     ef0:      	movs	r6, #0
-     ef2:      	str	r6, [r0, #12]
-     ef4:      	dmb	sy
-     ef8:      	dmb	sy
-     efc:      	str	r6, [r0, #16]
-     efe:      	dmb	sy
-     f02:      	add	r2, sp, #8
-     f04:      	movs	r1, #0
-     f06:      	strb	r1, [r2, #12]
-     f08:      	str	r1, [sp, #16]
-     f0a:      	str	r6, [sp, #12]
-     f0c:      	str	r0, [sp, #8]
-     f0e:      	adds	r6, r3, #4
-     f10:      	ldrb	r2, [r3, #4]
-     f12:      	cmp	r2, r5
-     f14:      	beq	0xf48 <rtt_target::TerminalChannel::write::h6dee25494c31b6a6+0x80> @ imm = #48
-     f16:      	movs	r2, #15
-     f18:      	ands	r2, r5
-     f1a:      	ldr	r3, [pc, #72] <$d.24+0x2>
-     f1c:      	ldrb	r3, [r3, r2]
-     f1e:      	ldr	r0, [r0, #20]
-     f20:      	dmb	sy
-     f24:      	add	r2, sp, #24
-     f26:      	strb	r3, [r2, #1]
-     f28:      	movs	r3, #255
-     f2a:      	strb	r3, [r2]
-     f2c:      	movs	r3, #3
-     f2e:      	ands	r3, r0
-     f30:      	cmp	r3, #3
-     f32:      	mov	r0, r1
-     f34:      	beq	0xf38 <rtt_target::TerminalChannel::write::h6dee25494c31b6a6+0x70> @ imm = #0
-     f36:      	mov	r0, r3
-     f38:      	cmp	r0, #1
-     f3a:      	beq	0xf3e <rtt_target::TerminalChannel::write::h6dee25494c31b6a6+0x76> @ imm = #0
-     f3c:      	mov	r1, r0
-     f3e:      	add	r0, sp, #8
-     f40:      	movs	r3, #2
-     f42:      	bl	0xad0 <rtt_target::rtt::RttWriter::write_with_mode::h79557781e7271e4a> @ imm = #-1142
-     f46:      	strb	r5, [r6]
-     f48:      	add	r0, sp, #8
-     f4a:      	mov	r1, r4
-     f4c:      	str	r5, [sp, #4]
-     f4e:      	mov	r5, r4
-     f50:      	str	r6, [sp]
-     f52:      	ldm	r0!, {r2, r3, r4, r6}
-     f54:      	stm	r1!, {r2, r3, r4, r6}
-     f56:      	ldr	r0, [sp]
-     f58:      	str	r0, [r5, #16]
-     f5a:      	ldr	r0, [sp, #4]
-     f5c:      	strb	r0, [r5, #20]
-     f5e:      	add	sp, #28
-     f60:      	pop	{r4, r5, r6, r7, pc}
-     f62:      	mov	r8, r8
-
-00000f64 <$d.24>:
-     f64:	3c 37 00 00	.word	0x0000373c
-
-00000f68 <__cpsid>:
-     f68:      	cpsid i
-     f6a:      	bx	lr
-
-00000f6c <__cpsie>:
-     f6c:      	cpsie i
-     f6e:      	bx	lr
-
-00000f70 <__nop>:
-     f70:      	nop
-     f72:      	bx	lr
-
-00000f74 <__primask_r>:
-     f74:      	mrs	r0, primask
-     f78:      	bx	lr
-
-00000f7a <bare_metal::CriticalSection::new::hf1acf5be27eacceb>:
-     f7a:      	bx	lr
-
-00000f7c <<max116xx_10bit::AdcError as core::fmt::Debug>::fmt::h7aa0b0b24f5c139a>:
-     f7c:      	push	{r7, lr}
-     f7e:      	add	r7, sp, #0
-     f80:      	ldrb	r0, [r0]
-     f82:      	mov	r3, r1
-     f84:      	add	r0, pc
-     f86:      	ldrb	r0, [r0, #4]
-     f88:      	lsls	r0, r0, #1
-     f8a:      	add	pc, r0
-
-00000f8c <$d.15>:
-     f8c:	03 05 07 0a	.word	0x0a070503
-     f90:	0c 0e 11 00	.word	0x00110e0c
-
-00000f94 <$t.16>:
-     f94:      	ldr	r1, [pc, #60] <$d.17+0x18>
-     f96:      	b	0xf9e <$t.16+0xa>       @ imm = #4
-     f98:      	ldr	r1, [pc, #52] <$d.17+0x14>
-     f9a:      	b	0xf9e <$t.16+0xa>       @ imm = #0
-     f9c:      	ldr	r1, [pc, #44] <$d.17+0x10>
-     f9e:      	movs	r2, #14
-     fa0:      	b	0xfb4 <$t.16+0x20>      @ imm = #16
-     fa2:      	ldr	r1, [pc, #36] <$d.17+0xe>
-     fa4:      	b	0xfb2 <$t.16+0x1e>      @ imm = #10
-     fa6:      	ldr	r1, [pc, #28] <$d.17+0xa>
-     fa8:      	b	0xfb2 <$t.16+0x1e>      @ imm = #6
-     faa:      	ldr	r1, [pc, #20] <$d.17+0x6>
-     fac:      	movs	r2, #18
-     fae:      	b	0xfb4 <$t.16+0x20>      @ imm = #2
-     fb0:      	ldr	r1, [pc, #8] <$d.17>
-     fb2:      	movs	r2, #16
-     fb4:      	mov	r0, r3
-     fb6:      	bl	0x1f9c <<core::fmt::Formatter as core::fmt::Write>::write_str::h5daf2d485e2f455c> @ imm = #4066
-     fba:      	pop	{r7, pc}
-
-00000fbc <$d.17>:
-     fbc:	0c 37 00 00	.word	0x0000370c
-     fc0:	5c 37 00 00	.word	0x0000375c
-     fc4:	1c 37 00 00	.word	0x0000371c
-     fc8:	2c 37 00 00	.word	0x0000372c
-     fcc:	6e 37 00 00	.word	0x0000376e
-     fd0:	7c 37 00 00	.word	0x0000377c
-     fd4:	8a 37 00 00	.word	0x0000378a
-
-00000fd8 <SysTick>:
-     fd8:      	b	0xfd8 <SysTick>         @ imm = #-4
-
-00000fda <__pre_init>:
-     fda:      	bx	lr
-
-00000fdc <core::ops::function::FnOnce::call_once::h5388216f32b8b71c>:
-     fdc:      	ldr	r0, [r0]
-     fde:      	b	0xfde <core::ops::function::FnOnce::call_once::h5388216f32b8b71c+0x2> @ imm = #-4
-
-00000fe0 <core::ptr::drop_in_place<&core::iter::adapters::copied::Copied<core::slice::iter::Iter<u8>>>::h8713c5178970da4b>:
-     fe0:      	bx	lr
-     fe2:      	bmi	0xf8e <$d.15+0x2>       @ imm = #-88
-
-00000fe4 <<core::ops::range::Range<Idx> as core::fmt::Debug>::fmt::h48dae2b7618cde52>:
-     fe4:      	push	{r4, r5, r6, r7, lr}
-     fe6:      	add	r7, sp, #12
-     fe8:      	sub	sp, #28
-     fea:      	mov	r4, r1
-     fec:      	mov	r5, r0
-     fee:      	bl	0x295c <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795> @ imm = #6506
-     ff2:      	movs	r6, #1
-     ff4:      	cmp	r0, #0
-     ff6:      	bne	0x1024 <<core::ops::range::Range<Idx> as core::fmt::Debug>::fmt::h48dae2b7618cde52+0x40> @ imm = #42
-     ff8:      	ldr	r0, [r4, #24]
-     ffa:      	ldr	r1, [r4, #28]
-     ffc:      	movs	r2, #0
-     ffe:      	str	r2, [sp, #24]
-    1000:      	ldr	r3, [pc, #40] <$d.147>
-    1002:      	str	r3, [sp, #20]
-    1004:      	str	r2, [sp, #16]
-    1006:      	str	r2, [sp, #12]
-    1008:      	movs	r2, #1
-    100a:      	str	r2, [sp, #8]
-    100c:      	ldr	r2, [pc, #32] <$d.147+0x4>
-    100e:      	str	r2, [sp, #4]
-    1010:      	add	r2, sp, #4
-    1012:      	bl	0x17ec <core::fmt::write::hff185d7d684cc368> @ imm = #2006
-    1016:      	cmp	r0, #0
-    1018:      	bne	0x1024 <<core::ops::range::Range<Idx> as core::fmt::Debug>::fmt::h48dae2b7618cde52+0x40> @ imm = #8
-    101a:      	adds	r0, r5, #4
-    101c:      	mov	r1, r4
-    101e:      	bl	0x295c <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795> @ imm = #6458
-    1022:      	mov	r6, r0
-    1024:      	mov	r0, r6
-    1026:      	add	sp, #28
-    1028:      	pop	{r4, r5, r6, r7, pc}
-    102a:      	mov	r8, r8
-
-0000102c <$d.147>:
-    102c:	98 37 00 00	.word	0x00003798
-    1030:	9c 37 00 00	.word	0x0000379c
-
-00001034 <<T as core::any::Any>::type_id::hee7be9e0237c393a>:
-    1034:      	ldr	r0, [pc, #4] <$d.149>
-    1036:      	ldr	r1, [pc, #8] <$d.149+0x6>
-    1038:      	bx	lr
-    103a:      	mov	r8, r8
-
-0000103c <$d.149>:
-    103c:	92 04 b4 f1	.word	0xf1b40492
-    1040:	d2 a7 f8 00	.word	0x00f8a7d2
-
-00001044 <<core::panic::panic_info::PanicInfo as core::fmt::Display>::fmt::h980d98f06e764e0e>:
-    1044:      	push	{r4, r5, r6, r7, lr}
-    1046:      	add	r7, sp, #12
-    1048:      	sub	sp, #68
-    104a:      	mov	r4, r0
-    104c:      	ldr	r5, [r1, #24]
-    104e:      	ldr	r6, [r1, #28]
-    1050:      	ldr	r3, [r6, #12]
-    1052:      	ldr	r1, [pc, #224] <$d.248+0x2>
-    1054:      	movs	r2, #12
-    1056:      	mov	r0, r5
-    1058:      	blx	r3
-    105a:      	movs	r2, #1
-    105c:      	cmp	r0, #0
-    105e:      	bne	0x10a0 <<core::panic::panic_info::PanicInfo as core::fmt::Display>::fmt::h980d98f06e764e0e+0x5c> @ imm = #62
-    1060:      	str	r6, [sp, #12]
-    1062:      	ldr	r0, [r4, #8]
-    1064:      	cmp	r0, #0
-    1066:      	str	r4, [sp, #8]
-    1068:      	beq	0x10a6 <<core::panic::panic_info::PanicInfo as core::fmt::Display>::fmt::h980d98f06e764e0e+0x62> @ imm = #58
-    106a:      	str	r0, [sp, #16]
-    106c:      	ldr	r0, [pc, #200] <$d.248+0x4>
-    106e:      	str	r0, [sp, #24]
-    1070:      	add	r0, sp, #16
-    1072:      	str	r0, [sp, #20]
-    1074:      	movs	r0, #1
-    1076:      	str	r0, [sp, #64]
-    1078:      	add	r0, sp, #20
-    107a:      	str	r0, [sp, #60]
-    107c:      	movs	r0, #0
-    107e:      	str	r0, [sp, #56]
-    1080:      	str	r0, [sp, #52]
-    1082:      	movs	r0, #2
-    1084:      	str	r0, [sp, #48]
-    1086:      	ldr	r0, [pc, #180] <$d.248+0xa>
-    1088:      	str	r0, [sp, #44]
-    108a:      	mov	r6, r2
-    108c:      	add	r2, sp, #44
-    108e:      	mov	r4, r5
-    1090:      	mov	r0, r5
-    1092:      	ldr	r5, [sp, #12]
-    1094:      	mov	r1, r5
-    1096:      	bl	0x17ec <core::fmt::write::hff185d7d684cc368> @ imm = #1874
-    109a:      	mov	r2, r6
-    109c:      	cmp	r0, #0
-    109e:      	beq	0x10f0 <<core::panic::panic_info::PanicInfo as core::fmt::Display>::fmt::h980d98f06e764e0e+0xac> @ imm = #78
-    10a0:      	mov	r0, r2
-    10a2:      	add	sp, #68
-    10a4:      	pop	{r4, r5, r6, r7, pc}
-    10a6:      	ldm	r4!, {r0, r1}
-    10a8:      	ldr	r1, [r1, #12]
-    10aa:      	mov	r6, r0
-    10ac:      	str	r2, [sp, #4]
-    10ae:      	blx	r1
-    10b0:      	ldr	r2, [pc, #140] <$d.248+0xc>
-    10b2:      	eors	r2, r1
-    10b4:      	ldr	r1, [pc, #140] <$d.248+0x10>
-    10b6:      	eors	r1, r0
-    10b8:      	orrs	r1, r2
-    10ba:      	mov	r4, r5
-    10bc:      	ldr	r5, [sp, #12]
-    10be:      	bne	0x10f0 <<core::panic::panic_info::PanicInfo as core::fmt::Display>::fmt::h980d98f06e764e0e+0xac> @ imm = #46
-    10c0:      	str	r6, [sp, #16]
-    10c2:      	ldr	r0, [pc, #132] <$d.248+0x16>
-    10c4:      	str	r0, [sp, #24]
-    10c6:      	add	r0, sp, #16
-    10c8:      	str	r0, [sp, #20]
-    10ca:      	movs	r0, #1
-    10cc:      	str	r0, [sp, #64]
-    10ce:      	add	r0, sp, #20
-    10d0:      	str	r0, [sp, #60]
-    10d2:      	movs	r0, #0
-    10d4:      	str	r0, [sp, #56]
-    10d6:      	str	r0, [sp, #52]
-    10d8:      	movs	r0, #2
-    10da:      	str	r0, [sp, #48]
-    10dc:      	ldr	r0, [pc, #92] <$d.248+0x8>
-    10de:      	str	r0, [sp, #44]
-    10e0:      	add	r2, sp, #44
-    10e2:      	mov	r0, r4
-    10e4:      	mov	r1, r5
-    10e6:      	bl	0x17ec <core::fmt::write::hff185d7d684cc368> @ imm = #1794
-    10ea:      	ldr	r2, [sp, #4]
-    10ec:      	cmp	r0, #0
-    10ee:      	bne	0x10a0 <<core::panic::panic_info::PanicInfo as core::fmt::Display>::fmt::h980d98f06e764e0e+0x5c> @ imm = #-82
-    10f0:      	ldr	r0, [sp, #8]
-    10f2:      	ldr	r0, [r0, #12]
-    10f4:      	ldr	r1, [pc, #84] <$d.248+0x18>
-    10f6:      	str	r1, [sp, #40]
-    10f8:      	mov	r2, r0
-    10fa:      	adds	r2, #12
-    10fc:      	str	r2, [sp, #36]
-    10fe:      	str	r1, [sp, #32]
-    1100:      	mov	r1, r0
-    1102:      	adds	r1, #8
-    1104:      	str	r1, [sp, #28]
-    1106:      	ldr	r1, [pc, #72] <$d.248+0x1e>
-    1108:      	str	r1, [sp, #24]
-    110a:      	str	r0, [sp, #20]
-    110c:      	movs	r0, #3
-    110e:      	str	r0, [sp, #64]
-    1110:      	add	r1, sp, #20
-    1112:      	str	r1, [sp, #60]
-    1114:      	movs	r1, #0
-    1116:      	str	r1, [sp, #56]
-    1118:      	str	r1, [sp, #52]
-    111a:      	str	r0, [sp, #48]
-    111c:      	ldr	r0, [pc, #52] <$d.248+0x20>
-    111e:      	str	r0, [sp, #44]
-    1120:      	add	r2, sp, #44
-    1122:      	mov	r0, r4
-    1124:      	mov	r1, r5
-    1126:      	bl	0x17ec <core::fmt::write::hff185d7d684cc368> @ imm = #1730
-    112a:      	mov	r2, r0
-    112c:      	mov	r0, r2
-    112e:      	add	sp, #68
-    1130:      	pop	{r4, r5, r6, r7, pc}
-    1132:      	mov	r8, r8
-
-00001134 <$d.248>:
-    1134:	f8 37 00 00	.word	0x000037f8
-    1138:	3b 2e 00 00	.word	0x00002e3b
-    113c:	08 38 00 00	.word	0x00003808
-    1140:	1e a9 f2 7e	.word	0x7ef2a91e
-    1144:	f4 bc c7 ec	.word	0xecc7bcf4
-    1148:	29 2e 00 00	.word	0x00002e29
-    114c:	11 2d 00 00	.word	0x00002d11
-    1150:	19 2e 00 00	.word	0x00002e19
-    1154:	d0 37 00 00	.word	0x000037d0
-
-00001158 <core::panicking::panic::hd188a7f3102defa3>:
-    1158:      	push	{r7, lr}
-    115a:      	add	r7, sp, #0
-    115c:      	sub	sp, #32
-    115e:      	movs	r3, #0
-    1160:      	str	r3, [sp, #20]
-    1162:      	ldr	r4, [pc, #28] <$d.250+0x2>
-    1164:      	str	r4, [sp, #16]
-    1166:      	str	r3, [sp, #12]
-    1168:      	str	r3, [sp, #8]
-    116a:      	movs	r3, #1
-    116c:      	str	r3, [sp, #4]
-    116e:      	add	r3, sp, #24
-    1170:      	str	r3, [sp]
-    1172:      	str	r1, [sp, #28]
-    1174:      	str	r0, [sp, #24]
-    1176:      	mov	r0, sp
-    1178:      	mov	r1, r2
-    117a:      	bl	0x11c4 <core::panicking::panic_fmt::h884220a03f3bce26> @ imm = #70
-    117e:      	trap
-
-00001180 <$d.250>:
-    1180:	98 37 00 00	.word	0x00003798
-
-00001184 <core::panicking::panic_bounds_check::h5d2fdbe20d7940cc>:
-    1184:      	push	{r7, lr}
-    1186:      	add	r7, sp, #0
-    1188:      	sub	sp, #48
-    118a:      	str	r1, [sp, #4]
-    118c:      	str	r0, [sp]
-    118e:      	movs	r0, #2
-    1190:      	str	r0, [sp, #28]
-    1192:      	add	r1, sp, #32
-    1194:      	str	r1, [sp, #24]
-    1196:      	movs	r1, #0
-    1198:      	str	r1, [sp, #20]
-    119a:      	str	r1, [sp, #16]
-    119c:      	str	r0, [sp, #12]
-    119e:      	ldr	r0, [pc, #28] <$d.256+0x2>
-    11a0:      	str	r0, [sp, #8]
-    11a2:      	ldr	r0, [pc, #28] <$d.256+0x6>
-    11a4:      	str	r0, [sp, #44]
-    11a6:      	mov	r1, sp
-    11a8:      	str	r1, [sp, #40]
-    11aa:      	str	r0, [sp, #36]
-    11ac:      	add	r0, sp, #4
-    11ae:      	str	r0, [sp, #32]
-    11b0:      	add	r0, sp, #8
-    11b2:      	mov	r1, r2
-    11b4:      	bl	0x11c4 <core::panicking::panic_fmt::h884220a03f3bce26> @ imm = #12
-    11b8:      	trap
-    11ba:      	mov	r8, r8
-
-000011bc <$d.256>:
-    11bc:	2c 38 00 00	.word	0x0000382c
-    11c0:	11 2d 00 00	.word	0x00002d11
-
-000011c4 <core::panicking::panic_fmt::h884220a03f3bce26>:
-    11c4:      	push	{r7, lr}
-    11c6:      	add	r7, sp, #0
-    11c8:      	sub	sp, #16
-    11ca:      	str	r1, [sp, #12]
-    11cc:      	str	r0, [sp, #8]
-    11ce:      	ldr	r0, [pc, #16] <$d.258+0x2>
-    11d0:      	str	r0, [sp, #4]
-    11d2:      	ldr	r0, [pc, #16] <$d.258+0x6>
-    11d4:      	str	r0, [sp]
-    11d6:      	mov	r0, sp
-    11d8:      	bl	0x2f2c <rust_begin_unwind> @ imm = #7504
-    11dc:      	trap
-    11de:      	mov	r8, r8
-
-000011e0 <$d.258>:
-    11e0:	e8 37 00 00	.word	0x000037e8
-    11e4:	98 37 00 00	.word	0x00003798
-
-000011e8 <core::result::unwrap_failed::hab9917f6469ee00f>:
-    11e8:      	push	{r7, lr}
-    11ea:      	add	r7, sp, #0
-    11ec:      	sub	sp, #56
-    11ee:      	str	r1, [sp, #4]
-    11f0:      	str	r0, [sp]
-    11f2:      	str	r3, [sp, #12]
-    11f4:      	str	r2, [sp, #8]
-    11f6:      	movs	r0, #2
-    11f8:      	str	r0, [sp, #36]
-    11fa:      	add	r1, sp, #40
-    11fc:      	str	r1, [sp, #32]
-    11fe:      	movs	r1, #0
-    1200:      	str	r1, [sp, #28]
-    1202:      	str	r1, [sp, #24]
-    1204:      	str	r0, [sp, #20]
-    1206:      	ldr	r0, [pc, #28] <$d.267+0x2>
-    1208:      	str	r0, [sp, #16]
-    120a:      	ldr	r0, [pc, #28] <$d.267+0x6>
-    120c:      	str	r0, [sp, #52]
-    120e:      	add	r0, sp, #8
-    1210:      	str	r0, [sp, #48]
-    1212:      	ldr	r0, [pc, #24] <$d.267+0xa>
-    1214:      	str	r0, [sp, #44]
-    1216:      	mov	r0, sp
-    1218:      	str	r0, [sp, #40]
-    121a:      	add	r0, sp, #16
-    121c:      	ldr	r1, [r7, #8]
-    121e:      	bl	0x11c4 <core::panicking::panic_fmt::h884220a03f3bce26> @ imm = #-94
-    1222:      	trap
-
-00001224 <$d.267>:
-    1224:	40 38 00 00	.word	0x00003840
-    1228:	09 2e 00 00	.word	0x00002e09
-    122c:	19 2e 00 00	.word	0x00002e19
-
-00001230 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213>:
-    1230:      	push	{r4, r5, r6, r7, lr}
-    1232:      	add	r7, sp, #12
-    1234:      	sub	sp, #44
-    1236:      	cmp	r2, #0
-    1238:      	bne	0x123c <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0xc> @ imm = #0
-    123a:      	b	0x14b4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x284> @ imm = #630
-    123c:      	mov	r4, r2
-    123e:      	mov	r5, r1
-    1240:      	ldr	r1, [r0]
-    1242:      	str	r1, [sp, #8]
-    1244:      	ldr	r1, [r0, #4]
-    1246:      	str	r1, [sp, #4]
-    1248:      	ldr	r0, [r0, #8]
-    124a:      	str	r0, [sp, #12]
-    124c:      	movs	r0, #1
-    124e:      	str	r0, [sp, #36]
-    1250:      	b	0x125a <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x2a> @ imm = #6
-    1252:      	adds	r5, r5, r6
-    1254:      	subs	r4, r4, r6
-    1256:      	bne	0x125a <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x2a> @ imm = #0
-    1258:      	b	0x14b4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x284> @ imm = #600
-    125a:      	ldr	r0, [sp, #12]
-    125c:      	ldrb	r0, [r0]
-    125e:      	cmp	r0, #0
-    1260:      	beq	0x1274 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x44> @ imm = #16
-    1262:      	ldr	r0, [sp, #4]
-    1264:      	ldr	r3, [r0, #12]
-    1266:      	movs	r2, #4
-    1268:      	ldr	r0, [sp, #8]
-    126a:      	ldr	r1, [pc, #652] <$d.271+0xe>
-    126c:      	blx	r3
-    126e:      	cmp	r0, #0
-    1270:      	beq	0x1274 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x44> @ imm = #0
-    1272:      	b	0x14ba <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x28a> @ imm = #580
-    1274:      	movs	r2, #0
-    1276:      	mov	r1, r4
-    1278:      	str	r4, [sp, #28]
-    127a:      	str	r5, [sp, #24]
-    127c:      	b	0x1284 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x54> @ imm = #4
-    127e:      	cmp	r2, r4
-    1280:      	bls	0x1284 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x54> @ imm = #0
-    1282:      	b	0x1488 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x258> @ imm = #514
-    1284:      	adds	r0, r5, r2
-    1286:      	cmp	r1, #8
-    1288:      	str	r0, [sp, #40]
-    128a:      	bhs	0x12b0 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x80> @ imm = #34
-    128c:      	cmp	r1, #0
-    128e:      	bne	0x1292 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x62> @ imm = #0
-    1290:      	b	0x1486 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x256> @ imm = #498
-    1292:      	ldrb	r0, [r0]
-    1294:      	movs	r3, #0
-    1296:      	cmp	r0, #10
-    1298:      	bne	0x129c <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x6c> @ imm = #0
-    129a:      	b	0x13f4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1c4> @ imm = #342
-    129c:      	cmp	r1, #1
-    129e:      	bne	0x12a2 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x72> @ imm = #0
-    12a0:      	b	0x1488 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x258> @ imm = #484
-    12a2:      	ldr	r0, [sp, #40]
-    12a4:      	ldrb	r0, [r0, #1]
-    12a6:      	cmp	r0, #10
-    12a8:      	beq	0x12ac <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x7c> @ imm = #0
-    12aa:      	b	0x13b2 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x182> @ imm = #260
-    12ac:      	movs	r3, #1
-    12ae:      	b	0x13f4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1c4> @ imm = #322
-    12b0:      	mov	r4, r0
-    12b2:      	adds	r0, r0, #3
-    12b4:      	movs	r3, #3
-    12b6:      	bics	r0, r3
-    12b8:      	subs	r3, r0, r4
-    12ba:      	str	r2, [sp, #20]
-    12bc:      	str	r1, [sp, #16]
-    12be:      	beq	0x131c <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0xec> @ imm = #90
-    12c0:      	cmp	r3, r1
-    12c2:      	mov	r0, r1
-    12c4:      	bhi	0x12c8 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x98> @ imm = #0
-    12c6:      	mov	r0, r3
-    12c8:      	ldr	r1, [sp, #40]
-    12ca:      	adds	r6, r1, r0
-    12cc:      	movs	r3, #0
-    12ce:      	ldr	r1, [sp, #40]
-    12d0:      	ldrb	r5, [r1, r3]
-    12d2:      	cmp	r5, #10
-    12d4:      	bne	0x12d8 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0xa8> @ imm = #0
-    12d6:      	b	0x13f0 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1c0> @ imm = #278
-    12d8:      	adds	r5, r1, r3
-    12da:      	adds	r5, r5, #1
-    12dc:      	cmp	r5, r6
-    12de:      	beq	0x1306 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0xd6> @ imm = #36
-    12e0:      	ldrb	r4, [r5]
-    12e2:      	cmp	r4, #10
-    12e4:      	beq	0x13d6 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1a6> @ imm = #238
-    12e6:      	adds	r5, r5, #1
-    12e8:      	cmp	r5, r6
-    12ea:      	beq	0x1306 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0xd6> @ imm = #24
-    12ec:      	ldrb	r4, [r5]
-    12ee:      	cmp	r4, #10
-    12f0:      	beq	0x13de <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1ae> @ imm = #234
-    12f2:      	adds	r5, r5, #1
-    12f4:      	cmp	r5, r6
-    12f6:      	beq	0x1306 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0xd6> @ imm = #12
-    12f8:      	ldrb	r4, [r5]
-    12fa:      	cmp	r4, #10
-    12fc:      	beq	0x13ee <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1be> @ imm = #238
-    12fe:      	adds	r3, r3, #4
-    1300:      	adds	r4, r5, #1
-    1302:      	cmp	r4, r6
-    1304:      	bne	0x12ce <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x9e> @ imm = #-58
-    1306:      	ldr	r1, [sp, #16]
-    1308:      	mov	r3, r1
-    130a:      	subs	r3, #8
-    130c:      	str	r3, [sp, #32]
-    130e:      	cmp	r0, r3
-    1310:      	ldr	r4, [sp, #28]
-    1312:      	ldr	r5, [sp, #24]
-    1314:      	bls	0x1324 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0xf4> @ imm = #12
-    1316:      	cmp	r0, r1
-    1318:      	bne	0x136e <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x13e> @ imm = #82
-    131a:      	b	0x1486 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x256> @ imm = #360
-    131c:      	mov	r0, r1
-    131e:      	subs	r0, #8
-    1320:      	str	r0, [sp, #32]
-    1322:      	movs	r0, #0
-    1324:      	ldr	r2, [sp, #40]
-    1326:      	adds	r5, r2, r0
-    1328:      	ldr	r5, [r5, #4]
-    132a:      	ldr	r4, [pc, #452] <$d.271+0x6>
-    132c:      	bics	r4, r5
-    132e:      	ldr	r3, [pc, #444] <$d.271+0x2>
-    1330:      	eors	r5, r3
-    1332:      	ldr	r1, [pc, #448] <$d.271+0xa>
-    1334:      	adds	r6, r5, r1
-    1336:      	ands	r6, r4
-    1338:      	subs	r4, r6, #1
-    133a:      	sbcs	r6, r4
-    133c:      	ldr	r4, [r2, r0]
-    133e:      	ldr	r5, [pc, #432] <$d.271+0x6>
-    1340:      	bics	r5, r4
-    1342:      	eors	r4, r3
-    1344:      	adds	r4, r4, r1
-    1346:      	tst	r5, r4
-    1348:      	ldr	r5, [sp, #36]
-    134a:      	bne	0x134e <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x11e> @ imm = #0
-    134c:      	mov	r5, r6
-    134e:      	cmp	r5, #0
-    1350:      	bne	0x135a <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x12a> @ imm = #6
-    1352:      	adds	r0, #8
-    1354:      	ldr	r1, [sp, #32]
-    1356:      	cmp	r0, r1
-    1358:      	bls	0x1324 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0xf4> @ imm = #-56
-    135a:      	ldr	r1, [sp, #16]
-    135c:      	cmp	r0, r1
-    135e:      	bls	0x1362 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x132> @ imm = #0
-    1360:      	b	0x14c0 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x290> @ imm = #348
-    1362:      	ldr	r4, [sp, #28]
-    1364:      	ldr	r5, [sp, #24]
-    1366:      	ldr	r2, [sp, #20]
-    1368:      	cmp	r0, r1
-    136a:      	bne	0x136e <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x13e> @ imm = #0
-    136c:      	b	0x1486 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x256> @ imm = #278
-    136e:      	mov	r3, r2
-    1370:      	ldr	r2, [sp, #40]
-    1372:      	adds	r2, r2, r1
-    1374:      	adds	r1, r0, r3
-    1376:      	adds	r6, r5, r1
-    1378:      	movs	r1, #0
-    137a:      	ldrb	r3, [r6, r1]
-    137c:      	cmp	r3, #10
-    137e:      	beq	0x13e4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1b4> @ imm = #98
-    1380:      	adds	r3, r6, r1
-    1382:      	adds	r5, r3, #1
-    1384:      	movs	r3, #0
-    1386:      	cmp	r5, r2
-    1388:      	beq	0x1454 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x224> @ imm = #200
-    138a:      	ldrb	r4, [r5]
-    138c:      	cmp	r4, #10
-    138e:      	beq	0x13d2 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1a2> @ imm = #64
-    1390:      	adds	r5, r5, #1
-    1392:      	cmp	r5, r2
-    1394:      	beq	0x1454 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x224> @ imm = #188
-    1396:      	ldrb	r4, [r5]
-    1398:      	cmp	r4, #10
-    139a:      	beq	0x13da <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1aa> @ imm = #60
-    139c:      	adds	r5, r5, #1
-    139e:      	cmp	r5, r2
-    13a0:      	beq	0x1454 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x224> @ imm = #176
-    13a2:      	ldrb	r4, [r5]
-    13a4:      	cmp	r4, #10
-    13a6:      	beq	0x13e2 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1b2> @ imm = #56
-    13a8:      	adds	r1, r1, #4
-    13aa:      	adds	r4, r5, #1
-    13ac:      	cmp	r4, r2
-    13ae:      	bne	0x137a <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x14a> @ imm = #-56
-    13b0:      	b	0x1454 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x224> @ imm = #160
-    13b2:      	cmp	r1, #2
-    13b4:      	beq	0x1488 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x258> @ imm = #208
-    13b6:      	ldr	r0, [sp, #40]
-    13b8:      	ldrb	r0, [r0, #2]
-    13ba:      	cmp	r0, #10
-    13bc:      	bne	0x13c2 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x192> @ imm = #2
-    13be:      	movs	r3, #2
-    13c0:      	b	0x13f4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1c4> @ imm = #48
-    13c2:      	cmp	r1, #3
-    13c4:      	beq	0x1488 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x258> @ imm = #192
-    13c6:      	ldr	r0, [sp, #40]
-    13c8:      	ldrb	r0, [r0, #3]
-    13ca:      	cmp	r0, #10
-    13cc:      	bne	0x1424 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1f4> @ imm = #84
-    13ce:      	movs	r3, #3
-    13d0:      	b	0x13f4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1c4> @ imm = #32
-    13d2:      	adds	r1, r1, #1
-    13d4:      	b	0x13e4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1b4> @ imm = #12
-    13d6:      	adds	r3, r3, #1
-    13d8:      	b	0x13f0 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1c0> @ imm = #20
-    13da:      	adds	r1, r1, #2
-    13dc:      	b	0x13e4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1b4> @ imm = #4
-    13de:      	adds	r3, r3, #2
-    13e0:      	b	0x13f0 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1c0> @ imm = #12
-    13e2:      	adds	r1, r1, #3
-    13e4:      	adds	r3, r1, r0
-    13e6:      	ldr	r4, [sp, #28]
-    13e8:      	ldr	r5, [sp, #24]
-    13ea:      	ldr	r2, [sp, #20]
-    13ec:      	b	0x13f4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1c4> @ imm = #4
-    13ee:      	adds	r3, r3, #3
-    13f0:      	ldr	r4, [sp, #28]
-    13f2:      	ldr	r5, [sp, #24]
-    13f4:      	adds	r0, r3, r2
-    13f6:      	adds	r2, r0, #1
-    13f8:      	cmp	r2, r4
-    13fa:      	bhi	0x1404 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1d4> @ imm = #6
-    13fc:      	movs	r1, #0
-    13fe:      	cmp	r2, r0
-    1400:      	blo	0x140a <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1da> @ imm = #6
-    1402:      	b	0x140c <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1dc> @ imm = #6
-    1404:      	movs	r1, #1
-    1406:      	cmp	r2, r0
-    1408:      	bhs	0x140c <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1dc> @ imm = #0
-    140a:      	ldr	r1, [sp, #36]
-    140c:      	cmp	r1, #1
-    140e:      	beq	0x1416 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1e6> @ imm = #4
-    1410:      	ldrb	r0, [r5, r0]
-    1412:      	cmp	r0, #10
-    1414:      	beq	0x14a8 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x278> @ imm = #144
-    1416:      	subs	r1, r4, r2
-    1418:      	movs	r3, #0
-    141a:      	cmp	r4, r2
-    141c:      	blo	0x1420 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1f0> @ imm = #0
-    141e:      	b	0x127e <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x4e> @ imm = #-420
-    1420:      	mov	r1, r3
-    1422:      	b	0x127e <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x4e> @ imm = #-424
-    1424:      	cmp	r1, #4
-    1426:      	beq	0x1488 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x258> @ imm = #94
-    1428:      	ldr	r0, [sp, #40]
-    142a:      	ldrb	r0, [r0, #4]
-    142c:      	cmp	r0, #10
-    142e:      	bne	0x1434 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x204> @ imm = #2
-    1430:      	movs	r3, #4
-    1432:      	b	0x13f4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1c4> @ imm = #-66
-    1434:      	cmp	r1, #5
-    1436:      	beq	0x1488 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x258> @ imm = #78
-    1438:      	ldr	r0, [sp, #40]
-    143a:      	ldrb	r0, [r0, #5]
-    143c:      	cmp	r0, #10
-    143e:      	bne	0x1444 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x214> @ imm = #2
-    1440:      	movs	r3, #5
-    1442:      	b	0x13f4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1c4> @ imm = #-82
-    1444:      	cmp	r1, #6
-    1446:      	beq	0x1488 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x258> @ imm = #62
-    1448:      	ldr	r0, [sp, #40]
-    144a:      	ldrb	r0, [r0, #6]
-    144c:      	cmp	r0, #10
-    144e:      	bne	0x1488 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x258> @ imm = #54
-    1450:      	movs	r3, #6
-    1452:      	b	0x13f4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x1c4> @ imm = #-98
-    1454:      	ldr	r4, [sp, #28]
-    1456:      	mov	r2, r4
-    1458:      	ldr	r5, [sp, #24]
-    145a:      	ldr	r0, [sp, #12]
-    145c:      	strb	r3, [r0]
-    145e:      	cmp	r4, r2
-    1460:      	bls	0x1492 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x262> @ imm = #46
-    1462:      	ldrsb	r0, [r5, r2]
-    1464:      	movs	r1, #64
-    1466:      	mvns	r4, r1
-    1468:      	cmp	r0, r4
-    146a:      	ble	0x14c8 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x298> @ imm = #90
-    146c:      	ldr	r0, [sp, #4]
-    146e:      	ldr	r3, [r0, #12]
-    1470:      	ldr	r0, [sp, #8]
-    1472:      	mov	r1, r5
-    1474:      	mov	r6, r2
-    1476:      	blx	r3
-    1478:      	cmp	r0, #0
-    147a:      	bne	0x14ba <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x28a> @ imm = #60
-    147c:      	ldrsb	r0, [r5, r6]
-    147e:      	cmp	r0, r4
-    1480:      	ldr	r4, [sp, #28]
-    1482:      	ble	0x14da <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x2aa> @ imm = #84
-    1484:      	b	0x1252 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x22> @ imm = #-566
-    1486:      	movs	r3, #0
-    1488:      	mov	r2, r4
-    148a:      	ldr	r0, [sp, #12]
-    148c:      	strb	r3, [r0]
-    148e:      	cmp	r4, r2
-    1490:      	bhi	0x1462 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x232> @ imm = #-50
-    1492:      	bne	0x14c8 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x298> @ imm = #50
-    1494:      	ldr	r0, [sp, #4]
-    1496:      	ldr	r3, [r0, #12]
-    1498:      	ldr	r0, [sp, #8]
-    149a:      	mov	r1, r5
-    149c:      	mov	r6, r2
-    149e:      	blx	r3
-    14a0:      	cmp	r0, #0
-    14a2:      	ldr	r4, [sp, #28]
-    14a4:      	bne	0x14ba <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x28a> @ imm = #18
-    14a6:      	b	0x1252 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x22> @ imm = #-600
-    14a8:      	movs	r3, #1
-    14aa:      	ldr	r0, [sp, #12]
-    14ac:      	strb	r3, [r0]
-    14ae:      	cmp	r4, r2
-    14b0:      	bhi	0x1462 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x232> @ imm = #-82
-    14b2:      	b	0x1492 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213+0x262> @ imm = #-36
-    14b4:      	movs	r0, #0
-    14b6:      	add	sp, #44
-    14b8:      	pop	{r4, r5, r6, r7, pc}
-    14ba:      	ldr	r0, [sp, #36]
-    14bc:      	add	sp, #44
-    14be:      	pop	{r4, r5, r6, r7, pc}
-    14c0:      	ldr	r2, [pc, #56] <$d.271+0x10>
-    14c2:      	bl	0x21bc <core::slice::index::slice_start_index_len_fail::h3080a8211123744d> @ imm = #3318
-    14c6:      	trap
-    14c8:      	ldr	r0, [pc, #52] <$d.271+0x14>
-    14ca:      	str	r0, [sp]
-    14cc:      	mov	r3, r2
-    14ce:      	movs	r2, #0
-    14d0:      	mov	r0, r5
-    14d2:      	ldr	r1, [sp, #28]
-    14d4:      	bl	0x227c <core::str::slice_error_fail::h26c332087be94791> @ imm = #3492
-    14d8:      	trap
-    14da:      	ldr	r0, [pc, #40] <$d.271+0x1a>
-    14dc:      	str	r0, [sp]
-    14de:      	mov	r0, r5
-    14e0:      	mov	r1, r4
-    14e2:      	mov	r2, r6
-    14e4:      	mov	r3, r4
-    14e6:      	bl	0x227c <core::str::slice_error_fail::h26c332087be94791> @ imm = #3474
-    14ea:      	trap
-
-000014ec <$d.271>:
-    14ec:	0a 0a 0a 0a	.word	0x0a0a0a0a
-    14f0:	80 80 80 80	.word	0x80808080
-    14f4:	ff fe fe fe	.word	0xfefefeff
-    14f8:	9a 34 00 00	.word	0x0000349a
-    14fc:	a0 39 00 00	.word	0x000039a0
-    1500:	68 38 00 00	.word	0x00003868
-    1504:	78 38 00 00	.word	0x00003878
-
-00001508 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186>:
-    1508:      	push	{r4, r5, r6, r7, lr}
-    150a:      	add	r7, sp, #12
-    150c:      	sub	sp, #68
-    150e:      	mov	r4, r0
-    1510:      	ldrb	r0, [r0, #8]
-    1512:      	cmp	r0, #0
-    1514:      	beq	0x151c <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0x14> @ imm = #4
-    1516:      	ldr	r0, [r4, #4]
-    1518:      	movs	r6, #1
-    151a:      	b	0x15d2 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0xca> @ imm = #180
-    151c:      	mov	r6, r1
-    151e:      	ldr	r5, [r4]
-    1520:      	ldr	r3, [r4, #4]
-    1522:      	ldrb	r0, [r5]
-    1524:      	lsls	r0, r0, #29
-    1526:      	str	r3, [sp, #12]
-    1528:      	str	r2, [sp, #8]
-    152a:      	bmi	0x153e <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0x36> @ imm = #16
-    152c:      	cmp	r3, #0
-    152e:      	str	r6, [sp, #4]
-    1530:      	beq	0x15ac <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0xa4> @ imm = #120
-    1532:      	ldr	r1, [pc, #188] <$d.279+0x12>
-    1534:      	movs	r6, #1
-    1536:      	cmp	r3, #0
-    1538:      	mov	r2, r6
-    153a:      	bne	0x15b6 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0xae> @ imm = #120
-    153c:      	b	0x15b8 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0xb0> @ imm = #120
-    153e:      	cmp	r3, #0
-    1540:      	bne	0x1558 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0x50> @ imm = #20
-    1542:      	ldr	r0, [r5, #24]
-    1544:      	ldr	r1, [r5, #28]
-    1546:      	ldr	r3, [r1, #12]
-    1548:      	ldr	r1, [pc, #148] <$d.279>
-    154a:      	movs	r2, #2
-    154c:      	blx	r3
-    154e:      	cmp	r0, #0
-    1550:      	beq	0x1558 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0x50> @ imm = #4
-    1552:      	movs	r0, #0
-    1554:      	movs	r6, #1
-    1556:      	b	0x15d2 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0xca> @ imm = #120
-    1558:      	add	r0, sp, #28
-    155a:      	str	r6, [sp, #4]
-    155c:      	movs	r6, #1
-    155e:      	strb	r6, [r0]
-    1560:      	movs	r2, #32
-    1562:      	ldrb	r3, [r5, r2]
-    1564:      	add	r1, sp, #32
-    1566:      	strb	r3, [r1, r2]
-    1568:      	str	r0, [sp, #24]
-    156a:      	ldr	r0, [pc, #120] <$d.279+0x6>
-    156c:      	str	r0, [sp, #60]
-    156e:      	add	r0, sp, #16
-    1570:      	str	r0, [sp, #56]
-    1572:      	ldr	r0, [r5, #28]
-    1574:      	str	r0, [sp, #20]
-    1576:      	ldr	r0, [r5, #24]
-    1578:      	str	r0, [sp, #16]
-    157a:      	ldr	r0, [r5, #4]
-    157c:      	str	r0, [sp, #36]
-    157e:      	ldr	r0, [r5]
-    1580:      	str	r0, [sp, #32]
-    1582:      	ldr	r0, [r5, #20]
-    1584:      	str	r0, [sp, #52]
-    1586:      	ldr	r0, [r5, #16]
-    1588:      	str	r0, [sp, #48]
-    158a:      	ldr	r0, [r5, #12]
-    158c:      	str	r0, [sp, #44]
-    158e:      	ldr	r0, [r5, #8]
-    1590:      	str	r0, [sp, #40]
-    1592:      	ldr	r0, [sp, #8]
-    1594:      	ldr	r2, [r0, #12]
-    1596:      	ldr	r0, [sp, #4]
-    1598:      	blx	r2
-    159a:      	cmp	r0, #0
-    159c:      	bne	0x15d0 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0xc8> @ imm = #48
-    159e:      	ldr	r0, [sp, #60]
-    15a0:      	ldr	r3, [r0, #12]
-    15a2:      	ldr	r0, [sp, #56]
-    15a4:      	ldr	r1, [pc, #64] <$d.279+0x8>
-    15a6:      	movs	r2, #2
-    15a8:      	blx	r3
-    15aa:      	b	0x15ce <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0xc6> @ imm = #32
-    15ac:      	ldr	r1, [pc, #60] <$d.279+0xc>
-    15ae:      	movs	r6, #1
-    15b0:      	cmp	r3, #0
-    15b2:      	mov	r2, r6
-    15b4:      	beq	0x15b8 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0xb0> @ imm = #0
-    15b6:      	movs	r2, #2
-    15b8:      	ldr	r0, [r5, #24]
-    15ba:      	ldr	r3, [r5, #28]
-    15bc:      	ldr	r3, [r3, #12]
-    15be:      	blx	r3
-    15c0:      	cmp	r0, #0
-    15c2:      	bne	0x15d0 <core::fmt::builders::DebugTuple::field::hd0349d9a5490f186+0xc8> @ imm = #10
-    15c4:      	ldr	r0, [sp, #8]
-    15c6:      	ldr	r2, [r0, #12]
-    15c8:      	ldr	r0, [sp, #4]
-    15ca:      	mov	r1, r5
-    15cc:      	blx	r2
-    15ce:      	mov	r6, r0
-    15d0:      	ldr	r0, [sp, #12]
-    15d2:      	strb	r6, [r4, #8]
-    15d4:      	adds	r0, r0, #1
-    15d6:      	str	r0, [r4, #4]
-    15d8:      	mov	r0, r4
-    15da:      	add	sp, #68
-    15dc:      	pop	{r4, r5, r6, r7, pc}
-    15de:      	mov	r8, r8
-
-000015e0 <$d.279>:
-    15e0:	8c 38 00 00	.word	0x0000388c
-    15e4:	50 38 00 00	.word	0x00003850
-    15e8:	88 38 00 00	.word	0x00003888
-    15ec:	8e 38 00 00	.word	0x0000388e
-    15f0:	8a 38 00 00	.word	0x0000388a
-
-000015f4 <core::fmt::builders::DebugTuple::finish::h6d0cc63ecbd49307>:
-    15f4:      	push	{r4, r5, r7, lr}
-    15f6:      	add	r7, sp, #8
-    15f8:      	mov	r4, r0
-    15fa:      	ldrb	r1, [r0, #8]
-    15fc:      	ldr	r0, [r0, #4]
-    15fe:      	cmp	r0, #0
-    1600:      	beq	0x1612 <core::fmt::builders::DebugTuple::finish::h6d0cc63ecbd49307+0x1e> @ imm = #14
-    1602:      	movs	r5, #1
-    1604:      	cmp	r1, #0
-    1606:      	beq	0x161c <core::fmt::builders::DebugTuple::finish::h6d0cc63ecbd49307+0x28> @ imm = #18
-    1608:      	strb	r5, [r4, #8]
-    160a:      	subs	r0, r5, #1
-    160c:      	sbcs	r5, r0
-    160e:      	mov	r0, r5
-    1610:      	pop	{r4, r5, r7, pc}
-    1612:      	mov	r5, r1
-    1614:      	subs	r0, r5, #1
-    1616:      	sbcs	r5, r0
-    1618:      	mov	r0, r5
-    161a:      	pop	{r4, r5, r7, pc}
-    161c:      	cmp	r0, #1
-    161e:      	bne	0x163e <core::fmt::builders::DebugTuple::finish::h6d0cc63ecbd49307+0x4a> @ imm = #28
-    1620:      	ldrb	r0, [r4, #9]
-    1622:      	cmp	r0, #0
-    1624:      	beq	0x163e <core::fmt::builders::DebugTuple::finish::h6d0cc63ecbd49307+0x4a> @ imm = #22
-    1626:      	ldr	r1, [r4]
-    1628:      	ldrb	r0, [r1]
-    162a:      	lsls	r0, r0, #29
-    162c:      	bmi	0x163e <core::fmt::builders::DebugTuple::finish::h6d0cc63ecbd49307+0x4a> @ imm = #14
-    162e:      	ldr	r0, [r1, #24]
-    1630:      	ldr	r1, [r1, #28]
-    1632:      	ldr	r3, [r1, #12]
-    1634:      	ldr	r1, [pc, #32] <$d.281>
-    1636:      	movs	r2, #1
-    1638:      	blx	r3
-    163a:      	cmp	r0, #0
-    163c:      	bne	0x1608 <core::fmt::builders::DebugTuple::finish::h6d0cc63ecbd49307+0x14> @ imm = #-56
-    163e:      	ldr	r1, [r4]
-    1640:      	ldr	r0, [r1, #24]
-    1642:      	ldr	r1, [r1, #28]
-    1644:      	ldr	r3, [r1, #12]
-    1646:      	ldr	r1, [pc, #20] <$d.281+0x6>
-    1648:      	movs	r2, #1
-    164a:      	blx	r3
-    164c:      	mov	r5, r0
-    164e:      	strb	r0, [r4, #8]
-    1650:      	subs	r0, r5, #1
-    1652:      	sbcs	r5, r0
-    1654:      	mov	r0, r5
-    1656:      	pop	{r4, r5, r7, pc}
-
-00001658 <$d.281>:
-    1658:	8f 38 00 00	.word	0x0000388f
-    165c:	90 38 00 00	.word	0x00003890
-
-00001660 <core::fmt::Write::write_char::h632cc6199d3eda54>:
-    1660:      	push	{r4, r6, r7, lr}
-    1662:      	add	r7, sp, #8
-    1664:      	sub	sp, #8
-    1666:      	movs	r2, #0
-    1668:      	str	r2, [sp, #4]
-    166a:      	cmp	r1, #128
-    166c:      	bhs	0x167e <core::fmt::Write::write_char::h632cc6199d3eda54+0x1e> @ imm = #14
-    166e:      	add	r2, sp, #4
-    1670:      	strb	r1, [r2]
-    1672:      	movs	r2, #1
-    1674:      	add	r1, sp, #4
-    1676:      	bl	0x1230 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213> @ imm = #-1098
-    167a:      	add	sp, #8
-    167c:      	pop	{r4, r6, r7, pc}
-    167e:      	lsrs	r2, r1, #11
-    1680:      	bne	0x16a0 <core::fmt::Write::write_char::h632cc6199d3eda54+0x40> @ imm = #28
-    1682:      	movs	r2, #63
-    1684:      	ands	r2, r1
-    1686:      	adds	r2, #128
-    1688:      	add	r3, sp, #4
-    168a:      	strb	r2, [r3, #1]
-    168c:      	lsrs	r1, r1, #6
-    168e:      	movs	r2, #192
-    1690:      	orrs	r2, r1
-    1692:      	strb	r2, [r3]
-    1694:      	movs	r2, #2
-    1696:      	add	r1, sp, #4
-    1698:      	bl	0x1230 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213> @ imm = #-1132
-    169c:      	add	sp, #8
-    169e:      	pop	{r4, r6, r7, pc}
-    16a0:      	lsrs	r2, r1, #16
-    16a2:      	bne	0x16ca <core::fmt::Write::write_char::h632cc6199d3eda54+0x6a> @ imm = #36
-    16a4:      	movs	r2, #63
-    16a6:      	ands	r2, r1
-    16a8:      	adds	r2, #128
-    16aa:      	add	r3, sp, #4
-    16ac:      	strb	r2, [r3, #2]
-    16ae:      	lsrs	r2, r1, #12
-    16b0:      	movs	r4, #224
-    16b2:      	orrs	r4, r2
-    16b4:      	strb	r4, [r3]
-    16b6:      	lsls	r1, r1, #20
-    16b8:      	lsrs	r1, r1, #26
-    16ba:      	adds	r1, #128
-    16bc:      	strb	r1, [r3, #1]
-    16be:      	movs	r2, #3
-    16c0:      	add	r1, sp, #4
-    16c2:      	bl	0x1230 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213> @ imm = #-1174
-    16c6:      	add	sp, #8
-    16c8:      	pop	{r4, r6, r7, pc}
-    16ca:      	movs	r2, #63
-    16cc:      	ands	r2, r1
-    16ce:      	adds	r2, #128
-    16d0:      	add	r3, sp, #4
-    16d2:      	strb	r2, [r3, #3]
-    16d4:      	lsrs	r2, r1, #18
-    16d6:      	movs	r4, #240
-    16d8:      	orrs	r4, r2
-    16da:      	strb	r4, [r3]
-    16dc:      	lsls	r2, r1, #20
-    16de:      	lsrs	r2, r2, #26
-    16e0:      	adds	r2, #128
-    16e2:      	strb	r2, [r3, #2]
-    16e4:      	lsls	r1, r1, #14
-    16e6:      	lsrs	r1, r1, #26
-    16e8:      	adds	r1, #128
-    16ea:      	strb	r1, [r3, #1]
-    16ec:      	movs	r2, #4
-    16ee:      	add	r1, sp, #4
-    16f0:      	bl	0x1230 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213> @ imm = #-1220
-    16f4:      	add	sp, #8
-    16f6:      	pop	{r4, r6, r7, pc}
-
-000016f8 <core::fmt::Write::write_fmt::h9ea100d7d5f8b553>:
-    16f8:      	push	{r4, r5, r7, lr}
-    16fa:      	add	r7, sp, #8
-    16fc:      	sub	sp, #32
-    16fe:      	str	r0, [sp, #4]
-    1700:      	add	r2, sp, #8
-    1702:      	mov	r0, r2
-    1704:      	ldm	r1!, {r3, r4, r5}
-    1706:      	stm	r0!, {r3, r4, r5}
-    1708:      	ldm	r1!, {r3, r4, r5}
-    170a:      	stm	r0!, {r3, r4, r5}
-    170c:      	add	r0, sp, #4
-    170e:      	ldr	r1, [pc, #8] <$d.336+0x2>
-    1710:      	bl	0x17ec <core::fmt::write::hff185d7d684cc368> @ imm = #216
-    1714:      	add	sp, #32
-    1716:      	pop	{r4, r5, r7, pc}
-
-00001718 <$d.336>:
-    1718:	88 39 00 00	.word	0x00003988
-
-0000171c <<&mut W as core::fmt::Write>::write_str::h3fd67887be6af066>:
-    171c:      	push	{r7, lr}
-    171e:      	add	r7, sp, #0
-    1720:      	ldr	r0, [r0]
-    1722:      	bl	0x1230 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213> @ imm = #-1270
-    1726:      	pop	{r7, pc}
-
-00001728 <<&mut W as core::fmt::Write>::write_char::he2d9b8b9670e89e5>:
-    1728:      	push	{r4, r6, r7, lr}
-    172a:      	add	r7, sp, #8
-    172c:      	sub	sp, #8
-    172e:      	ldr	r0, [r0]
-    1730:      	movs	r2, #0
-    1732:      	str	r2, [sp, #4]
-    1734:      	cmp	r1, #128
-    1736:      	bhs	0x1748 <<&mut W as core::fmt::Write>::write_char::he2d9b8b9670e89e5+0x20> @ imm = #14
-    1738:      	add	r2, sp, #4
-    173a:      	strb	r1, [r2]
-    173c:      	movs	r2, #1
-    173e:      	add	r1, sp, #4
-    1740:      	bl	0x1230 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213> @ imm = #-1300
-    1744:      	add	sp, #8
-    1746:      	pop	{r4, r6, r7, pc}
-    1748:      	lsrs	r2, r1, #11
-    174a:      	bne	0x176a <<&mut W as core::fmt::Write>::write_char::he2d9b8b9670e89e5+0x42> @ imm = #28
-    174c:      	movs	r2, #63
-    174e:      	ands	r2, r1
-    1750:      	adds	r2, #128
-    1752:      	add	r3, sp, #4
-    1754:      	strb	r2, [r3, #1]
-    1756:      	lsrs	r1, r1, #6
-    1758:      	movs	r2, #192
-    175a:      	orrs	r2, r1
-    175c:      	strb	r2, [r3]
-    175e:      	movs	r2, #2
-    1760:      	add	r1, sp, #4
-    1762:      	bl	0x1230 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213> @ imm = #-1334
-    1766:      	add	sp, #8
-    1768:      	pop	{r4, r6, r7, pc}
-    176a:      	lsrs	r2, r1, #16
-    176c:      	bne	0x1794 <<&mut W as core::fmt::Write>::write_char::he2d9b8b9670e89e5+0x6c> @ imm = #36
-    176e:      	movs	r2, #63
-    1770:      	ands	r2, r1
-    1772:      	adds	r2, #128
-    1774:      	add	r3, sp, #4
-    1776:      	strb	r2, [r3, #2]
-    1778:      	lsrs	r2, r1, #12
-    177a:      	movs	r4, #224
-    177c:      	orrs	r4, r2
-    177e:      	strb	r4, [r3]
-    1780:      	lsls	r1, r1, #20
-    1782:      	lsrs	r1, r1, #26
-    1784:      	adds	r1, #128
-    1786:      	strb	r1, [r3, #1]
-    1788:      	movs	r2, #3
-    178a:      	add	r1, sp, #4
-    178c:      	bl	0x1230 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213> @ imm = #-1376
-    1790:      	add	sp, #8
-    1792:      	pop	{r4, r6, r7, pc}
-    1794:      	movs	r2, #63
-    1796:      	ands	r2, r1
-    1798:      	adds	r2, #128
-    179a:      	add	r3, sp, #4
-    179c:      	strb	r2, [r3, #3]
-    179e:      	lsrs	r2, r1, #18
-    17a0:      	movs	r4, #240
-    17a2:      	orrs	r4, r2
-    17a4:      	strb	r4, [r3]
-    17a6:      	lsls	r2, r1, #20
-    17a8:      	lsrs	r2, r2, #26
-    17aa:      	adds	r2, #128
-    17ac:      	strb	r2, [r3, #2]
-    17ae:      	lsls	r1, r1, #14
-    17b0:      	lsrs	r1, r1, #26
-    17b2:      	adds	r1, #128
-    17b4:      	strb	r1, [r3, #1]
-    17b6:      	movs	r2, #4
-    17b8:      	add	r1, sp, #4
-    17ba:      	bl	0x1230 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str::h6fc89e92f681b213> @ imm = #-1422
-    17be:      	add	sp, #8
-    17c0:      	pop	{r4, r6, r7, pc}
-    17c2:      	bmi	0x176e <<&mut W as core::fmt::Write>::write_char::he2d9b8b9670e89e5+0x46> @ imm = #-88
-
-000017c4 <<&mut W as core::fmt::Write>::write_fmt::h7a6edd189755017a>:
-    17c4:      	push	{r4, r5, r7, lr}
-    17c6:      	add	r7, sp, #8
-    17c8:      	sub	sp, #32
-    17ca:      	ldr	r0, [r0]
-    17cc:      	str	r0, [sp, #4]
-    17ce:      	add	r2, sp, #8
-    17d0:      	mov	r0, r2
-    17d2:      	ldm	r1!, {r3, r4, r5}
-    17d4:      	stm	r0!, {r3, r4, r5}
-    17d6:      	ldm	r1!, {r3, r4, r5}
-    17d8:      	stm	r0!, {r3, r4, r5}
-    17da:      	add	r0, sp, #4
-    17dc:      	ldr	r1, [pc, #8] <$d.340>
-    17de:      	bl	0x17ec <core::fmt::write::hff185d7d684cc368> @ imm = #10
-    17e2:      	add	sp, #32
-    17e4:      	pop	{r4, r5, r7, pc}
-    17e6:      	mov	r8, r8
-
-000017e8 <$d.340>:
-    17e8:	88 39 00 00	.word	0x00003988
-
-000017ec <core::fmt::write::hff185d7d684cc368>:
-    17ec:      	push	{r4, r5, r6, r7, lr}
-    17ee:      	add	r7, sp, #12
-    17f0:      	sub	sp, #68
-    17f2:      	movs	r4, #32
-    17f4:      	add	r5, sp, #32
-    17f6:      	movs	r3, #3
-    17f8:      	str	r5, [sp, #28]
-    17fa:      	strb	r3, [r5, r4]
-    17fc:      	str	r4, [sp, #36]
-    17fe:      	movs	r3, #0
-    1800:      	str	r3, [sp, #32]
-    1802:      	str	r1, [sp, #60]
-    1804:      	str	r0, [sp, #56]
-    1806:      	str	r3, [sp, #48]
-    1808:      	str	r3, [sp, #40]
-    180a:      	ldr	r5, [r2, #8]
-    180c:      	cmp	r5, #0
-    180e:      	beq	0x18cc <core::fmt::write::hff185d7d684cc368+0xe0> @ imm = #186
-    1810:      	ldr	r0, [r2, #12]
-    1812:      	cmp	r0, #0
-    1814:      	mov	r4, r3
-    1816:      	beq	0x1914 <core::fmt::write::hff185d7d684cc368+0x128> @ imm = #250
-    1818:      	str	r3, [sp, #8]
-    181a:      	ldr	r1, [sp, #28]
-    181c:      	adds	r1, #32
-    181e:      	str	r1, [sp, #28]
-    1820:      	str	r2, [sp, #24]
-    1822:      	ldr	r4, [r2]
-    1824:      	lsls	r0, r0, #5
-    1826:      	str	r0, [sp, #16]
-    1828:      	subs	r0, #32
-    182a:      	lsrs	r0, r0, #5
-    182c:      	adds	r0, r0, #1
-    182e:      	str	r0, [sp, #4]
-    1830:      	movs	r6, #0
-    1832:      	str	r5, [sp, #20]
-    1834:      	ldr	r2, [r4, #4]
-    1836:      	cmp	r2, #0
-    1838:      	beq	0x1848 <core::fmt::write::hff185d7d684cc368+0x5c> @ imm = #12
-    183a:      	ldr	r0, [sp, #60]
-    183c:      	ldr	r3, [r0, #12]
-    183e:      	ldr	r1, [r4]
-    1840:      	ldr	r0, [sp, #56]
-    1842:      	blx	r3
-    1844:      	cmp	r0, #0
-    1846:      	bne	0x193a <core::fmt::write::hff185d7d684cc368+0x14e> @ imm = #240
-    1848:      	adds	r2, r5, r6
-    184a:      	ldrb	r0, [r2, #28]
-    184c:      	ldr	r1, [sp, #28]
-    184e:      	strb	r0, [r1]
-    1850:      	ldr	r0, [r2, #4]
-    1852:      	str	r0, [sp, #36]
-    1854:      	ldr	r0, [r2, #8]
-    1856:      	str	r0, [sp, #32]
-    1858:      	ldr	r0, [r2, #20]
-    185a:      	ldr	r3, [r2, #24]
-    185c:      	ldr	r1, [sp, #24]
-    185e:      	ldr	r1, [r1, #16]
-    1860:      	movs	r5, #0
-    1862:      	cmp	r0, #0
-    1864:      	beq	0x1882 <core::fmt::write::hff185d7d684cc368+0x96> @ imm = #26
-    1866:      	cmp	r0, #1
-    1868:      	mov	r0, r5
-    186a:      	bne	0x1884 <core::fmt::write::hff185d7d684cc368+0x98> @ imm = #22
-    186c:      	lsls	r0, r3, #3
-    186e:      	str	r0, [sp, #12]
-    1870:      	adds	r0, r1, r0
-    1872:      	ldr	r0, [r0, #4]
-    1874:      	ldr	r3, [pc, #208] <$d.347>
-    1876:      	cmp	r0, r3
-    1878:      	mov	r0, r5
-    187a:      	bne	0x1884 <core::fmt::write::hff185d7d684cc368+0x98> @ imm = #6
-    187c:      	ldr	r0, [sp, #12]
-    187e:      	ldr	r0, [r1, r0]
-    1880:      	ldr	r3, [r0]
-    1882:      	movs	r0, #1
-    1884:      	str	r3, [sp, #44]
-    1886:      	str	r0, [sp, #40]
-    1888:      	ldr	r0, [r2, #12]
-    188a:      	ldr	r2, [r2, #16]
-    188c:      	cmp	r0, #0
-    188e:      	beq	0x18a4 <core::fmt::write::hff185d7d684cc368+0xb8> @ imm = #18
-    1890:      	cmp	r0, #1
-    1892:      	bne	0x18a8 <core::fmt::write::hff185d7d684cc368+0xbc> @ imm = #18
-    1894:      	lsls	r0, r2, #3
-    1896:      	adds	r2, r1, r0
-    1898:      	ldr	r2, [r2, #4]
-    189a:      	ldr	r3, [pc, #172] <$d.347+0x2>
-    189c:      	cmp	r2, r3
-    189e:      	bne	0x18a8 <core::fmt::write::hff185d7d684cc368+0xbc> @ imm = #6
-    18a0:      	ldr	r0, [r1, r0]
-    18a2:      	ldr	r2, [r0]
-    18a4:      	movs	r5, #1
-    18a6:      	b	0x18a8 <core::fmt::write::hff185d7d684cc368+0xbc> @ imm = #-2
-    18a8:      	str	r2, [sp, #52]
-    18aa:      	str	r5, [sp, #48]
-    18ac:      	ldr	r5, [sp, #20]
-    18ae:      	ldr	r0, [r5, r6]
-    18b0:      	lsls	r2, r0, #3
-    18b2:      	ldr	r0, [r1, r2]
-    18b4:      	adds	r1, r1, r2
-    18b6:      	ldr	r2, [r1, #4]
-    18b8:      	add	r1, sp, #32
-    18ba:      	blx	r2
-    18bc:      	cmp	r0, #0
-    18be:      	bne	0x193a <core::fmt::write::hff185d7d684cc368+0x14e> @ imm = #120
-    18c0:      	adds	r6, #32
-    18c2:      	adds	r4, #8
-    18c4:      	ldr	r0, [sp, #16]
-    18c6:      	cmp	r0, r6
-    18c8:      	bne	0x1834 <core::fmt::write::hff185d7d684cc368+0x48> @ imm = #-152
-    18ca:      	b	0x190e <core::fmt::write::hff185d7d684cc368+0x122> @ imm = #64
-    18cc:      	ldr	r0, [r2, #20]
-    18ce:      	cmp	r0, #0
-    18d0:      	mov	r4, r3
-    18d2:      	beq	0x1914 <core::fmt::write::hff185d7d684cc368+0x128> @ imm = #62
-    18d4:      	str	r3, [sp, #8]
-    18d6:      	ldr	r4, [r2]
-    18d8:      	str	r2, [sp, #24]
-    18da:      	ldr	r5, [r2, #16]
-    18dc:      	lsls	r0, r0, #3
-    18de:      	subs	r0, #8
-    18e0:      	lsrs	r0, r0, #3
-    18e2:      	adds	r6, r0, #1
-    18e4:      	str	r6, [sp, #4]
-    18e6:      	ldr	r2, [r4, #4]
-    18e8:      	cmp	r2, #0
-    18ea:      	beq	0x18fa <core::fmt::write::hff185d7d684cc368+0x10e> @ imm = #12
-    18ec:      	ldr	r0, [sp, #60]
-    18ee:      	ldr	r3, [r0, #12]
-    18f0:      	ldr	r1, [r4]
-    18f2:      	ldr	r0, [sp, #56]
-    18f4:      	blx	r3
-    18f6:      	cmp	r0, #0
-    18f8:      	bne	0x193a <core::fmt::write::hff185d7d684cc368+0x14e> @ imm = #62
-    18fa:      	ldm	r5!, {r0, r2}
-    18fc:      	add	r1, sp, #32
-    18fe:      	subs	r5, #8
-    1900:      	blx	r2
-    1902:      	cmp	r0, #0
-    1904:      	bne	0x193a <core::fmt::write::hff185d7d684cc368+0x14e> @ imm = #50
-    1906:      	adds	r5, #8
-    1908:      	adds	r4, #8
-    190a:      	subs	r6, r6, #1
-    190c:      	bne	0x18e6 <core::fmt::write::hff185d7d684cc368+0xfa> @ imm = #-42
-    190e:      	ldr	r3, [sp, #8]
-    1910:      	ldr	r2, [sp, #24]
-    1912:      	ldr	r4, [sp, #4]
-    1914:      	ldr	r0, [r2, #4]
-    1916:      	cmp	r4, r0
-    1918:      	blo	0x1922 <core::fmt::write::hff185d7d684cc368+0x136> @ imm = #6
-    191a:      	mov	r2, r3
-    191c:      	cmp	r4, r0
-    191e:      	blo	0x192c <core::fmt::write::hff185d7d684cc368+0x140> @ imm = #10
-    1920:      	b	0x1940 <core::fmt::write::hff185d7d684cc368+0x154> @ imm = #28
-    1922:      	lsls	r1, r4, #3
-    1924:      	ldr	r2, [r2]
-    1926:      	adds	r2, r2, r1
-    1928:      	cmp	r4, r0
-    192a:      	bhs	0x1940 <core::fmt::write::hff185d7d684cc368+0x154> @ imm = #18
-    192c:      	ldr	r0, [sp, #60]
-    192e:      	ldr	r3, [r0, #12]
-    1930:      	ldm	r2, {r1, r2}
-    1932:      	ldr	r0, [sp, #56]
-    1934:      	blx	r3
-    1936:      	cmp	r0, #0
-    1938:      	beq	0x1940 <core::fmt::write::hff185d7d684cc368+0x154> @ imm = #4
-    193a:      	movs	r0, #1
-    193c:      	add	sp, #68
-    193e:      	pop	{r4, r5, r6, r7, pc}
-    1940:      	movs	r0, #0
-    1942:      	add	sp, #68
-    1944:      	pop	{r4, r5, r6, r7, pc}
-    1946:      	mov	r8, r8
-
-00001948 <$d.347>:
-    1948:	dd 0f 00 00	.word	0x00000fdd
-
-0000194c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a>:
-    194c:      	push	{r4, r5, r6, r7, lr}
-    194e:      	add	r7, sp, #12
-    1950:      	sub	sp, #44
-    1952:      	str	r3, [sp, #32]
-    1954:      	str	r2, [sp, #36]
-    1956:      	mov	r4, r0
-    1958:      	ldr	r5, [r7, #12]
-    195a:      	cmp	r1, #0
-    195c:      	beq	0x196a <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x1e> @ imm = #10
-    195e:      	ldr	r3, [r4]
-    1960:      	movs	r0, #1
-    1962:      	ands	r0, r3
-    1964:      	beq	0x199c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x50> @ imm = #52
-    1966:      	movs	r1, #43
-    1968:      	b	0x19a0 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x54> @ imm = #52
-    196a:      	ldr	r3, [r4]
-    196c:      	adds	r2, r5, #1
-    196e:      	movs	r0, #45
-    1970:      	str	r0, [sp, #28]
-    1972:      	lsls	r1, r3, #29
-    1974:      	movs	r0, #0
-    1976:      	cmp	r1, #0
-    1978:      	bpl	0x19ac <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x60> @ imm = #48
-    197a:      	ldr	r1, [sp, #32]
-    197c:      	cmp	r1, #0
-    197e:      	str	r3, [sp, #16]
-    1980:      	beq	0x19d6 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x8a> @ imm = #82
-    1982:      	movs	r6, #3
-    1984:      	mov	r0, r1
-    1986:      	ands	r0, r6
-    1988:      	str	r0, [sp, #12]
-    198a:      	subs	r0, r1, #1
-    198c:      	cmp	r0, #3
-    198e:      	bhs	0x19da <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x8e> @ imm = #72
-    1990:      	movs	r1, #0
-    1992:      	ldr	r3, [sp, #36]
-    1994:      	ldr	r0, [sp, #12]
-    1996:      	cmp	r0, #0
-    1998:      	bne	0x1a48 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xfc> @ imm = #172
-    199a:      	b	0x1a7a <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x12e> @ imm = #220
-    199c:      	movs	r1, #17
-    199e:      	lsls	r1, r1, #16
-    19a0:      	str	r1, [sp, #28]
-    19a2:      	adds	r2, r0, r5
-    19a4:      	lsls	r1, r3, #29
-    19a6:      	movs	r0, #0
-    19a8:      	cmp	r1, #0
-    19aa:      	bmi	0x197a <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x2e> @ imm = #-52
-    19ac:      	str	r0, [sp, #36]
-    19ae:      	mov	r1, r0
-    19b0:      	ldr	r6, [r7, #8]
-    19b2:      	ldr	r0, [r4, #8]
-    19b4:      	cmp	r0, #1
-    19b6:      	beq	0x1a88 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x13c> @ imm = #206
-    19b8:      	mov	r0, r4
-    19ba:      	mov	r3, r1
-    19bc:      	ldr	r1, [sp, #28]
-    19be:      	ldr	r2, [sp, #36]
-    19c0:      	bl	0x1c68 <core::fmt::Formatter::pad_integral::write_prefix::hdb27e999f5442c06> @ imm = #676
-    19c4:      	cmp	r0, #0
-    19c6:      	beq	0x19ca <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x7e> @ imm = #0
-    19c8:      	b	0x1b52 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x206> @ imm = #390
-    19ca:      	ldr	r0, [r4, #24]
-    19cc:      	ldr	r1, [r4, #28]
-    19ce:      	ldr	r3, [r1, #12]
-    19d0:      	mov	r1, r6
-    19d2:      	mov	r2, r5
-    19d4:      	b	0x1ad2 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x186> @ imm = #250
-    19d6:      	movs	r1, #0
-    19d8:      	b	0x1a7a <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x12e> @ imm = #158
-    19da:      	str	r2, [sp, #8]
-    19dc:      	str	r5, [sp, #20]
-    19de:      	str	r4, [sp, #24]
-    19e0:      	mov	r0, r1
-    19e2:      	bics	r0, r6
-    19e4:      	rsbs	r5, r0, #0
-    19e6:      	movs	r1, #0
-    19e8:      	str	r1, [sp, #40]
-    19ea:      	ldr	r3, [sp, #36]
-    19ec:      	b	0x19f4 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xa8> @ imm = #4
-    19ee:      	adds	r3, r3, #4
-    19f0:      	adds	r5, r5, #4
-    19f2:      	beq	0x1a3c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xf0> @ imm = #70
-    19f4:      	mov	r2, r6
-    19f6:      	movs	r4, #1
-    19f8:      	ldr	r0, [sp, #40]
-    19fa:      	ldrsb	r6, [r3, r0]
-    19fc:      	movs	r0, #64
-    19fe:      	mvns	r0, r0
-    1a00:      	cmp	r6, r0
-    1a02:      	bgt	0x1a1c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xd0> @ imm = #22
-    1a04:      	ldrsb	r4, [r3, r4]
-    1a06:      	cmp	r4, r0
-    1a08:      	mov	r6, r2
-    1a0a:      	bgt	0x1a26 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xda> @ imm = #24
-    1a0c:      	movs	r4, #2
-    1a0e:      	ldrsb	r4, [r3, r4]
-    1a10:      	cmp	r4, r0
-    1a12:      	bgt	0x1a30 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xe4> @ imm = #26
-    1a14:      	ldrsb	r4, [r3, r6]
-    1a16:      	cmp	r4, r0
-    1a18:      	ble	0x19ee <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xa2> @ imm = #-46
-    1a1a:      	b	0x1a38 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xec> @ imm = #26
-    1a1c:      	adds	r1, r1, #1
-    1a1e:      	ldrsb	r4, [r3, r4]
-    1a20:      	cmp	r4, r0
-    1a22:      	mov	r6, r2
-    1a24:      	ble	0x1a0c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xc0> @ imm = #-28
-    1a26:      	adds	r1, r1, #1
-    1a28:      	movs	r4, #2
-    1a2a:      	ldrsb	r4, [r3, r4]
-    1a2c:      	cmp	r4, r0
-    1a2e:      	ble	0x1a14 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xc8> @ imm = #-30
-    1a30:      	adds	r1, r1, #1
-    1a32:      	ldrsb	r4, [r3, r6]
-    1a34:      	cmp	r4, r0
-    1a36:      	ble	0x19ee <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xa2> @ imm = #-76
-    1a38:      	adds	r1, r1, #1
-    1a3a:      	b	0x19ee <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0xa2> @ imm = #-80
-    1a3c:      	ldr	r4, [sp, #24]
-    1a3e:      	ldr	r5, [sp, #20]
-    1a40:      	ldr	r2, [sp, #8]
-    1a42:      	ldr	r0, [sp, #12]
-    1a44:      	cmp	r0, #0
-    1a46:      	beq	0x1a7a <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x12e> @ imm = #48
-    1a48:      	mov	r6, r2
-    1a4a:      	movs	r0, #0
-    1a4c:      	ldrsb	r2, [r3, r0]
-    1a4e:      	movs	r0, #64
-    1a50:      	mvns	r0, r0
-    1a52:      	cmp	r2, r0
-    1a54:      	ble	0x1a58 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x10c> @ imm = #0
-    1a56:      	adds	r1, r1, #1
-    1a58:      	ldr	r2, [sp, #12]
-    1a5a:      	cmp	r2, #1
-    1a5c:      	beq	0x1a78 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x12c> @ imm = #24
-    1a5e:      	movs	r2, #1
-    1a60:      	ldrsb	r2, [r3, r2]
-    1a62:      	cmp	r2, r0
-    1a64:      	ble	0x1a68 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x11c> @ imm = #0
-    1a66:      	adds	r1, r1, #1
-    1a68:      	ldr	r2, [sp, #12]
-    1a6a:      	cmp	r2, #2
-    1a6c:      	beq	0x1a78 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x12c> @ imm = #8
-    1a6e:      	movs	r2, #2
-    1a70:      	ldrsb	r2, [r3, r2]
-    1a72:      	cmp	r2, r0
-    1a74:      	ble	0x1a78 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x12c> @ imm = #0
-    1a76:      	adds	r1, r1, #1
-    1a78:      	mov	r2, r6
-    1a7a:      	adds	r2, r1, r2
-    1a7c:      	ldr	r1, [sp, #32]
-    1a7e:      	ldr	r3, [sp, #16]
-    1a80:      	ldr	r6, [r7, #8]
-    1a82:      	ldr	r0, [r4, #8]
-    1a84:      	cmp	r0, #1
-    1a86:      	bne	0x19b8 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x6c> @ imm = #-210
-    1a88:      	str	r5, [sp, #20]
-    1a8a:      	ldr	r5, [r4, #12]
-    1a8c:      	cmp	r5, r2
-    1a8e:      	bls	0x1ab8 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x16c> @ imm = #38
-    1a90:      	str	r1, [sp, #32]
-    1a92:      	str	r4, [sp, #24]
-    1a94:      	lsls	r0, r3, #28
-    1a96:      	str	r6, [sp, #12]
-    1a98:      	bmi	0x1adc <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x190> @ imm = #64
-    1a9a:      	movs	r0, #32
-    1a9c:      	ldr	r1, [sp, #24]
-    1a9e:      	ldrb	r1, [r1, r0]
-    1aa0:      	cmp	r1, #3
-    1aa2:      	bne	0x1aa6 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x15a> @ imm = #0
-    1aa4:      	movs	r1, #1
-    1aa6:      	subs	r0, r5, r2
-    1aa8:      	lsls	r2, r1, #30
-    1aaa:      	beq	0x1b2a <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x1de> @ imm = #124
-    1aac:      	cmp	r1, #1
-    1aae:      	bne	0x1b2e <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x1e2> @ imm = #124
-    1ab0:      	movs	r1, #0
-    1ab2:      	str	r1, [sp, #8]
-    1ab4:      	mov	r1, r0
-    1ab6:      	b	0x1b36 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x1ea> @ imm = #124
-    1ab8:      	mov	r0, r4
-    1aba:      	mov	r3, r1
-    1abc:      	ldr	r1, [sp, #28]
-    1abe:      	ldr	r2, [sp, #36]
-    1ac0:      	bl	0x1c68 <core::fmt::Formatter::pad_integral::write_prefix::hdb27e999f5442c06> @ imm = #420
-    1ac4:      	cmp	r0, #0
-    1ac6:      	bne	0x1b52 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x206> @ imm = #136
-    1ac8:      	ldr	r0, [r4, #24]
-    1aca:      	ldr	r1, [r4, #28]
-    1acc:      	ldr	r3, [r1, #12]
-    1ace:      	mov	r1, r6
-    1ad0:      	ldr	r2, [sp, #20]
-    1ad2:      	blx	r3
-    1ad4:      	mov	r2, r0
-    1ad6:      	mov	r0, r2
-    1ad8:      	add	sp, #44
-    1ada:      	pop	{r4, r5, r6, r7, pc}
-    1adc:      	mov	r6, r2
-    1ade:      	movs	r0, #32
-    1ae0:      	ldr	r4, [sp, #24]
-    1ae2:      	ldrb	r1, [r4, r0]
-    1ae4:      	str	r1, [sp, #8]
-    1ae6:      	movs	r1, #1
-    1ae8:      	str	r1, [sp, #16]
-    1aea:      	strb	r1, [r4, r0]
-    1aec:      	ldr	r0, [r4, #4]
-    1aee:      	str	r0, [sp, #4]
-    1af0:      	movs	r0, #48
-    1af2:      	str	r0, [r4, #4]
-    1af4:      	mov	r0, r4
-    1af6:      	ldr	r1, [sp, #28]
-    1af8:      	ldr	r2, [sp, #36]
-    1afa:      	ldr	r3, [sp, #32]
-    1afc:      	bl	0x1c68 <core::fmt::Formatter::pad_integral::write_prefix::hdb27e999f5442c06> @ imm = #360
-    1b00:      	cmp	r0, #0
-    1b02:      	beq	0x1b0c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x1c0> @ imm = #6
-    1b04:      	ldr	r2, [sp, #16]
-    1b06:      	mov	r0, r2
-    1b08:      	add	sp, #44
-    1b0a:      	pop	{r4, r5, r6, r7, pc}
-    1b0c:      	adds	r4, #32
-    1b0e:      	ldrb	r1, [r4]
-    1b10:      	cmp	r1, #3
-    1b12:      	bne	0x1b16 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x1ca> @ imm = #0
-    1b14:      	movs	r1, #1
-    1b16:      	subs	r0, r5, r6
-    1b18:      	lsls	r2, r1, #30
-    1b1a:      	str	r4, [sp, #28]
-    1b1c:      	beq	0x1b90 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x244> @ imm = #112
-    1b1e:      	cmp	r1, #1
-    1b20:      	bne	0x1b94 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x248> @ imm = #112
-    1b22:      	movs	r1, #0
-    1b24:      	str	r1, [sp, #36]
-    1b26:      	mov	r1, r0
-    1b28:      	b	0x1b9c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x250> @ imm = #112
-    1b2a:      	movs	r1, #0
-    1b2c:      	b	0x1b34 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x1e8> @ imm = #4
-    1b2e:      	lsrs	r1, r0, #1
-    1b30:      	adds	r0, r0, #1
-    1b32:      	lsrs	r0, r0, #1
-    1b34:      	str	r0, [sp, #8]
-    1b36:      	ldr	r0, [sp, #24]
-    1b38:      	adds	r4, r1, #1
-    1b3a:      	ldr	r1, [r0, #4]
-    1b3c:      	str	r1, [sp, #40]
-    1b3e:      	ldr	r6, [r0, #24]
-    1b40:      	ldr	r5, [r0, #28]
-    1b42:      	subs	r4, r4, #1
-    1b44:      	beq	0x1b5a <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x20e> @ imm = #18
-    1b46:      	ldr	r2, [r5, #16]
-    1b48:      	mov	r0, r6
-    1b4a:      	ldr	r1, [sp, #40]
-    1b4c:      	blx	r2
-    1b4e:      	cmp	r0, #0
-    1b50:      	beq	0x1b42 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x1f6> @ imm = #-18
-    1b52:      	movs	r2, #1
-    1b54:      	mov	r0, r2
-    1b56:      	add	sp, #44
-    1b58:      	pop	{r4, r5, r6, r7, pc}
-    1b5a:      	movs	r0, #17
-    1b5c:      	lsls	r0, r0, #16
-    1b5e:      	ldr	r1, [sp, #40]
-    1b60:      	cmp	r1, r0
-    1b62:      	bne	0x1b68 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x21c> @ imm = #2
-    1b64:      	movs	r1, #0
-    1b66:      	str	r1, [sp, #8]
-    1b68:      	ldr	r4, [sp, #24]
-    1b6a:      	ldr	r5, [sp, #20]
-    1b6c:      	ldr	r6, [sp, #12]
-    1b6e:      	movs	r2, #1
-    1b70:      	ldr	r1, [sp, #40]
-    1b72:      	cmp	r1, r0
-    1b74:      	beq	0x1ad6 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x18a> @ imm = #-162
-    1b76:      	str	r2, [sp, #16]
-    1b78:      	mov	r0, r4
-    1b7a:      	ldr	r1, [sp, #28]
-    1b7c:      	ldr	r2, [sp, #36]
-    1b7e:      	ldr	r3, [sp, #32]
-    1b80:      	bl	0x1c68 <core::fmt::Formatter::pad_integral::write_prefix::hdb27e999f5442c06> @ imm = #228
-    1b84:      	cmp	r0, #0
-    1b86:      	beq	0x1bf0 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x2a4> @ imm = #102
-    1b88:      	ldr	r2, [sp, #16]
-    1b8a:      	mov	r0, r2
-    1b8c:      	add	sp, #44
-    1b8e:      	pop	{r4, r5, r6, r7, pc}
-    1b90:      	movs	r1, #0
-    1b92:      	b	0x1b9a <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x24e> @ imm = #4
-    1b94:      	lsrs	r1, r0, #1
-    1b96:      	adds	r0, r0, #1
-    1b98:      	lsrs	r0, r0, #1
-    1b9a:      	str	r0, [sp, #36]
-    1b9c:      	ldr	r0, [sp, #24]
-    1b9e:      	adds	r4, r1, #1
-    1ba0:      	ldr	r1, [r0, #4]
-    1ba2:      	str	r1, [sp, #40]
-    1ba4:      	ldr	r6, [r0, #24]
-    1ba6:      	ldr	r5, [r0, #28]
-    1ba8:      	subs	r4, r4, #1
-    1baa:      	beq	0x1bc0 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x274> @ imm = #18
-    1bac:      	ldr	r2, [r5, #16]
-    1bae:      	mov	r0, r6
-    1bb0:      	ldr	r1, [sp, #40]
-    1bb2:      	blx	r2
-    1bb4:      	cmp	r0, #0
-    1bb6:      	beq	0x1ba8 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x25c> @ imm = #-18
-    1bb8:      	ldr	r2, [sp, #16]
-    1bba:      	mov	r0, r2
-    1bbc:      	add	sp, #44
-    1bbe:      	pop	{r4, r5, r6, r7, pc}
-    1bc0:      	movs	r0, #17
-    1bc2:      	lsls	r0, r0, #16
-    1bc4:      	ldr	r3, [sp, #40]
-    1bc6:      	cmp	r3, r0
-    1bc8:      	bne	0x1bce <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x282> @ imm = #2
-    1bca:      	movs	r1, #0
-    1bcc:      	str	r1, [sp, #36]
-    1bce:      	ldr	r5, [sp, #24]
-    1bd0:      	ldr	r1, [sp, #12]
-    1bd2:      	ldr	r2, [sp, #16]
-    1bd4:      	cmp	r3, r0
-    1bd6:      	bne	0x1bda <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x28e> @ imm = #0
-    1bd8:      	b	0x1ad6 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x18a> @ imm = #-262
-    1bda:      	ldr	r0, [r5, #24]
-    1bdc:      	ldr	r2, [r5, #28]
-    1bde:      	ldr	r3, [r2, #12]
-    1be0:      	ldr	r2, [sp, #20]
-    1be2:      	blx	r3
-    1be4:      	cmp	r0, #0
-    1be6:      	beq	0x1c24 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x2d8> @ imm = #58
-    1be8:      	ldr	r2, [sp, #16]
-    1bea:      	mov	r0, r2
-    1bec:      	add	sp, #44
-    1bee:      	pop	{r4, r5, r6, r7, pc}
-    1bf0:      	ldr	r0, [r4, #24]
-    1bf2:      	ldr	r1, [r4, #28]
-    1bf4:      	ldr	r3, [r1, #12]
-    1bf6:      	mov	r1, r6
-    1bf8:      	mov	r2, r5
-    1bfa:      	blx	r3
-    1bfc:      	cmp	r0, #0
-    1bfe:      	ldr	r2, [sp, #16]
-    1c00:      	beq	0x1c04 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x2b8> @ imm = #0
-    1c02:      	b	0x1ad6 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x18a> @ imm = #-304
-    1c04:      	ldr	r0, [r4, #24]
-    1c06:      	str	r0, [sp, #36]
-    1c08:      	ldr	r6, [r4, #28]
-    1c0a:      	movs	r4, #0
-    1c0c:      	ldr	r5, [sp, #8]
-    1c0e:      	cmp	r5, r4
-    1c10:      	beq	0x1c58 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x30c> @ imm = #68
-    1c12:      	ldr	r2, [r6, #16]
-    1c14:      	ldr	r0, [sp, #36]
-    1c16:      	ldr	r1, [sp, #40]
-    1c18:      	blx	r2
-    1c1a:      	adds	r4, r4, #1
-    1c1c:      	cmp	r0, #0
-    1c1e:      	beq	0x1c0e <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x2c2> @ imm = #-20
-    1c20:      	subs	r0, r4, #1
-    1c22:      	b	0x1c5a <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x30e> @ imm = #52
-    1c24:      	ldr	r0, [r5, #24]
-    1c26:      	str	r0, [sp, #32]
-    1c28:      	ldr	r6, [r5, #28]
-    1c2a:      	movs	r4, #0
-    1c2c:      	ldr	r0, [sp, #36]
-    1c2e:      	cmp	r0, r4
-    1c30:      	beq	0x1c4c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x300> @ imm = #24
-    1c32:      	ldr	r2, [r6, #16]
-    1c34:      	ldr	r0, [sp, #32]
-    1c36:      	ldr	r1, [sp, #40]
-    1c38:      	blx	r2
-    1c3a:      	ldr	r2, [sp, #16]
-    1c3c:      	adds	r4, r4, #1
-    1c3e:      	cmp	r0, #0
-    1c40:      	beq	0x1c2c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x2e0> @ imm = #-24
-    1c42:      	subs	r0, r4, #1
-    1c44:      	ldr	r1, [sp, #36]
-    1c46:      	cmp	r0, r1
-    1c48:      	bhs	0x1c4c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x300> @ imm = #0
-    1c4a:      	b	0x1ad6 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x18a> @ imm = #-376
-    1c4c:      	ldr	r0, [sp, #8]
-    1c4e:      	ldr	r1, [sp, #28]
-    1c50:      	strb	r0, [r1]
-    1c52:      	ldr	r0, [sp, #4]
-    1c54:      	str	r0, [r5, #4]
-    1c56:      	b	0x1c60 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x314> @ imm = #6
-    1c58:      	mov	r0, r5
-    1c5a:      	cmp	r0, r5
-    1c5c:      	bhs	0x1c60 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x314> @ imm = #0
-    1c5e:      	b	0x1b52 <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a+0x206> @ imm = #-272
-    1c60:      	movs	r2, #0
-    1c62:      	mov	r0, r2
-    1c64:      	add	sp, #44
-    1c66:      	pop	{r4, r5, r6, r7, pc}
-
-00001c68 <core::fmt::Formatter::pad_integral::write_prefix::hdb27e999f5442c06>:
-    1c68:      	push	{r4, r5, r6, r7, lr}
-    1c6a:      	add	r7, sp, #12
-    1c6c:      	sub	sp, #4
-    1c6e:      	mov	r4, r3
-    1c70:      	mov	r5, r2
-    1c72:      	mov	r6, r0
-    1c74:      	movs	r0, #17
-    1c76:      	lsls	r0, r0, #16
-    1c78:      	cmp	r1, r0
-    1c7a:      	beq	0x1c8e <core::fmt::Formatter::pad_integral::write_prefix::hdb27e999f5442c06+0x26> @ imm = #16
-    1c7c:      	ldr	r0, [r6, #24]
-    1c7e:      	ldr	r2, [r6, #28]
-    1c80:      	ldr	r2, [r2, #16]
-    1c82:      	blx	r2
-    1c84:      	cmp	r0, #0
-    1c86:      	beq	0x1c8e <core::fmt::Formatter::pad_integral::write_prefix::hdb27e999f5442c06+0x26> @ imm = #4
-    1c88:      	movs	r0, #1
-    1c8a:      	add	sp, #4
-    1c8c:      	pop	{r4, r5, r6, r7, pc}
-    1c8e:      	cmp	r5, #0
-    1c90:      	beq	0x1ca2 <core::fmt::Formatter::pad_integral::write_prefix::hdb27e999f5442c06+0x3a> @ imm = #14
-    1c92:      	ldr	r0, [r6, #24]
-    1c94:      	ldr	r1, [r6, #28]
-    1c96:      	ldr	r3, [r1, #12]
-    1c98:      	mov	r1, r5
-    1c9a:      	mov	r2, r4
-    1c9c:      	blx	r3
-    1c9e:      	add	sp, #4
-    1ca0:      	pop	{r4, r5, r6, r7, pc}
-    1ca2:      	movs	r0, #0
-    1ca4:      	add	sp, #4
-    1ca6:      	pop	{r4, r5, r6, r7, pc}
-
-00001ca8 <core::fmt::Formatter::pad::haa777c0a9492680f>:
-    1ca8:      	push	{r4, r5, r6, r7, lr}
-    1caa:      	add	r7, sp, #12
-    1cac:      	sub	sp, #44
-    1cae:      	mov	r3, r0
-    1cb0:      	ldr	r0, [r0, #16]
-    1cb2:      	ldr	r4, [r3, #8]
-    1cb4:      	cmp	r4, #1
-    1cb6:      	str	r3, [sp, #36]
-    1cb8:      	bne	0x1cc0 <core::fmt::Formatter::pad::haa777c0a9492680f+0x18> @ imm = #4
-    1cba:      	cmp	r0, #1
-    1cbc:      	beq	0x1cc6 <core::fmt::Formatter::pad::haa777c0a9492680f+0x1e> @ imm = #6
-    1cbe:      	b	0x1e1e <core::fmt::Formatter::pad::haa777c0a9492680f+0x176> @ imm = #348
-    1cc0:      	cmp	r0, #1
-    1cc2:      	beq	0x1cc6 <core::fmt::Formatter::pad::haa777c0a9492680f+0x1e> @ imm = #0
-    1cc4:      	b	0x1f14 <core::fmt::Formatter::pad::haa777c0a9492680f+0x26c> @ imm = #588
-    1cc6:      	str	r4, [sp, #16]
-    1cc8:      	str	r2, [sp, #32]
-    1cca:      	adds	r0, r1, r2
-    1ccc:      	mov	r5, r1
-    1cce:      	ldr	r4, [r3, #20]
-    1cd0:      	cmp	r4, #0
-    1cd2:      	str	r1, [sp, #28]
-    1cd4:      	beq	0x1d78 <core::fmt::Formatter::pad::haa777c0a9492680f+0xd0> @ imm = #160
-    1cd6:      	movs	r1, #17
-    1cd8:      	lsls	r1, r1, #16
-    1cda:      	str	r1, [sp, #12]
-    1cdc:      	movs	r1, #7
-    1cde:      	str	r0, [sp, #40]
-    1ce0:      	lsls	r0, r1, #18
-    1ce2:      	str	r0, [sp, #8]
-    1ce4:      	ldr	r0, [sp, #40]
-    1ce6:      	movs	r2, #0
-    1ce8:      	b	0x1d20 <core::fmt::Formatter::pad::haa777c0a9492680f+0x78> @ imm = #52
-    1cea:      	ldrb	r0, [r5]
-    1cec:      	str	r0, [sp, #20]
-    1cee:      	movs	r0, #63
-    1cf0:      	str	r2, [sp, #4]
-    1cf2:      	ldr	r2, [sp, #20]
-    1cf4:      	ands	r0, r2
-    1cf6:      	ldr	r2, [sp, #4]
-    1cf8:      	str	r0, [sp, #20]
-    1cfa:      	adds	r5, r5, #1
-    1cfc:      	lsls	r6, r6, #18
-    1cfe:      	ldr	r0, [sp, #8]
-    1d00:      	ands	r6, r0
-    1d02:      	lsls	r1, r1, #12
-    1d04:      	adds	r1, r1, r6
-    1d06:      	ldr	r0, [sp, #24]
-    1d08:      	lsls	r6, r0, #6
-    1d0a:      	adds	r1, r1, r6
-    1d0c:      	ldr	r0, [sp, #20]
-    1d0e:      	adds	r1, r1, r0
-    1d10:      	ldr	r6, [sp, #12]
-    1d12:      	cmp	r1, r6
-    1d14:      	ldr	r0, [sp, #40]
-    1d16:      	beq	0x1dd8 <core::fmt::Formatter::pad::haa777c0a9492680f+0x130> @ imm = #190
-    1d18:      	subs	r1, r2, r3
-    1d1a:      	adds	r2, r1, r5
-    1d1c:      	subs	r4, r4, #1
-    1d1e:      	beq	0x1d7a <core::fmt::Formatter::pad::haa777c0a9492680f+0xd2> @ imm = #88
-    1d20:      	cmp	r5, r0
-    1d22:      	beq	0x1dd8 <core::fmt::Formatter::pad::haa777c0a9492680f+0x130> @ imm = #178
-    1d24:      	mov	r3, r5
-    1d26:      	movs	r1, #0
-    1d28:      	ldrsb	r6, [r5, r1]
-    1d2a:      	adds	r5, r5, #1
-    1d2c:      	cmp	r6, #0
-    1d2e:      	bpl	0x1d18 <core::fmt::Formatter::pad::haa777c0a9492680f+0x70> @ imm = #-26
-    1d30:      	cmp	r5, r0
-    1d32:      	mov	r5, r0
-    1d34:      	beq	0x1d3e <core::fmt::Formatter::pad::haa777c0a9492680f+0x96> @ imm = #6
-    1d36:      	ldrb	r5, [r3, #1]
-    1d38:      	movs	r1, #63
-    1d3a:      	ands	r1, r5
-    1d3c:      	adds	r5, r3, #2
-    1d3e:      	uxtb	r6, r6
-    1d40:      	cmp	r6, #224
-    1d42:      	blo	0x1d18 <core::fmt::Formatter::pad::haa777c0a9492680f+0x70> @ imm = #-46
-    1d44:      	cmp	r5, r0
-    1d46:      	beq	0x1d62 <core::fmt::Formatter::pad::haa777c0a9492680f+0xba> @ imm = #24
-    1d48:      	ldrb	r0, [r5]
-    1d4a:      	str	r0, [sp, #24]
-    1d4c:      	str	r6, [sp, #20]
-    1d4e:      	movs	r6, #63
-    1d50:      	ldr	r0, [sp, #24]
-    1d52:      	ands	r6, r0
-    1d54:      	ldr	r0, [sp, #40]
-    1d56:      	str	r6, [sp, #24]
-    1d58:      	ldr	r6, [sp, #20]
-    1d5a:      	adds	r5, r5, #1
-    1d5c:      	cmp	r6, #240
-    1d5e:      	blo	0x1d18 <core::fmt::Formatter::pad::haa777c0a9492680f+0x70> @ imm = #-74
-    1d60:      	b	0x1d6c <core::fmt::Formatter::pad::haa777c0a9492680f+0xc4> @ imm = #8
-    1d62:      	movs	r5, #0
-    1d64:      	str	r5, [sp, #24]
-    1d66:      	mov	r5, r0
-    1d68:      	cmp	r6, #240
-    1d6a:      	blo	0x1d18 <core::fmt::Formatter::pad::haa777c0a9492680f+0x70> @ imm = #-86
-    1d6c:      	cmp	r5, r0
-    1d6e:      	bne	0x1cea <core::fmt::Formatter::pad::haa777c0a9492680f+0x42> @ imm = #-136
-    1d70:      	movs	r5, #0
-    1d72:      	str	r5, [sp, #20]
-    1d74:      	mov	r5, r0
-    1d76:      	b	0x1cfc <core::fmt::Formatter::pad::haa777c0a9492680f+0x54> @ imm = #-126
-    1d78:      	movs	r2, #0
-    1d7a:      	cmp	r5, r0
-    1d7c:      	beq	0x1dd8 <core::fmt::Formatter::pad::haa777c0a9492680f+0x130> @ imm = #88
-    1d7e:      	movs	r3, #0
-    1d80:      	ldrsb	r1, [r5, r3]
-    1d82:      	cmp	r1, #0
-    1d84:      	bpl	0x1de4 <core::fmt::Formatter::pad::haa777c0a9492680f+0x13c> @ imm = #92
-    1d86:      	uxtb	r1, r1
-    1d88:      	adds	r4, r5, #1
-    1d8a:      	cmp	r4, r0
-    1d8c:      	mov	r6, r0
-    1d8e:      	beq	0x1d98 <core::fmt::Formatter::pad::haa777c0a9492680f+0xf0> @ imm = #6
-    1d90:      	adds	r6, r5, #2
-    1d92:      	ldrb	r3, [r5, #1]
-    1d94:      	lsls	r3, r3, #26
-    1d96:      	lsrs	r3, r3, #20
-    1d98:      	cmp	r1, #224
-    1d9a:      	blo	0x1de4 <core::fmt::Formatter::pad::haa777c0a9492680f+0x13c> @ imm = #70
-    1d9c:      	cmp	r6, r0
-    1d9e:      	beq	0x1dae <core::fmt::Formatter::pad::haa777c0a9492680f+0x106> @ imm = #12
-    1da0:      	ldrb	r5, [r6]
-    1da2:      	movs	r4, #63
-    1da4:      	ands	r4, r5
-    1da6:      	adds	r5, r6, #1
-    1da8:      	cmp	r1, #240
-    1daa:      	bhs	0x1db6 <core::fmt::Formatter::pad::haa777c0a9492680f+0x10e> @ imm = #8
-    1dac:      	b	0x1de4 <core::fmt::Formatter::pad::haa777c0a9492680f+0x13c> @ imm = #52
-    1dae:      	movs	r4, #0
-    1db0:      	mov	r5, r0
-    1db2:      	cmp	r1, #240
-    1db4:      	blo	0x1de4 <core::fmt::Formatter::pad::haa777c0a9492680f+0x13c> @ imm = #44
-    1db6:      	orrs	r4, r3
-    1db8:      	cmp	r5, r0
-    1dba:      	beq	0x1dc4 <core::fmt::Formatter::pad::haa777c0a9492680f+0x11c> @ imm = #6
-    1dbc:      	ldrb	r3, [r5]
-    1dbe:      	movs	r0, #63
-    1dc0:      	ands	r0, r3
-    1dc2:      	b	0x1dc6 <core::fmt::Formatter::pad::haa777c0a9492680f+0x11e> @ imm = #0
-    1dc4:      	movs	r0, #0
-    1dc6:      	lsls	r3, r4, #6
-    1dc8:      	lsls	r1, r1, #29
-    1dca:      	lsrs	r1, r1, #11
-    1dcc:      	adds	r1, r3, r1
-    1dce:      	adds	r0, r1, r0
-    1dd0:      	movs	r1, #17
-    1dd2:      	lsls	r1, r1, #16
-    1dd4:      	cmp	r0, r1
-    1dd6:      	bne	0x1de4 <core::fmt::Formatter::pad::haa777c0a9492680f+0x13c> @ imm = #10
-    1dd8:      	add	r3, sp, #28
-    1dda:      	ldm	r3, {r1, r2, r3}
-    1ddc:      	ldr	r4, [sp, #16]
-    1dde:      	cmp	r4, #1
-    1de0:      	beq	0x1e1e <core::fmt::Formatter::pad::haa777c0a9492680f+0x176> @ imm = #58
-    1de2:      	b	0x1f14 <core::fmt::Formatter::pad::haa777c0a9492680f+0x26c> @ imm = #302
-    1de4:      	cmp	r2, #0
-    1de6:      	mov	r5, r2
-    1de8:      	ldr	r2, [sp, #32]
-    1dea:      	ldr	r1, [sp, #28]
-    1dec:      	beq	0x1e0a <core::fmt::Formatter::pad::haa777c0a9492680f+0x162> @ imm = #26
-    1dee:      	cmp	r5, r2
-    1df0:      	bhs	0x1e02 <core::fmt::Formatter::pad::haa777c0a9492680f+0x15a> @ imm = #14
-    1df2:      	ldrsb	r4, [r1, r5]
-    1df4:      	movs	r0, #63
-    1df6:      	mvns	r3, r0
-    1df8:      	movs	r0, #0
-    1dfa:      	cmp	r4, r3
-    1dfc:      	mov	r3, r0
-    1dfe:      	bge	0x1e0a <core::fmt::Formatter::pad::haa777c0a9492680f+0x162> @ imm = #8
-    1e00:      	b	0x1e0e <core::fmt::Formatter::pad::haa777c0a9492680f+0x166> @ imm = #10
-    1e02:      	movs	r0, #0
-    1e04:      	cmp	r5, r2
-    1e06:      	mov	r3, r0
-    1e08:      	bne	0x1e0e <core::fmt::Formatter::pad::haa777c0a9492680f+0x166> @ imm = #2
-    1e0a:      	mov	r0, r1
-    1e0c:      	mov	r3, r5
-    1e0e:      	cmp	r0, #0
-    1e10:      	bne	0x1f04 <core::fmt::Formatter::pad::haa777c0a9492680f+0x25c> @ imm = #240
-    1e12:      	cmp	r0, #0
-    1e14:      	ldr	r3, [sp, #36]
-    1e16:      	ldr	r4, [sp, #16]
-    1e18:      	bne	0x1f0e <core::fmt::Formatter::pad::haa777c0a9492680f+0x266> @ imm = #242
-    1e1a:      	cmp	r4, #1
-    1e1c:      	bne	0x1f14 <core::fmt::Formatter::pad::haa777c0a9492680f+0x26c> @ imm = #244
-    1e1e:      	ldr	r6, [r3, #12]
-    1e20:      	cmp	r2, #0
-    1e22:      	str	r2, [sp, #32]
-    1e24:      	str	r1, [sp, #28]
-    1e26:      	beq	0x1e3e <core::fmt::Formatter::pad::haa777c0a9492680f+0x196> @ imm = #20
-    1e28:      	movs	r5, #3
-    1e2a:      	mov	r3, r2
-    1e2c:      	ands	r3, r5
-    1e2e:      	subs	r0, r2, #1
-    1e30:      	cmp	r0, #3
-    1e32:      	bhs	0x1e42 <core::fmt::Formatter::pad::haa777c0a9492680f+0x19a> @ imm = #12
-    1e34:      	movs	r2, #0
-    1e36:      	mov	r4, r1
-    1e38:      	cmp	r3, #0
-    1e3a:      	bne	0x1ea6 <core::fmt::Formatter::pad::haa777c0a9492680f+0x1fe> @ imm = #104
-    1e3c:      	b	0x1ed0 <core::fmt::Formatter::pad::haa777c0a9492680f+0x228> @ imm = #144
-    1e3e:      	movs	r2, #0
-    1e40:      	b	0x1ed0 <core::fmt::Formatter::pad::haa777c0a9492680f+0x228> @ imm = #140
-    1e42:      	str	r3, [sp, #20]
-    1e44:      	str	r6, [sp, #24]
-    1e46:      	mov	r0, r2
-    1e48:      	bics	r0, r5
-    1e4a:      	rsbs	r6, r0, #0
-    1e4c:      	movs	r2, #0
-    1e4e:      	str	r2, [sp, #40]
-    1e50:      	mov	r4, r1
-    1e52:      	mov	r1, r5
-    1e54:      	b	0x1e5c <core::fmt::Formatter::pad::haa777c0a9492680f+0x1b4> @ imm = #4
-    1e56:      	adds	r4, r4, #4
-    1e58:      	adds	r6, r6, #4
-    1e5a:      	beq	0x1e9e <core::fmt::Formatter::pad::haa777c0a9492680f+0x1f6> @ imm = #64
-    1e5c:      	movs	r3, #1
-    1e5e:      	ldr	r0, [sp, #40]
-    1e60:      	ldrsb	r5, [r4, r0]
-    1e62:      	movs	r0, #64
-    1e64:      	mvns	r0, r0
-    1e66:      	cmp	r5, r0
-    1e68:      	bgt	0x1e80 <core::fmt::Formatter::pad::haa777c0a9492680f+0x1d8> @ imm = #20
-    1e6a:      	ldrsb	r3, [r4, r3]
-    1e6c:      	cmp	r3, r0
-    1e6e:      	bgt	0x1e88 <core::fmt::Formatter::pad::haa777c0a9492680f+0x1e0> @ imm = #22
-    1e70:      	movs	r3, #2
-    1e72:      	ldrsb	r3, [r4, r3]
-    1e74:      	cmp	r3, r0
-    1e76:      	bgt	0x1e92 <core::fmt::Formatter::pad::haa777c0a9492680f+0x1ea> @ imm = #24
-    1e78:      	ldrsb	r3, [r4, r1]
-    1e7a:      	cmp	r3, r0
-    1e7c:      	ble	0x1e56 <core::fmt::Formatter::pad::haa777c0a9492680f+0x1ae> @ imm = #-42
-    1e7e:      	b	0x1e9a <core::fmt::Formatter::pad::haa777c0a9492680f+0x1f2> @ imm = #24
-    1e80:      	adds	r2, r2, #1
-    1e82:      	ldrsb	r3, [r4, r3]
-    1e84:      	cmp	r3, r0
-    1e86:      	ble	0x1e70 <core::fmt::Formatter::pad::haa777c0a9492680f+0x1c8> @ imm = #-26
-    1e88:      	adds	r2, r2, #1
-    1e8a:      	movs	r3, #2
-    1e8c:      	ldrsb	r3, [r4, r3]
-    1e8e:      	cmp	r3, r0
-    1e90:      	ble	0x1e78 <core::fmt::Formatter::pad::haa777c0a9492680f+0x1d0> @ imm = #-28
-    1e92:      	adds	r2, r2, #1
-    1e94:      	ldrsb	r3, [r4, r1]
-    1e96:      	cmp	r3, r0
-    1e98:      	ble	0x1e56 <core::fmt::Formatter::pad::haa777c0a9492680f+0x1ae> @ imm = #-70
-    1e9a:      	adds	r2, r2, #1
-    1e9c:      	b	0x1e56 <core::fmt::Formatter::pad::haa777c0a9492680f+0x1ae> @ imm = #-74
-    1e9e:      	ldr	r6, [sp, #24]
-    1ea0:      	ldr	r3, [sp, #20]
-    1ea2:      	cmp	r3, #0
-    1ea4:      	beq	0x1ed0 <core::fmt::Formatter::pad::haa777c0a9492680f+0x228> @ imm = #40
-    1ea6:      	movs	r0, #0
-    1ea8:      	ldrsb	r1, [r4, r0]
-    1eaa:      	movs	r0, #64
-    1eac:      	mvns	r0, r0
-    1eae:      	cmp	r1, r0
-    1eb0:      	ble	0x1eb4 <core::fmt::Formatter::pad::haa777c0a9492680f+0x20c> @ imm = #0
-    1eb2:      	adds	r2, r2, #1
-    1eb4:      	cmp	r3, #1
-    1eb6:      	beq	0x1ed0 <core::fmt::Formatter::pad::haa777c0a9492680f+0x228> @ imm = #22
-    1eb8:      	movs	r1, #1
-    1eba:      	ldrsb	r1, [r4, r1]
-    1ebc:      	cmp	r1, r0
-    1ebe:      	ble	0x1ec2 <core::fmt::Formatter::pad::haa777c0a9492680f+0x21a> @ imm = #0
-    1ec0:      	adds	r2, r2, #1
-    1ec2:      	cmp	r3, #2
-    1ec4:      	beq	0x1ed0 <core::fmt::Formatter::pad::haa777c0a9492680f+0x228> @ imm = #8
-    1ec6:      	movs	r1, #2
-    1ec8:      	ldrsb	r1, [r4, r1]
-    1eca:      	cmp	r1, r0
-    1ecc:      	ble	0x1ed0 <core::fmt::Formatter::pad::haa777c0a9492680f+0x228> @ imm = #0
-    1ece:      	adds	r2, r2, #1
-    1ed0:      	cmp	r6, r2
-    1ed2:      	bls	0x1ef4 <core::fmt::Formatter::pad::haa777c0a9492680f+0x24c> @ imm = #30
-    1ed4:      	movs	r0, #32
-    1ed6:      	ldr	r4, [sp, #36]
-    1ed8:      	ldrb	r0, [r4, r0]
-    1eda:      	movs	r1, #0
-    1edc:      	cmp	r0, #3
-    1ede:      	mov	r3, r1
-    1ee0:      	beq	0x1ee4 <core::fmt::Formatter::pad::haa777c0a9492680f+0x23c> @ imm = #0
-    1ee2:      	mov	r3, r0
-    1ee4:      	subs	r0, r6, r2
-    1ee6:      	lsls	r2, r3, #30
-    1ee8:      	beq	0x1f2a <core::fmt::Formatter::pad::haa777c0a9492680f+0x282> @ imm = #62
-    1eea:      	cmp	r3, #1
-    1eec:      	bne	0x1f24 <core::fmt::Formatter::pad::haa777c0a9492680f+0x27c> @ imm = #52
-    1eee:      	movs	r1, #0
-    1ef0:      	str	r1, [sp, #24]
-    1ef2:      	b	0x1f2e <core::fmt::Formatter::pad::haa777c0a9492680f+0x286> @ imm = #56
-    1ef4:      	ldr	r0, [sp, #36]
-    1ef6:      	ldr	r1, [r0, #24]
-    1ef8:      	ldr	r0, [r0, #28]
-    1efa:      	ldr	r3, [r0, #12]
-    1efc:      	mov	r0, r1
-    1efe:      	ldr	r1, [sp, #28]
-    1f00:      	ldr	r2, [sp, #32]
-    1f02:      	b	0x1f1a <core::fmt::Formatter::pad::haa777c0a9492680f+0x272> @ imm = #20
-    1f04:      	mov	r2, r3
-    1f06:      	cmp	r0, #0
-    1f08:      	ldr	r3, [sp, #36]
-    1f0a:      	ldr	r4, [sp, #16]
-    1f0c:      	beq	0x1e1a <core::fmt::Formatter::pad::haa777c0a9492680f+0x172> @ imm = #-246
-    1f0e:      	mov	r1, r0
-    1f10:      	cmp	r4, #1
-    1f12:      	beq	0x1e1e <core::fmt::Formatter::pad::haa777c0a9492680f+0x176> @ imm = #-248
-    1f14:      	ldr	r0, [r3, #24]
-    1f16:      	ldr	r3, [r3, #28]
-    1f18:      	ldr	r3, [r3, #12]
-    1f1a:      	blx	r3
-    1f1c:      	mov	r5, r0
-    1f1e:      	mov	r0, r5
-    1f20:      	add	sp, #44
-    1f22:      	pop	{r4, r5, r6, r7, pc}
-    1f24:      	lsrs	r1, r0, #1
-    1f26:      	adds	r0, r0, #1
-    1f28:      	lsrs	r0, r0, #1
-    1f2a:      	str	r0, [sp, #24]
-    1f2c:      	mov	r0, r1
-    1f2e:      	adds	r5, r0, #1
-    1f30:      	ldr	r6, [r4, #4]
-    1f32:      	ldr	r0, [r4, #24]
-    1f34:      	str	r0, [sp, #40]
-    1f36:      	ldr	r4, [r4, #28]
-    1f38:      	subs	r5, r5, #1
-    1f3a:      	beq	0x1f50 <core::fmt::Formatter::pad::haa777c0a9492680f+0x2a8> @ imm = #18
-    1f3c:      	ldr	r2, [r4, #16]
-    1f3e:      	ldr	r0, [sp, #40]
-    1f40:      	mov	r1, r6
-    1f42:      	blx	r2
-    1f44:      	cmp	r0, #0
-    1f46:      	beq	0x1f38 <core::fmt::Formatter::pad::haa777c0a9492680f+0x290> @ imm = #-18
-    1f48:      	movs	r5, #1
-    1f4a:      	mov	r0, r5
-    1f4c:      	add	sp, #44
-    1f4e:      	pop	{r4, r5, r6, r7, pc}
-    1f50:      	movs	r0, #17
-    1f52:      	lsls	r2, r0, #16
-    1f54:      	cmp	r6, r2
-    1f56:      	bne	0x1f5c <core::fmt::Formatter::pad::haa777c0a9492680f+0x2b4> @ imm = #2
-    1f58:      	movs	r1, #0
-    1f5a:      	str	r1, [sp, #24]
-    1f5c:      	ldr	r0, [sp, #40]
-    1f5e:      	mov	r1, r4
-    1f60:      	movs	r5, #1
-    1f62:      	cmp	r6, r2
-    1f64:      	beq	0x1f1e <core::fmt::Formatter::pad::haa777c0a9492680f+0x276> @ imm = #-74
-    1f66:      	ldr	r3, [r1, #12]
-    1f68:      	ldr	r1, [sp, #28]
-    1f6a:      	ldr	r2, [sp, #32]
-    1f6c:      	blx	r3
-    1f6e:      	cmp	r0, #0
-    1f70:      	bne	0x1f1e <core::fmt::Formatter::pad::haa777c0a9492680f+0x276> @ imm = #-86
-    1f72:      	movs	r5, #0
-    1f74:      	ldr	r1, [sp, #24]
-    1f76:      	cmp	r1, r5
-    1f78:      	beq	0x1f8e <core::fmt::Formatter::pad::haa777c0a9492680f+0x2e6> @ imm = #18
-    1f7a:      	ldr	r2, [r4, #16]
-    1f7c:      	ldr	r0, [sp, #40]
-    1f7e:      	mov	r1, r6
-    1f80:      	blx	r2
-    1f82:      	adds	r5, r5, #1
-    1f84:      	cmp	r0, #0
-    1f86:      	beq	0x1f74 <core::fmt::Formatter::pad::haa777c0a9492680f+0x2cc> @ imm = #-22
-    1f88:      	subs	r0, r5, #1
-    1f8a:      	ldr	r1, [sp, #24]
-    1f8c:      	b	0x1f90 <core::fmt::Formatter::pad::haa777c0a9492680f+0x2e8> @ imm = #0
-    1f8e:      	mov	r0, r1
-    1f90:      	cmp	r0, r1
-    1f92:      	blo	0x1f48 <core::fmt::Formatter::pad::haa777c0a9492680f+0x2a0> @ imm = #-78
-    1f94:      	movs	r5, #0
-    1f96:      	mov	r0, r5
-    1f98:      	add	sp, #44
-    1f9a:      	pop	{r4, r5, r6, r7, pc}
-
-00001f9c <<core::fmt::Formatter as core::fmt::Write>::write_str::h5daf2d485e2f455c>:
-    1f9c:      	push	{r4, r6, r7, lr}
-    1f9e:      	add	r7, sp, #8
-    1fa0:      	ldr	r3, [r0, #24]
-    1fa2:      	ldr	r0, [r0, #28]
-    1fa4:      	ldr	r4, [r0, #12]
-    1fa6:      	mov	r0, r3
-    1fa8:      	blx	r4
-    1faa:      	pop	{r4, r6, r7, pc}
-
-00001fac <core::fmt::Formatter::debug_tuple::ha4e1a3ea9953bf09>:
-    1fac:      	push	{r4, r5, r6, r7, lr}
-    1fae:      	add	r7, sp, #12
-    1fb0:      	sub	sp, #4
-    1fb2:      	mov	r5, r3
-    1fb4:      	mov	r6, r1
-    1fb6:      	mov	r4, r0
-    1fb8:      	ldr	r0, [r1, #24]
-    1fba:      	ldr	r1, [r1, #28]
-    1fbc:      	ldr	r3, [r1, #12]
-    1fbe:      	mov	r1, r2
-    1fc0:      	mov	r2, r5
-    1fc2:      	blx	r3
-    1fc4:      	strb	r0, [r4, #8]
-    1fc6:      	str	r6, [r4]
-    1fc8:      	rsbs	r0, r5, #0
-    1fca:      	adcs	r0, r5
-    1fcc:      	strb	r0, [r4, #9]
-    1fce:      	movs	r0, #0
-    1fd0:      	str	r0, [r4, #4]
-    1fd2:      	add	sp, #4
-    1fd4:      	pop	{r4, r5, r6, r7, pc}
-    1fd6:      	bmi	0x1f82 <core::fmt::Formatter::pad::haa777c0a9492680f+0x2da> @ imm = #-88
-
-00001fd8 <<char as core::fmt::Debug>::fmt::hb4dfd653beebf513>:
-    1fd8:      	push	{r4, r5, r6, r7, lr}
-    1fda:      	add	r7, sp, #12
-    1fdc:      	sub	sp, #28
-    1fde:      	mov	r6, r0
-    1fe0:      	ldr	r0, [r1, #24]
-    1fe2:      	ldr	r1, [r1, #28]
-    1fe4:      	ldr	r2, [r1, #16]
-    1fe6:      	movs	r1, #39
-    1fe8:      	str	r0, [sp, #20]
-    1fea:      	str	r2, [sp, #16]
-    1fec:      	blx	r2
-    1fee:      	movs	r1, #1
-    1ff0:      	cmp	r0, #0
-    1ff2:      	beq	0x1ff6 <<char as core::fmt::Debug>::fmt::hb4dfd653beebf513+0x1e> @ imm = #0
-    1ff4:      	b	0x21a6 <$t.401+0x90>    @ imm = #430
-    1ff6:      	ldr	r5, [r6]
-    1ff8:      	mov	r0, r5
-    1ffa:      	subs	r0, #9
-    1ffc:      	movs	r4, #2
-    1ffe:      	cmp	r0, #30
-    2000:      	str	r1, [sp]
-    2002:      	bhi	0x2090 <$t.397+0x4>     @ imm = #138
-    2004:      	movs	r1, #116
-    2006:      	str	r1, [sp, #24]
-    2008:      	lsls	r0, r0, #2
-    200a:      	adr	r1, #4 <<char as core::fmt::Debug>::fmt::hb4dfd653beebf513+0x37>
-    200c:      	ldr	r0, [r1, r0]
-    200e:      	mov	pc, r0
-
-00002010 <$d.396>:
-    2010:	c9 20 00 00	.word	0x000020c9
-    2014:	8d 20 00 00	.word	0x0000208d
-    2018:	95 20 00 00	.word	0x00002095
-    201c:	95 20 00 00	.word	0x00002095
-    2020:	ad 20 00 00	.word	0x000020ad
-    2024:	95 20 00 00	.word	0x00002095
-    2028:	95 20 00 00	.word	0x00002095
-    202c:	95 20 00 00	.word	0x00002095
-    2030:	95 20 00 00	.word	0x00002095
-    2034:	95 20 00 00	.word	0x00002095
-    2038:	95 20 00 00	.word	0x00002095
-    203c:	95 20 00 00	.word	0x00002095
-    2040:	95 20 00 00	.word	0x00002095
-    2044:	95 20 00 00	.word	0x00002095
-    2048:	95 20 00 00	.word	0x00002095
-    204c:	95 20 00 00	.word	0x00002095
-    2050:	95 20 00 00	.word	0x00002095
-    2054:	95 20 00 00	.word	0x00002095
-    2058:	95 20 00 00	.word	0x00002095
-    205c:	95 20 00 00	.word	0x00002095
-    2060:	95 20 00 00	.word	0x00002095
-    2064:	95 20 00 00	.word	0x00002095
-    2068:	95 20 00 00	.word	0x00002095
-    206c:	95 20 00 00	.word	0x00002095
-    2070:	95 20 00 00	.word	0x00002095
-    2074:	95 20 00 00	.word	0x00002095
-    2078:	95 20 00 00	.word	0x00002095
-    207c:	95 20 00 00	.word	0x00002095
-    2080:	95 20 00 00	.word	0x00002095
-    2084:	95 20 00 00	.word	0x00002095
-    2088:	ab 20 00 00	.word	0x000020ab
-
-0000208c <$t.397>:
-    208c:      	movs	r0, #110
-    208e:      	b	0x20ae <$t.397+0x22>    @ imm = #28
-    2090:      	cmp	r5, #92
-    2092:      	beq	0x20aa <$t.397+0x1e>    @ imm = #20
-    2094:      	mov	r0, r5
-    2096:      	bl	0x2e60 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5> @ imm = #3526
-    209a:      	cmp	r0, #0
-    209c:      	bne	0x20b2 <$t.397+0x26>    @ imm = #18
-    209e:      	mov	r0, r5
-    20a0:      	bl	0x2684 <core::unicode::printable::is_printable::h6cdd76e17613ee9f> @ imm = #1504
-    20a4:      	cmp	r0, #0
-    20a6:      	beq	0x20b2 <$t.397+0x26>    @ imm = #8
-    20a8:      	movs	r4, #1
-    20aa:      	b	0x20c6 <$t.397+0x3a>    @ imm = #24
-    20ac:      	movs	r0, #114
-    20ae:      	str	r0, [sp, #24]
-    20b0:      	b	0x20c8 <$t.397+0x3c>    @ imm = #20
-    20b2:      	movs	r0, #1
-    20b4:      	orrs	r0, r5
-    20b6:      	bl	0x3258 <__clzsi2>       @ imm = #4510
-    20ba:      	lsrs	r0, r0, #2
-    20bc:      	movs	r1, #7
-    20be:      	eors	r1, r0
-    20c0:      	str	r1, [sp, #12]
-    20c2:      	movs	r6, #5
-    20c4:      	movs	r4, #3
-    20c6:      	str	r5, [sp, #24]
-    20c8:      	movs	r0, #255
-    20ca:      	mvns	r0, r0
-    20cc:      	str	r0, [sp, #8]
-    20ce:      	movs	r5, #0
-    20d0:      	mvns	r0, r5
-    20d2:      	str	r0, [sp, #4]
-    20d4:      	b	0x20e0 <$t.397+0x54>    @ imm = #8
-    20d6:      	ldr	r0, [sp, #20]
-    20d8:      	ldr	r2, [sp, #16]
-    20da:      	blx	r2
-    20dc:      	cmp	r0, #0
-    20de:      	bne	0x21a4 <$t.401+0x8e>    @ imm = #194
-    20e0:      	lsls	r0, r4, #2
-    20e2:      	adr	r1, #8 <$t.397+0x5c>
-    20e4:      	ldr	r0, [r1, r0]
-    20e6:      	mov	r4, r5
-    20e8:      	ldr	r1, [sp, #24]
-    20ea:      	mov	pc, r0
-
-000020ec <$d.398>:
-    20ec:	ad 21 00 00	.word	0x000021ad
-    20f0:	03 21 00 00	.word	0x00002103
-    20f4:	fd 20 00 00	.word	0x000020fd
-    20f8:	05 21 00 00	.word	0x00002105
-
-000020fc <$t.399>:
-    20fc:      	movs	r1, #92
-    20fe:      	movs	r4, #1
-    2100:      	b	0x20d6 <$t.397+0x4a>    @ imm = #-46
-    2102:      	b	0x20d6 <$t.397+0x4a>    @ imm = #-48
-    2104:      	uxtb	r0, r6
-    2106:      	mov	r8, r8
-    2108:      	add	r0, pc
-    210a:      	ldrb	r0, [r0, #4]
-    210c:      	lsls	r0, r0, #1
-    210e:      	add	pc, r0
-
-00002110 <$d.400>:
-    2110:	4d 02 0b 1c	.word	0x1c0b024d
-    2114:	27 31		.short	0x3127
-
-00002116 <$t.401>:
-    2116:      	ldr	r0, [sp, #12]
-    2118:      	ldr	r1, [sp, #4]
-    211a:      	ands	r0, r1
-    211c:      	str	r0, [sp, #12]
-    211e:      	ldr	r0, [sp, #8]
-    2120:      	ands	r6, r0
-    2122:      	movs	r1, #125
-    2124:      	movs	r4, #3
-    2126:      	b	0x20d6 <$t.397+0x4a>    @ imm = #-84
-    2128:      	ldr	r2, [sp, #12]
-    212a:      	lsls	r0, r2, #29
-    212c:      	lsrs	r0, r0, #27
-    212e:      	ldr	r1, [sp, #24]
-    2130:      	lsrs	r1, r0
-    2132:      	movs	r0, #15
-    2134:      	ands	r0, r1
-    2136:      	cmp	r0, #10
-    2138:      	blo	0x218a <$t.401+0x74>    @ imm = #78
-    213a:      	movs	r1, #87
-    213c:      	adds	r1, r1, r0
-    213e:      	cmp	r2, #0
-    2140:      	beq	0x2192 <$t.401+0x7c>    @ imm = #78
-    2142:      	subs	r2, r2, #1
-    2144:      	str	r2, [sp, #12]
-    2146:      	movs	r4, #3
-    2148:      	b	0x20d6 <$t.397+0x4a>    @ imm = #-118
-    214a:      	ldr	r0, [sp, #12]
-    214c:      	ldr	r1, [sp, #4]
-    214e:      	ands	r0, r1
-    2150:      	str	r0, [sp, #12]
-    2152:      	ldr	r0, [sp, #8]
-    2154:      	ands	r6, r0
-    2156:      	movs	r0, #2
-    2158:      	orrs	r6, r0
-    215a:      	movs	r1, #123
-    215c:      	movs	r4, #3
-    215e:      	b	0x20d6 <$t.397+0x4a>    @ imm = #-140
-    2160:      	ldr	r0, [sp, #12]
-    2162:      	ldr	r1, [sp, #4]
-    2164:      	ands	r0, r1
-    2166:      	str	r0, [sp, #12]
-    2168:      	ldr	r0, [sp, #8]
-    216a:      	ands	r6, r0
-    216c:      	movs	r4, #3
-    216e:      	orrs	r6, r4
-    2170:      	movs	r1, #117
-    2172:      	b	0x20d6 <$t.397+0x4a>    @ imm = #-160
-    2174:      	ldr	r0, [sp, #12]
-    2176:      	ldr	r1, [sp, #4]
-    2178:      	ands	r0, r1
-    217a:      	str	r0, [sp, #12]
-    217c:      	ldr	r0, [sp, #8]
-    217e:      	ands	r6, r0
-    2180:      	movs	r0, #4
-    2182:      	orrs	r6, r0
-    2184:      	movs	r1, #92
-    2186:      	movs	r4, #3
-    2188:      	b	0x20d6 <$t.397+0x4a>    @ imm = #-182
-    218a:      	movs	r1, #48
-    218c:      	adds	r1, r1, r0
-    218e:      	cmp	r2, #0
-    2190:      	bne	0x2142 <$t.401+0x2c>    @ imm = #-82
-    2192:      	ldr	r0, [sp, #4]
-    2194:      	ands	r2, r0
-    2196:      	str	r2, [sp, #12]
-    2198:      	ldr	r0, [sp, #8]
-    219a:      	ands	r6, r0
-    219c:      	movs	r0, #1
-    219e:      	orrs	r6, r0
-    21a0:      	movs	r4, #3
-    21a2:      	b	0x20d6 <$t.397+0x4a>    @ imm = #-208
-    21a4:      	ldr	r1, [sp]
-    21a6:      	mov	r0, r1
-    21a8:      	add	sp, #28
-    21aa:      	pop	{r4, r5, r6, r7, pc}
-    21ac:      	movs	r1, #39
-    21ae:      	ldr	r0, [sp, #20]
-    21b0:      	ldr	r2, [sp, #16]
-    21b2:      	blx	r2
-    21b4:      	mov	r1, r0
-    21b6:      	mov	r0, r1
-    21b8:      	add	sp, #28
-    21ba:      	pop	{r4, r5, r6, r7, pc}
-
-000021bc <core::slice::index::slice_start_index_len_fail::h3080a8211123744d>:
-    21bc:      	push	{r7, lr}
-    21be:      	add	r7, sp, #0
-    21c0:      	sub	sp, #48
-    21c2:      	str	r1, [sp, #4]
-    21c4:      	str	r0, [sp]
-    21c6:      	movs	r0, #2
-    21c8:      	str	r0, [sp, #28]
-    21ca:      	add	r1, sp, #32
-    21cc:      	str	r1, [sp, #24]
-    21ce:      	movs	r1, #0
-    21d0:      	str	r1, [sp, #20]
-    21d2:      	str	r1, [sp, #16]
-    21d4:      	str	r0, [sp, #12]
-    21d6:      	ldr	r0, [pc, #28] <$d.427+0x2>
-    21d8:      	str	r0, [sp, #8]
-    21da:      	ldr	r0, [pc, #28] <$d.427+0x6>
-    21dc:      	str	r0, [sp, #44]
-    21de:      	add	r1, sp, #4
-    21e0:      	str	r1, [sp, #40]
-    21e2:      	str	r0, [sp, #36]
-    21e4:      	mov	r0, sp
-    21e6:      	str	r0, [sp, #32]
-    21e8:      	add	r0, sp, #8
-    21ea:      	mov	r1, r2
-    21ec:      	bl	0x11c4 <core::panicking::panic_fmt::h884220a03f3bce26> @ imm = #-4140
-    21f0:      	trap
-    21f2:      	mov	r8, r8
-
-000021f4 <$d.427>:
-    21f4:	e4 39 00 00	.word	0x000039e4
-    21f8:	11 2d 00 00	.word	0x00002d11
-
-000021fc <core::slice::index::slice_end_index_len_fail::h4968a5fa708ed4f2>:
-    21fc:      	push	{r7, lr}
-    21fe:      	add	r7, sp, #0
-    2200:      	sub	sp, #48
-    2202:      	str	r1, [sp, #4]
-    2204:      	str	r0, [sp]
-    2206:      	movs	r0, #2
-    2208:      	str	r0, [sp, #28]
-    220a:      	add	r1, sp, #32
-    220c:      	str	r1, [sp, #24]
-    220e:      	movs	r1, #0
-    2210:      	str	r1, [sp, #20]
-    2212:      	str	r1, [sp, #16]
-    2214:      	str	r0, [sp, #12]
-    2216:      	ldr	r0, [pc, #28] <$d.429+0x2>
-    2218:      	str	r0, [sp, #8]
-    221a:      	ldr	r0, [pc, #28] <$d.429+0x6>
-    221c:      	str	r0, [sp, #44]
-    221e:      	add	r1, sp, #4
-    2220:      	str	r1, [sp, #40]
-    2222:      	str	r0, [sp, #36]
-    2224:      	mov	r0, sp
-    2226:      	str	r0, [sp, #32]
-    2228:      	add	r0, sp, #8
-    222a:      	mov	r1, r2
-    222c:      	bl	0x11c4 <core::panicking::panic_fmt::h884220a03f3bce26> @ imm = #-4204
-    2230:      	trap
-    2232:      	mov	r8, r8
-
-00002234 <$d.429>:
-    2234:	f4 39 00 00	.word	0x000039f4
-    2238:	11 2d 00 00	.word	0x00002d11
-
-0000223c <core::slice::index::slice_index_order_fail::h35619d5607b7eea8>:
-    223c:      	push	{r7, lr}
-    223e:      	add	r7, sp, #0
-    2240:      	sub	sp, #48
-    2242:      	str	r1, [sp, #4]
-    2244:      	str	r0, [sp]
-    2246:      	movs	r0, #2
-    2248:      	str	r0, [sp, #28]
-    224a:      	add	r1, sp, #32
-    224c:      	str	r1, [sp, #24]
-    224e:      	movs	r1, #0
-    2250:      	str	r1, [sp, #20]
-    2252:      	str	r1, [sp, #16]
-    2254:      	str	r0, [sp, #12]
-    2256:      	ldr	r0, [pc, #28] <$d.431+0x2>
-    2258:      	str	r0, [sp, #8]
-    225a:      	ldr	r0, [pc, #28] <$d.431+0x6>
-    225c:      	str	r0, [sp, #44]
-    225e:      	add	r1, sp, #4
-    2260:      	str	r1, [sp, #40]
-    2262:      	str	r0, [sp, #36]
-    2264:      	mov	r0, sp
-    2266:      	str	r0, [sp, #32]
-    2268:      	add	r0, sp, #8
-    226a:      	mov	r1, r2
-    226c:      	bl	0x11c4 <core::panicking::panic_fmt::h884220a03f3bce26> @ imm = #-4268
-    2270:      	trap
-    2272:      	mov	r8, r8
-
-00002274 <$d.431>:
-    2274:	28 3a 00 00	.word	0x00003a28
-    2278:	11 2d 00 00	.word	0x00002d11
-
-0000227c <core::str::slice_error_fail::h26c332087be94791>:
-    227c:      	push	{r7, lr}
-    227e:      	add	r7, sp, #0
-    2280:      	sub	sp, #128
-    2282:      	str	r3, [sp, #28]
-    2284:      	str	r2, [sp, #24]
-    2286:      	movs	r5, #1
-    2288:      	lsls	r6, r5, #8
-    228a:      	adds	r4, r6, #1
-    228c:      	cmp	r1, r4
-    228e:      	bhs	0x22a6 <core::str::slice_error_fail::h26c332087be94791+0x2a> @ imm = #20
-    2290:      	str	r1, [sp, #36]
-    2292:      	str	r0, [sp, #32]
-    2294:      	ldr	r4, [pc, #968] <$d.487+0x8>
-    2296:      	str	r4, [sp, #40]
-    2298:      	movs	r6, #0
-    229a:      	ldr	r4, [r7, #8]
-    229c:      	str	r6, [sp, #44]
-    229e:      	cmp	r2, r1
-    22a0:      	bhi	0x22a4 <core::str::slice_error_fail::h26c332087be94791+0x28> @ imm = #0
-    22a2:      	b	0x2474 <core::str::slice_error_fail::h26c332087be94791+0x1f8> @ imm = #462
-    22a4:      	b	0x24ac <core::str::slice_error_fail::h26c332087be94791+0x230> @ imm = #516
-    22a6:      	str	r2, [sp, #12]
-    22a8:      	str	r5, [sp, #16]
-    22aa:      	movs	r4, #0
-    22ac:      	str	r0, [sp, #20]
-    22ae:      	adds	r5, r0, r4
-    22b0:      	mov	r0, r6
-    22b2:      	ldrsb	r2, [r5, r6]
-    22b4:      	movs	r6, #64
-    22b6:      	mvns	r6, r6
-    22b8:      	cmp	r2, r6
-    22ba:      	ble	0x22be <core::str::slice_error_fail::h26c332087be94791+0x42> @ imm = #0
-    22bc:      	b	0x23c8 <core::str::slice_error_fail::h26c332087be94791+0x14c> @ imm = #264
-    22be:      	movs	r2, #255
-    22c0:      	ldrsb	r2, [r5, r2]
-    22c2:      	cmp	r2, r6
-    22c4:      	ble	0x22c8 <core::str::slice_error_fail::h26c332087be94791+0x4c> @ imm = #0
-    22c6:      	b	0x23cc <core::str::slice_error_fail::h26c332087be94791+0x150> @ imm = #258
-    22c8:      	movs	r2, #254
-    22ca:      	ldrsb	r2, [r5, r2]
-    22cc:      	cmp	r2, r6
-    22ce:      	bgt	0x23d0 <core::str::slice_error_fail::h26c332087be94791+0x154> @ imm = #254
-    22d0:      	movs	r2, #253
-    22d2:      	ldrsb	r2, [r5, r2]
-    22d4:      	cmp	r2, r6
-    22d6:      	bgt	0x23d4 <core::str::slice_error_fail::h26c332087be94791+0x158> @ imm = #250
-    22d8:      	movs	r2, #252
-    22da:      	ldrsb	r2, [r5, r2]
-    22dc:      	cmp	r2, r6
-    22de:      	bgt	0x23d8 <core::str::slice_error_fail::h26c332087be94791+0x15c> @ imm = #246
-    22e0:      	movs	r2, #251
-    22e2:      	ldrsb	r2, [r5, r2]
-    22e4:      	cmp	r2, r6
-    22e6:      	bgt	0x23dc <core::str::slice_error_fail::h26c332087be94791+0x160> @ imm = #242
-    22e8:      	movs	r2, #250
-    22ea:      	ldrsb	r2, [r5, r2]
-    22ec:      	cmp	r2, r6
-    22ee:      	bgt	0x23e0 <core::str::slice_error_fail::h26c332087be94791+0x164> @ imm = #238
-    22f0:      	movs	r2, #249
-    22f2:      	ldrsb	r2, [r5, r2]
-    22f4:      	cmp	r2, r6
-    22f6:      	bgt	0x23e4 <core::str::slice_error_fail::h26c332087be94791+0x168> @ imm = #234
-    22f8:      	movs	r2, #248
-    22fa:      	ldrsb	r2, [r5, r2]
-    22fc:      	cmp	r2, r6
-    22fe:      	bgt	0x23e8 <core::str::slice_error_fail::h26c332087be94791+0x16c> @ imm = #230
-    2300:      	movs	r2, #247
-    2302:      	ldrsb	r2, [r5, r2]
-    2304:      	cmp	r2, r6
-    2306:      	bgt	0x23ec <core::str::slice_error_fail::h26c332087be94791+0x170> @ imm = #226
-    2308:      	movs	r2, #246
-    230a:      	ldrsb	r2, [r5, r2]
-    230c:      	cmp	r2, r6
-    230e:      	bgt	0x23f0 <core::str::slice_error_fail::h26c332087be94791+0x174> @ imm = #222
-    2310:      	movs	r2, #245
-    2312:      	ldrsb	r2, [r5, r2]
-    2314:      	cmp	r2, r6
-    2316:      	bgt	0x23f4 <core::str::slice_error_fail::h26c332087be94791+0x178> @ imm = #218
-    2318:      	movs	r2, #244
-    231a:      	ldrsb	r2, [r5, r2]
-    231c:      	cmp	r2, r6
-    231e:      	bgt	0x23f8 <core::str::slice_error_fail::h26c332087be94791+0x17c> @ imm = #214
-    2320:      	movs	r2, #243
-    2322:      	ldrsb	r2, [r5, r2]
-    2324:      	cmp	r2, r6
-    2326:      	bgt	0x23fc <core::str::slice_error_fail::h26c332087be94791+0x180> @ imm = #210
-    2328:      	movs	r2, #242
-    232a:      	ldrsb	r2, [r5, r2]
-    232c:      	cmp	r2, r6
-    232e:      	bgt	0x2400 <core::str::slice_error_fail::h26c332087be94791+0x184> @ imm = #206
-    2330:      	movs	r2, #241
-    2332:      	ldrsb	r2, [r5, r2]
-    2334:      	cmp	r2, r6
-    2336:      	bgt	0x2404 <core::str::slice_error_fail::h26c332087be94791+0x188> @ imm = #202
-    2338:      	movs	r2, #240
-    233a:      	ldrsb	r2, [r5, r2]
-    233c:      	cmp	r2, r6
-    233e:      	bgt	0x2408 <core::str::slice_error_fail::h26c332087be94791+0x18c> @ imm = #198
-    2340:      	movs	r2, #239
-    2342:      	ldrsb	r2, [r5, r2]
-    2344:      	cmp	r2, r6
-    2346:      	bgt	0x240c <core::str::slice_error_fail::h26c332087be94791+0x190> @ imm = #194
-    2348:      	movs	r2, #238
-    234a:      	ldrsb	r2, [r5, r2]
-    234c:      	cmp	r2, r6
-    234e:      	bgt	0x2410 <core::str::slice_error_fail::h26c332087be94791+0x194> @ imm = #190
-    2350:      	movs	r2, #237
-    2352:      	ldrsb	r2, [r5, r2]
-    2354:      	cmp	r2, r6
-    2356:      	bgt	0x2414 <core::str::slice_error_fail::h26c332087be94791+0x198> @ imm = #186
-    2358:      	movs	r2, #236
-    235a:      	ldrsb	r2, [r5, r2]
-    235c:      	cmp	r2, r6
-    235e:      	bgt	0x2418 <core::str::slice_error_fail::h26c332087be94791+0x19c> @ imm = #182
-    2360:      	movs	r2, #235
-    2362:      	ldrsb	r2, [r5, r2]
-    2364:      	cmp	r2, r6
-    2366:      	bgt	0x241c <core::str::slice_error_fail::h26c332087be94791+0x1a0> @ imm = #178
-    2368:      	movs	r2, #234
-    236a:      	ldrsb	r2, [r5, r2]
-    236c:      	cmp	r2, r6
-    236e:      	bgt	0x2420 <core::str::slice_error_fail::h26c332087be94791+0x1a4> @ imm = #174
-    2370:      	movs	r2, #233
-    2372:      	ldrsb	r2, [r5, r2]
-    2374:      	cmp	r2, r6
-    2376:      	bgt	0x2424 <core::str::slice_error_fail::h26c332087be94791+0x1a8> @ imm = #170
-    2378:      	movs	r2, #232
-    237a:      	ldrsb	r2, [r5, r2]
-    237c:      	cmp	r2, r6
-    237e:      	bgt	0x2428 <core::str::slice_error_fail::h26c332087be94791+0x1ac> @ imm = #166
-    2380:      	movs	r2, #231
-    2382:      	ldrsb	r2, [r5, r2]
-    2384:      	cmp	r2, r6
-    2386:      	bgt	0x242c <core::str::slice_error_fail::h26c332087be94791+0x1b0> @ imm = #162
-    2388:      	movs	r2, #230
-    238a:      	ldrsb	r2, [r5, r2]
-    238c:      	cmp	r2, r6
-    238e:      	bgt	0x2430 <core::str::slice_error_fail::h26c332087be94791+0x1b4> @ imm = #158
-    2390:      	movs	r2, #229
-    2392:      	ldrsb	r2, [r5, r2]
-    2394:      	cmp	r2, r6
-    2396:      	bgt	0x2434 <core::str::slice_error_fail::h26c332087be94791+0x1b8> @ imm = #154
-    2398:      	movs	r2, #228
-    239a:      	ldrsb	r2, [r5, r2]
-    239c:      	cmp	r2, r6
-    239e:      	bgt	0x2438 <core::str::slice_error_fail::h26c332087be94791+0x1bc> @ imm = #150
-    23a0:      	movs	r2, #227
-    23a2:      	ldrsb	r2, [r5, r2]
-    23a4:      	cmp	r2, r6
-    23a6:      	bgt	0x243c <core::str::slice_error_fail::h26c332087be94791+0x1c0> @ imm = #146
-    23a8:      	movs	r2, #226
-    23aa:      	ldrsb	r2, [r5, r2]
-    23ac:      	cmp	r2, r6
-    23ae:      	bgt	0x2440 <core::str::slice_error_fail::h26c332087be94791+0x1c4> @ imm = #142
-    23b0:      	movs	r2, #225
-    23b2:      	ldrsb	r2, [r5, r2]
-    23b4:      	cmp	r2, r6
-    23b6:      	bgt	0x2444 <core::str::slice_error_fail::h26c332087be94791+0x1c8> @ imm = #138
-    23b8:      	subs	r4, #32
-    23ba:      	mov	r6, r0
-    23bc:      	adds	r2, r4, r0
-    23be:      	ldr	r0, [sp, #20]
-    23c0:      	beq	0x23c4 <core::str::slice_error_fail::h26c332087be94791+0x148> @ imm = #0
-    23c2:      	b	0x22ae <core::str::slice_error_fail::h26c332087be94791+0x32> @ imm = #-280
-    23c4:      	movs	r2, #0
-    23c6:      	b	0x245e <core::str::slice_error_fail::h26c332087be94791+0x1e2> @ imm = #148
-    23c8:      	adds	r4, r4, r0
-    23ca:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #120
-    23cc:      	adds	r4, #255
-    23ce:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #116
-    23d0:      	adds	r4, #254
-    23d2:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #112
-    23d4:      	adds	r4, #253
-    23d6:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #108
-    23d8:      	adds	r4, #252
-    23da:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #104
-    23dc:      	adds	r4, #251
-    23de:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #100
-    23e0:      	adds	r4, #250
-    23e2:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #96
-    23e4:      	adds	r4, #249
-    23e6:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #92
-    23e8:      	adds	r4, #248
-    23ea:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #88
-    23ec:      	adds	r4, #247
-    23ee:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #84
-    23f0:      	adds	r4, #246
-    23f2:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #80
-    23f4:      	adds	r4, #245
-    23f6:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #76
-    23f8:      	adds	r4, #244
-    23fa:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #72
-    23fc:      	adds	r4, #243
-    23fe:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #68
-    2400:      	adds	r4, #242
-    2402:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #64
-    2404:      	adds	r4, #241
-    2406:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #60
-    2408:      	adds	r4, #240
-    240a:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #56
-    240c:      	adds	r4, #239
-    240e:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #52
-    2410:      	adds	r4, #238
-    2412:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #48
-    2414:      	adds	r4, #237
-    2416:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #44
-    2418:      	adds	r4, #236
-    241a:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #40
-    241c:      	adds	r4, #235
-    241e:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #36
-    2420:      	adds	r4, #234
-    2422:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #32
-    2424:      	adds	r4, #233
-    2426:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #28
-    2428:      	adds	r4, #232
-    242a:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #24
-    242c:      	adds	r4, #231
-    242e:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #20
-    2430:      	adds	r4, #230
-    2432:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #16
-    2434:      	adds	r4, #229
-    2436:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #12
-    2438:      	adds	r4, #228
-    243a:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #8
-    243c:      	adds	r4, #227
-    243e:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #4
-    2440:      	adds	r4, #226
-    2442:      	b	0x2446 <core::str::slice_error_fail::h26c332087be94791+0x1ca> @ imm = #0
-    2444:      	adds	r4, #225
-    2446:      	cmp	r4, r1
-    2448:      	bhs	0x2458 <core::str::slice_error_fail::h26c332087be94791+0x1dc> @ imm = #12
-    244a:      	ldr	r2, [sp, #20]
-    244c:      	ldrsb	r0, [r2, r4]
-    244e:      	cmp	r0, r6
-    2450:      	mov	r0, r2
-    2452:      	ble	0x24e8 <core::str::slice_error_fail::h26c332087be94791+0x26c> @ imm = #146
-    2454:      	mov	r2, r4
-    2456:      	b	0x245e <core::str::slice_error_fail::h26c332087be94791+0x1e2> @ imm = #4
-    2458:      	mov	r2, r1
-    245a:      	ldr	r0, [sp, #20]
-    245c:      	bne	0x24e8 <core::str::slice_error_fail::h26c332087be94791+0x26c> @ imm = #136
-    245e:      	str	r2, [sp, #36]
-    2460:      	str	r0, [sp, #32]
-    2462:      	ldr	r2, [pc, #504] <$d.487+0x6>
-    2464:      	str	r2, [sp, #40]
-    2466:      	movs	r6, #5
-    2468:      	ldr	r5, [sp, #16]
-    246a:      	ldr	r2, [sp, #12]
-    246c:      	ldr	r4, [r7, #8]
-    246e:      	str	r6, [sp, #44]
-    2470:      	cmp	r2, r1
-    2472:      	bhi	0x24ac <core::str::slice_error_fail::h26c332087be94791+0x230> @ imm = #54
-    2474:      	cmp	r3, r1
-    2476:      	bhi	0x24ac <core::str::slice_error_fail::h26c332087be94791+0x230> @ imm = #50
-    2478:      	cmp	r2, r3
-    247a:      	bls	0x24f6 <core::str::slice_error_fail::h26c332087be94791+0x27a> @ imm = #120
-    247c:      	movs	r0, #4
-    247e:      	str	r0, [sp, #84]
-    2480:      	add	r1, sp, #88
-    2482:      	str	r1, [sp, #80]
-    2484:      	movs	r1, #0
-    2486:      	str	r1, [sp, #76]
-    2488:      	str	r1, [sp, #72]
-    248a:      	str	r0, [sp, #68]
-    248c:      	ldr	r0, [pc, #492] <$d.487+0x24>
-    248e:      	str	r0, [sp, #64]
-    2490:      	ldr	r0, [pc, #468] <$d.487+0x10>
-    2492:      	str	r0, [sp, #116]
-    2494:      	add	r1, sp, #40
-    2496:      	str	r1, [sp, #112]
-    2498:      	str	r0, [sp, #108]
-    249a:      	add	r0, sp, #32
-    249c:      	str	r0, [sp, #104]
-    249e:      	ldr	r0, [pc, #468] <$d.487+0x1e>
-    24a0:      	str	r0, [sp, #100]
-    24a2:      	add	r1, sp, #28
-    24a4:      	str	r1, [sp, #96]
-    24a6:      	str	r0, [sp, #92]
-    24a8:      	add	r0, sp, #24
-    24aa:      	b	0x24dc <core::str::slice_error_fail::h26c332087be94791+0x260> @ imm = #46
-    24ac:      	cmp	r2, r1
-    24ae:      	bhi	0x24b2 <core::str::slice_error_fail::h26c332087be94791+0x236> @ imm = #0
-    24b0:      	mov	r2, r3
-    24b2:      	str	r2, [sp, #56]
-    24b4:      	movs	r0, #3
-    24b6:      	str	r0, [sp, #84]
-    24b8:      	add	r1, sp, #88
-    24ba:      	str	r1, [sp, #80]
-    24bc:      	movs	r1, #0
-    24be:      	str	r1, [sp, #76]
-    24c0:      	str	r1, [sp, #72]
-    24c2:      	str	r0, [sp, #68]
-    24c4:      	ldr	r0, [pc, #440] <$d.487+0x28>
-    24c6:      	str	r0, [sp, #64]
-    24c8:      	ldr	r0, [pc, #412] <$d.487+0x10>
-    24ca:      	str	r0, [sp, #108]
-    24cc:      	add	r1, sp, #40
-    24ce:      	str	r1, [sp, #104]
-    24d0:      	str	r0, [sp, #100]
-    24d2:      	add	r0, sp, #32
-    24d4:      	str	r0, [sp, #96]
-    24d6:      	ldr	r0, [pc, #412] <$d.487+0x1e>
-    24d8:      	str	r0, [sp, #92]
-    24da:      	add	r0, sp, #56
-    24dc:      	str	r0, [sp, #88]
-    24de:      	add	r0, sp, #64
-    24e0:      	mov	r1, r4
-    24e2:      	bl	0x11c4 <core::panicking::panic_fmt::h884220a03f3bce26> @ imm = #-4898
-    24e6:      	trap
-    24e8:      	ldr	r2, [pc, #364] <$d.487>
-    24ea:      	str	r2, [sp]
-    24ec:      	movs	r2, #0
-    24ee:      	mov	r3, r4
-    24f0:      	bl	0x227c <core::str::slice_error_fail::h26c332087be94791> @ imm = #-632
-    24f4:      	trap
-    24f6:      	cmp	r2, #0
-    24f8:      	bne	0x2512 <core::str::slice_error_fail::h26c332087be94791+0x296> @ imm = #22
-    24fa:      	str	r3, [sp, #48]
-    24fc:      	cmp	r3, #0
-    24fe:      	bne	0x2554 <core::str::slice_error_fail::h26c332087be94791+0x2d8> @ imm = #82
-    2500:      	movs	r3, #0
-    2502:      	cmp	r3, r1
-    2504:      	bne	0x252a <core::str::slice_error_fail::h26c332087be94791+0x2ae> @ imm = #34
-    2506:      	ldr	r0, [pc, #368] <$d.487+0x22>
-    2508:      	movs	r1, #43
-    250a:      	mov	r2, r4
-    250c:      	bl	0x1158 <core::panicking::panic::hd188a7f3102defa3> @ imm = #-5048
-    2510:      	trap
-    2512:      	cmp	r2, r1
-    2514:      	bhs	0x2542 <core::str::slice_error_fail::h26c332087be94791+0x2c6> @ imm = #42
-    2516:      	str	r4, [sp, #16]
-    2518:      	mov	r4, r2
-    251a:      	ldrsb	r6, [r0, r2]
-    251c:      	movs	r2, #64
-    251e:      	mvns	r2, r2
-    2520:      	cmp	r6, r2
-    2522:      	mov	r2, r4
-    2524:      	ldr	r4, [sp, #16]
-    2526:      	bgt	0x24fa <core::str::slice_error_fail::h26c332087be94791+0x27e> @ imm = #-48
-    2528:      	b	0x2546 <core::str::slice_error_fail::h26c332087be94791+0x2ca> @ imm = #26
-    252a:      	str	r5, [sp, #16]
-    252c:      	mov	r2, r0
-    252e:      	adds	r6, r0, r3
-    2530:      	movs	r0, #0
-    2532:      	str	r0, [sp, #12]
-    2534:      	ldrsb	r0, [r6, r0]
-    2536:      	uxtb	r5, r0
-    2538:      	cmp	r0, #0
-    253a:      	bmi	0x2572 <core::str::slice_error_fail::h26c332087be94791+0x2f6> @ imm = #52
-    253c:      	str	r5, [sp, #52]
-    253e:      	ldr	r5, [sp, #16]
-    2540:      	b	0x2616 <core::str::slice_error_fail::h26c332087be94791+0x39a> @ imm = #210
-    2542:      	cmp	r1, r2
-    2544:      	beq	0x24fa <core::str::slice_error_fail::h26c332087be94791+0x27e> @ imm = #-78
-    2546:      	str	r2, [sp, #48]
-    2548:      	mov	r3, r2
-    254a:      	b	0x2554 <core::str::slice_error_fail::h26c332087be94791+0x2d8> @ imm = #6
-    254c:      	cmp	r1, r3
-    254e:      	beq	0x2506 <core::str::slice_error_fail::h26c332087be94791+0x28a> @ imm = #-76
-    2550:      	subs	r3, r3, #1
-    2552:      	beq	0x2500 <core::str::slice_error_fail::h26c332087be94791+0x284> @ imm = #-86
-    2554:      	cmp	r3, r1
-    2556:      	bhs	0x254c <core::str::slice_error_fail::h26c332087be94791+0x2d0> @ imm = #-14
-    2558:      	ldrsb	r6, [r0, r3]
-    255a:      	movs	r2, #63
-    255c:      	mvns	r2, r2
-    255e:      	cmp	r6, r2
-    2560:      	blt	0x2550 <core::str::slice_error_fail::h26c332087be94791+0x2d4> @ imm = #-20
-    2562:      	cmp	r3, r1
-    2564:      	bhs	0x25a6 <core::str::slice_error_fail::h26c332087be94791+0x32a> @ imm = #62
-    2566:      	ldrsb	r6, [r0, r3]
-    2568:      	movs	r2, #64
-    256a:      	mvns	r2, r2
-    256c:      	cmp	r6, r2
-    256e:      	bgt	0x2502 <core::str::slice_error_fail::h26c332087be94791+0x286> @ imm = #-112
-    2570:      	b	0x25aa <core::str::slice_error_fail::h26c332087be94791+0x32e> @ imm = #54
-    2572:      	str	r5, [sp, #8]
-    2574:      	adds	r1, r2, r1
-    2576:      	adds	r0, r6, #1
-    2578:      	movs	r2, #31
-    257a:      	cmp	r0, r1
-    257c:      	mov	r0, r1
-    257e:      	beq	0x258a <core::str::slice_error_fail::h26c332087be94791+0x30e> @ imm = #8
-    2580:      	ldrb	r0, [r6, #1]
-    2582:      	movs	r5, #63
-    2584:      	ands	r5, r0
-    2586:      	str	r5, [sp, #12]
-    2588:      	adds	r0, r6, #2
-    258a:      	ldr	r5, [sp, #8]
-    258c:      	ands	r2, r5
-    258e:      	cmp	r5, #223
-    2590:      	bls	0x259c <core::str::slice_error_fail::h26c332087be94791+0x320> @ imm = #8
-    2592:      	cmp	r0, r1
-    2594:      	bne	0x25b6 <core::str::slice_error_fail::h26c332087be94791+0x33a> @ imm = #30
-    2596:      	movs	r6, #0
-    2598:      	str	r1, [sp, #20]
-    259a:      	b	0x25c0 <core::str::slice_error_fail::h26c332087be94791+0x344> @ imm = #34
-    259c:      	lsls	r0, r2, #6
-    259e:      	ldr	r1, [sp, #12]
-    25a0:      	adds	r0, r1, r0
-    25a2:      	ldr	r5, [sp, #16]
-    25a4:      	b	0x25fe <core::str::slice_error_fail::h26c332087be94791+0x382> @ imm = #86
-    25a6:      	cmp	r1, r3
-    25a8:      	beq	0x2506 <core::str::slice_error_fail::h26c332087be94791+0x28a> @ imm = #-166
-    25aa:      	str	r4, [sp]
-    25ac:      	mov	r2, r3
-    25ae:      	mov	r3, r1
-    25b0:      	bl	0x227c <core::str::slice_error_fail::h26c332087be94791> @ imm = #-824
-    25b4:      	trap
-    25b6:      	ldrb	r5, [r0]
-    25b8:      	movs	r6, #63
-    25ba:      	ands	r6, r5
-    25bc:      	adds	r0, r0, #1
-    25be:      	str	r0, [sp, #20]
-    25c0:      	ldr	r0, [sp, #12]
-    25c2:      	lsls	r0, r0, #6
-    25c4:      	adds	r0, r6, r0
-    25c6:      	ldr	r5, [sp, #8]
-    25c8:      	cmp	r5, #240
-    25ca:      	blo	0x25d6 <core::str::slice_error_fail::h26c332087be94791+0x35a> @ imm = #8
-    25cc:      	ldr	r5, [sp, #20]
-    25ce:      	cmp	r5, r1
-    25d0:      	bne	0x25de <core::str::slice_error_fail::h26c332087be94791+0x362> @ imm = #10
-    25d2:      	movs	r1, #0
-    25d4:      	b	0x25ea <core::str::slice_error_fail::h26c332087be94791+0x36e> @ imm = #18
-    25d6:      	lsls	r1, r2, #12
-    25d8:      	adds	r0, r0, r1
-    25da:      	ldr	r5, [sp, #16]
-    25dc:      	b	0x25fe <core::str::slice_error_fail::h26c332087be94791+0x382> @ imm = #30
-    25de:      	mov	r1, r5
-    25e0:      	mov	r5, r2
-    25e2:      	ldrb	r2, [r1]
-    25e4:      	movs	r1, #63
-    25e6:      	ands	r1, r2
-    25e8:      	mov	r2, r5
-    25ea:      	ldr	r5, [sp, #16]
-    25ec:      	lsls	r0, r0, #6
-    25ee:      	lsls	r2, r2, #29
-    25f0:      	lsrs	r2, r2, #11
-    25f2:      	adds	r0, r0, r2
-    25f4:      	adds	r0, r0, r1
-    25f6:      	movs	r1, #17
-    25f8:      	lsls	r1, r1, #16
-    25fa:      	cmp	r0, r1
-    25fc:      	beq	0x2506 <core::str::slice_error_fail::h26c332087be94791+0x28a> @ imm = #-250
-    25fe:      	str	r0, [sp, #52]
-    2600:      	cmp	r0, #128
-    2602:      	blo	0x2616 <core::str::slice_error_fail::h26c332087be94791+0x39a> @ imm = #16
-    2604:      	lsrs	r1, r0, #11
-    2606:      	bne	0x260c <core::str::slice_error_fail::h26c332087be94791+0x390> @ imm = #2
-    2608:      	movs	r5, #2
-    260a:      	b	0x2616 <core::str::slice_error_fail::h26c332087be94791+0x39a> @ imm = #8
-    260c:      	lsrs	r0, r0, #16
-    260e:      	beq	0x2614 <core::str::slice_error_fail::h26c332087be94791+0x398> @ imm = #2
-    2610:      	movs	r5, #4
-    2612:      	b	0x2616 <core::str::slice_error_fail::h26c332087be94791+0x39a> @ imm = #0
-    2614:      	movs	r5, #3
-    2616:      	str	r3, [sp, #56]
-    2618:      	adds	r0, r5, r3
-    261a:      	str	r0, [sp, #60]
-    261c:      	movs	r0, #5
-    261e:      	str	r0, [sp, #84]
-    2620:      	add	r1, sp, #88
-    2622:      	str	r1, [sp, #80]
-    2624:      	movs	r1, #0
-    2626:      	str	r1, [sp, #76]
-    2628:      	str	r1, [sp, #72]
-    262a:      	str	r0, [sp, #68]
-    262c:      	ldr	r0, [pc, #52] <$d.487+0xc>
-    262e:      	str	r0, [sp, #64]
-    2630:      	ldr	r0, [pc, #52] <$d.487+0x10>
-    2632:      	str	r0, [sp, #124]
-    2634:      	add	r1, sp, #40
-    2636:      	str	r1, [sp, #120]
-    2638:      	str	r0, [sp, #116]
-    263a:      	add	r0, sp, #32
-    263c:      	str	r0, [sp, #112]
-    263e:      	ldr	r0, [pc, #44] <$d.487+0x16>
-    2640:      	str	r0, [sp, #108]
-    2642:      	add	r0, sp, #56
-    2644:      	str	r0, [sp, #104]
-    2646:      	ldr	r0, [pc, #40] <$d.487+0x1a>
-    2648:      	str	r0, [sp, #100]
-    264a:      	add	r0, sp, #52
-    264c:      	str	r0, [sp, #96]
-    264e:      	ldr	r0, [pc, #36] <$d.487+0x1e>
-    2650:      	str	r0, [sp, #92]
-    2652:      	add	r0, sp, #48
-    2654:      	b	0x24dc <core::str::slice_error_fail::h26c332087be94791+0x260> @ imm = #-380
-    2656:      	mov	r8, r8
-
-00002658 <$d.487>:
-    2658:	64 3a 00 00	.word	0x00003a64
-    265c:	74 3a 00 00	.word	0x00003a74
-    2660:	98 37 00 00	.word	0x00003798
-    2664:	10 3b 00 00	.word	0x00003b10
-    2668:	19 2e 00 00	.word	0x00002e19
-    266c:	e5 0f 00 00	.word	0x00000fe5
-    2670:	d9 1f 00 00	.word	0x00001fd9
-    2674:	11 2d 00 00	.word	0x00002d11
-    2678:	a4 37 00 00	.word	0x000037a4
-    267c:	c4 3a 00 00	.word	0x00003ac4
-    2680:	9c 3a 00 00	.word	0x00003a9c
-
-00002684 <core::unicode::printable::is_printable::h6cdd76e17613ee9f>:
-    2684:      	push	{r4, r5, r6, r7, lr}
-    2686:      	add	r7, sp, #12
-    2688:      	sub	sp, #20
-    268a:      	mov	r6, r0
-    268c:      	lsrs	r0, r0, #16
-    268e:      	bne	0x2778 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xf4> @ imm = #230
-    2690:      	uxtb	r5, r6
-    2692:      	movs	r0, #9
-    2694:      	lsls	r0, r0, #5
-    2696:      	str	r0, [sp, #8]
-    2698:      	str	r6, [sp]
-    269a:      	lsrs	r0, r6, #8
-    269c:      	uxtb	r0, r0
-    269e:      	str	r0, [sp, #16]
-    26a0:      	ldr	r1, [pc, #684] <$d.527+0x48>
-    26a2:      	movs	r3, #0
-    26a4:      	movs	r0, #1
-    26a6:      	str	r0, [sp, #12]
-    26a8:      	b	0x26b0 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x2c> @ imm = #4
-    26aa:      	cmp	r0, #0
-    26ac:      	mov	r3, r6
-    26ae:      	bne	0x272c <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xa8> @ imm = #122
-    26b0:      	ldrb	r6, [r1, #1]
-    26b2:      	adds	r2, r3, r6
-    26b4:      	ldrb	r0, [r1]
-    26b6:      	adds	r1, r1, #2
-    26b8:      	ldr	r4, [sp, #16]
-    26ba:      	cmp	r0, r4
-    26bc:      	bne	0x270c <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x88> @ imm = #76
-    26be:      	cmp	r2, r3
-    26c0:      	bhs	0x26c4 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x40> @ imm = #0
-    26c2:      	b	0x28d6 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x252> @ imm = #528
-    26c4:      	str	r2, [sp, #4]
-    26c6:      	ldr	r0, [sp, #8]
-    26c8:      	cmp	r2, r0
-    26ca:      	bls	0x26ce <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x4a> @ imm = #0
-    26cc:      	b	0x28e2 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x25e> @ imm = #530
-    26ce:      	ldr	r0, [pc, #644] <$d.527+0x4e>
-    26d0:      	adds	r0, r0, r3
-    26d2:      	adds	r3, r0, r6
-    26d4:      	cmp	r6, #0
-    26d6:      	beq	0x2722 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x9e> @ imm = #72
-    26d8:      	ldrb	r4, [r0]
-    26da:      	movs	r2, #0
-    26dc:      	cmp	r4, r5
-    26de:      	beq	0x2770 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #142
-    26e0:      	adds	r4, r0, #1
-    26e2:      	cmp	r4, r3
-    26e4:      	beq	0x2722 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x9e> @ imm = #58
-    26e6:      	ldrb	r4, [r0, #1]
-    26e8:      	cmp	r4, r5
-    26ea:      	beq	0x2770 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #130
-    26ec:      	adds	r4, r0, #2
-    26ee:      	cmp	r4, r3
-    26f0:      	beq	0x2722 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x9e> @ imm = #46
-    26f2:      	ldrb	r4, [r0, #2]
-    26f4:      	cmp	r4, r5
-    26f6:      	beq	0x2770 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #118
-    26f8:      	adds	r4, r0, #3
-    26fa:      	cmp	r4, r3
-    26fc:      	beq	0x2722 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x9e> @ imm = #34
-    26fe:      	subs	r6, r6, #4
-    2700:      	adds	r4, r0, #4
-    2702:      	ldrb	r0, [r0, #3]
-    2704:      	cmp	r0, r5
-    2706:      	mov	r0, r4
-    2708:      	bne	0x26d4 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x50> @ imm = #-56
-    270a:      	b	0x2770 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #98
-    270c:      	mov	r6, r2
-    270e:      	ldr	r2, [pc, #576] <$d.527+0x4a>
-    2710:      	subs	r3, r1, r2
-    2712:      	subs	r3, #80
-    2714:      	rsbs	r2, r3, #0
-    2716:      	adcs	r2, r3
-    2718:      	cmp	r0, r4
-    271a:      	ldr	r0, [sp, #12]
-    271c:      	bhi	0x26aa <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x26> @ imm = #-118
-    271e:      	mov	r0, r2
-    2720:      	b	0x26aa <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x26> @ imm = #-122
-    2722:      	ldr	r0, [pc, #556] <$d.527+0x4a>
-    2724:      	adds	r0, #80
-    2726:      	cmp	r1, r0
-    2728:      	ldr	r3, [sp, #4]
-    272a:      	bne	0x26b0 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x2c> @ imm = #-126
-    272c:      	ldr	r0, [sp]
-    272e:      	uxth	r0, r0
-    2730:      	ldr	r1, [pc, #548] <$d.527+0x50>
-    2732:      	ldr	r2, [sp, #12]
-    2734:      	mov	r3, r1
-    2736:      	adds	r6, r3, #1
-    2738:      	ldrb	r4, [r3]
-    273a:      	sxtb	r5, r4
-    273c:      	cmp	r5, #0
-    273e:      	bmi	0x2748 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xc4> @ imm = #6
-    2740:      	mov	r3, r6
-    2742:      	subs	r0, r0, r4
-    2744:      	bpl	0x2762 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xde> @ imm = #26
-    2746:      	b	0x2770 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #38
-    2748:      	movs	r4, #255
-    274a:      	adds	r4, #48
-    274c:      	adds	r4, r1, r4
-    274e:      	cmp	r6, r4
-    2750:      	bne	0x2754 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xd0> @ imm = #0
-    2752:      	b	0x28fa <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x276> @ imm = #420
-    2754:      	ldrb	r4, [r3, #1]
-    2756:      	lsls	r5, r5, #25
-    2758:      	lsrs	r5, r5, #17
-    275a:      	adds	r4, r5, r4
-    275c:      	adds	r3, r3, #2
-    275e:      	subs	r0, r0, r4
-    2760:      	bmi	0x2770 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #12
-    2762:      	movs	r4, #1
-    2764:      	eors	r2, r4
-    2766:      	movs	r4, #255
-    2768:      	adds	r4, #48
-    276a:      	adds	r4, r1, r4
-    276c:      	cmp	r3, r4
-    276e:      	bne	0x2736 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xb2> @ imm = #-60
-    2770:      	movs	r0, #1
-    2772:      	ands	r0, r2
-    2774:      	add	sp, #20
-    2776:      	pop	{r4, r5, r6, r7, pc}
-    2778:      	lsrs	r0, r6, #17
-    277a:      	bne	0x2858 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x1d4> @ imm = #218
-    277c:      	uxtb	r5, r6
-    277e:      	str	r6, [sp]
-    2780:      	lsrs	r0, r6, #8
-    2782:      	uxtb	r0, r0
-    2784:      	str	r0, [sp, #12]
-    2786:      	ldr	r4, [pc, #432] <$d.527+0x32>
-    2788:      	movs	r1, #0
-    278a:      	movs	r2, #1
-    278c:      	str	r2, [sp, #8]
-    278e:      	b	0x2796 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x112> @ imm = #4
-    2790:      	cmp	r2, #0
-    2792:      	ldr	r4, [sp, #16]
-    2794:      	bne	0x2814 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x190> @ imm = #124
-    2796:      	mov	r3, r1
-    2798:      	ldrb	r0, [r4, #1]
-    279a:      	adds	r1, r1, r0
-    279c:      	ldrb	r2, [r4]
-    279e:      	adds	r4, r4, #2
-    27a0:      	ldr	r6, [sp, #12]
-    27a2:      	cmp	r2, r6
-    27a4:      	str	r4, [sp, #16]
-    27a6:      	bne	0x27f4 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x170> @ imm = #74
-    27a8:      	cmp	r1, r3
-    27aa:      	bhs	0x27ae <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x12a> @ imm = #0
-    27ac:      	b	0x28d8 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x254> @ imm = #296
-    27ae:      	str	r1, [sp, #4]
-    27b0:      	cmp	r1, #192
-    27b2:      	bls	0x27b6 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x132> @ imm = #0
-    27b4:      	b	0x28ee <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x26a> @ imm = #310
-    27b6:      	ldr	r1, [pc, #388] <$d.527+0x36>
-    27b8:      	adds	r6, r1, r3
-    27ba:      	adds	r3, r6, r0
-    27bc:      	cmp	r0, #0
-    27be:      	beq	0x2808 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x184> @ imm = #70
-    27c0:      	ldrb	r4, [r6]
-    27c2:      	movs	r2, #0
-    27c4:      	cmp	r4, r5
-    27c6:      	beq	0x2770 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #-90
-    27c8:      	adds	r4, r6, #1
-    27ca:      	cmp	r4, r3
-    27cc:      	beq	0x2808 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x184> @ imm = #56
-    27ce:      	ldrb	r4, [r6, #1]
-    27d0:      	cmp	r4, r5
-    27d2:      	beq	0x2770 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #-102
-    27d4:      	adds	r4, r6, #2
-    27d6:      	cmp	r4, r3
-    27d8:      	beq	0x2808 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x184> @ imm = #44
-    27da:      	ldrb	r4, [r6, #2]
-    27dc:      	cmp	r4, r5
-    27de:      	beq	0x2770 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #-114
-    27e0:      	adds	r4, r6, #3
-    27e2:      	cmp	r4, r3
-    27e4:      	beq	0x2808 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x184> @ imm = #32
-    27e6:      	subs	r0, r0, #4
-    27e8:      	adds	r4, r6, #4
-    27ea:      	ldrb	r6, [r6, #3]
-    27ec:      	cmp	r6, r5
-    27ee:      	mov	r6, r4
-    27f0:      	bne	0x27bc <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x138> @ imm = #-56
-    27f2:      	b	0x2770 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #-134
-    27f4:      	ldr	r0, [pc, #320] <$d.527+0x30>
-    27f6:      	subs	r3, r4, r0
-    27f8:      	subs	r3, #84
-    27fa:      	rsbs	r0, r3, #0
-    27fc:      	adcs	r0, r3
-    27fe:      	cmp	r2, r6
-    2800:      	ldr	r2, [sp, #8]
-    2802:      	bhi	0x2790 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x10c> @ imm = #-118
-    2804:      	mov	r2, r0
-    2806:      	b	0x2790 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x10c> @ imm = #-122
-    2808:      	ldr	r0, [pc, #300] <$d.527+0x30>
-    280a:      	adds	r0, #84
-    280c:      	ldr	r4, [sp, #16]
-    280e:      	cmp	r4, r0
-    2810:      	ldr	r1, [sp, #4]
-    2812:      	bne	0x2796 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x112> @ imm = #-128
-    2814:      	ldr	r0, [sp]
-    2816:      	uxth	r0, r0
-    2818:      	ldr	r1, [pc, #292] <$d.527+0x38>
-    281a:      	ldr	r2, [sp, #8]
-    281c:      	mov	r3, r1
-    281e:      	adds	r6, r3, #1
-    2820:      	ldrb	r4, [r3]
-    2822:      	sxtb	r5, r4
-    2824:      	cmp	r5, #0
-    2826:      	bmi	0x2830 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x1ac> @ imm = #6
-    2828:      	mov	r3, r6
-    282a:      	subs	r0, r0, r4
-    282c:      	bpl	0x2848 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x1c4> @ imm = #24
-    282e:      	b	0x2770 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #-194
-    2830:      	movs	r4, #219
-    2832:      	lsls	r4, r4, #1
-    2834:      	adds	r4, r1, r4
-    2836:      	cmp	r6, r4
-    2838:      	beq	0x28fa <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x276> @ imm = #190
-    283a:      	ldrb	r4, [r3, #1]
-    283c:      	lsls	r5, r5, #25
-    283e:      	lsrs	r5, r5, #17
-    2840:      	adds	r4, r5, r4
-    2842:      	adds	r3, r3, #2
-    2844:      	subs	r0, r0, r4
-    2846:      	bmi	0x2770 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #-218
-    2848:      	movs	r4, #1
-    284a:      	eors	r2, r4
-    284c:      	movs	r4, #219
-    284e:      	lsls	r4, r4, #1
-    2850:      	adds	r4, r1, r4
-    2852:      	cmp	r3, r4
-    2854:      	bne	0x281e <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x19a> @ imm = #-58
-    2856:      	b	0x2770 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0xec> @ imm = #-234
-    2858:      	ldr	r1, [pc, #172] <$d.527>
-    285a:      	mov	r0, r1
-    285c:      	adds	r0, #30
-    285e:      	ands	r0, r6
-    2860:      	ldr	r2, [pc, #168] <$d.527+0x4>
-    2862:      	subs	r0, r0, r2
-    2864:      	subs	r2, r0, #1
-    2866:      	sbcs	r0, r2
-    2868:      	ands	r1, r6
-    286a:      	ldr	r2, [pc, #164] <$d.527+0xa>
-    286c:      	subs	r2, r1, r2
-    286e:      	subs	r1, r2, #1
-    2870:      	sbcs	r2, r1
-    2872:      	ldr	r1, [pc, #160] <$d.527+0xe>
-    2874:      	adds	r4, r6, r1
-    2876:      	movs	r1, #1
-    2878:      	movs	r3, #0
-    287a:      	cmp	r4, #6
-    287c:      	mov	r4, r1
-    287e:      	bhi	0x2882 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x1fe> @ imm = #0
-    2880:      	mov	r4, r3
-    2882:      	ands	r2, r4
-    2884:      	ands	r2, r0
-    2886:      	ldr	r0, [pc, #144] <$d.527+0x12>
-    2888:      	adds	r0, r6, r0
-    288a:      	cmp	r0, #13
-    288c:      	mov	r0, r1
-    288e:      	bhi	0x2892 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x20e> @ imm = #0
-    2890:      	mov	r0, r3
-    2892:      	ands	r2, r0
-    2894:      	ldr	r0, [pc, #132] <$d.527+0x14>
-    2896:      	adds	r0, r6, r0
-    2898:      	ldr	r4, [pc, #132] <$d.527+0x18>
-    289a:      	cmp	r0, r4
-    289c:      	mov	r0, r1
-    289e:      	bhi	0x28a2 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x21e> @ imm = #0
-    28a0:      	mov	r0, r3
-    28a2:      	ands	r2, r0
-    28a4:      	ldr	r0, [pc, #124] <$d.527+0x1c>
-    28a6:      	adds	r0, r6, r0
-    28a8:      	ldr	r4, [pc, #124] <$d.527+0x20>
-    28aa:      	cmp	r0, r4
-    28ac:      	mov	r0, r1
-    28ae:      	bhi	0x28b2 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x22e> @ imm = #0
-    28b0:      	mov	r0, r3
-    28b2:      	ands	r2, r0
-    28b4:      	ldr	r0, [pc, #116] <$d.527+0x24>
-    28b6:      	adds	r0, r6, r0
-    28b8:      	ldr	r4, [pc, #116] <$d.527+0x28>
-    28ba:      	cmp	r0, r4
-    28bc:      	mov	r0, r1
-    28be:      	bhi	0x28c2 <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x23e> @ imm = #0
-    28c0:      	mov	r0, r3
-    28c2:      	ands	r2, r0
-    28c4:      	ldr	r0, [pc, #108] <$d.527+0x2c>
-    28c6:      	cmp	r6, r0
-    28c8:      	blo	0x28cc <core::unicode::printable::is_printable::h6cdd76e17613ee9f+0x248> @ imm = #0
-    28ca:      	mov	r1, r3
-    28cc:      	ands	r2, r1
-    28ce:      	movs	r0, #1
-    28d0:      	ands	r0, r2
-    28d2:      	add	sp, #20
-    28d4:      	pop	{r4, r5, r6, r7, pc}
-    28d6:      	mov	r1, r2
-    28d8:      	ldr	r2, [pc, #112] <$d.527+0x44>
-    28da:      	mov	r0, r3
-    28dc:      	bl	0x223c <core::slice::index::slice_index_order_fail::h35619d5607b7eea8> @ imm = #-1700
-    28e0:      	trap
-    28e2:      	ldr	r2, [pc, #104] <$d.527+0x46>
-    28e4:      	ldr	r0, [sp, #4]
-    28e6:      	ldr	r1, [sp, #8]
-    28e8:      	bl	0x21fc <core::slice::index::slice_end_index_len_fail::h4968a5fa708ed4f2> @ imm = #-1776
-    28ec:      	trap
-    28ee:      	movs	r1, #192
-    28f0:      	ldr	r2, [pc, #88] <$d.527+0x44>
-    28f2:      	ldr	r0, [sp, #4]
-    28f4:      	bl	0x21fc <core::slice::index::slice_end_index_len_fail::h4968a5fa708ed4f2> @ imm = #-1788
-    28f8:      	trap
-    28fa:      	ldr	r0, [pc, #72] <$d.527+0x3e>
-    28fc:      	movs	r1, #43
-    28fe:      	ldr	r2, [pc, #72] <$d.527+0x42>
-    2900:      	bl	0x1158 <core::panicking::panic::hd188a7f3102defa3> @ imm = #-6060
-    2904:      	trap
-    2906:      	mov	r8, r8
-
-00002908 <$d.527>:
-    2908:	e0 ff 1f 00	.word	0x001fffe0
-    290c:	1e b8 02 00	.word	0x0002b81e
-    2910:	e0 a6 02 00	.word	0x0002a6e0
-    2914:	c7 48 fd ff	.word	0xfffd48c7
-    2918:	5e 31 fd ff	.word	0xfffd315e
-    291c:	1f 14 fd ff	.word	0xfffd141f
-    2920:	1e 0c 00 00	.word	0x00000c1e
-    2924:	e2 05 fd ff	.word	0xfffd05e2
-    2928:	e1 05 00 00	.word	0x000005e1
-    292c:	b5 ec fc ff	.word	0xfffcecb5
-    2930:	b4 ed 0a 00	.word	0x000aedb4
-    2934:	f0 01 0e 00	.word	0x000e01f0
-    2938:	1f 3e 00 00	.word	0x00003e1f
-    293c:	73 3e 00 00	.word	0x00003e73
-    2940:	33 3f 00 00	.word	0x00003f33
-    2944:	a4 37 00 00	.word	0x000037a4
-    2948:	70 3b 00 00	.word	0x00003b70
-    294c:	60 3b 00 00	.word	0x00003b60
-    2950:	80 3b 00 00	.word	0x00003b80
-    2954:	d0 3b 00 00	.word	0x00003bd0
-    2958:	f0 3c 00 00	.word	0x00003cf0
-
-0000295c <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795>:
-    295c:      	push	{r4, r5, r6, r7, lr}
-    295e:      	add	r7, sp, #12
-    2960:      	sub	sp, #148
-    2962:      	mov	r6, r1
-    2964:      	ldr	r1, [r1]
-    2966:      	lsls	r2, r1, #27
-    2968:      	bmi	0x2a20 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0xc4> @ imm = #180
-    296a:      	lsls	r1, r1, #26
-    296c:      	bmi	0x2a68 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x10c> @ imm = #248
-    296e:      	str	r6, [sp, #8]
-    2970:      	ldr	r2, [r0]
-    2972:      	ldr	r4, [pc, #420] <$d.873+0xa>
-    2974:      	movs	r6, #39
-    2976:      	cmp	r2, r4
-    2978:      	bls	0x29d8 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x7c> @ imm = #92
-    297a:      	mov	r5, r2
-    297c:      	str	r6, [sp, #16]
-    297e:      	mov	r0, r5
-    2980:      	ldr	r1, [pc, #408] <$d.873+0xc>
-    2982:      	bl	0x2f8c <__aeabi_uidiv>  @ imm = #1542
-    2986:      	str	r0, [sp, #12]
-    2988:      	adds	r1, r4, #1
-    298a:      	muls	r1, r0, r1
-    298c:      	subs	r1, r5, r1
-    298e:      	uxth	r2, r1
-    2990:      	lsrs	r2, r2, #2
-    2992:      	ldr	r0, [pc, #396] <$d.873+0x12>
-    2994:      	muls	r2, r0, r2
-    2996:      	lsrs	r2, r2, #17
-    2998:      	lsls	r3, r2, #1
-    299a:      	ldr	r0, [pc, #392] <$d.873+0x16>
-    299c:      	ldrb	r0, [r0, r3]
-    299e:      	add	r4, sp, #20
-    29a0:      	adds	r4, r4, r6
-    29a2:      	subs	r6, r4, #4
-    29a4:      	strb	r0, [r6]
-    29a6:      	ldr	r0, [pc, #380] <$d.873+0x16>
-    29a8:      	adds	r0, r0, r3
-    29aa:      	ldrb	r0, [r0, #1]
-    29ac:      	strb	r0, [r6, #1]
-    29ae:      	ldr	r6, [sp, #16]
-    29b0:      	movs	r0, #100
-    29b2:      	muls	r0, r2, r0
-    29b4:      	subs	r0, r1, r0
-    29b6:      	uxth	r0, r0
-    29b8:      	lsls	r0, r0, #1
-    29ba:      	ldr	r2, [pc, #360] <$d.873+0x16>
-    29bc:      	ldrb	r1, [r2, r0]
-    29be:      	mov	r3, r2
-    29c0:      	subs	r2, r4, #2
-    29c2:      	ldr	r4, [pc, #340] <$d.873+0xa>
-    29c4:      	strb	r1, [r2]
-    29c6:      	adds	r0, r3, r0
-    29c8:      	ldrb	r0, [r0, #1]
-    29ca:      	strb	r0, [r2, #1]
-    29cc:      	ldr	r2, [sp, #12]
-    29ce:      	subs	r6, r6, #4
-    29d0:      	ldr	r0, [pc, #340] <$d.873+0x18>
-    29d2:      	cmp	r5, r0
-    29d4:      	mov	r5, r2
-    29d6:      	bhi	0x297c <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x20> @ imm = #-94
-    29d8:      	cmp	r2, #99
-    29da:      	bgt	0x29de <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x82> @ imm = #0
-    29dc:      	b	0x2ae4 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x188> @ imm = #260
-    29de:      	uxth	r0, r2
-    29e0:      	lsrs	r0, r0, #2
-    29e2:      	ldr	r1, [pc, #316] <$d.873+0x12>
-    29e4:      	muls	r1, r0, r1
-    29e6:      	lsrs	r1, r1, #17
-    29e8:      	movs	r0, #100
-    29ea:      	muls	r0, r1, r0
-    29ec:      	subs	r0, r2, r0
-    29ee:      	uxth	r0, r0
-    29f0:      	lsls	r0, r0, #1
-    29f2:      	ldr	r2, [pc, #304] <$d.873+0x16>
-    29f4:      	ldrb	r3, [r2, r0]
-    29f6:      	subs	r6, r6, #2
-    29f8:      	add	r4, sp, #20
-    29fa:      	strb	r3, [r4, r6]
-    29fc:      	adds	r3, r4, r6
-    29fe:      	adds	r0, r2, r0
-    2a00:      	ldrb	r0, [r0, #1]
-    2a02:      	strb	r0, [r3, #1]
-    2a04:      	ldr	r0, [sp, #8]
-    2a06:      	cmp	r1, #10
-    2a08:      	blt	0x2aec <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x190> @ imm = #224
-    2a0a:      	lsls	r1, r1, #1
-    2a0c:      	ldr	r2, [pc, #276] <$d.873+0x14>
-    2a0e:      	ldrb	r3, [r2, r1]
-    2a10:      	subs	r5, r6, #2
-    2a12:      	add	r4, sp, #20
-    2a14:      	strb	r3, [r4, r5]
-    2a16:      	adds	r3, r4, r5
-    2a18:      	adds	r1, r2, r1
-    2a1a:      	ldrb	r1, [r1, #1]
-    2a1c:      	strb	r1, [r3, #1]
-    2a1e:      	b	0x2af4 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x198> @ imm = #210
-    2a20:      	ldr	r2, [r0]
-    2a22:      	movs	r0, #1
-    2a24:      	lsls	r0, r0, #8
-    2a26:      	movs	r1, #129
-    2a28:      	b	0x2a40 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0xe4> @ imm = #20
-    2a2a:      	movs	r3, #87
-    2a2c:      	adds	r3, r3, r4
-    2a2e:      	add	r4, sp, #20
-    2a30:      	adds	r4, r4, r1
-    2a32:      	subs	r4, r4, #3
-    2a34:      	strb	r3, [r4]
-    2a36:      	subs	r1, r1, #2
-    2a38:      	lsrs	r3, r2, #8
-    2a3a:      	cmp	r2, r0
-    2a3c:      	mov	r2, r3
-    2a3e:      	blo	0x2ad4 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x178> @ imm = #146
-    2a40:      	movs	r3, #15
-    2a42:      	mov	r4, r2
-    2a44:      	ands	r4, r3
-    2a46:      	cmp	r4, #10
-    2a48:      	blo	0x2a4e <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0xf2> @ imm = #2
-    2a4a:      	movs	r5, #87
-    2a4c:      	b	0x2a50 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0xf4> @ imm = #0
-    2a4e:      	movs	r5, #48
-    2a50:      	adds	r4, r5, r4
-    2a52:      	add	r5, sp, #20
-    2a54:      	adds	r5, r5, r1
-    2a56:      	subs	r5, r5, #2
-    2a58:      	strb	r4, [r5]
-    2a5a:      	lsrs	r4, r2, #4
-    2a5c:      	beq	0x2ab0 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x154> @ imm = #80
-    2a5e:      	ands	r4, r3
-    2a60:      	cmp	r4, #10
-    2a62:      	bhs	0x2a2a <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0xce> @ imm = #-60
-    2a64:      	movs	r3, #48
-    2a66:      	b	0x2a2c <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0xd0> @ imm = #-62
-    2a68:      	ldr	r2, [r0]
-    2a6a:      	movs	r0, #1
-    2a6c:      	lsls	r0, r0, #8
-    2a6e:      	movs	r1, #129
-    2a70:      	b	0x2a88 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x12c> @ imm = #20
-    2a72:      	movs	r3, #55
-    2a74:      	adds	r3, r3, r4
-    2a76:      	add	r4, sp, #20
-    2a78:      	adds	r4, r4, r1
-    2a7a:      	subs	r4, r4, #3
-    2a7c:      	strb	r3, [r4]
-    2a7e:      	subs	r1, r1, #2
-    2a80:      	lsrs	r3, r2, #8
-    2a82:      	cmp	r2, r0
-    2a84:      	mov	r2, r3
-    2a86:      	blo	0x2ad4 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x178> @ imm = #74
-    2a88:      	movs	r3, #15
-    2a8a:      	mov	r4, r2
-    2a8c:      	ands	r4, r3
-    2a8e:      	cmp	r4, #10
-    2a90:      	blo	0x2a96 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x13a> @ imm = #2
-    2a92:      	movs	r5, #55
-    2a94:      	b	0x2a98 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x13c> @ imm = #0
-    2a96:      	movs	r5, #48
-    2a98:      	adds	r4, r5, r4
-    2a9a:      	add	r5, sp, #20
-    2a9c:      	adds	r5, r5, r1
-    2a9e:      	subs	r5, r5, #2
-    2aa0:      	strb	r4, [r5]
-    2aa2:      	lsrs	r4, r2, #4
-    2aa4:      	beq	0x2ab0 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x154> @ imm = #8
-    2aa6:      	ands	r4, r3
-    2aa8:      	cmp	r4, #10
-    2aaa:      	bhs	0x2a72 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x116> @ imm = #-60
-    2aac:      	movs	r3, #48
-    2aae:      	b	0x2a74 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x118> @ imm = #-62
-    2ab0:      	subs	r0, r1, #2
-    2ab2:      	subs	r1, r1, #1
-    2ab4:      	cmp	r0, #129
-    2ab6:      	bhs	0x2ada <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x17e> @ imm = #32
-    2ab8:      	movs	r2, #129
-    2aba:      	subs	r1, r2, r1
-    2abc:      	str	r1, [sp, #4]
-    2abe:      	add	r1, sp, #20
-    2ac0:      	adds	r0, r1, r0
-    2ac2:      	str	r0, [sp]
-    2ac4:      	movs	r1, #1
-    2ac6:      	ldr	r2, [pc, #72] <$d.873+0x2>
-    2ac8:      	movs	r3, #2
-    2aca:      	mov	r0, r6
-    2acc:      	bl	0x194c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a> @ imm = #-4484
-    2ad0:      	add	sp, #148
-    2ad2:      	pop	{r4, r5, r6, r7, pc}
-    2ad4:      	subs	r0, r1, #1
-    2ad6:      	cmp	r0, #129
-    2ad8:      	blo	0x2ab8 <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0x15c> @ imm = #-36
-    2ada:      	movs	r1, #128
-    2adc:      	ldr	r2, [pc, #52] <$d.873+0x4>
-    2ade:      	bl	0x21bc <core::slice::index::slice_start_index_len_fail::h3080a8211123744d> @ imm = #-2342
-    2ae2:      	trap
-    2ae4:      	mov	r1, r2
-    2ae6:      	ldr	r0, [sp, #8]
-    2ae8:      	cmp	r1, #10
-    2aea:      	bge	0x2a0a <core::fmt::num::<impl core::fmt::Debug for usize>::fmt::h09259004d1de1795+0xae> @ imm = #-228
-    2aec:      	subs	r5, r6, #1
-    2aee:      	adds	r1, #48
-    2af0:      	add	r2, sp, #20
-    2af2:      	strb	r1, [r2, r5]
-    2af4:      	movs	r1, #39
-    2af6:      	subs	r1, r1, r5
-    2af8:      	str	r1, [sp, #4]
-    2afa:      	add	r1, sp, #20
-    2afc:      	adds	r1, r1, r5
-    2afe:      	str	r1, [sp]
-    2b00:      	movs	r1, #1
-    2b02:      	ldr	r2, [pc, #40] <$d.873+0x1e>
-    2b04:      	movs	r3, #0
-    2b06:      	bl	0x194c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a> @ imm = #-4542
-    2b0a:      	add	sp, #148
-    2b0c:      	pop	{r4, r5, r6, r7, pc}
-    2b0e:      	mov	r8, r8
-
-00002b10 <$d.873>:
-    2b10:	bc 38 00 00	.word	0x000038bc
-    2b14:	ac 38 00 00	.word	0x000038ac
-    2b18:	0f 27 00 00	.word	0x0000270f
-    2b1c:	10 27 00 00	.word	0x00002710
-    2b20:	7b 14 00 00	.word	0x0000147b
-    2b24:	be 38 00 00	.word	0x000038be
-    2b28:	ff e0 f5 05	.word	0x05f5e0ff
-    2b2c:	98 37 00 00	.word	0x00003798
-
-00002b30 <core::fmt::num::imp::<impl core::fmt::Display for u16>::fmt::h604aa11fce4661b4>:
-    2b30:      	push	{r4, r5, r6, r7, lr}
-    2b32:      	add	r7, sp, #12
-    2b34:      	sub	sp, #52
-    2b36:      	mov	r5, r1
-    2b38:      	ldrh	r1, [r0]
-    2b3a:      	add	r0, sp, #12
-    2b3c:      	adds	r0, #35
-    2b3e:      	ldr	r3, [pc, #184] <$d.881+0x2>
-    2b40:      	cmp	r1, r3
-    2b42:      	bls	0x2b88 <core::fmt::num::imp::<impl core::fmt::Display for u16>::fmt::h604aa11fce4661b4+0x58> @ imm = #66
-    2b44:      	uxth	r2, r1
-    2b46:      	lsrs	r2, r2, #4
-    2b48:      	str	r5, [sp, #8]
-    2b4a:      	ldr	r5, [pc, #184] <$d.881+0xe>
-    2b4c:      	muls	r5, r2, r5
-    2b4e:      	lsrs	r2, r5, #19
-    2b50:      	adds	r3, r3, #1
-    2b52:      	muls	r3, r2, r3
-    2b54:      	subs	r1, r1, r3
-    2b56:      	uxth	r3, r1
-    2b58:      	lsrs	r3, r3, #2
-    2b5a:      	ldr	r5, [pc, #160] <$d.881+0x6>
-    2b5c:      	muls	r5, r3, r5
-    2b5e:      	lsrs	r3, r5, #17
-    2b60:      	lsls	r5, r3, #1
-    2b62:      	ldr	r6, [pc, #156] <$d.881+0xa>
-    2b64:      	ldrb	r4, [r6, r5]
-    2b66:      	strb	r4, [r0]
-    2b68:      	adds	r4, r6, r5
-    2b6a:      	ldr	r5, [sp, #8]
-    2b6c:      	ldrb	r4, [r4, #1]
-    2b6e:      	strb	r4, [r0, #1]
-    2b70:      	movs	r4, #100
-    2b72:      	muls	r4, r3, r4
-    2b74:      	subs	r1, r1, r4
-    2b76:      	uxth	r1, r1
-    2b78:      	lsls	r1, r1, #1
-    2b7a:      	ldrb	r3, [r6, r1]
-    2b7c:      	strb	r3, [r0, #2]
-    2b7e:      	adds	r1, r6, r1
-    2b80:      	ldrb	r1, [r1, #1]
-    2b82:      	strb	r1, [r0, #3]
-    2b84:      	movs	r0, #35
-    2b86:      	b	0x2bd2 <core::fmt::num::imp::<impl core::fmt::Display for u16>::fmt::h604aa11fce4661b4+0xa2> @ imm = #72
-    2b88:      	cmp	r1, #99
-    2b8a:      	bls	0x2bca <core::fmt::num::imp::<impl core::fmt::Display for u16>::fmt::h604aa11fce4661b4+0x9a> @ imm = #60
-    2b8c:      	uxth	r2, r1
-    2b8e:      	lsrs	r2, r2, #2
-    2b90:      	ldr	r3, [pc, #104] <$d.881+0x4>
-    2b92:      	muls	r3, r2, r3
-    2b94:      	lsrs	r2, r3, #17
-    2b96:      	movs	r3, #100
-    2b98:      	muls	r3, r2, r3
-    2b9a:      	subs	r1, r1, r3
-    2b9c:      	uxth	r1, r1
-    2b9e:      	lsls	r1, r1, #1
-    2ba0:      	ldr	r3, [pc, #92] <$d.881+0x8>
-    2ba2:      	ldrb	r4, [r3, r1]
-    2ba4:      	strb	r4, [r0, #2]
-    2ba6:      	adds	r1, r3, r1
-    2ba8:      	ldrb	r1, [r1, #1]
-    2baa:      	strb	r1, [r0, #3]
-    2bac:      	movs	r0, #37
-    2bae:      	mov	r1, r2
-    2bb0:      	cmp	r1, #10
-    2bb2:      	blo	0x2bd0 <core::fmt::num::imp::<impl core::fmt::Display for u16>::fmt::h604aa11fce4661b4+0xa0> @ imm = #26
-    2bb4:      	lsls	r1, r1, #1
-    2bb6:      	ldr	r2, [pc, #72] <$d.881+0xa>
-    2bb8:      	ldrb	r3, [r2, r1]
-    2bba:      	subs	r0, r0, #2
-    2bbc:      	add	r4, sp, #12
-    2bbe:      	strb	r3, [r4, r0]
-    2bc0:      	adds	r3, r4, r0
-    2bc2:      	adds	r1, r2, r1
-    2bc4:      	ldrb	r1, [r1, #1]
-    2bc6:      	strb	r1, [r3, #1]
-    2bc8:      	b	0x2bda <core::fmt::num::imp::<impl core::fmt::Display for u16>::fmt::h604aa11fce4661b4+0xaa> @ imm = #14
-    2bca:      	movs	r0, #39
-    2bcc:      	cmp	r1, #10
-    2bce:      	bhs	0x2bb4 <core::fmt::num::imp::<impl core::fmt::Display for u16>::fmt::h604aa11fce4661b4+0x84> @ imm = #-30
-    2bd0:      	mov	r2, r1
-    2bd2:      	subs	r0, r0, #1
-    2bd4:      	adds	r2, #48
-    2bd6:      	add	r1, sp, #12
-    2bd8:      	strb	r2, [r1, r0]
-    2bda:      	movs	r1, #39
-    2bdc:      	subs	r1, r1, r0
-    2bde:      	str	r1, [sp, #4]
-    2be0:      	add	r1, sp, #12
-    2be2:      	adds	r0, r1, r0
-    2be4:      	str	r0, [sp]
-    2be6:      	movs	r1, #1
-    2be8:      	ldr	r2, [pc, #28] <$d.881+0x10>
-    2bea:      	movs	r3, #0
-    2bec:      	mov	r0, r5
-    2bee:      	bl	0x194c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a> @ imm = #-4774
-    2bf2:      	add	sp, #52
-    2bf4:      	pop	{r4, r5, r6, r7, pc}
-    2bf6:      	mov	r8, r8
-
-00002bf8 <$d.881>:
-    2bf8:	0f 27 00 00	.word	0x0000270f
-    2bfc:	7b 14 00 00	.word	0x0000147b
-    2c00:	be 38 00 00	.word	0x000038be
-    2c04:	47 03 00 00	.word	0x00000347
-    2c08:	98 37 00 00	.word	0x00003798
-
-00002c0c <core::fmt::num::imp::<impl core::fmt::Display for isize>::fmt::hf394190e68450548>:
-    2c0c:      	push	{r4, r5, r6, r7, lr}
-    2c0e:      	add	r7, sp, #12
-    2c10:      	sub	sp, #68
-    2c12:      	str	r1, [sp, #16]
-    2c14:      	ldr	r0, [r0]
-    2c16:      	asrs	r1, r0, #31
-    2c18:      	str	r0, [sp, #12]
-    2c1a:      	adds	r2, r0, r1
-    2c1c:      	eors	r2, r1
-    2c1e:      	ldr	r4, [pc, #216] <$d.883+0x2>
-    2c20:      	movs	r6, #39
-    2c22:      	cmp	r2, r4
-    2c24:      	bls	0x2c84 <core::fmt::num::imp::<impl core::fmt::Display for isize>::fmt::hf394190e68450548+0x78> @ imm = #92
-    2c26:      	mov	r5, r2
-    2c28:      	str	r6, [sp, #24]
-    2c2a:      	mov	r0, r5
-    2c2c:      	ldr	r1, [pc, #204] <$d.883+0x4>
-    2c2e:      	bl	0x2f8c <__aeabi_uidiv>  @ imm = #858
-    2c32:      	str	r0, [sp, #20]
-    2c34:      	adds	r1, r4, #1
-    2c36:      	muls	r1, r0, r1
-    2c38:      	subs	r1, r5, r1
-    2c3a:      	uxth	r2, r1
-    2c3c:      	lsrs	r2, r2, #2
-    2c3e:      	ldr	r0, [pc, #192] <$d.883+0xa>
-    2c40:      	muls	r2, r0, r2
-    2c42:      	lsrs	r2, r2, #17
-    2c44:      	lsls	r3, r2, #1
-    2c46:      	ldr	r0, [pc, #188] <$d.883+0xe>
-    2c48:      	ldrb	r0, [r0, r3]
-    2c4a:      	add	r4, sp, #28
-    2c4c:      	adds	r4, r4, r6
-    2c4e:      	subs	r6, r4, #4
-    2c50:      	strb	r0, [r6]
-    2c52:      	ldr	r0, [pc, #176] <$d.883+0xe>
-    2c54:      	adds	r0, r0, r3
-    2c56:      	ldrb	r0, [r0, #1]
-    2c58:      	strb	r0, [r6, #1]
-    2c5a:      	ldr	r6, [sp, #24]
-    2c5c:      	movs	r0, #100
-    2c5e:      	muls	r0, r2, r0
-    2c60:      	subs	r0, r1, r0
-    2c62:      	uxth	r0, r0
-    2c64:      	lsls	r0, r0, #1
-    2c66:      	ldr	r2, [pc, #156] <$d.883+0xe>
-    2c68:      	ldrb	r1, [r2, r0]
-    2c6a:      	mov	r3, r2
-    2c6c:      	subs	r2, r4, #2
-    2c6e:      	ldr	r4, [pc, #136] <$d.883+0x2>
-    2c70:      	strb	r1, [r2]
-    2c72:      	adds	r0, r3, r0
-    2c74:      	ldrb	r0, [r0, #1]
-    2c76:      	strb	r0, [r2, #1]
-    2c78:      	ldr	r2, [sp, #20]
-    2c7a:      	subs	r6, r6, #4
-    2c7c:      	ldr	r0, [pc, #136] <$d.883+0x10>
-    2c7e:      	cmp	r5, r0
-    2c80:      	mov	r5, r2
-    2c82:      	bhi	0x2c28 <core::fmt::num::imp::<impl core::fmt::Display for isize>::fmt::hf394190e68450548+0x1c> @ imm = #-94
-    2c84:      	cmp	r2, #99
-    2c86:      	ble	0x2cc8 <core::fmt::num::imp::<impl core::fmt::Display for isize>::fmt::hf394190e68450548+0xbc> @ imm = #62
-    2c88:      	uxth	r0, r2
-    2c8a:      	lsrs	r0, r0, #2
-    2c8c:      	ldr	r1, [pc, #112] <$d.883+0x8>
-    2c8e:      	muls	r1, r0, r1
-    2c90:      	lsrs	r1, r1, #17
-    2c92:      	movs	r0, #100
-    2c94:      	muls	r0, r1, r0
-    2c96:      	subs	r0, r2, r0
-    2c98:      	uxth	r0, r0
-    2c9a:      	lsls	r0, r0, #1
-    2c9c:      	ldr	r2, [pc, #100] <$d.883+0xc>
-    2c9e:      	ldrb	r3, [r2, r0]
-    2ca0:      	subs	r6, r6, #2
-    2ca2:      	add	r4, sp, #28
-    2ca4:      	strb	r3, [r4, r6]
-    2ca6:      	adds	r3, r4, r6
-    2ca8:      	adds	r0, r2, r0
-    2caa:      	ldrb	r0, [r0, #1]
-    2cac:      	strb	r0, [r3, #1]
-    2cae:      	cmp	r1, #10
-    2cb0:      	blt	0x2cce <core::fmt::num::imp::<impl core::fmt::Display for isize>::fmt::hf394190e68450548+0xc2> @ imm = #26
-    2cb2:      	lsls	r1, r1, #1
-    2cb4:      	ldr	r2, [pc, #76] <$d.883+0xc>
-    2cb6:      	ldrb	r3, [r2, r1]
-    2cb8:      	subs	r0, r6, #2
-    2cba:      	add	r4, sp, #28
-    2cbc:      	strb	r3, [r4, r0]
-    2cbe:      	adds	r3, r4, r0
-    2cc0:      	adds	r1, r2, r1
-    2cc2:      	ldrb	r1, [r1, #1]
-    2cc4:      	strb	r1, [r3, #1]
-    2cc6:      	b	0x2cd6 <core::fmt::num::imp::<impl core::fmt::Display for isize>::fmt::hf394190e68450548+0xca> @ imm = #12
-    2cc8:      	mov	r1, r2
-    2cca:      	cmp	r1, #10
-    2ccc:      	bge	0x2cb2 <core::fmt::num::imp::<impl core::fmt::Display for isize>::fmt::hf394190e68450548+0xa6> @ imm = #-30
-    2cce:      	subs	r0, r6, #1
-    2cd0:      	adds	r1, #48
-    2cd2:      	add	r2, sp, #28
-    2cd4:      	strb	r1, [r2, r0]
-    2cd6:      	movs	r1, #39
-    2cd8:      	subs	r1, r1, r0
-    2cda:      	str	r1, [sp, #4]
-    2cdc:      	add	r1, sp, #28
-    2cde:      	adds	r0, r1, r0
-    2ce0:      	str	r0, [sp]
-    2ce2:      	ldr	r0, [sp, #12]
-    2ce4:      	mvns	r0, r0
-    2ce6:      	lsrs	r1, r0, #31
-    2ce8:      	ldr	r2, [pc, #32] <$d.883+0x14>
-    2cea:      	movs	r3, #0
-    2cec:      	ldr	r0, [sp, #16]
-    2cee:      	bl	0x194c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a> @ imm = #-5030
-    2cf2:      	add	sp, #68
-    2cf4:      	pop	{r4, r5, r6, r7, pc}
-    2cf6:      	mov	r8, r8
-
-00002cf8 <$d.883>:
-    2cf8:	0f 27 00 00	.word	0x0000270f
-    2cfc:	10 27 00 00	.word	0x00002710
-    2d00:	7b 14 00 00	.word	0x0000147b
-    2d04:	be 38 00 00	.word	0x000038be
-    2d08:	ff e0 f5 05	.word	0x05f5e0ff
-    2d0c:	98 37 00 00	.word	0x00003798
-
-00002d10 <core::fmt::num::imp::<impl core::fmt::Display for usize>::fmt::h5a264564fe0b0ea0>:
-    2d10:      	push	{r4, r5, r6, r7, lr}
-    2d12:      	add	r7, sp, #12
-    2d14:      	sub	sp, #60
-    2d16:      	str	r1, [sp, #8]
-    2d18:      	ldr	r2, [r0]
-    2d1a:      	ldr	r4, [pc, #212] <$d.885+0x2>
-    2d1c:      	movs	r6, #39
-    2d1e:      	cmp	r2, r4
-    2d20:      	bls	0x2d80 <core::fmt::num::imp::<impl core::fmt::Display for usize>::fmt::h5a264564fe0b0ea0+0x70> @ imm = #92
-    2d22:      	mov	r5, r2
-    2d24:      	str	r6, [sp, #16]
-    2d26:      	mov	r0, r5
-    2d28:      	ldr	r1, [pc, #200] <$d.885+0x4>
-    2d2a:      	bl	0x2f8c <__aeabi_uidiv>  @ imm = #606
-    2d2e:      	str	r0, [sp, #12]
-    2d30:      	adds	r1, r4, #1
-    2d32:      	muls	r1, r0, r1
-    2d34:      	subs	r1, r5, r1
-    2d36:      	uxth	r2, r1
-    2d38:      	lsrs	r2, r2, #2
-    2d3a:      	ldr	r0, [pc, #188] <$d.885+0xa>
-    2d3c:      	muls	r2, r0, r2
-    2d3e:      	lsrs	r2, r2, #17
-    2d40:      	lsls	r3, r2, #1
-    2d42:      	ldr	r0, [pc, #184] <$d.885+0xe>
-    2d44:      	ldrb	r0, [r0, r3]
-    2d46:      	add	r4, sp, #20
-    2d48:      	adds	r4, r4, r6
-    2d4a:      	subs	r6, r4, #4
-    2d4c:      	strb	r0, [r6]
-    2d4e:      	ldr	r0, [pc, #172] <$d.885+0xe>
-    2d50:      	adds	r0, r0, r3
-    2d52:      	ldrb	r0, [r0, #1]
-    2d54:      	strb	r0, [r6, #1]
-    2d56:      	ldr	r6, [sp, #16]
-    2d58:      	movs	r0, #100
-    2d5a:      	muls	r0, r2, r0
-    2d5c:      	subs	r0, r1, r0
-    2d5e:      	uxth	r0, r0
-    2d60:      	lsls	r0, r0, #1
-    2d62:      	ldr	r2, [pc, #152] <$d.885+0xe>
-    2d64:      	ldrb	r1, [r2, r0]
-    2d66:      	mov	r3, r2
-    2d68:      	subs	r2, r4, #2
-    2d6a:      	ldr	r4, [pc, #132] <$d.885+0x2>
-    2d6c:      	strb	r1, [r2]
-    2d6e:      	adds	r0, r3, r0
-    2d70:      	ldrb	r0, [r0, #1]
-    2d72:      	strb	r0, [r2, #1]
-    2d74:      	ldr	r2, [sp, #12]
-    2d76:      	subs	r6, r6, #4
-    2d78:      	ldr	r0, [pc, #132] <$d.885+0x10>
-    2d7a:      	cmp	r5, r0
-    2d7c:      	mov	r5, r2
-    2d7e:      	bhi	0x2d24 <core::fmt::num::imp::<impl core::fmt::Display for usize>::fmt::h5a264564fe0b0ea0+0x14> @ imm = #-94
-    2d80:      	cmp	r2, #99
-    2d82:      	ble	0x2dc4 <core::fmt::num::imp::<impl core::fmt::Display for usize>::fmt::h5a264564fe0b0ea0+0xb4> @ imm = #62
-    2d84:      	uxth	r0, r2
-    2d86:      	lsrs	r0, r0, #2
-    2d88:      	ldr	r1, [pc, #108] <$d.885+0x8>
-    2d8a:      	muls	r1, r0, r1
-    2d8c:      	lsrs	r1, r1, #17
-    2d8e:      	movs	r0, #100
-    2d90:      	muls	r0, r1, r0
-    2d92:      	subs	r0, r2, r0
-    2d94:      	uxth	r0, r0
-    2d96:      	lsls	r0, r0, #1
-    2d98:      	ldr	r2, [pc, #96] <$d.885+0xc>
-    2d9a:      	ldrb	r3, [r2, r0]
-    2d9c:      	subs	r6, r6, #2
-    2d9e:      	add	r4, sp, #20
-    2da0:      	strb	r3, [r4, r6]
-    2da2:      	adds	r3, r4, r6
-    2da4:      	adds	r0, r2, r0
-    2da6:      	ldrb	r0, [r0, #1]
-    2da8:      	strb	r0, [r3, #1]
-    2daa:      	cmp	r1, #10
-    2dac:      	blt	0x2dca <core::fmt::num::imp::<impl core::fmt::Display for usize>::fmt::h5a264564fe0b0ea0+0xba> @ imm = #26
-    2dae:      	lsls	r1, r1, #1
-    2db0:      	ldr	r2, [pc, #72] <$d.885+0xc>
-    2db2:      	ldrb	r3, [r2, r1]
-    2db4:      	subs	r0, r6, #2
-    2db6:      	add	r4, sp, #20
-    2db8:      	strb	r3, [r4, r0]
-    2dba:      	adds	r3, r4, r0
-    2dbc:      	adds	r1, r2, r1
-    2dbe:      	ldrb	r1, [r1, #1]
-    2dc0:      	strb	r1, [r3, #1]
-    2dc2:      	b	0x2dd2 <core::fmt::num::imp::<impl core::fmt::Display for usize>::fmt::h5a264564fe0b0ea0+0xc2> @ imm = #12
-    2dc4:      	mov	r1, r2
-    2dc6:      	cmp	r1, #10
-    2dc8:      	bge	0x2dae <core::fmt::num::imp::<impl core::fmt::Display for usize>::fmt::h5a264564fe0b0ea0+0x9e> @ imm = #-30
-    2dca:      	subs	r0, r6, #1
-    2dcc:      	adds	r1, #48
-    2dce:      	add	r2, sp, #20
-    2dd0:      	strb	r1, [r2, r0]
-    2dd2:      	movs	r1, #39
-    2dd4:      	subs	r1, r1, r0
-    2dd6:      	str	r1, [sp, #4]
-    2dd8:      	add	r1, sp, #20
-    2dda:      	adds	r0, r1, r0
-    2ddc:      	str	r0, [sp]
-    2dde:      	movs	r1, #1
-    2de0:      	ldr	r2, [pc, #32] <$d.885+0x14>
-    2de2:      	movs	r3, #0
-    2de4:      	ldr	r0, [sp, #8]
-    2de6:      	bl	0x194c <core::fmt::Formatter::pad_integral::h8d5011e63a4c639a> @ imm = #-5278
-    2dea:      	add	sp, #60
-    2dec:      	pop	{r4, r5, r6, r7, pc}
-    2dee:      	mov	r8, r8
-
-00002df0 <$d.885>:
-    2df0:	0f 27 00 00	.word	0x0000270f
-    2df4:	10 27 00 00	.word	0x00002710
-    2df8:	7b 14 00 00	.word	0x0000147b
-    2dfc:	be 38 00 00	.word	0x000038be
-    2e00:	ff e0 f5 05	.word	0x05f5e0ff
-    2e04:	98 37 00 00	.word	0x00003798
-
-00002e08 <<&T as core::fmt::Debug>::fmt::h8d6d0cd170979dee>:
-    2e08:      	push	{r7, lr}
-    2e0a:      	add	r7, sp, #0
-    2e0c:      	ldr	r2, [r0]
-    2e0e:      	ldr	r0, [r0, #4]
-    2e10:      	ldr	r3, [r0, #12]
-    2e12:      	mov	r0, r2
-    2e14:      	blx	r3
-    2e16:      	pop	{r7, pc}
-
-00002e18 <<&T as core::fmt::Display>::fmt::ha2fc02d9d303d404>:
-    2e18:      	push	{r7, lr}
-    2e1a:      	add	r7, sp, #0
-    2e1c:      	mov	r3, r1
-    2e1e:      	ldm	r0!, {r1, r2}
-    2e20:      	mov	r0, r3
-    2e22:      	bl	0x1ca8 <core::fmt::Formatter::pad::haa777c0a9492680f> @ imm = #-4478
-    2e26:      	pop	{r7, pc}
-
-00002e28 <<&T as core::fmt::Display>::fmt::hd97a7489159c6164>:
-    2e28:      	push	{r7, lr}
-    2e2a:      	add	r7, sp, #0
-    2e2c:      	mov	r3, r1
-    2e2e:      	ldr	r0, [r0]
-    2e30:      	ldm	r0!, {r1, r2}
-    2e32:      	mov	r0, r3
-    2e34:      	bl	0x1ca8 <core::fmt::Formatter::pad::haa777c0a9492680f> @ imm = #-4496
-    2e38:      	pop	{r7, pc}
-
-00002e3a <<&T as core::fmt::Display>::fmt::hf610f8399ba96788>:
-    2e3a:      	push	{r4, r5, r6, r7, lr}
-    2e3c:      	add	r7, sp, #12
-    2e3e:      	sub	sp, #28
-    2e40:      	ldr	r2, [r1, #24]
-    2e42:      	str	r2, [sp]
-    2e44:      	ldr	r1, [r1, #28]
-    2e46:      	ldr	r0, [r0]
-    2e48:      	add	r2, sp, #4
-    2e4a:      	mov	r4, r2
-    2e4c:      	ldm	r0!, {r3, r5, r6}
-    2e4e:      	stm	r4!, {r3, r5, r6}
-    2e50:      	ldm	r0!, {r3, r5, r6}
-    2e52:      	stm	r4!, {r3, r5, r6}
-    2e54:      	ldr	r0, [sp]
-    2e56:      	bl	0x17ec <core::fmt::write::hff185d7d684cc368> @ imm = #-5742
-    2e5a:      	add	sp, #28
-    2e5c:      	pop	{r4, r5, r6, r7, pc}
-    2e5e:      	bmi	0x2e0a <<&T as core::fmt::Debug>::fmt::h8d6d0cd170979dee+0x2> @ imm = #-88
-
-00002e60 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5>:
-    2e60:      	push	{r4, r5, r6, r7, lr}
-    2e62:      	add	r7, sp, #12
-    2e64:      	sub	sp, #4
-    2e66:      	lsls	r1, r0, #11
-    2e68:      	movs	r3, #0
-    2e6a:      	movs	r5, #32
-    2e6c:      	ldr	r2, [pc, #160] <$d.1200>
-    2e6e:      	mov	r4, r5
-    2e70:      	b	0x2e78 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x18> @ imm = #4
-    2e72:      	adds	r3, r5, #1
-    2e74:      	subs	r5, r4, r3
-    2e76:      	bls	0x2e94 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x34> @ imm = #26
-    2e78:      	lsrs	r5, r5, #1
-    2e7a:      	adds	r5, r5, r3
-    2e7c:      	lsls	r6, r5, #2
-    2e7e:      	ldr	r6, [r2, r6]
-    2e80:      	lsls	r6, r6, #11
-    2e82:      	cmp	r1, r6
-    2e84:      	bhi	0x2e72 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x12> @ imm = #-22
-    2e86:      	cmp	r6, r1
-    2e88:      	beq	0x2e92 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x32> @ imm = #6
-    2e8a:      	mov	r4, r5
-    2e8c:      	subs	r5, r4, r3
-    2e8e:      	bhi	0x2e78 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x18> @ imm = #-26
-    2e90:      	b	0x2e94 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x34> @ imm = #0
-    2e92:      	adds	r3, r5, #1
-    2e94:      	cmp	r3, #31
-    2e96:      	bhi	0x2efe <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x9e> @ imm = #100
-    2e98:      	lsls	r5, r3, #2
-    2e9a:      	ldr	r4, [pc, #124] <$d.1200+0xa>
-    2e9c:      	cmp	r3, #31
-    2e9e:      	beq	0x2ea6 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x46> @ imm = #4
-    2ea0:      	adds	r4, r5, r2
-    2ea2:      	ldr	r4, [r4, #4]
-    2ea4:      	lsrs	r4, r4, #21
-    2ea6:      	subs	r3, r3, #1
-    2ea8:      	bhs	0x2eae <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x4e> @ imm = #2
-    2eaa:      	movs	r6, #0
-    2eac:      	b	0x2eba <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x5a> @ imm = #10
-    2eae:      	cmp	r3, #32
-    2eb0:      	bhs	0x2f04 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0xa4> @ imm = #80
-    2eb2:      	lsls	r3, r3, #2
-    2eb4:      	ldr	r3, [r2, r3]
-    2eb6:      	ldr	r6, [pc, #104] <$d.1200+0x12>
-    2eb8:      	ands	r6, r3
-    2eba:      	ldr	r2, [r2, r5]
-    2ebc:      	lsrs	r2, r2, #21
-    2ebe:      	adds	r3, r2, #1
-    2ec0:      	cmp	r4, r3
-    2ec2:      	beq	0x2eea <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x8a> @ imm = #36
-    2ec4:      	ldr	r5, [pc, #80] <$d.1200+0x8>
-    2ec6:      	cmp	r2, r5
-    2ec8:      	mov	r3, r2
-    2eca:      	bhi	0x2ece <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x6e> @ imm = #0
-    2ecc:      	mov	r3, r5
-    2ece:      	subs	r5, r0, r6
-    2ed0:      	subs	r0, r4, #1
-    2ed2:      	movs	r4, #0
-    2ed4:      	ldr	r1, [pc, #76] <$d.1200+0x14>
-    2ed6:      	cmp	r3, r2
-    2ed8:      	beq	0x2ef2 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x92> @ imm = #22
-    2eda:      	ldrb	r6, [r1, r2]
-    2edc:      	adds	r4, r4, r6
-    2ede:      	cmp	r4, r5
-    2ee0:      	bhi	0x2eea <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x8a> @ imm = #6
-    2ee2:      	adds	r2, r2, #1
-    2ee4:      	cmp	r0, r2
-    2ee6:      	bne	0x2ed6 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0x76> @ imm = #-20
-    2ee8:      	mov	r2, r0
-    2eea:      	movs	r0, #1
-    2eec:      	ands	r0, r2
-    2eee:      	add	sp, #4
-    2ef0:      	pop	{r4, r5, r6, r7, pc}
-    2ef2:      	ldr	r2, [pc, #52] <$d.1200+0x1a>
-    2ef4:      	mov	r0, r3
-    2ef6:      	ldr	r1, [pc, #32] <$d.1200+0xa>
-    2ef8:      	bl	0x1184 <core::panicking::panic_bounds_check::h5d2fdbe20d7940cc> @ imm = #-7544
-    2efc:      	trap
-    2efe:      	movs	r1, #32
-    2f00:      	ldr	r2, [pc, #16] <$d.1200+0x4>
-    2f02:      	b	0x2f08 <core::unicode::unicode_data::grapheme_extend::lookup::h918bcec3bba124e5+0xa8> @ imm = #2
-    2f04:      	movs	r1, #32
-    2f06:      	ldr	r2, [pc, #20] <$d.1200+0xe>
-    2f08:      	mov	r0, r3
-    2f0a:      	bl	0x1184 <core::panicking::panic_bounds_check::h5d2fdbe20d7940cc> @ imm = #-7562
-    2f0e:      	trap
-
-00002f10 <$d.1200>:
-    2f10:	44 41 00 00	.word	0x00004144
-    2f14:	14 41 00 00	.word	0x00004114
-    2f18:	c3 02 00 00	.word	0x000002c3
-    2f1c:	34 41 00 00	.word	0x00004134
-    2f20:	ff ff 1f 00	.word	0x001fffff
-    2f24:	c4 41 00 00	.word	0x000041c4
-    2f28:	24 41 00 00	.word	0x00004124
-
-00002f2c <rust_begin_unwind>:
-    2f2c:      	push	{r7, lr}
-    2f2e:      	add	r7, sp, #0
-    2f30:      	sub	sp, #40
-    2f32:      	str	r0, [sp]
-    2f34:      	bl	0xf68 <__cpsid>         @ imm = #-8144
-    2f38:      	movs	r4, #0
-    2f3a:      	mov	r0, r4
-    2f3c:      	bl	0xe38 <rtt_target::UpChannel::conjure::h81109ceede8d3325> @ imm = #-8456
-    2f40:      	cmp	r0, #1
-    2f42:      	bne	0x2f74 <rust_begin_unwind+0x48> @ imm = #46
-    2f44:      	str	r1, [sp, #4]
-    2f46:      	add	r5, sp, #4
-    2f48:      	movs	r6, #2
-    2f4a:      	mov	r0, r5
-    2f4c:      	mov	r1, r6
-    2f4e:      	bl	0xe1e <rtt_target::UpChannel::set_mode::haebb8f1fc86fca3d> @ imm = #-8500
-    2f52:      	movs	r0, #1
-    2f54:      	str	r0, [sp, #28]
-    2f56:      	add	r0, sp, #32
-    2f58:      	str	r0, [sp, #24]
-    2f5a:      	str	r4, [sp, #20]
-    2f5c:      	str	r4, [sp, #16]
-    2f5e:      	str	r6, [sp, #12]
-    2f60:      	ldr	r0, [pc, #20] <$d.1>
-    2f62:      	str	r0, [sp, #8]
-    2f64:      	ldr	r0, [pc, #20] <$d.1+0x4>
-    2f66:      	str	r0, [sp, #36]
-    2f68:      	mov	r0, sp
-    2f6a:      	str	r0, [sp, #32]
-    2f6c:      	add	r1, sp, #8
-    2f6e:      	mov	r0, r5
-    2f70:      	bl	0xe58 <<rtt_target::UpChannel as core::fmt::Write>::write_fmt::h05b44bba687d3d89> @ imm = #-8476
-    2f74:      	b	0x2f74 <rust_begin_unwind+0x48> @ imm = #-4
-    2f76:      	mov	r8, r8
-
-00002f78 <$d.1>:
-    2f78:	88 44 00 00	.word	0x00004488
-    2f7c:	81 2f 00 00	.word	0x00002f81
-
-00002f80 <<&T as core::fmt::Display>::fmt::h678799f7bde9582d>:
-    2f80:      	push	{r7, lr}
-    2f82:      	add	r7, sp, #0
-    2f84:      	ldr	r0, [r0]
-    2f86:      	bl	0x1044 <<core::panic::panic_info::PanicInfo as core::fmt::Display>::fmt::h980d98f06e764e0e> @ imm = #-8006
-    2f8a:      	pop	{r7, pc}
-
-00002f8c <__aeabi_uidiv>:
-    2f8c:      	push	{r7, lr}
-    2f8e:      	add	r7, sp, #0
-    2f90:      	bl	0x30c8 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5> @ imm = #308
-    2f94:      	pop	{r7, pc}
-
-00002f96 <memcpy>:
-    2f96:      	push	{r4, r5, r6, r7, lr}
-    2f98:      	add	r7, sp, #12
-    2f9a:      	sub	sp, #4
-    2f9c:      	cmp	r2, #0
-    2f9e:      	beq	0x2fee <memcpy+0x58>    @ imm = #76
-    2fa0:      	movs	r4, #3
-    2fa2:      	mov	r3, r2
-    2fa4:      	ands	r3, r4
-    2fa6:      	subs	r5, r2, #1
-    2fa8:      	cmp	r5, #3
-    2faa:      	str	r3, [sp]
-    2fac:      	bhs	0x2fb2 <memcpy+0x1c>    @ imm = #2
-    2fae:      	movs	r4, #0
-    2fb0:      	b	0x2fd0 <memcpy+0x3a>    @ imm = #28
-    2fb2:      	bics	r2, r4
-    2fb4:      	movs	r4, #0
-    2fb6:      	ldrb	r5, [r1, r4]
-    2fb8:      	strb	r5, [r0, r4]
-    2fba:      	adds	r5, r0, r4
-    2fbc:      	adds	r6, r1, r4
-    2fbe:      	ldrb	r3, [r6, #1]
-    2fc0:      	strb	r3, [r5, #1]
-    2fc2:      	ldrb	r3, [r6, #2]
-    2fc4:      	strb	r3, [r5, #2]
-    2fc6:      	ldrb	r3, [r6, #3]
-    2fc8:      	strb	r3, [r5, #3]
-    2fca:      	adds	r4, r4, #4
-    2fcc:      	cmp	r2, r4
-    2fce:      	bne	0x2fb6 <memcpy+0x20>    @ imm = #-28
-    2fd0:      	ldr	r5, [sp]
-    2fd2:      	cmp	r5, #0
-    2fd4:      	beq	0x2fee <memcpy+0x58>    @ imm = #22
-    2fd6:      	ldrb	r2, [r1, r4]
-    2fd8:      	strb	r2, [r0, r4]
-    2fda:      	cmp	r5, #1
-    2fdc:      	beq	0x2fee <memcpy+0x58>    @ imm = #14
-    2fde:      	adds	r2, r4, #1
-    2fe0:      	ldrb	r3, [r1, r2]
-    2fe2:      	strb	r3, [r0, r2]
-    2fe4:      	cmp	r5, #2
-    2fe6:      	beq	0x2fee <memcpy+0x58>    @ imm = #4
-    2fe8:      	adds	r2, r4, #2
-    2fea:      	ldrb	r1, [r1, r2]
-    2fec:      	strb	r1, [r0, r2]
-    2fee:      	add	sp, #4
-    2ff0:      	pop	{r4, r5, r6, r7, pc}
-
-00002ff2 <memset>:
-    2ff2:      	push	{r4, r5, r7, lr}
-    2ff4:      	add	r7, sp, #8
-    2ff6:      	cmp	r2, #0
-    2ff8:      	beq	0x3032 <memset+0x40>    @ imm = #54
-    2ffa:      	movs	r4, #3
-    2ffc:      	mov	r3, r2
-    2ffe:      	ands	r3, r4
-    3000:      	subs	r5, r2, #1
-    3002:      	cmp	r5, #3
-    3004:      	bhs	0x300a <memset+0x18>    @ imm = #2
-    3006:      	movs	r4, #0
-    3008:      	b	0x301e <memset+0x2c>    @ imm = #18
-    300a:      	bics	r2, r4
-    300c:      	movs	r4, #0
-    300e:      	strb	r1, [r0, r4]
-    3010:      	adds	r5, r0, r4
-    3012:      	strb	r1, [r5, #3]
-    3014:      	strb	r1, [r5, #2]
-    3016:      	strb	r1, [r5, #1]
-    3018:      	adds	r4, r4, #4
-    301a:      	cmp	r2, r4
-    301c:      	bne	0x300e <memset+0x1c>    @ imm = #-18
-    301e:      	cmp	r3, #0
-    3020:      	beq	0x3032 <memset+0x40>    @ imm = #14
-    3022:      	strb	r1, [r0, r4]
-    3024:      	cmp	r3, #1
-    3026:      	beq	0x3032 <memset+0x40>    @ imm = #8
-    3028:      	adds	r2, r4, r0
-    302a:      	strb	r1, [r2, #1]
-    302c:      	cmp	r3, #2
-    302e:      	beq	0x3032 <memset+0x40>    @ imm = #0
-    3030:      	strb	r1, [r2, #2]
-    3032:      	pop	{r4, r5, r7, pc}
-
-00003034 <__aeabi_memcpy>:
-    3034:      	push	{r7, lr}
-    3036:      	add	r7, sp, #0
-    3038:      	bl	0x2f96 <memcpy>         @ imm = #-166
-    303c:      	pop	{r7, pc}
-
-0000303e <__aeabi_memset>:
-    303e:      	push	{r7, lr}
-    3040:      	add	r7, sp, #0
-    3042:      	mov	r3, r1
-    3044:      	mov	r1, r2
-    3046:      	mov	r2, r3
-    3048:      	bl	0x2ff2 <memset>         @ imm = #-90
-    304c:      	pop	{r7, pc}
-
-0000304e <__aeabi_memset4>:
-    304e:      	push	{r4, r5, r6, r7, lr}
-    3050:      	add	r7, sp, #12
-    3052:      	sub	sp, #4
-    3054:      	mov	r5, r2
-    3056:      	mov	r4, r1
-    3058:      	mov	r3, r0
-    305a:      	uxtb	r2, r2
-    305c:      	cmp	r1, #4
-    305e:      	blo	0x308e <__aeabi_memset4+0x40> @ imm = #44
-    3060:      	lsls	r0, r5, #24
-    3062:      	lsls	r1, r2, #16
-    3064:      	adds	r0, r1, r0
-    3066:      	lsls	r1, r2, #8
-    3068:      	adds	r0, r0, r1
-    306a:      	adds	r5, r0, r2
-    306c:      	subs	r1, r4, #4
-    306e:      	lsrs	r0, r1, #2
-    3070:      	adds	r0, r0, #1
-    3072:      	movs	r6, #3
-    3074:      	ands	r6, r0
-    3076:      	str	r1, [sp]
-    3078:      	beq	0x309a <__aeabi_memset4+0x4c> @ imm = #30
-    307a:      	mov	r0, r3
-    307c:      	stm	r0!, {r5}
-    307e:      	cmp	r6, #1
-    3080:      	beq	0x309e <__aeabi_memset4+0x50> @ imm = #26
-    3082:      	str	r5, [r3, #4]
-    3084:      	cmp	r6, #2
-    3086:      	bne	0x3094 <__aeabi_memset4+0x46> @ imm = #10
-    3088:      	subs	r4, #8
-    308a:      	adds	r3, #8
-    308c:      	b	0x309a <__aeabi_memset4+0x4c> @ imm = #10
-    308e:      	mov	r0, r3
-    3090:      	mov	r1, r4
-    3092:      	b	0x30b4 <__aeabi_memset4+0x66> @ imm = #30
-    3094:      	str	r5, [r3, #8]
-    3096:      	subs	r4, #12
-    3098:      	adds	r3, #12
-    309a:      	mov	r1, r4
-    309c:      	mov	r0, r3
-    309e:      	ldr	r3, [sp]
-    30a0:      	cmp	r3, #12
-    30a2:      	blo	0x30b4 <__aeabi_memset4+0x66> @ imm = #14
-    30a4:      	str	r5, [r0]
-    30a6:      	str	r5, [r0, #4]
-    30a8:      	str	r5, [r0, #8]
-    30aa:      	str	r5, [r0, #12]
-    30ac:      	adds	r0, #16
-    30ae:      	subs	r1, #16
-    30b0:      	cmp	r1, #3
-    30b2:      	bhi	0x30a4 <__aeabi_memset4+0x56> @ imm = #-18
-    30b4:      	bl	0x303e <__aeabi_memset> @ imm = #-122
-    30b8:      	add	sp, #4
-    30ba:      	pop	{r4, r5, r6, r7, pc}
-
-000030bc <__aeabi_memclr8>:
-    30bc:      	push	{r7, lr}
-    30be:      	add	r7, sp, #0
-    30c0:      	movs	r2, #0
-    30c2:      	bl	0x304e <__aeabi_memset4> @ imm = #-120
-    30c6:      	pop	{r7, pc}
-
-000030c8 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5>:
-    30c8:      	push	{r4, r5, r6, r7, lr}
-    30ca:      	add	r7, sp, #12
-    30cc:      	sub	sp, #12
-    30ce:      	mov	r2, r0
-    30d0:      	cmp	r0, r1
-    30d2:      	bhs	0x30dc <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x14> @ imm = #6
-    30d4:      	movs	r0, #0
-    30d6:      	mov	r1, r2
-    30d8:      	add	sp, #12
-    30da:      	pop	{r4, r5, r6, r7, pc}
-    30dc:      	lsrs	r5, r2, #16
-    30de:      	cmp	r1, r5
-    30e0:      	mov	r0, r2
-    30e2:      	bhi	0x30fe <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x36> @ imm = #24
-    30e4:      	mov	r0, r5
-    30e6:      	lsrs	r6, r0, #8
-    30e8:      	cmp	r1, r6
-    30ea:      	bls	0x3104 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x3c> @ imm = #22
-    30ec:      	lsrs	r3, r0, #4
-    30ee:      	cmp	r1, r3
-    30f0:      	bhi	0x310c <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x44> @ imm = #24
-    30f2:      	mov	r0, r3
-    30f4:      	str	r3, [sp, #4]
-    30f6:      	lsrs	r3, r0, #2
-    30f8:      	cmp	r1, r3
-    30fa:      	bls	0x3114 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x4c> @ imm = #22
-    30fc:      	b	0x3116 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x4e> @ imm = #22
-    30fe:      	lsrs	r6, r0, #8
-    3100:      	cmp	r1, r6
-    3102:      	bhi	0x30ec <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x24> @ imm = #-26
-    3104:      	mov	r0, r6
-    3106:      	lsrs	r3, r0, #4
-    3108:      	cmp	r1, r3
-    310a:      	bls	0x30f2 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x2a> @ imm = #-28
-    310c:      	str	r3, [sp, #4]
-    310e:      	lsrs	r3, r0, #2
-    3110:      	cmp	r1, r3
-    3112:      	bhi	0x3116 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x4e> @ imm = #0
-    3114:      	mov	r0, r3
-    3116:      	str	r3, [sp, #8]
-    3118:      	lsrs	r3, r0, #1
-    311a:      	movs	r4, #1
-    311c:      	movs	r0, #0
-    311e:      	cmp	r1, r3
-    3120:      	mov	r3, r4
-    3122:      	bls	0x3126 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x5e> @ imm = #0
-    3124:      	mov	r3, r0
-    3126:      	cmp	r1, r5
-    3128:      	mov	r5, r4
-    312a:      	bls	0x312e <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x66> @ imm = #0
-    312c:      	mov	r5, r0
-    312e:      	str	r3, [sp]
-    3130:      	lsls	r5, r5, #4
-    3132:      	cmp	r1, r6
-    3134:      	mov	r6, r4
-    3136:      	bls	0x313a <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x72> @ imm = #0
-    3138:      	mov	r6, r0
-    313a:      	lsls	r3, r6, #3
-    313c:      	adds	r5, r3, r5
-    313e:      	ldr	r3, [sp, #4]
-    3140:      	cmp	r1, r3
-    3142:      	mov	r3, r4
-    3144:      	bls	0x3148 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x80> @ imm = #0
-    3146:      	mov	r3, r0
-    3148:      	lsls	r3, r3, #2
-    314a:      	adds	r3, r5, r3
-    314c:      	ldr	r5, [sp, #8]
-    314e:      	cmp	r1, r5
-    3150:      	mov	r5, r4
-    3152:      	bls	0x3156 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x8e> @ imm = #0
-    3154:      	mov	r5, r0
-    3156:      	lsls	r0, r5, #1
-    3158:      	adds	r0, r3, r0
-    315a:      	ldr	r3, [sp]
-    315c:      	adds	r3, r0, r3
-    315e:      	lsls	r4, r3
-    3160:      	mov	r5, r1
-    3162:      	lsls	r5, r3
-    3164:      	subs	r6, r2, r5
-    3166:      	cmp	r6, r1
-    3168:      	bhs	0x3174 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0xac> @ imm = #8
-    316a:      	mov	r2, r6
-    316c:      	mov	r0, r4
-    316e:      	mov	r1, r2
-    3170:      	add	sp, #12
-    3172:      	pop	{r4, r5, r6, r7, pc}
-    3174:      	cmp	r5, #0
-    3176:      	bmi	0x3180 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0xb8> @ imm = #6
-    3178:      	mov	r1, r4
-    317a:      	mov	r0, r4
-    317c:      	mov	r2, r6
-    317e:      	b	0x31ac <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0xe4> @ imm = #42
-    3180:      	lsrs	r5, r5, #1
-    3182:      	subs	r2, r6, r5
-    3184:      	subs	r3, r3, #1
-    3186:      	movs	r0, #31
-    3188:      	str	r3, [sp, #4]
-    318a:      	ands	r0, r3
-    318c:      	str	r0, [sp, #8]
-    318e:      	movs	r0, #1
-    3190:      	ldr	r3, [sp, #8]
-    3192:      	lsls	r0, r3
-    3194:      	cmp	r2, #0
-    3196:      	str	r0, [sp, #8]
-    3198:      	bge	0x319c <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0xd4> @ imm = #0
-    319a:      	movs	r0, #0
-    319c:      	cmp	r2, #0
-    319e:      	bge	0x31a2 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0xda> @ imm = #0
-    31a0:      	mov	r2, r6
-    31a2:      	orrs	r0, r4
-    31a4:      	cmp	r2, r1
-    31a6:      	ldr	r1, [sp, #8]
-    31a8:      	ldr	r3, [sp, #4]
-    31aa:      	blo	0x30d6 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0xe> @ imm = #-216
-    31ac:      	subs	r1, r1, #1
-    31ae:      	cmp	r3, #0
-    31b0:      	beq	0x31de <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x116> @ imm = #42
-    31b2:      	str	r1, [sp, #4]
-    31b4:      	subs	r4, r5, #1
-    31b6:      	movs	r6, #3
-    31b8:      	ands	r6, r3
-    31ba:      	subs	r1, r3, #1
-    31bc:      	str	r1, [sp, #8]
-    31be:      	cmp	r6, #0
-    31c0:      	beq	0x31e2 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x11a> @ imm = #30
-    31c2:      	lsls	r2, r2, #1
-    31c4:      	subs	r2, r2, r4
-    31c6:      	asrs	r5, r2, #31
-    31c8:      	ands	r5, r4
-    31ca:      	adds	r5, r5, r2
-    31cc:      	cmp	r6, #1
-    31ce:      	bne	0x31ee <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x126> @ imm = #28
-    31d0:      	mov	r2, r5
-    31d2:      	ldr	r6, [sp, #8]
-    31d4:      	ldr	r1, [sp, #8]
-    31d6:      	cmp	r1, #3
-    31d8:      	ldr	r1, [sp, #4]
-    31da:      	blo	0x3244 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x17c> @ imm = #102
-    31dc:      	b	0x3216 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x14e> @ imm = #54
-    31de:      	mov	r5, r2
-    31e0:      	b	0x3244 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x17c> @ imm = #96
-    31e2:      	mov	r6, r3
-    31e4:      	ldr	r1, [sp, #8]
-    31e6:      	cmp	r1, #3
-    31e8:      	ldr	r1, [sp, #4]
-    31ea:      	blo	0x3244 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x17c> @ imm = #86
-    31ec:      	b	0x3216 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x14e> @ imm = #38
-    31ee:      	lsls	r2, r5, #1
-    31f0:      	subs	r2, r2, r4
-    31f2:      	asrs	r5, r2, #31
-    31f4:      	ands	r5, r4
-    31f6:      	adds	r5, r5, r2
-    31f8:      	cmp	r6, #2
-    31fa:      	bne	0x3200 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x138> @ imm = #2
-    31fc:      	subs	r6, r3, #2
-    31fe:      	b	0x320c <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x144> @ imm = #10
-    3200:      	lsls	r2, r5, #1
-    3202:      	subs	r2, r2, r4
-    3204:      	asrs	r5, r2, #31
-    3206:      	ands	r5, r4
-    3208:      	adds	r5, r5, r2
-    320a:      	subs	r6, r3, #3
-    320c:      	mov	r2, r5
-    320e:      	ldr	r1, [sp, #8]
-    3210:      	cmp	r1, #3
-    3212:      	ldr	r1, [sp, #4]
-    3214:      	blo	0x3244 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x17c> @ imm = #44
-    3216:      	mov	r5, r2
-    3218:      	lsls	r2, r5, #1
-    321a:      	subs	r2, r2, r4
-    321c:      	asrs	r5, r2, #31
-    321e:      	ands	r5, r4
-    3220:      	adds	r2, r5, r2
-    3222:      	lsls	r2, r2, #1
-    3224:      	subs	r2, r2, r4
-    3226:      	asrs	r5, r2, #31
-    3228:      	ands	r5, r4
-    322a:      	adds	r2, r5, r2
-    322c:      	lsls	r2, r2, #1
-    322e:      	subs	r2, r2, r4
-    3230:      	asrs	r5, r2, #31
-    3232:      	ands	r5, r4
-    3234:      	adds	r2, r5, r2
-    3236:      	lsls	r2, r2, #1
-    3238:      	subs	r2, r2, r4
-    323a:      	asrs	r5, r2, #31
-    323c:      	ands	r5, r4
-    323e:      	adds	r5, r5, r2
-    3240:      	subs	r6, r6, #4
-    3242:      	bne	0x3218 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x150> @ imm = #-46
-    3244:      	movs	r2, #31
-    3246:      	ands	r3, r2
-    3248:      	mov	r2, r5
-    324a:      	lsrs	r2, r3
-    324c:      	ands	r1, r5
-    324e:      	orrs	r0, r1
-    3250:      	mov	r1, r2
-    3252:      	add	sp, #12
-    3254:      	pop	{r4, r5, r6, r7, pc}
-    3256:      	bmi	0x3202 <compiler_builtins::int::specialized_div_rem::u32_div_rem::h530760ff03a3a1a5+0x13a> @ imm = #-88
-
-00003258 <__clzsi2>:
-    3258:      	push	{r7, lr}
-    325a:      	lsrs	r3, r0, #16
-    325c:      	add	r7, sp, #0
-    325e:      	cmp	r3, #0
-    3260:      	beq	0x3298 <__clzsi2+0x40>  @ imm = #52
-    3262:      	movs	r0, r3
-    3264:      	movs	r1, #8
-    3266:      	movs	r2, #0
-    3268:      	movs	r3, #255
-    326a:      	lsls	r3, r3, #8
-    326c:      	tst	r0, r3
-    326e:      	beq	0x3274 <__clzsi2+0x1c>  @ imm = #2
-    3270:      	movs	r1, r2
-    3272:      	lsrs	r0, r0, #8
-    3274:      	movs	r3, #240
-    3276:      	tst	r3, r0
-    3278:      	beq	0x32a2 <__clzsi2+0x4a>  @ imm = #38
-    327a:      	lsrs	r0, r0, #4
-    327c:      	movs	r3, #12
-    327e:      	tst	r3, r0
-    3280:      	beq	0x329e <__clzsi2+0x46>  @ imm = #26
-    3282:      	lsrs	r0, r0, #2
-    3284:      	movs	r2, #1
-    3286:      	lsrs	r3, r0, #1
-    3288:      	bics	r2, r3
-    328a:      	movs	r3, #2
-    328c:      	mov	sp, r7
-    328e:      	rsbs	r2, r2, #0
-    3290:      	subs	r0, r3, r0
-    3292:      	ands	r0, r2
-    3294:      	adds	r0, r0, r1
-    3296:      	pop	{r7, pc}
-    3298:      	movs	r1, #24
-    329a:      	movs	r2, #16
-    329c:      	b	0x3268 <__clzsi2+0x10>  @ imm = #-56
-    329e:      	adds	r1, #2
-    32a0:      	b	0x3284 <__clzsi2+0x2c>  @ imm = #-32
-    32a2:      	adds	r1, #4
-    32a4:      	b	0x327c <__clzsi2+0x24>  @ imm = #-44
-    32a6:      	mov	r8, r8
-
-000032a8 <HardFaultTrampoline>:
-    32a8:      	mov	r0, lr
-    32aa:      	movs	r1, #4
-    32ac:      	tst	r0, r1
-    32ae:      	bne	0x32b6 <HardFaultTrampoline+0xe> @ imm = #4
-    32b0:      	mrs	r0, msp
-    32b4:      	b	0x32bc <HardFault_>     @ imm = #4
-    32b6:      	mrs	r0, psp
-    32ba:      	b	0x32bc <HardFault_>     @ imm = #-2
-
-000032bc <HardFault_>:
-    32bc:      	b	0x32bc <HardFault_>     @ imm = #-4
-    32be:      	bmi	0x326a <__clzsi2+0x12>  @ imm = #-88