From 670e835216017a75a6dceedb8a565242bc4d009c Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Wed, 3 Sep 2025 10:36:52 +0200 Subject: [PATCH] fix examples --- examples/simple/examples/spi.rs | 4 ++-- examples/simple/examples/timer-ticks.rs | 4 ++-- vorago-reb1/examples/adxl343-accelerometer.rs | 4 ++-- vorago-reb1/examples/blinky-button-irq.rs | 6 +++--- vorago-reb1/examples/max11619-adc.rs | 14 +++++++------- vorago-reb1/examples/nvm.rs | 4 ++-- 6 files changed, 18 insertions(+), 18 deletions(-) diff --git a/examples/simple/examples/spi.rs b/examples/simple/examples/spi.rs index 00d7336..e8c24dc 100644 --- a/examples/simple/examples/spi.rs +++ b/examples/simple/examples/spi.rs @@ -14,7 +14,7 @@ use va108xx_hal::{ pac, pins::{PinsA, PinsB}, prelude::*, - spi::{self, configure_pin_as_hw_cs_pin, Spi, SpiClkConfig, TransferConfig}, + spi::{self, configure_pin_as_hw_cs_pin, Spi, SpiClockConfig, TransferConfig}, timer::CountdownTimer, }; @@ -45,7 +45,7 @@ fn main() -> ! { let dp = pac::Peripherals::take().unwrap(); let mut delay = CountdownTimer::new(dp.tim0, 50.MHz()); - let spi_clk_cfg = SpiClkConfig::from_clk(50.MHz(), SPI_SPEED_KHZ.kHz()) + let spi_clk_cfg = SpiClockConfig::from_clk(50.MHz(), SPI_SPEED_KHZ.kHz()) .expect("creating SPI clock config failed"); let pinsa = PinsA::new(dp.porta); let pinsb = PinsB::new(dp.portb); diff --git a/examples/simple/examples/timer-ticks.rs b/examples/simple/examples/timer-ticks.rs index 4640485..291f7d4 100644 --- a/examples/simple/examples/timer-ticks.rs +++ b/examples/simple/examples/timer-ticks.rs @@ -41,8 +41,8 @@ fn main() -> ! { dp.sysconfig .tim_clk_enable() .modify(|r, w| w.bits(r.bits() | (1 << 0) | (1 << 1))); - dp.irqsel.tim0(0).write(|w| w.bits(0x00)); - dp.irqsel.tim0(1).write(|w| w.bits(0x01)); + dp.irqsel.tim(0).write(|w| w.bits(0x00)); + dp.irqsel.tim(1).write(|w| w.bits(0x01)); } let sys_clk: Hertz = 50.MHz(); diff --git a/vorago-reb1/examples/adxl343-accelerometer.rs b/vorago-reb1/examples/adxl343-accelerometer.rs index c1ac626..7a00793 100644 --- a/vorago-reb1/examples/adxl343-accelerometer.rs +++ b/vorago-reb1/examples/adxl343-accelerometer.rs @@ -11,7 +11,7 @@ use panic_rtt_target as _; use rtt_target::{rprintln, rtt_init_print}; use va108xx_hal::gpio::{Output, PinState}; use va108xx_hal::pins::PinsA; -use va108xx_hal::spi::{configure_pin_as_hw_cs_pin, SpiClkConfig}; +use va108xx_hal::spi::{configure_pin_as_hw_cs_pin, SpiClockConfig}; use va108xx_hal::timer::CountdownTimer; use va108xx_hal::{ pac, @@ -42,7 +42,7 @@ fn main() -> ! { let spi_cfg = SpiConfig::default() .clk_cfg( - SpiClkConfig::from_clk(50.MHz(), 1.MHz()).expect("creating SPI clock config failed"), + SpiClockConfig::from_clk(50.MHz(), 1.MHz()).expect("creating SPI clock config failed"), ) .mode(MODE_3) .slave_output_disable(true); diff --git a/vorago-reb1/examples/blinky-button-irq.rs b/vorago-reb1/examples/blinky-button-irq.rs index 36fac07..d99e5ba 100644 --- a/vorago-reb1/examples/blinky-button-irq.rs +++ b/vorago-reb1/examples/blinky-button-irq.rs @@ -9,7 +9,7 @@ use cortex_m_rt::entry; use panic_rtt_target as _; use rtt_target::{rprintln, rtt_init_print}; use va108xx_hal::{ - clock::{set_clk_div_register, FilterClkSel}, + clock::{set_clk_div_register, FilterClockSelect}, gpio::{FilterType, InterruptEdge}, pac::{self, interrupt}, pins::PinsA, @@ -46,8 +46,8 @@ fn main() -> ! { if PRESS_MODE == PressMode::Toggle { // This filter debounces the switch for edge based interrupts - button.configure_filter_type(FilterType::FilterFourCycles, FilterClkSel::Clk1); - set_clk_div_register(&mut dp.sysconfig, FilterClkSel::Clk1, 50_000); + button.configure_filter_type(FilterType::FilterFourCycles, FilterClockSelect::Clk1); + set_clk_div_register(&mut dp.sysconfig, FilterClockSelect::Clk1, 50_000); } button.configure_and_enable_edge_interrupt( edge_irq, diff --git a/vorago-reb1/examples/max11619-adc.rs b/vorago-reb1/examples/max11619-adc.rs index 6b8537d..99adedc 100644 --- a/vorago-reb1/examples/max11619-adc.rs +++ b/vorago-reb1/examples/max11619-adc.rs @@ -16,14 +16,14 @@ use panic_rtt_target as _; use rtt_target::{rprintln, rtt_init_print}; use va108xx_hal::gpio::{Input, Output, PinState, Port}; use va108xx_hal::pins::PinsA; -use va108xx_hal::spi::{configure_pin_as_hw_cs_pin, SpiClkConfig}; +use va108xx_hal::spi::{configure_pin_as_hw_cs_pin, SpiClockConfig}; use va108xx_hal::timer::CountdownTimer; use va108xx_hal::{ pac, prelude::*, spi::{HwChipSelectId, Spi, SpiConfig}, }; -use va108xx_hal::{port_function_select, FunSel}; +use va108xx_hal::{port_function_select, FunctionSelect}; use vorago_reb1::max11619::{ max11619_externally_clocked_no_wakeup, max11619_externally_clocked_with_wakeup, max11619_internally_clocked, AN2_CHANNEL, POTENTIOMETER_CHANNEL, @@ -117,16 +117,16 @@ fn main() -> ! { let pinsa = PinsA::new(dp.porta); let spi_cfg = SpiConfig::default() - .clk_cfg(SpiClkConfig::from_clk(SYS_CLK, 3.MHz()).unwrap()) + .clk_cfg(SpiClockConfig::from_clk(SYS_CLK, 3.MHz()).unwrap()) .mode(MODE_0) .blockmode(true); let (sck, mosi, miso) = (pinsa.pa20, pinsa.pa19, pinsa.pa18); if MUX_MODE == MuxMode::PortB19to17 { - port_function_select(&mut dp.ioconfig, Port::B, 19, FunSel::Sel1).ok(); - port_function_select(&mut dp.ioconfig, Port::B, 18, FunSel::Sel2).ok(); - port_function_select(&mut dp.ioconfig, Port::B, 17, FunSel::Sel1).ok(); - port_function_select(&mut dp.ioconfig, Port::B, 16, FunSel::Sel1).ok(); + port_function_select(&mut dp.ioconfig, Port::B, 19, FunctionSelect::Sel1).ok(); + port_function_select(&mut dp.ioconfig, Port::B, 18, FunctionSelect::Sel2).ok(); + port_function_select(&mut dp.ioconfig, Port::B, 17, FunctionSelect::Sel1).ok(); + port_function_select(&mut dp.ioconfig, Port::B, 16, FunctionSelect::Sel1).ok(); } // Set the accelerometer chip select low in case the board slot is populated Output::new(pinsa.pa16, PinState::Low); diff --git a/vorago-reb1/examples/nvm.rs b/vorago-reb1/examples/nvm.rs index c45836f..fe6f77b 100644 --- a/vorago-reb1/examples/nvm.rs +++ b/vorago-reb1/examples/nvm.rs @@ -5,7 +5,7 @@ use cortex_m_rt::entry; use embedded_hal::delay::DelayNs; use panic_rtt_target as _; use rtt_target::{rprintln, rtt_init_print}; -use va108xx_hal::{pac, spi::SpiClkConfig, time::Hertz, timer::CountdownTimer}; +use va108xx_hal::{pac, spi::SpiClockConfig, time::Hertz, timer::CountdownTimer}; use vorago_reb1::m95m01::{M95M01, PAGE_SIZE}; const CLOCK_FREQ: Hertz = Hertz::from_raw(50_000_000); @@ -18,7 +18,7 @@ fn main() -> ! { let dp = pac::Peripherals::take().unwrap(); let mut delay = CountdownTimer::new(dp.tim0, CLOCK_FREQ); - let clk_config = SpiClkConfig::new(2, 4); + let clk_config = SpiClockConfig::new(2, 4); let mut nvm = M95M01::new(dp.spic, clk_config); let status_reg = nvm.read_status_reg().expect("reading status reg failed"); if status_reg.zero_segment().value() == 0b111 {