Async UART TX support
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@ -43,7 +43,7 @@ use once_cell::sync::OnceCell;
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use va108xx_hal::pac::interrupt;
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use va108xx_hal::{
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clock::enable_peripheral_clock,
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enable_interrupt, pac,
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enable_nvic_interrupt, pac,
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prelude::*,
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timer::{enable_tim_clk, get_tim_raw, TimRegInterface},
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PeripheralSelect,
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@ -221,7 +221,7 @@ impl TimerDriver {
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.tim0(timekeeper_tim.tim_id() as usize)
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.write(|w| unsafe { w.bits(timekeeper_irq as u32) });
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unsafe {
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enable_interrupt(timekeeper_irq);
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enable_nvic_interrupt(timekeeper_irq);
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}
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timekeeper_reg_block
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.ctrl()
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@ -239,7 +239,7 @@ impl TimerDriver {
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});
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// Enable general interrupts. The IRQ enable of the peripheral remains cleared.
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unsafe {
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enable_interrupt(alarm_irq);
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enable_nvic_interrupt(alarm_irq);
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}
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irqsel
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.tim0(alarm_tim.tim_id() as usize)
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