Async UART TX support
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@ -25,12 +25,14 @@ pub enum FunSel {
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}
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#[derive(Debug, Copy, Clone, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum PortSel {
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PortA,
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PortB,
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}
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#[derive(Copy, Clone, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum PeripheralSelect {
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PortA = 0,
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PortB = 1,
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@ -47,31 +49,38 @@ pub enum PeripheralSelect {
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Gpio = 24,
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}
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/// Generic IRQ config which can be used to specify whether the HAL driver will
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/// Generic interrupt config which can be used to specify whether the HAL driver will
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/// use the IRQSEL register to route an interrupt, and whether the IRQ will be unmasked in the
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/// Cortex-M0 NVIC. Both are generally necessary for IRQs to work, but the user might perform
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/// this steps themselves
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#[derive(Debug, PartialEq, Eq, Clone, Copy)]
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pub struct IrqCfg {
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pub struct InterruptConfig {
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/// Interrupt target vector. Should always be set, might be required for disabling IRQs
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pub irq: pac::Interrupt,
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/// Specfiy whether IRQ should be routed to an IRQ vector using the IRQSEL peripheral
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pub id: pac::Interrupt,
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/// Specfiy whether IRQ should be routed to an IRQ vector using the IRQSEL peripheral.
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pub route: bool,
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/// Specify whether the IRQ is unmasked in the Cortex-M NVIC
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pub enable: bool,
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/// Specify whether the IRQ is unmasked in the Cortex-M NVIC. If an interrupt is used for
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/// multiple purposes, the user can enable the interrupts themselves.
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pub enable_in_nvic: bool,
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}
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impl IrqCfg {
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pub fn new(irq: pac::Interrupt, route: bool, enable: bool) -> Self {
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IrqCfg { irq, route, enable }
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impl InterruptConfig {
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pub fn new(id: pac::Interrupt, route: bool, enable_in_nvic: bool) -> Self {
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InterruptConfig {
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id,
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route,
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enable_in_nvic,
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}
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}
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}
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pub type IrqCfg = InterruptConfig;
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#[derive(Debug, PartialEq, Eq)]
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pub struct InvalidPin(pub(crate) ());
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/// Can be used to manually manipulate the function select of port pins
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pub fn port_mux(
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pub fn port_function_select(
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ioconfig: &mut pac::Ioconfig,
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port: PortSel,
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pin: u8,
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@ -105,7 +114,7 @@ pub fn port_mux(
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///
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/// This function is `unsafe` because it can break mask-based critical sections.
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#[inline]
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pub unsafe fn enable_interrupt(irq: pac::Interrupt) {
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pub unsafe fn enable_nvic_interrupt(irq: pac::Interrupt) {
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unsafe {
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cortex_m::peripheral::NVIC::unmask(irq);
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}
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@ -113,6 +122,6 @@ pub unsafe fn enable_interrupt(irq: pac::Interrupt) {
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/// Disable a specific interrupt using the NVIC peripheral.
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#[inline]
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pub fn disable_interrupt(irq: pac::Interrupt) {
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pub fn disable_nvic_interrupt(irq: pac::Interrupt) {
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cortex_m::peripheral::NVIC::mask(irq);
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}
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