bootloader works

board-tests/src/main.rs

@@ -17,7 +17,7 @@ use va108xx_hal::{
     pac::{self, interrupt},
     prelude::*,
     time::Hertz,
-    timer::{default_ms_irq_handler, set_up_ms_tick, CountDownTimer, IrqCfg},
+    timer::{default_ms_irq_handler, set_up_ms_tick, CountdownTimer, IrqCfg},
 };
 
 #[allow(dead_code)]
@@ -168,7 +168,7 @@ fn main() -> ! {
                 ms_timer.delay_ms(500);
             }
 
-            let mut delay_timer = CountDownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim1);
+            let mut delay_timer = CountdownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim1);
             let mut pa0 = pinsa.pa0.into_readable_push_pull_output();
             for _ in 0..5 {
                 led1.toggle().ok();

bootloader/src/main.rs

@@ -100,10 +100,6 @@ fn main() -> ! {
     let mut dp = pac::Peripherals::take().unwrap();
     let cp = cortex_m::Peripherals::take().unwrap();
 
-    let vect_tbl = unsafe {
-        core::slice::from_raw_parts(APP_A_START_ADDR as *const u8, VECTOR_TABLE_LEN as usize)
-    };
-    rprintln!("vector table app A: 0x{:x?}", &vect_tbl[0..32]);
     let mut nvm = M95M01::new(&mut dp.sysconfig, CLOCK_FREQ, dp.spic);
 
     if FLASH_SELF {
@@ -272,20 +268,18 @@ fn boot_app(syscfg: &pac::Sysconfig, cp: &cortex_m::Peripherals, app_sel: AppSel
     unsafe {
         // First 4 bytes done with inline assembly, writing to the physical address 0x0 can not
         // be done without it. See https://users.rust-lang.org/t/reading-from-physical-address-0x0/117408/2.
-        //let first_four_bytes = core::ptr::read(base_addr as *const u32);
+        let first_four_bytes = core::ptr::read(base_addr as *const u32);
         core::arch::asm!(
-            "ldr r0, [{0}]",    // Load 4 bytes from src into r0 register
-            "str r0, [{1}]",    // Store r0 register into first_four_bytes
-            //"str {0}, [{1}]",
-            in(reg)  base_addr as *const u32,  // Input: App vector table.
+            "str {0}, [{1}]",
+            in(reg)  first_four_bytes,  // Input: App vector table.
             in(reg) BOOTLOADER_START_ADDR as *mut u32,  // Input: destination pointer
         );
         core::slice::from_raw_parts_mut(
-            (BOOTLOADER_START_ADDR + 4) as *mut u32,
+            (BOOTLOADER_START_ADDR + 4) as *mut u8,
             (VECTOR_TABLE_LEN - 4) as usize,
         )
         .copy_from_slice(core::slice::from_raw_parts(
-            (base_addr + 4) as *const u32,
+            (base_addr + 4) as *const u8,
             (VECTOR_TABLE_LEN - 4) as usize,
         ));
     }
@@ -308,6 +302,10 @@ fn soft_reset(cp: &cortex_m::Peripherals) -> ! {
     }
     // Ensure completion of memory access.
     cortex_m::asm::dsb();
+    rprintln!("soft  reset done");
 
-    unreachable!();
+    // Loop until the reset occurs.
+    loop {
+        cortex_m::asm::nop();
+    }
 }

examples/simple/examples/blinky.rs

@@ -16,8 +16,8 @@ use va108xx_hal::{
     gpio::PinsA,
     pac::{self, interrupt},
     prelude::*,
-    pwm::{default_ms_irq_handler, set_up_ms_tick, CountDownTimer},
     timer::DelayMs,
+    timer::{default_ms_irq_handler, set_up_ms_tick, CountdownTimer},
     IrqCfg,
 };
 
@@ -32,7 +32,7 @@ fn main() -> ! {
         dp.tim0,
     ))
     .unwrap();
-    let mut delay_tim1 = CountDownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim1);
+    let mut delay_tim1 = CountdownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim1);
     let porta = PinsA::new(&mut dp.sysconfig, Some(dp.ioconfig), dp.porta);
     let mut led1 = porta.pa10.into_readable_push_pull_output();
     let mut led2 = porta.pa7.into_readable_push_pull_output();

examples/simple/examples/cascade.rs

@@ -17,13 +17,13 @@ use va108xx_hal::{
     prelude::*,
     timer::{
         default_ms_irq_handler, set_up_ms_delay_provider, CascadeCtrl, CascadeSource,
-        CountDownTimer, Event, IrqCfg,
+        CountdownTimer, Event, IrqCfg,
     },
 };
 
-static CSD_TGT_1: Mutex<RefCell<Option<CountDownTimer<pac::Tim4>>>> =
+static CSD_TGT_1: Mutex<RefCell<Option<CountdownTimer<pac::Tim4>>>> =
     Mutex::new(RefCell::new(None));
-static CSD_TGT_2: Mutex<RefCell<Option<CountDownTimer<pac::Tim5>>>> =
+static CSD_TGT_2: Mutex<RefCell<Option<CountdownTimer<pac::Tim5>>>> =
     Mutex::new(RefCell::new(None));
 
 #[entry]
@@ -36,7 +36,7 @@ fn main() -> ! {
 
     // Will be started periodically to trigger a cascade
     let mut cascade_triggerer =
-        CountDownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim3).auto_disable(true);
+        CountdownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim3).auto_disable(true);
     cascade_triggerer.listen(
         Event::TimeOut,
         IrqCfg::new(pac::Interrupt::OC1, true, false),
@@ -46,7 +46,7 @@ fn main() -> ! {
 
     // First target for cascade
     let mut cascade_target_1 =
-        CountDownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim4).auto_deactivate(true);
+        CountdownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim4).auto_deactivate(true);
     cascade_target_1
         .cascade_0_source(CascadeSource::Tim(3))
         .expect("Configuring cascade source for TIM4 failed");
@@ -72,7 +72,7 @@ fn main() -> ! {
 
     // Activated by first cascade target
     let mut cascade_target_2 =
-        CountDownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim5).auto_deactivate(true);
+        CountdownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim5).auto_deactivate(true);
     // Set TIM4 as cascade source
     cascade_target_2
         .cascade_1_source(CascadeSource::Tim(4))

examples/simple/examples/spi.rs

@@ -15,8 +15,8 @@ use va108xx_hal::{
     gpio::{PinsA, PinsB},
     pac::{self, interrupt},
     prelude::*,
-    pwm::{default_ms_irq_handler, set_up_ms_tick},
     spi::{self, Spi, SpiBase, SpiClkConfig, TransferConfigWithHwcs},
+    timer::{default_ms_irq_handler, set_up_ms_tick},
     IrqCfg,
 };
 

examples/simple/examples/timer-ticks.rs

@@ -12,7 +12,7 @@ use va108xx_hal::{
     pac::{self, interrupt},
     prelude::*,
     time::Hertz,
-    timer::{default_ms_irq_handler, set_up_ms_tick, CountDownTimer, Event, IrqCfg, MS_COUNTER},
+    timer::{default_ms_irq_handler, set_up_ms_tick, CountdownTimer, Event, IrqCfg, MS_COUNTER},
 };
 
 #[allow(dead_code)]
@@ -72,7 +72,7 @@ fn main() -> ! {
                 dp.tim0,
             );
             let mut second_timer =
-                CountDownTimer::new(&mut dp.sysconfig, get_sys_clock().unwrap(), dp.tim1);
+                CountdownTimer::new(&mut dp.sysconfig, get_sys_clock().unwrap(), dp.tim1);
             second_timer.listen(
                 Event::TimeOut,
                 IrqCfg::new(interrupt::OC1, true, true),

flashloader/image-loader.py

@@ -328,7 +328,6 @@ def create_loadable_segments(
                 continue
             # Basic validity checks of the base addresses.
             if idx == 0:
-                _LOGGER.debug("data in 0: ", segment.data().hex(sep=','))
                 if (
                     target == Target.BOOTLOADER
                     and segment.header.p_paddr != BOOTLOADER_START_ADDR

flashloader/slot-a-blinky/src/main.rs

@@ -3,10 +3,10 @@
 #![no_std]
 
 use cortex_m_rt::entry;
-use embedded_hal::digital::StatefulOutputPin;
+use embedded_hal::{delay::DelayNs, digital::StatefulOutputPin};
 use panic_rtt_target as _;
 use rtt_target::{rprintln, rtt_init_print};
-use va108xx_hal::{gpio::PinsA, pac};
+use va108xx_hal::{gpio::PinsA, pac, prelude::*, timer::CountdownTimer};
 
 #[entry]
 fn main() -> ! {
@@ -14,11 +14,12 @@ fn main() -> ! {
     rprintln!("VA108xx HAL blinky example for App Slot A");
 
     let mut dp = pac::Peripherals::take().unwrap();
+    let mut timer = CountdownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim0);
     let porta = PinsA::new(&mut dp.sysconfig, Some(dp.ioconfig), dp.porta);
     let mut led1 = porta.pa10.into_readable_push_pull_output();
 
     loop {
-        cortex_m::asm::delay(1_000_000);
         led1.toggle().ok();
+        timer.delay_ms(500);
     }
 }

flashloader/slot-b-blinky/src/main.rs

@@ -3,10 +3,10 @@
 #![no_std]
 
 use cortex_m_rt::entry;
-use embedded_hal::digital::StatefulOutputPin;
+use embedded_hal::{delay::DelayNs, digital::StatefulOutputPin};
 use panic_rtt_target as _;
 use rtt_target::{rprintln, rtt_init_print};
-use va108xx_hal::{gpio::PinsA, pac};
+use va108xx_hal::{gpio::PinsA, pac, prelude::*, timer::CountdownTimer};
 
 #[entry]
 fn main() -> ! {
@@ -14,11 +14,12 @@ fn main() -> ! {
     rprintln!("VA108xx HAL blinky example for App Slot B");
 
     let mut dp = pac::Peripherals::take().unwrap();
+    let mut timer = CountdownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim0);
     let porta = PinsA::new(&mut dp.sysconfig, Some(dp.ioconfig), dp.porta);
     let mut led2 = porta.pa7.into_readable_push_pull_output();
 
     loop {
-        cortex_m::asm::delay(1_000_000);
         led2.toggle().ok();
+        timer.delay_ms(1000);
     }
 }

va108xx-hal/CHANGELOG.md

@@ -15,6 +15,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 - Improve and fix SPI abstractions. Add new low level interface. The primary SPI constructor now
   only expects a configuration structure and the transfer configuration needs to be applied in a
   separate step.
+- Removed complete `timer` module re-export in `pwm` module
+- `CountDownTimer` renamed to `CountdownTimer`
 
 ## Fixes
 

va108xx-hal/src/pwm.rs

@@ -9,8 +9,11 @@ use core::convert::Infallible;
 use core::marker::PhantomData;
 
 use crate::pac;
+use crate::timer::{
+    TimAndPinRegister, TimDynRegister, TimPin, TimRegInterface, ValidTim, ValidTimAndPin,
+};
 use crate::{clock::enable_peripheral_clock, gpio::DynPinId};
-pub use crate::{gpio::PinId, time::Hertz, timer::*};
+pub use crate::{gpio::PinId, time::Hertz};
 
 const DUTY_MAX: u16 = u16::MAX;
 

va108xx-hal/src/timer.rs

@@ -371,7 +371,7 @@ unsafe impl TimRegInterface for TimDynRegister {
 //==================================================================================================
 
 /// Hardware timers
-pub struct CountDownTimer<TIM: ValidTim> {
+pub struct CountdownTimer<TIM: ValidTim> {
     tim: TimRegister<TIM>,
     curr_freq: Hertz,
     irq_cfg: Option<IrqCfg>,
@@ -395,17 +395,17 @@ pub fn disable_tim_clk(syscfg: &mut pac::Sysconfig, idx: u8) {
         .modify(|r, w| unsafe { w.bits(r.bits() & !(1 << idx)) });
 }
 
-unsafe impl<TIM: ValidTim> TimRegInterface for CountDownTimer<TIM> {
+unsafe impl<TIM: ValidTim> TimRegInterface for CountdownTimer<TIM> {
     fn tim_id(&self) -> u8 {
         TIM::TIM_ID
     }
 }
 
-impl<TIM: ValidTim> CountDownTimer<TIM> {
+impl<TIM: ValidTim> CountdownTimer<TIM> {
     /// Configures a TIM peripheral as a periodic count down timer
     pub fn new(syscfg: &mut pac::Sysconfig, sys_clk: impl Into<Hertz>, tim: TIM) -> Self {
         enable_tim_clk(syscfg, TIM::TIM_ID);
-        let cd_timer = CountDownTimer {
+        let cd_timer = CountdownTimer {
             tim: unsafe { TimRegister::new(tim) },
             sys_clk: sys_clk.into(),
             irq_cfg: None,
@@ -614,7 +614,7 @@ impl<TIM: ValidTim> CountDownTimer<TIM> {
 }
 
 /// CountDown implementation for TIMx
-impl<TIM: ValidTim> CountDownTimer<TIM> {
+impl<TIM: ValidTim> CountdownTimer<TIM> {
     #[inline]
     pub fn start<T>(&mut self, timeout: T)
     where
@@ -647,7 +647,7 @@ impl<TIM: ValidTim> CountDownTimer<TIM> {
     }
 }
 
-impl<TIM: ValidTim> embedded_hal::delay::DelayNs for CountDownTimer<TIM> {
+impl<TIM: ValidTim> embedded_hal::delay::DelayNs for CountdownTimer<TIM> {
     fn delay_ns(&mut self, ns: u32) {
         let ticks = (u64::from(ns)) * (u64::from(self.sys_clk.raw())) / 1_000_000_000;
 
@@ -709,8 +709,8 @@ pub fn set_up_ms_tick<TIM: ValidTim>(
     irq_sel: Option<&mut pac::Irqsel>,
     sys_clk: impl Into<Hertz>,
     tim0: TIM,
-) -> CountDownTimer<TIM> {
-    let mut ms_timer = CountDownTimer::new(sys_cfg, sys_clk, tim0);
+) -> CountdownTimer<TIM> {
+    let mut ms_timer = CountdownTimer::new(sys_cfg, sys_clk, tim0);
     ms_timer.listen(timer::Event::TimeOut, irq_cfg, irq_sel, Some(sys_cfg));
     ms_timer.start(1000.Hz());
     ms_timer
@@ -720,8 +720,8 @@ pub fn set_up_ms_delay_provider<TIM: ValidTim>(
     sys_cfg: &mut pac::Sysconfig,
     sys_clk: impl Into<Hertz>,
     tim: TIM,
-) -> CountDownTimer<TIM> {
-    let mut provider = CountDownTimer::new(sys_cfg, sys_clk, tim);
+) -> CountdownTimer<TIM> {
+    let mut provider = CountdownTimer::new(sys_cfg, sys_clk, tim);
     provider.start(1000.Hz());
     provider
 }
@@ -745,10 +745,10 @@ pub fn get_ms_ticks() -> u32 {
 // Delay implementations
 //==================================================================================================
 
-pub struct DelayMs(CountDownTimer<pac::Tim0>);
+pub struct DelayMs(CountdownTimer<pac::Tim0>);
 
 impl DelayMs {
-    pub fn new(timer: CountDownTimer<pac::Tim0>) -> Option<Self> {
+    pub fn new(timer: CountdownTimer<pac::Tim0>) -> Option<Self> {
         if timer.curr_freq() != Hertz::from_raw(1000) || !timer.listening() {
             return None;
         }

vorago-reb1/examples/max11619-adc.rs

@@ -16,7 +16,7 @@ use max116xx_10bit::{AveragingConversions, AveragingResults};
 use panic_rtt_target as _;
 use rtt_target::{rprintln, rtt_init_print};
 use va108xx_hal::spi::{OptionalHwCs, SpiClkConfig};
-use va108xx_hal::timer::CountDownTimer;
+use va108xx_hal::timer::CountdownTimer;
 use va108xx_hal::{
     gpio::PinsA,
     pac::{self, interrupt},
@@ -154,7 +154,7 @@ fn main() -> ! {
         spi_cfg,
     )
     .downgrade();
-    let delay_provider = CountDownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim1);
+    let delay_provider = CountdownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim1);
     let spi_with_hwcs = SpiWithHwCs::new(spi, pinsa.pa17.into_funsel_2(), delay_provider);
     match EXAMPLE_MODE {
         ExampleMode::NotUsingEoc => spi_example_externally_clocked(spi_with_hwcs, delay),
@@ -162,7 +162,7 @@ fn main() -> ! {
             spi_example_internally_clocked(spi_with_hwcs, delay, pinsa.pa14.into_floating_input());
         }
         ExampleMode::NotUsingEocWithDelay => {
-            let delay_us = CountDownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim2);
+            let delay_us = CountdownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim2);
             spi_example_externally_clocked_with_delay(spi_with_hwcs, delay, delay_us);
         }
     }

vorago-reb1/examples/nvm.rs

@@ -5,7 +5,7 @@ use cortex_m_rt::entry;
 use embedded_hal::delay::DelayNs;
 use panic_rtt_target as _;
 use rtt_target::{rprintln, rtt_init_print};
-use va108xx_hal::{pac, pwm::CountDownTimer, time::Hertz};
+use va108xx_hal::{pac, time::Hertz, timer::CountdownTimer};
 use vorago_reb1::m95m01::{M95M01, PAGE_SIZE};
 
 const CLOCK_FREQ: Hertz = Hertz::from_raw(50_000_000);
@@ -17,7 +17,7 @@ fn main() -> ! {
 
     let mut dp = pac::Peripherals::take().unwrap();
 
-    let mut timer = CountDownTimer::new(&mut dp.sysconfig, CLOCK_FREQ, dp.tim0);
+    let mut timer = CountdownTimer::new(&mut dp.sysconfig, CLOCK_FREQ, dp.tim0);
     let mut nvm = M95M01::new(&mut dp.sysconfig, CLOCK_FREQ, dp.spic);
     let status_reg = nvm.read_status_reg().expect("reading status reg failed");
     if status_reg.zero_segment() == 0b111 {