New VA108xx Rust workspace structure + dependency updates
- The workspace is now a monorepo without submodules. The HAL, PAC and BSP are integrated directly - Update all dependencies: embedded-hal v1 and RTIC v2
This commit is contained in:
18
va108xx/src/sysconfig/ef_config.rs
Normal file
18
va108xx/src/sysconfig/ef_config.rs
Normal file
@ -0,0 +1,18 @@
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#[doc = "Register `EF_CONFIG` reader"]
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pub type R = crate::R<EfConfigSpec>;
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impl core::fmt::Debug for R {
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fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
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write!(f, "{}", self.bits())
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}
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}
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#[doc = "EFuse Config Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ef_config::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
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pub struct EfConfigSpec;
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impl crate::RegisterSpec for EfConfigSpec {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [`ef_config::R`](R) reader structure"]
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impl crate::Readable for EfConfigSpec {}
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#[doc = "`reset()` method sets EF_CONFIG to value 0"]
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impl crate::Resettable for EfConfigSpec {
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const RESET_VALUE: u32 = 0;
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}
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18
va108xx/src/sysconfig/ef_id.rs
Normal file
18
va108xx/src/sysconfig/ef_id.rs
Normal file
@ -0,0 +1,18 @@
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#[doc = "Register `EF_ID` reader"]
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pub type R = crate::R<EfIdSpec>;
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impl core::fmt::Debug for R {
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fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
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write!(f, "{}", self.bits())
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}
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}
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#[doc = "EFuse ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ef_id::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
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pub struct EfIdSpec;
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impl crate::RegisterSpec for EfIdSpec {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [`ef_id::R`](R) reader structure"]
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impl crate::Readable for EfIdSpec {}
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#[doc = "`reset()` method sets EF_ID to value 0"]
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impl crate::Resettable for EfIdSpec {
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const RESET_VALUE: u32 = 0;
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}
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27
va108xx/src/sysconfig/ioconfig_clkdiv.rs
Normal file
27
va108xx/src/sysconfig/ioconfig_clkdiv.rs
Normal file
@ -0,0 +1,27 @@
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#[doc = "Register `IOCONFIG_CLKDIV%s` reader"]
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pub type R = crate::R<IoconfigClkdivSpec>;
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#[doc = "Register `IOCONFIG_CLKDIV%s` writer"]
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pub type W = crate::W<IoconfigClkdivSpec>;
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impl core::fmt::Debug for R {
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fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
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write!(f, "{}", self.bits())
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}
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}
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impl W {}
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#[doc = "IO Configuration Clock Divider Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ioconfig_clkdiv::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ioconfig_clkdiv::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
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pub struct IoconfigClkdivSpec;
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impl crate::RegisterSpec for IoconfigClkdivSpec {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [`ioconfig_clkdiv::R`](R) reader structure"]
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impl crate::Readable for IoconfigClkdivSpec {}
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#[doc = "`write(|w| ..)` method takes [`ioconfig_clkdiv::W`](W) writer structure"]
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impl crate::Writable for IoconfigClkdivSpec {
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type Safety = crate::Unsafe;
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const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
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const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
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}
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#[doc = "`reset()` method sets IOCONFIG_CLKDIV%s to value 0"]
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impl crate::Resettable for IoconfigClkdivSpec {
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const RESET_VALUE: u32 = 0;
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}
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18
va108xx/src/sysconfig/ioconfig_clkdiv0.rs
Normal file
18
va108xx/src/sysconfig/ioconfig_clkdiv0.rs
Normal file
@ -0,0 +1,18 @@
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#[doc = "Register `IOCONFIG_CLKDIV0` reader"]
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pub type R = crate::R<IoconfigClkdiv0Spec>;
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impl core::fmt::Debug for R {
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fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
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write!(f, "{}", self.bits())
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}
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}
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#[doc = "IO Configuration Clock Divider Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ioconfig_clkdiv0::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
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pub struct IoconfigClkdiv0Spec;
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impl crate::RegisterSpec for IoconfigClkdiv0Spec {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [`ioconfig_clkdiv0::R`](R) reader structure"]
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impl crate::Readable for IoconfigClkdiv0Spec {}
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#[doc = "`reset()` method sets IOCONFIG_CLKDIV0 to value 0"]
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impl crate::Resettable for IoconfigClkdiv0Spec {
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const RESET_VALUE: u32 = 0;
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}
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85
va108xx/src/sysconfig/irq_enb.rs
Normal file
85
va108xx/src/sysconfig/irq_enb.rs
Normal file
@ -0,0 +1,85 @@
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#[doc = "Register `IRQ_ENB` reader"]
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pub type R = crate::R<IrqEnbSpec>;
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#[doc = "Register `IRQ_ENB` writer"]
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pub type W = crate::W<IrqEnbSpec>;
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#[doc = "Field `RAMSBE` reader - RAM Single Bit Interrupt"]
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pub type RamsbeR = crate::BitReader;
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#[doc = "Field `RAMSBE` writer - RAM Single Bit Interrupt"]
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pub type RamsbeW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `RAMMBE` reader - RAM Multi Bit Interrupt"]
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pub type RammbeR = crate::BitReader;
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#[doc = "Field `RAMMBE` writer - RAM Multi Bit Interrupt"]
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pub type RammbeW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `ROMSBE` reader - ROM Single Bit Interrupt"]
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pub type RomsbeR = crate::BitReader;
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#[doc = "Field `ROMSBE` writer - ROM Single Bit Interrupt"]
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pub type RomsbeW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `ROMMBE` reader - ROM Multi Bit Interrupt"]
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pub type RommbeR = crate::BitReader;
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#[doc = "Field `ROMMBE` writer - ROM Multi Bit Interrupt"]
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pub type RommbeW<'a, REG> = crate::BitWriter<'a, REG>;
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impl R {
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#[doc = "Bit 0 - RAM Single Bit Interrupt"]
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#[inline(always)]
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pub fn ramsbe(&self) -> RamsbeR {
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RamsbeR::new((self.bits & 1) != 0)
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}
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#[doc = "Bit 1 - RAM Multi Bit Interrupt"]
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#[inline(always)]
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pub fn rammbe(&self) -> RammbeR {
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RammbeR::new(((self.bits >> 1) & 1) != 0)
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}
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#[doc = "Bit 2 - ROM Single Bit Interrupt"]
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#[inline(always)]
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pub fn romsbe(&self) -> RomsbeR {
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RomsbeR::new(((self.bits >> 2) & 1) != 0)
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}
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#[doc = "Bit 3 - ROM Multi Bit Interrupt"]
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#[inline(always)]
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pub fn rommbe(&self) -> RommbeR {
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RommbeR::new(((self.bits >> 3) & 1) != 0)
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}
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}
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impl W {
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#[doc = "Bit 0 - RAM Single Bit Interrupt"]
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#[inline(always)]
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#[must_use]
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pub fn ramsbe(&mut self) -> RamsbeW<IrqEnbSpec> {
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RamsbeW::new(self, 0)
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}
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#[doc = "Bit 1 - RAM Multi Bit Interrupt"]
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#[inline(always)]
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#[must_use]
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pub fn rammbe(&mut self) -> RammbeW<IrqEnbSpec> {
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RammbeW::new(self, 1)
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}
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#[doc = "Bit 2 - ROM Single Bit Interrupt"]
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#[inline(always)]
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#[must_use]
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pub fn romsbe(&mut self) -> RomsbeW<IrqEnbSpec> {
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RomsbeW::new(self, 2)
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}
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#[doc = "Bit 3 - ROM Multi Bit Interrupt"]
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#[inline(always)]
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#[must_use]
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pub fn rommbe(&mut self) -> RommbeW<IrqEnbSpec> {
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RommbeW::new(self, 3)
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}
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}
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#[doc = "Enable EDAC Error Interrupt Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`irq_enb::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`irq_enb::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
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pub struct IrqEnbSpec;
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impl crate::RegisterSpec for IrqEnbSpec {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [`irq_enb::R`](R) reader structure"]
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impl crate::Readable for IrqEnbSpec {}
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#[doc = "`write(|w| ..)` method takes [`irq_enb::W`](W) writer structure"]
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impl crate::Writable for IrqEnbSpec {
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type Safety = crate::Unsafe;
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const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
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const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
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}
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#[doc = "`reset()` method sets IRQ_ENB to value 0"]
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impl crate::Resettable for IrqEnbSpec {
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const RESET_VALUE: u32 = 0;
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}
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40
va108xx/src/sysconfig/lockup_reset.rs
Normal file
40
va108xx/src/sysconfig/lockup_reset.rs
Normal file
@ -0,0 +1,40 @@
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#[doc = "Register `LOCKUP_RESET` reader"]
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pub type R = crate::R<LockupResetSpec>;
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#[doc = "Register `LOCKUP_RESET` writer"]
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pub type W = crate::W<LockupResetSpec>;
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#[doc = "Field `LREN` reader - Lockup Reset Enable Bit"]
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pub type LrenR = crate::BitReader;
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#[doc = "Field `LREN` writer - Lockup Reset Enable Bit"]
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pub type LrenW<'a, REG> = crate::BitWriter<'a, REG>;
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impl R {
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#[doc = "Bit 0 - Lockup Reset Enable Bit"]
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#[inline(always)]
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pub fn lren(&self) -> LrenR {
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LrenR::new((self.bits & 1) != 0)
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}
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}
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impl W {
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#[doc = "Bit 0 - Lockup Reset Enable Bit"]
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#[inline(always)]
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#[must_use]
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pub fn lren(&mut self) -> LrenW<LockupResetSpec> {
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LrenW::new(self, 0)
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}
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}
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#[doc = "Lockup Reset Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lockup_reset::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lockup_reset::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
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pub struct LockupResetSpec;
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impl crate::RegisterSpec for LockupResetSpec {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [`lockup_reset::R`](R) reader structure"]
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impl crate::Readable for LockupResetSpec {}
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#[doc = "`write(|w| ..)` method takes [`lockup_reset::W`](W) writer structure"]
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impl crate::Writable for LockupResetSpec {
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type Safety = crate::Unsafe;
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const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
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const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
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}
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#[doc = "`reset()` method sets LOCKUP_RESET to value 0x01"]
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impl crate::Resettable for LockupResetSpec {
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const RESET_VALUE: u32 = 0x01;
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}
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18
va108xx/src/sysconfig/perid.rs
Normal file
18
va108xx/src/sysconfig/perid.rs
Normal file
@ -0,0 +1,18 @@
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#[doc = "Register `PERID` reader"]
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pub type R = crate::R<PeridSpec>;
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impl core::fmt::Debug for R {
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fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
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write!(f, "{}", self.bits())
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}
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}
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#[doc = "Peripheral ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`perid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
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pub struct PeridSpec;
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impl crate::RegisterSpec for PeridSpec {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [`perid::R`](R) reader structure"]
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impl crate::Readable for PeridSpec {}
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#[doc = "`reset()` method sets PERID to value 0x0080_07e1"]
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impl crate::Resettable for PeridSpec {
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const RESET_VALUE: u32 = 0x0080_07e1;
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}
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248
va108xx/src/sysconfig/peripheral_clk_enable.rs
Normal file
248
va108xx/src/sysconfig/peripheral_clk_enable.rs
Normal file
@ -0,0 +1,248 @@
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#[doc = "Register `PERIPHERAL_CLK_ENABLE` reader"]
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pub type R = crate::R<PeripheralClkEnableSpec>;
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#[doc = "Register `PERIPHERAL_CLK_ENABLE` writer"]
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pub type W = crate::W<PeripheralClkEnableSpec>;
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#[doc = "Field `PORTA` reader - Enable PORTA clock"]
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pub type PortaR = crate::BitReader;
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#[doc = "Field `PORTA` writer - Enable PORTA clock"]
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pub type PortaW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `PORTB` reader - Enable PORTB clock"]
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pub type PortbR = crate::BitReader;
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#[doc = "Field `PORTB` writer - Enable PORTB clock"]
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pub type PortbW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `SPI_0` reader - Enable SPI\\[0\\]
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clock"]
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pub type Spi0R = crate::BitReader;
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#[doc = "Field `SPI_0` writer - Enable SPI\\[0\\]
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clock"]
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pub type Spi0W<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `SPI_1` reader - Enable SPI\\[1\\]
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clock"]
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pub type Spi1R = crate::BitReader;
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#[doc = "Field `SPI_1` writer - Enable SPI\\[1\\]
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clock"]
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pub type Spi1W<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `SPI_2` reader - Enable SPI\\[2\\]
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clock"]
|
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pub type Spi2R = crate::BitReader;
|
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#[doc = "Field `SPI_2` writer - Enable SPI\\[2\\]
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clock"]
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pub type Spi2W<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `UART_0` reader - Enable UART\\[0\\]
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clock"]
|
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pub type Uart0R = crate::BitReader;
|
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#[doc = "Field `UART_0` writer - Enable UART\\[0\\]
|
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clock"]
|
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pub type Uart0W<'a, REG> = crate::BitWriter<'a, REG>;
|
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#[doc = "Field `UART_1` reader - Enable UART\\[1\\]
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clock"]
|
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pub type Uart1R = crate::BitReader;
|
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#[doc = "Field `UART_1` writer - Enable UART\\[1\\]
|
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clock"]
|
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pub type Uart1W<'a, REG> = crate::BitWriter<'a, REG>;
|
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#[doc = "Field `I2C_0` reader - Enable I2C\\[0\\]
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clock"]
|
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pub type I2c0R = crate::BitReader;
|
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#[doc = "Field `I2C_0` writer - Enable I2C\\[0\\]
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clock"]
|
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pub type I2c0W<'a, REG> = crate::BitWriter<'a, REG>;
|
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#[doc = "Field `I2C_1` reader - Enable I2C\\[1\\]
|
||||
clock"]
|
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pub type I2c1R = crate::BitReader;
|
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#[doc = "Field `I2C_1` writer - Enable I2C\\[1\\]
|
||||
clock"]
|
||||
pub type I2c1W<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
#[doc = "Field `IRQSEL` reader - Enable IRQ selector clock"]
|
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pub type IrqselR = crate::BitReader;
|
||||
#[doc = "Field `IRQSEL` writer - Enable IRQ selector clock"]
|
||||
pub type IrqselW<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
#[doc = "Field `IOCONFIG` reader - Enable IO Configuration block clock"]
|
||||
pub type IoconfigR = crate::BitReader;
|
||||
#[doc = "Field `IOCONFIG` writer - Enable IO Configuration block clock"]
|
||||
pub type IoconfigW<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
#[doc = "Field `UTILITY` reader - Enable utility clock"]
|
||||
pub type UtilityR = crate::BitReader;
|
||||
#[doc = "Field `UTILITY` writer - Enable utility clock"]
|
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pub type UtilityW<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
#[doc = "Field `GPIO` reader - Enable GPIO clock"]
|
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pub type GpioR = crate::BitReader;
|
||||
#[doc = "Field `GPIO` writer - Enable GPIO clock"]
|
||||
pub type GpioW<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
impl R {
|
||||
#[doc = "Bit 0 - Enable PORTA clock"]
|
||||
#[inline(always)]
|
||||
pub fn porta(&self) -> PortaR {
|
||||
PortaR::new((self.bits & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 1 - Enable PORTB clock"]
|
||||
#[inline(always)]
|
||||
pub fn portb(&self) -> PortbR {
|
||||
PortbR::new(((self.bits >> 1) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 4 - Enable SPI\\[0\\]
|
||||
clock"]
|
||||
#[inline(always)]
|
||||
pub fn spi_0(&self) -> Spi0R {
|
||||
Spi0R::new(((self.bits >> 4) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 5 - Enable SPI\\[1\\]
|
||||
clock"]
|
||||
#[inline(always)]
|
||||
pub fn spi_1(&self) -> Spi1R {
|
||||
Spi1R::new(((self.bits >> 5) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 6 - Enable SPI\\[2\\]
|
||||
clock"]
|
||||
#[inline(always)]
|
||||
pub fn spi_2(&self) -> Spi2R {
|
||||
Spi2R::new(((self.bits >> 6) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 8 - Enable UART\\[0\\]
|
||||
clock"]
|
||||
#[inline(always)]
|
||||
pub fn uart_0(&self) -> Uart0R {
|
||||
Uart0R::new(((self.bits >> 8) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 9 - Enable UART\\[1\\]
|
||||
clock"]
|
||||
#[inline(always)]
|
||||
pub fn uart_1(&self) -> Uart1R {
|
||||
Uart1R::new(((self.bits >> 9) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 16 - Enable I2C\\[0\\]
|
||||
clock"]
|
||||
#[inline(always)]
|
||||
pub fn i2c_0(&self) -> I2c0R {
|
||||
I2c0R::new(((self.bits >> 16) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 17 - Enable I2C\\[1\\]
|
||||
clock"]
|
||||
#[inline(always)]
|
||||
pub fn i2c_1(&self) -> I2c1R {
|
||||
I2c1R::new(((self.bits >> 17) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 21 - Enable IRQ selector clock"]
|
||||
#[inline(always)]
|
||||
pub fn irqsel(&self) -> IrqselR {
|
||||
IrqselR::new(((self.bits >> 21) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 22 - Enable IO Configuration block clock"]
|
||||
#[inline(always)]
|
||||
pub fn ioconfig(&self) -> IoconfigR {
|
||||
IoconfigR::new(((self.bits >> 22) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 23 - Enable utility clock"]
|
||||
#[inline(always)]
|
||||
pub fn utility(&self) -> UtilityR {
|
||||
UtilityR::new(((self.bits >> 23) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 24 - Enable GPIO clock"]
|
||||
#[inline(always)]
|
||||
pub fn gpio(&self) -> GpioR {
|
||||
GpioR::new(((self.bits >> 24) & 1) != 0)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bit 0 - Enable PORTA clock"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn porta(&mut self) -> PortaW<PeripheralClkEnableSpec> {
|
||||
PortaW::new(self, 0)
|
||||
}
|
||||
#[doc = "Bit 1 - Enable PORTB clock"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn portb(&mut self) -> PortbW<PeripheralClkEnableSpec> {
|
||||
PortbW::new(self, 1)
|
||||
}
|
||||
#[doc = "Bit 4 - Enable SPI\\[0\\]
|
||||
clock"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn spi_0(&mut self) -> Spi0W<PeripheralClkEnableSpec> {
|
||||
Spi0W::new(self, 4)
|
||||
}
|
||||
#[doc = "Bit 5 - Enable SPI\\[1\\]
|
||||
clock"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn spi_1(&mut self) -> Spi1W<PeripheralClkEnableSpec> {
|
||||
Spi1W::new(self, 5)
|
||||
}
|
||||
#[doc = "Bit 6 - Enable SPI\\[2\\]
|
||||
clock"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn spi_2(&mut self) -> Spi2W<PeripheralClkEnableSpec> {
|
||||
Spi2W::new(self, 6)
|
||||
}
|
||||
#[doc = "Bit 8 - Enable UART\\[0\\]
|
||||
clock"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn uart_0(&mut self) -> Uart0W<PeripheralClkEnableSpec> {
|
||||
Uart0W::new(self, 8)
|
||||
}
|
||||
#[doc = "Bit 9 - Enable UART\\[1\\]
|
||||
clock"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn uart_1(&mut self) -> Uart1W<PeripheralClkEnableSpec> {
|
||||
Uart1W::new(self, 9)
|
||||
}
|
||||
#[doc = "Bit 16 - Enable I2C\\[0\\]
|
||||
clock"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn i2c_0(&mut self) -> I2c0W<PeripheralClkEnableSpec> {
|
||||
I2c0W::new(self, 16)
|
||||
}
|
||||
#[doc = "Bit 17 - Enable I2C\\[1\\]
|
||||
clock"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn i2c_1(&mut self) -> I2c1W<PeripheralClkEnableSpec> {
|
||||
I2c1W::new(self, 17)
|
||||
}
|
||||
#[doc = "Bit 21 - Enable IRQ selector clock"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn irqsel(&mut self) -> IrqselW<PeripheralClkEnableSpec> {
|
||||
IrqselW::new(self, 21)
|
||||
}
|
||||
#[doc = "Bit 22 - Enable IO Configuration block clock"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn ioconfig(&mut self) -> IoconfigW<PeripheralClkEnableSpec> {
|
||||
IoconfigW::new(self, 22)
|
||||
}
|
||||
#[doc = "Bit 23 - Enable utility clock"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn utility(&mut self) -> UtilityW<PeripheralClkEnableSpec> {
|
||||
UtilityW::new(self, 23)
|
||||
}
|
||||
#[doc = "Bit 24 - Enable GPIO clock"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn gpio(&mut self) -> GpioW<PeripheralClkEnableSpec> {
|
||||
GpioW::new(self, 24)
|
||||
}
|
||||
}
|
||||
#[doc = "Peripheral Enable Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`peripheral_clk_enable::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`peripheral_clk_enable::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
|
||||
pub struct PeripheralClkEnableSpec;
|
||||
impl crate::RegisterSpec for PeripheralClkEnableSpec {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`read()` method returns [`peripheral_clk_enable::R`](R) reader structure"]
|
||||
impl crate::Readable for PeripheralClkEnableSpec {}
|
||||
#[doc = "`write(|w| ..)` method takes [`peripheral_clk_enable::W`](W) writer structure"]
|
||||
impl crate::Writable for PeripheralClkEnableSpec {
|
||||
type Safety = crate::Unsafe;
|
||||
const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
|
||||
const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
|
||||
}
|
||||
#[doc = "`reset()` method sets PERIPHERAL_CLK_ENABLE to value 0"]
|
||||
impl crate::Resettable for PeripheralClkEnableSpec {
|
||||
const RESET_VALUE: u32 = 0;
|
||||
}
|
||||
220
va108xx/src/sysconfig/peripheral_reset.rs
Normal file
220
va108xx/src/sysconfig/peripheral_reset.rs
Normal file
@ -0,0 +1,220 @@
|
||||
#[doc = "Register `PERIPHERAL_RESET` reader"]
|
||||
pub type R = crate::R<PeripheralResetSpec>;
|
||||
#[doc = "Register `PERIPHERAL_RESET` writer"]
|
||||
pub type W = crate::W<PeripheralResetSpec>;
|
||||
#[doc = "Field `PORTA` reader - Reset PORTA"]
|
||||
pub type PortaR = crate::BitReader;
|
||||
#[doc = "Field `PORTA` writer - Reset PORTA"]
|
||||
pub type PortaW<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
#[doc = "Field `PORTB` reader - Reset PORTB"]
|
||||
pub type PortbR = crate::BitReader;
|
||||
#[doc = "Field `PORTB` writer - Reset PORTB"]
|
||||
pub type PortbW<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
#[doc = "Field `SPI_0` reader - Reset SPI\\[0\\]"]
|
||||
pub type Spi0R = crate::BitReader;
|
||||
#[doc = "Field `SPI_0` writer - Reset SPI\\[0\\]"]
|
||||
pub type Spi0W<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
#[doc = "Field `SPI_1` reader - Reset SPI\\[1\\]"]
|
||||
pub type Spi1R = crate::BitReader;
|
||||
#[doc = "Field `SPI_1` writer - Reset SPI\\[1\\]"]
|
||||
pub type Spi1W<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
#[doc = "Field `SPI_2` reader - Reset SPI\\[2\\]"]
|
||||
pub type Spi2R = crate::BitReader;
|
||||
#[doc = "Field `SPI_2` writer - Reset SPI\\[2\\]"]
|
||||
pub type Spi2W<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
#[doc = "Field `UART_0` reader - Reset UART\\[0\\]"]
|
||||
pub type Uart0R = crate::BitReader;
|
||||
#[doc = "Field `UART_0` writer - Reset UART\\[0\\]"]
|
||||
pub type Uart0W<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
#[doc = "Field `UART_1` reader - Reset UART\\[1\\]"]
|
||||
pub type Uart1R = crate::BitReader;
|
||||
#[doc = "Field `UART_1` writer - Reset UART\\[1\\]"]
|
||||
pub type Uart1W<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
#[doc = "Field `I2C_0` reader - Reset I2C\\[0\\]"]
|
||||
pub type I2c0R = crate::BitReader;
|
||||
#[doc = "Field `I2C_0` writer - Reset I2C\\[0\\]"]
|
||||
pub type I2c0W<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
#[doc = "Field `I2C_1` reader - Reset I2C\\[1\\]"]
|
||||
pub type I2c1R = crate::BitReader;
|
||||
#[doc = "Field `I2C_1` writer - Reset I2C\\[1\\]"]
|
||||
pub type I2c1W<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
#[doc = "Field `IRQSEL` reader - Reset IRQ selector"]
|
||||
pub type IrqselR = crate::BitReader;
|
||||
#[doc = "Field `IRQSEL` writer - Reset IRQ selector"]
|
||||
pub type IrqselW<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
#[doc = "Field `IOCONFIG` reader - Reset IO Configuration block"]
|
||||
pub type IoconfigR = crate::BitReader;
|
||||
#[doc = "Field `IOCONFIG` writer - Reset IO Configuration block"]
|
||||
pub type IoconfigW<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
#[doc = "Field `UTILITY` reader - Reset Utility Block"]
|
||||
pub type UtilityR = crate::BitReader;
|
||||
#[doc = "Field `UTILITY` writer - Reset Utility Block"]
|
||||
pub type UtilityW<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
#[doc = "Field `GPIO` reader - Reset GPIO"]
|
||||
pub type GpioR = crate::BitReader;
|
||||
#[doc = "Field `GPIO` writer - Reset GPIO"]
|
||||
pub type GpioW<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
impl R {
|
||||
#[doc = "Bit 0 - Reset PORTA"]
|
||||
#[inline(always)]
|
||||
pub fn porta(&self) -> PortaR {
|
||||
PortaR::new((self.bits & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 1 - Reset PORTB"]
|
||||
#[inline(always)]
|
||||
pub fn portb(&self) -> PortbR {
|
||||
PortbR::new(((self.bits >> 1) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 4 - Reset SPI\\[0\\]"]
|
||||
#[inline(always)]
|
||||
pub fn spi_0(&self) -> Spi0R {
|
||||
Spi0R::new(((self.bits >> 4) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 5 - Reset SPI\\[1\\]"]
|
||||
#[inline(always)]
|
||||
pub fn spi_1(&self) -> Spi1R {
|
||||
Spi1R::new(((self.bits >> 5) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 6 - Reset SPI\\[2\\]"]
|
||||
#[inline(always)]
|
||||
pub fn spi_2(&self) -> Spi2R {
|
||||
Spi2R::new(((self.bits >> 6) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 8 - Reset UART\\[0\\]"]
|
||||
#[inline(always)]
|
||||
pub fn uart_0(&self) -> Uart0R {
|
||||
Uart0R::new(((self.bits >> 8) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 9 - Reset UART\\[1\\]"]
|
||||
#[inline(always)]
|
||||
pub fn uart_1(&self) -> Uart1R {
|
||||
Uart1R::new(((self.bits >> 9) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 16 - Reset I2C\\[0\\]"]
|
||||
#[inline(always)]
|
||||
pub fn i2c_0(&self) -> I2c0R {
|
||||
I2c0R::new(((self.bits >> 16) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 17 - Reset I2C\\[1\\]"]
|
||||
#[inline(always)]
|
||||
pub fn i2c_1(&self) -> I2c1R {
|
||||
I2c1R::new(((self.bits >> 17) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 21 - Reset IRQ selector"]
|
||||
#[inline(always)]
|
||||
pub fn irqsel(&self) -> IrqselR {
|
||||
IrqselR::new(((self.bits >> 21) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 22 - Reset IO Configuration block"]
|
||||
#[inline(always)]
|
||||
pub fn ioconfig(&self) -> IoconfigR {
|
||||
IoconfigR::new(((self.bits >> 22) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 23 - Reset Utility Block"]
|
||||
#[inline(always)]
|
||||
pub fn utility(&self) -> UtilityR {
|
||||
UtilityR::new(((self.bits >> 23) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 24 - Reset GPIO"]
|
||||
#[inline(always)]
|
||||
pub fn gpio(&self) -> GpioR {
|
||||
GpioR::new(((self.bits >> 24) & 1) != 0)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bit 0 - Reset PORTA"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn porta(&mut self) -> PortaW<PeripheralResetSpec> {
|
||||
PortaW::new(self, 0)
|
||||
}
|
||||
#[doc = "Bit 1 - Reset PORTB"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn portb(&mut self) -> PortbW<PeripheralResetSpec> {
|
||||
PortbW::new(self, 1)
|
||||
}
|
||||
#[doc = "Bit 4 - Reset SPI\\[0\\]"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn spi_0(&mut self) -> Spi0W<PeripheralResetSpec> {
|
||||
Spi0W::new(self, 4)
|
||||
}
|
||||
#[doc = "Bit 5 - Reset SPI\\[1\\]"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn spi_1(&mut self) -> Spi1W<PeripheralResetSpec> {
|
||||
Spi1W::new(self, 5)
|
||||
}
|
||||
#[doc = "Bit 6 - Reset SPI\\[2\\]"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn spi_2(&mut self) -> Spi2W<PeripheralResetSpec> {
|
||||
Spi2W::new(self, 6)
|
||||
}
|
||||
#[doc = "Bit 8 - Reset UART\\[0\\]"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn uart_0(&mut self) -> Uart0W<PeripheralResetSpec> {
|
||||
Uart0W::new(self, 8)
|
||||
}
|
||||
#[doc = "Bit 9 - Reset UART\\[1\\]"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn uart_1(&mut self) -> Uart1W<PeripheralResetSpec> {
|
||||
Uart1W::new(self, 9)
|
||||
}
|
||||
#[doc = "Bit 16 - Reset I2C\\[0\\]"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn i2c_0(&mut self) -> I2c0W<PeripheralResetSpec> {
|
||||
I2c0W::new(self, 16)
|
||||
}
|
||||
#[doc = "Bit 17 - Reset I2C\\[1\\]"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn i2c_1(&mut self) -> I2c1W<PeripheralResetSpec> {
|
||||
I2c1W::new(self, 17)
|
||||
}
|
||||
#[doc = "Bit 21 - Reset IRQ selector"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn irqsel(&mut self) -> IrqselW<PeripheralResetSpec> {
|
||||
IrqselW::new(self, 21)
|
||||
}
|
||||
#[doc = "Bit 22 - Reset IO Configuration block"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn ioconfig(&mut self) -> IoconfigW<PeripheralResetSpec> {
|
||||
IoconfigW::new(self, 22)
|
||||
}
|
||||
#[doc = "Bit 23 - Reset Utility Block"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn utility(&mut self) -> UtilityW<PeripheralResetSpec> {
|
||||
UtilityW::new(self, 23)
|
||||
}
|
||||
#[doc = "Bit 24 - Reset GPIO"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn gpio(&mut self) -> GpioW<PeripheralResetSpec> {
|
||||
GpioW::new(self, 24)
|
||||
}
|
||||
}
|
||||
#[doc = "Peripheral Reset Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`peripheral_reset::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`peripheral_reset::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
|
||||
pub struct PeripheralResetSpec;
|
||||
impl crate::RegisterSpec for PeripheralResetSpec {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`read()` method returns [`peripheral_reset::R`](R) reader structure"]
|
||||
impl crate::Readable for PeripheralResetSpec {}
|
||||
#[doc = "`write(|w| ..)` method takes [`peripheral_reset::W`](W) writer structure"]
|
||||
impl crate::Writable for PeripheralResetSpec {
|
||||
type Safety = crate::Unsafe;
|
||||
const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
|
||||
const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
|
||||
}
|
||||
#[doc = "`reset()` method sets PERIPHERAL_RESET to value 0xffff_ffff"]
|
||||
impl crate::Resettable for PeripheralResetSpec {
|
||||
const RESET_VALUE: u32 = 0xffff_ffff;
|
||||
}
|
||||
18
va108xx/src/sysconfig/procid.rs
Normal file
18
va108xx/src/sysconfig/procid.rs
Normal file
@ -0,0 +1,18 @@
|
||||
#[doc = "Register `PROCID` reader"]
|
||||
pub type R = crate::R<ProcidSpec>;
|
||||
impl core::fmt::Debug for R {
|
||||
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
|
||||
write!(f, "{}", self.bits())
|
||||
}
|
||||
}
|
||||
#[doc = "Processor ID Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`procid::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
|
||||
pub struct ProcidSpec;
|
||||
impl crate::RegisterSpec for ProcidSpec {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`read()` method returns [`procid::R`](R) reader structure"]
|
||||
impl crate::Readable for ProcidSpec {}
|
||||
#[doc = "`reset()` method sets PROCID to value 0x0400_17e3"]
|
||||
impl crate::Resettable for ProcidSpec {
|
||||
const RESET_VALUE: u32 = 0x0400_17e3;
|
||||
}
|
||||
27
va108xx/src/sysconfig/ram_sbe.rs
Normal file
27
va108xx/src/sysconfig/ram_sbe.rs
Normal file
@ -0,0 +1,27 @@
|
||||
#[doc = "Register `RAM_SBE` reader"]
|
||||
pub type R = crate::R<RamSbeSpec>;
|
||||
#[doc = "Register `RAM_SBE` writer"]
|
||||
pub type W = crate::W<RamSbeSpec>;
|
||||
impl core::fmt::Debug for R {
|
||||
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
|
||||
write!(f, "{}", self.bits())
|
||||
}
|
||||
}
|
||||
impl W {}
|
||||
#[doc = "Count of RAM EDAC Single Bit Errors\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ram_sbe::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ram_sbe::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
|
||||
pub struct RamSbeSpec;
|
||||
impl crate::RegisterSpec for RamSbeSpec {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`read()` method returns [`ram_sbe::R`](R) reader structure"]
|
||||
impl crate::Readable for RamSbeSpec {}
|
||||
#[doc = "`write(|w| ..)` method takes [`ram_sbe::W`](W) writer structure"]
|
||||
impl crate::Writable for RamSbeSpec {
|
||||
type Safety = crate::Unsafe;
|
||||
const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
|
||||
const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
|
||||
}
|
||||
#[doc = "`reset()` method sets RAM_SBE to value 0"]
|
||||
impl crate::Resettable for RamSbeSpec {
|
||||
const RESET_VALUE: u32 = 0;
|
||||
}
|
||||
27
va108xx/src/sysconfig/refresh_config.rs
Normal file
27
va108xx/src/sysconfig/refresh_config.rs
Normal file
@ -0,0 +1,27 @@
|
||||
#[doc = "Register `REFRESH_CONFIG` reader"]
|
||||
pub type R = crate::R<RefreshConfigSpec>;
|
||||
#[doc = "Register `REFRESH_CONFIG` writer"]
|
||||
pub type W = crate::W<RefreshConfigSpec>;
|
||||
impl core::fmt::Debug for R {
|
||||
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
|
||||
write!(f, "{}", self.bits())
|
||||
}
|
||||
}
|
||||
impl W {}
|
||||
#[doc = "Register Refresh Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`refresh_config::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`refresh_config::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
|
||||
pub struct RefreshConfigSpec;
|
||||
impl crate::RegisterSpec for RefreshConfigSpec {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`read()` method returns [`refresh_config::R`](R) reader structure"]
|
||||
impl crate::Readable for RefreshConfigSpec {}
|
||||
#[doc = "`write(|w| ..)` method takes [`refresh_config::W`](W) writer structure"]
|
||||
impl crate::Writable for RefreshConfigSpec {
|
||||
type Safety = crate::Unsafe;
|
||||
const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
|
||||
const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
|
||||
}
|
||||
#[doc = "`reset()` method sets REFRESH_CONFIG to value 0"]
|
||||
impl crate::Resettable for RefreshConfigSpec {
|
||||
const RESET_VALUE: u32 = 0;
|
||||
}
|
||||
40
va108xx/src/sysconfig/rom_prot.rs
Normal file
40
va108xx/src/sysconfig/rom_prot.rs
Normal file
@ -0,0 +1,40 @@
|
||||
#[doc = "Register `ROM_PROT` reader"]
|
||||
pub type R = crate::R<RomProtSpec>;
|
||||
#[doc = "Register `ROM_PROT` writer"]
|
||||
pub type W = crate::W<RomProtSpec>;
|
||||
#[doc = "Field `WREN` reader - ROM Write Enable Bit"]
|
||||
pub type WrenR = crate::BitReader;
|
||||
#[doc = "Field `WREN` writer - ROM Write Enable Bit"]
|
||||
pub type WrenW<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
impl R {
|
||||
#[doc = "Bit 0 - ROM Write Enable Bit"]
|
||||
#[inline(always)]
|
||||
pub fn wren(&self) -> WrenR {
|
||||
WrenR::new((self.bits & 1) != 0)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bit 0 - ROM Write Enable Bit"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn wren(&mut self) -> WrenW<RomProtSpec> {
|
||||
WrenW::new(self, 0)
|
||||
}
|
||||
}
|
||||
#[doc = "ROM Protection Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_prot::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rom_prot::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
|
||||
pub struct RomProtSpec;
|
||||
impl crate::RegisterSpec for RomProtSpec {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`read()` method returns [`rom_prot::R`](R) reader structure"]
|
||||
impl crate::Readable for RomProtSpec {}
|
||||
#[doc = "`write(|w| ..)` method takes [`rom_prot::W`](W) writer structure"]
|
||||
impl crate::Writable for RomProtSpec {
|
||||
type Safety = crate::Unsafe;
|
||||
const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
|
||||
const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
|
||||
}
|
||||
#[doc = "`reset()` method sets ROM_PROT to value 0x01"]
|
||||
impl crate::Resettable for RomProtSpec {
|
||||
const RESET_VALUE: u32 = 0x01;
|
||||
}
|
||||
18
va108xx/src/sysconfig/rom_retries.rs
Normal file
18
va108xx/src/sysconfig/rom_retries.rs
Normal file
@ -0,0 +1,18 @@
|
||||
#[doc = "Register `ROM_RETRIES` reader"]
|
||||
pub type R = crate::R<RomRetriesSpec>;
|
||||
impl core::fmt::Debug for R {
|
||||
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
|
||||
write!(f, "{}", self.bits())
|
||||
}
|
||||
}
|
||||
#[doc = "ROM BOOT Retry count\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_retries::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
|
||||
pub struct RomRetriesSpec;
|
||||
impl crate::RegisterSpec for RomRetriesSpec {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`read()` method returns [`rom_retries::R`](R) reader structure"]
|
||||
impl crate::Readable for RomRetriesSpec {}
|
||||
#[doc = "`reset()` method sets ROM_RETRIES to value 0"]
|
||||
impl crate::Resettable for RomRetriesSpec {
|
||||
const RESET_VALUE: u32 = 0;
|
||||
}
|
||||
48
va108xx/src/sysconfig/rom_scrub.rs
Normal file
48
va108xx/src/sysconfig/rom_scrub.rs
Normal file
@ -0,0 +1,48 @@
|
||||
#[doc = "Register `ROM_SCRUB` reader"]
|
||||
pub type R = crate::R<RomScrubSpec>;
|
||||
#[doc = "Register `ROM_SCRUB` writer"]
|
||||
pub type W = crate::W<RomScrubSpec>;
|
||||
#[doc = "Field `VALUE` reader - Counter divide value"]
|
||||
pub type ValueR = crate::FieldReader<u32>;
|
||||
#[doc = "Field `VALUE` writer - Counter divide value"]
|
||||
pub type ValueW<'a, REG> = crate::FieldWriter<'a, REG, 24, u32>;
|
||||
#[doc = "Field `RESET` writer - Reset Counter"]
|
||||
pub type ResetW<'a, REG> = crate::BitWriter1C<'a, REG>;
|
||||
impl R {
|
||||
#[doc = "Bits 0:23 - Counter divide value"]
|
||||
#[inline(always)]
|
||||
pub fn value(&self) -> ValueR {
|
||||
ValueR::new(self.bits & 0x00ff_ffff)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 0:23 - Counter divide value"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn value(&mut self) -> ValueW<RomScrubSpec> {
|
||||
ValueW::new(self, 0)
|
||||
}
|
||||
#[doc = "Bit 31 - Reset Counter"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn reset(&mut self) -> ResetW<RomScrubSpec> {
|
||||
ResetW::new(self, 31)
|
||||
}
|
||||
}
|
||||
#[doc = "ROM Scrub Period Configuration\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_scrub::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rom_scrub::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
|
||||
pub struct RomScrubSpec;
|
||||
impl crate::RegisterSpec for RomScrubSpec {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`read()` method returns [`rom_scrub::R`](R) reader structure"]
|
||||
impl crate::Readable for RomScrubSpec {}
|
||||
#[doc = "`write(|w| ..)` method takes [`rom_scrub::W`](W) writer structure"]
|
||||
impl crate::Writable for RomScrubSpec {
|
||||
type Safety = crate::Unsafe;
|
||||
const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
|
||||
const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0x8000_0000;
|
||||
}
|
||||
#[doc = "`reset()` method sets ROM_SCRUB to value 0"]
|
||||
impl crate::Resettable for RomScrubSpec {
|
||||
const RESET_VALUE: u32 = 0;
|
||||
}
|
||||
55
va108xx/src/sysconfig/rom_trap_addr.rs
Normal file
55
va108xx/src/sysconfig/rom_trap_addr.rs
Normal file
@ -0,0 +1,55 @@
|
||||
#[doc = "Register `ROM_TRAP_ADDR` reader"]
|
||||
pub type R = crate::R<RomTrapAddrSpec>;
|
||||
#[doc = "Register `ROM_TRAP_ADDR` writer"]
|
||||
pub type W = crate::W<RomTrapAddrSpec>;
|
||||
#[doc = "Field `ADDR` reader - Trap Address Match Bits"]
|
||||
pub type AddrR = crate::FieldReader<u16>;
|
||||
#[doc = "Field `ADDR` writer - Trap Address Match Bits"]
|
||||
pub type AddrW<'a, REG> = crate::FieldWriter<'a, REG, 14, u16>;
|
||||
#[doc = "Field `ENABLE` reader - Trap Enable Bit"]
|
||||
pub type EnableR = crate::BitReader;
|
||||
#[doc = "Field `ENABLE` writer - Trap Enable Bit"]
|
||||
pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
impl R {
|
||||
#[doc = "Bits 2:15 - Trap Address Match Bits"]
|
||||
#[inline(always)]
|
||||
pub fn addr(&self) -> AddrR {
|
||||
AddrR::new(((self.bits >> 2) & 0x3fff) as u16)
|
||||
}
|
||||
#[doc = "Bit 31 - Trap Enable Bit"]
|
||||
#[inline(always)]
|
||||
pub fn enable(&self) -> EnableR {
|
||||
EnableR::new(((self.bits >> 31) & 1) != 0)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 2:15 - Trap Address Match Bits"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn addr(&mut self) -> AddrW<RomTrapAddrSpec> {
|
||||
AddrW::new(self, 2)
|
||||
}
|
||||
#[doc = "Bit 31 - Trap Enable Bit"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn enable(&mut self) -> EnableW<RomTrapAddrSpec> {
|
||||
EnableW::new(self, 31)
|
||||
}
|
||||
}
|
||||
#[doc = "ROM Trap Address\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_trap_addr::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rom_trap_addr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
|
||||
pub struct RomTrapAddrSpec;
|
||||
impl crate::RegisterSpec for RomTrapAddrSpec {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`read()` method returns [`rom_trap_addr::R`](R) reader structure"]
|
||||
impl crate::Readable for RomTrapAddrSpec {}
|
||||
#[doc = "`write(|w| ..)` method takes [`rom_trap_addr::W`](W) writer structure"]
|
||||
impl crate::Writable for RomTrapAddrSpec {
|
||||
type Safety = crate::Unsafe;
|
||||
const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
|
||||
const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
|
||||
}
|
||||
#[doc = "`reset()` method sets ROM_TRAP_ADDR to value 0"]
|
||||
impl crate::Resettable for RomTrapAddrSpec {
|
||||
const RESET_VALUE: u32 = 0;
|
||||
}
|
||||
40
va108xx/src/sysconfig/rom_trap_synd.rs
Normal file
40
va108xx/src/sysconfig/rom_trap_synd.rs
Normal file
@ -0,0 +1,40 @@
|
||||
#[doc = "Register `ROM_TRAP_SYND` reader"]
|
||||
pub type R = crate::R<RomTrapSyndSpec>;
|
||||
#[doc = "Register `ROM_TRAP_SYND` writer"]
|
||||
pub type W = crate::W<RomTrapSyndSpec>;
|
||||
#[doc = "Field `SYND` reader - Trap Syndrom Bits"]
|
||||
pub type SyndR = crate::FieldReader<u32>;
|
||||
#[doc = "Field `SYND` writer - Trap Syndrom Bits"]
|
||||
pub type SyndW<'a, REG> = crate::FieldWriter<'a, REG, 20, u32>;
|
||||
impl R {
|
||||
#[doc = "Bits 0:19 - Trap Syndrom Bits"]
|
||||
#[inline(always)]
|
||||
pub fn synd(&self) -> SyndR {
|
||||
SyndR::new(self.bits & 0x000f_ffff)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bits 0:19 - Trap Syndrom Bits"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn synd(&mut self) -> SyndW<RomTrapSyndSpec> {
|
||||
SyndW::new(self, 0)
|
||||
}
|
||||
}
|
||||
#[doc = "ROM Trap Syndrome\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rom_trap_synd::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rom_trap_synd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
|
||||
pub struct RomTrapSyndSpec;
|
||||
impl crate::RegisterSpec for RomTrapSyndSpec {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`read()` method returns [`rom_trap_synd::R`](R) reader structure"]
|
||||
impl crate::Readable for RomTrapSyndSpec {}
|
||||
#[doc = "`write(|w| ..)` method takes [`rom_trap_synd::W`](W) writer structure"]
|
||||
impl crate::Writable for RomTrapSyndSpec {
|
||||
type Safety = crate::Unsafe;
|
||||
const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
|
||||
const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
|
||||
}
|
||||
#[doc = "`reset()` method sets ROM_TRAP_SYND to value 0"]
|
||||
impl crate::Resettable for RomTrapSyndSpec {
|
||||
const RESET_VALUE: u32 = 0;
|
||||
}
|
||||
115
va108xx/src/sysconfig/rst_stat.rs
Normal file
115
va108xx/src/sysconfig/rst_stat.rs
Normal file
@ -0,0 +1,115 @@
|
||||
#[doc = "Register `RST_STAT` reader"]
|
||||
pub type R = crate::R<RstStatSpec>;
|
||||
#[doc = "Register `RST_STAT` writer"]
|
||||
pub type W = crate::W<RstStatSpec>;
|
||||
#[doc = "Field `POR` reader - Power On Reset Status"]
|
||||
pub type PorR = crate::BitReader;
|
||||
#[doc = "Field `POR` writer - Power On Reset Status"]
|
||||
pub type PorW<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
#[doc = "Field `EXTRST` reader - External Reset Status"]
|
||||
pub type ExtrstR = crate::BitReader;
|
||||
#[doc = "Field `EXTRST` writer - External Reset Status"]
|
||||
pub type ExtrstW<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
#[doc = "Field `SYSRSTREQ` reader - SYSRESETREQ Reset Status"]
|
||||
pub type SysrstreqR = crate::BitReader;
|
||||
#[doc = "Field `SYSRSTREQ` writer - SYSRESETREQ Reset Status"]
|
||||
pub type SysrstreqW<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
#[doc = "Field `LOOKUP` reader - LOOKUP Reset Status"]
|
||||
pub type LookupR = crate::BitReader;
|
||||
#[doc = "Field `LOOKUP` writer - LOOKUP Reset Status"]
|
||||
pub type LookupW<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
#[doc = "Field `WATCHDOG` reader - WATCHDOG Reset Status"]
|
||||
pub type WatchdogR = crate::BitReader;
|
||||
#[doc = "Field `WATCHDOG` writer - WATCHDOG Reset Status"]
|
||||
pub type WatchdogW<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
#[doc = "Field `MEMERR` reader - Memory Error Reset Status"]
|
||||
pub type MemerrR = crate::BitReader;
|
||||
#[doc = "Field `MEMERR` writer - Memory Error Reset Status"]
|
||||
pub type MemerrW<'a, REG> = crate::BitWriter<'a, REG>;
|
||||
impl R {
|
||||
#[doc = "Bit 0 - Power On Reset Status"]
|
||||
#[inline(always)]
|
||||
pub fn por(&self) -> PorR {
|
||||
PorR::new((self.bits & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 1 - External Reset Status"]
|
||||
#[inline(always)]
|
||||
pub fn extrst(&self) -> ExtrstR {
|
||||
ExtrstR::new(((self.bits >> 1) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 2 - SYSRESETREQ Reset Status"]
|
||||
#[inline(always)]
|
||||
pub fn sysrstreq(&self) -> SysrstreqR {
|
||||
SysrstreqR::new(((self.bits >> 2) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 3 - LOOKUP Reset Status"]
|
||||
#[inline(always)]
|
||||
pub fn lookup(&self) -> LookupR {
|
||||
LookupR::new(((self.bits >> 3) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 4 - WATCHDOG Reset Status"]
|
||||
#[inline(always)]
|
||||
pub fn watchdog(&self) -> WatchdogR {
|
||||
WatchdogR::new(((self.bits >> 4) & 1) != 0)
|
||||
}
|
||||
#[doc = "Bit 5 - Memory Error Reset Status"]
|
||||
#[inline(always)]
|
||||
pub fn memerr(&self) -> MemerrR {
|
||||
MemerrR::new(((self.bits >> 5) & 1) != 0)
|
||||
}
|
||||
}
|
||||
impl W {
|
||||
#[doc = "Bit 0 - Power On Reset Status"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn por(&mut self) -> PorW<RstStatSpec> {
|
||||
PorW::new(self, 0)
|
||||
}
|
||||
#[doc = "Bit 1 - External Reset Status"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn extrst(&mut self) -> ExtrstW<RstStatSpec> {
|
||||
ExtrstW::new(self, 1)
|
||||
}
|
||||
#[doc = "Bit 2 - SYSRESETREQ Reset Status"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn sysrstreq(&mut self) -> SysrstreqW<RstStatSpec> {
|
||||
SysrstreqW::new(self, 2)
|
||||
}
|
||||
#[doc = "Bit 3 - LOOKUP Reset Status"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn lookup(&mut self) -> LookupW<RstStatSpec> {
|
||||
LookupW::new(self, 3)
|
||||
}
|
||||
#[doc = "Bit 4 - WATCHDOG Reset Status"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn watchdog(&mut self) -> WatchdogW<RstStatSpec> {
|
||||
WatchdogW::new(self, 4)
|
||||
}
|
||||
#[doc = "Bit 5 - Memory Error Reset Status"]
|
||||
#[inline(always)]
|
||||
#[must_use]
|
||||
pub fn memerr(&mut self) -> MemerrW<RstStatSpec> {
|
||||
MemerrW::new(self, 5)
|
||||
}
|
||||
}
|
||||
#[doc = "System Reset Status\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rst_stat::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rst_stat::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
|
||||
pub struct RstStatSpec;
|
||||
impl crate::RegisterSpec for RstStatSpec {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`read()` method returns [`rst_stat::R`](R) reader structure"]
|
||||
impl crate::Readable for RstStatSpec {}
|
||||
#[doc = "`write(|w| ..)` method takes [`rst_stat::W`](W) writer structure"]
|
||||
impl crate::Writable for RstStatSpec {
|
||||
type Safety = crate::Unsafe;
|
||||
const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
|
||||
const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
|
||||
}
|
||||
#[doc = "`reset()` method sets RST_STAT to value 0x01"]
|
||||
impl crate::Resettable for RstStatSpec {
|
||||
const RESET_VALUE: u32 = 0x01;
|
||||
}
|
||||
27
va108xx/src/sysconfig/tim_clk_enable.rs
Normal file
27
va108xx/src/sysconfig/tim_clk_enable.rs
Normal file
@ -0,0 +1,27 @@
|
||||
#[doc = "Register `TIM_CLK_ENABLE` reader"]
|
||||
pub type R = crate::R<TimClkEnableSpec>;
|
||||
#[doc = "Register `TIM_CLK_ENABLE` writer"]
|
||||
pub type W = crate::W<TimClkEnableSpec>;
|
||||
impl core::fmt::Debug for R {
|
||||
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
|
||||
write!(f, "{}", self.bits())
|
||||
}
|
||||
}
|
||||
impl W {}
|
||||
#[doc = "TIM Enable Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim_clk_enable::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tim_clk_enable::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
|
||||
pub struct TimClkEnableSpec;
|
||||
impl crate::RegisterSpec for TimClkEnableSpec {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`read()` method returns [`tim_clk_enable::R`](R) reader structure"]
|
||||
impl crate::Readable for TimClkEnableSpec {}
|
||||
#[doc = "`write(|w| ..)` method takes [`tim_clk_enable::W`](W) writer structure"]
|
||||
impl crate::Writable for TimClkEnableSpec {
|
||||
type Safety = crate::Unsafe;
|
||||
const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
|
||||
const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
|
||||
}
|
||||
#[doc = "`reset()` method sets TIM_CLK_ENABLE to value 0"]
|
||||
impl crate::Resettable for TimClkEnableSpec {
|
||||
const RESET_VALUE: u32 = 0;
|
||||
}
|
||||
27
va108xx/src/sysconfig/tim_reset.rs
Normal file
27
va108xx/src/sysconfig/tim_reset.rs
Normal file
@ -0,0 +1,27 @@
|
||||
#[doc = "Register `TIM_RESET` reader"]
|
||||
pub type R = crate::R<TimResetSpec>;
|
||||
#[doc = "Register `TIM_RESET` writer"]
|
||||
pub type W = crate::W<TimResetSpec>;
|
||||
impl core::fmt::Debug for R {
|
||||
fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
|
||||
write!(f, "{}", self.bits())
|
||||
}
|
||||
}
|
||||
impl W {}
|
||||
#[doc = "TIM Reset Control\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tim_reset::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tim_reset::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
|
||||
pub struct TimResetSpec;
|
||||
impl crate::RegisterSpec for TimResetSpec {
|
||||
type Ux = u32;
|
||||
}
|
||||
#[doc = "`read()` method returns [`tim_reset::R`](R) reader structure"]
|
||||
impl crate::Readable for TimResetSpec {}
|
||||
#[doc = "`write(|w| ..)` method takes [`tim_reset::W`](W) writer structure"]
|
||||
impl crate::Writable for TimResetSpec {
|
||||
type Safety = crate::Unsafe;
|
||||
const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
|
||||
const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
|
||||
}
|
||||
#[doc = "`reset()` method sets TIM_RESET to value 0xffff_ffff"]
|
||||
impl crate::Resettable for TimResetSpec {
|
||||
const RESET_VALUE: u32 = 0xffff_ffff;
|
||||
}
|
||||
Reference in New Issue
Block a user