update package

- Add embassy example
- improve timer API
- restructure examples
- restructure and improve SPI
- Add REB1 M95M01 NVM module

examples/README.md

@@ -0,0 +1,25 @@
+VA108xx Example Applications
+========
+
+This folder contains various examples
+Consult the main README first for setup of the repository.
+
+## Simple examples
+
+```rs
+cargo run --example blinky
+```
+
+You can have a look at the `simple/examples` folder to see all available simple examples
+
+## RTIC example
+
+```rs
+cargo run --bin rtic-example
+```
+
+## Embassy example
+
+```rs
+cargo run --bin embassy-example
+```

examples/embassy/Cargo.toml

@@ -0,0 +1,40 @@
+[package]
+name = "embassy-example"
+version = "0.1.0"
+edition = "2021"
+
+[dependencies]
+cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
+cortex-m-rt = "0.7"
+embedded-hal = "1"
+
+rtt-target = { version = "0.5" }
+panic-rtt-target = { version = "0.1" }
+critical-section = "1"
+portable-atomic = { version = "1", features = ["unsafe-assume-single-core"]}
+
+embassy-sync = { version = "0.6.0" }
+embassy-time = { version = "0.3.2" }
+embassy-time-driver = { version = "0.1" }
+
+[dependencies.once_cell]
+version = "1"
+default-features = false
+features = ["critical-section"]
+
+[dependencies.embassy-executor]
+version = "0.6.0"
+features = [
+    "arch-cortex-m",
+    "executor-thread",
+    "executor-interrupt",
+    "integrated-timers",
+]
+
+[dependencies.va108xx-hal]
+path = "../../va108xx-hal"
+
+[features]
+default = ["ticks-hz-1_000"]
+ticks-hz-1_000 = ["embassy-time/tick-hz-1_000"]
+ticks-hz-32_768 = ["embassy-time/tick-hz-32_768"]

examples/embassy/src/lib.rs

@@ -0,0 +1,4 @@
+#![no_std]
+pub mod time_driver;
+
+pub use time_driver::init;

examples/embassy/src/main.rs

@@ -0,0 +1,43 @@
+#![no_std]
+#![no_main]
+use embassy_executor::Spawner;
+use embassy_time::{Duration, Instant, Ticker};
+use embedded_hal::digital::StatefulOutputPin;
+use panic_rtt_target as _;
+use rtt_target::{rprintln, rtt_init_print};
+use va108xx_hal::{gpio::PinsA, pac, prelude::*};
+
+const SYSCLK_FREQ: Hertz = Hertz::from_raw(50_000_000);
+
+// main is itself an async function.
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+    rtt_init_print!();
+    rprintln!("-- VA108xx Embassy Demo --");
+
+    let mut dp = pac::Peripherals::take().unwrap();
+
+    // Safety: Only called once here.
+    unsafe {
+        embassy_example::init(
+            &mut dp.sysconfig,
+            &dp.irqsel,
+            SYSCLK_FREQ,
+            dp.tim23,
+            dp.tim22,
+        )
+    };
+
+    let porta = PinsA::new(&mut dp.sysconfig, Some(dp.ioconfig), dp.porta);
+    let mut led0 = porta.pa10.into_readable_push_pull_output();
+    let mut led1 = porta.pa7.into_readable_push_pull_output();
+    let mut led2 = porta.pa6.into_readable_push_pull_output();
+    let mut ticker = Ticker::every(Duration::from_secs(1));
+    loop {
+        ticker.next().await;
+        rprintln!("Current time: {}", Instant::now().as_secs());
+        led0.toggle().ok();
+        led1.toggle().ok();
+        led2.toggle().ok();
+    }
+}

examples/embassy/src/time_driver.rs

@@ -0,0 +1,333 @@
+//! This is a sample time driver implementation for the VA108xx family of devices, supporting
+//! one alarm and requiring/reserving 2 TIM peripherals. You could adapt this implementation to
+//! support more alarms.
+//!
+//! This driver implementation reserves interrupts OC31 and OC30 for the timekeeping.
+use core::{cell::Cell, mem, ptr};
+use critical_section::CriticalSection;
+use embassy_sync::blocking_mutex::raw::CriticalSectionRawMutex;
+use embassy_sync::blocking_mutex::Mutex;
+use portable_atomic::{AtomicU32, AtomicU8, Ordering};
+
+use embassy_time_driver::{time_driver_impl, AlarmHandle, Driver, TICK_HZ};
+use once_cell::sync::OnceCell;
+use va108xx_hal::{
+    clock::enable_peripheral_clock,
+    enable_interrupt,
+    pac::{self, interrupt},
+    prelude::*,
+    timer::{enable_tim_clk, ValidTim},
+    PeripheralSelect,
+};
+
+pub type TimekeeperClk = pac::Tim23;
+pub type AlarmClk0 = pac::Tim22;
+pub type AlarmClk1 = pac::Tim21;
+pub type AlarmClk2 = pac::Tim20;
+
+const TIMEKEEPER_IRQ: pac::Interrupt = pac::Interrupt::OC31;
+const ALARM_IRQ: pac::Interrupt = pac::Interrupt::OC30;
+
+/// Initialization method for embassy
+///
+/// # Safety
+/// This has to be called once at initialization time to initiate the time driver for
+/// embassy.
+pub unsafe fn init(
+    syscfg: &mut pac::Sysconfig,
+    irqsel: &pac::Irqsel,
+    sysclk: impl Into<Hertz>,
+    timekeeper: TimekeeperClk,
+    alarm_tim: AlarmClk0,
+) {
+    DRIVER.init(syscfg, irqsel, sysclk, timekeeper, alarm_tim)
+}
+
+time_driver_impl!(
+    static DRIVER: TimerDriverEmbassy = TimerDriverEmbassy {
+        periods: AtomicU32::new(0),
+        alarm_count: AtomicU8::new(0),
+        alarms: Mutex::const_new(CriticalSectionRawMutex::new(), [AlarmState::new(); ALARM_COUNT])
+});
+
+/// Timekeeper interrupt.
+#[interrupt]
+#[allow(non_snake_case)]
+fn OC31() {
+    DRIVER.on_interrupt_timekeeping()
+}
+
+/// Alarm timer interrupt.
+#[interrupt]
+#[allow(non_snake_case)]
+fn OC30() {
+    DRIVER.on_interrupt_alarm(0)
+}
+
+#[inline(always)]
+const fn alarm_tim(idx: usize) -> &'static pac::tim0::RegisterBlock {
+    // Safety: This is a static memory-mapped peripheral.
+    match idx {
+        0 => unsafe { &*AlarmClk0::ptr() },
+        1 => unsafe { &*AlarmClk1::ptr() },
+        2 => unsafe { &*AlarmClk2::ptr() },
+        _ => {
+            panic!("invalid alarm timer index")
+        }
+    }
+}
+
+#[inline(always)]
+const fn timekeeping_tim() -> &'static pac::tim0::RegisterBlock {
+    // Safety: This is a memory-mapped peripheral.
+    unsafe { &*TimekeeperClk::ptr() }
+}
+
+struct AlarmState {
+    timestamp: Cell<u64>,
+
+    // This is really a Option<(fn(*mut ()), *mut ())>
+    // but fn pointers aren't allowed in const yet
+    callback: Cell<*const ()>,
+    ctx: Cell<*mut ()>,
+}
+
+impl AlarmState {
+    const fn new() -> Self {
+        Self {
+            timestamp: Cell::new(u64::MAX),
+            callback: Cell::new(ptr::null()),
+            ctx: Cell::new(ptr::null_mut()),
+        }
+    }
+}
+
+unsafe impl Send for AlarmState {}
+
+const ALARM_COUNT: usize = 1;
+
+static SCALE: OnceCell<u64> = OnceCell::new();
+
+pub struct TimerDriverEmbassy {
+    periods: AtomicU32,
+    alarm_count: AtomicU8,
+    /// Timestamp at which to fire alarm. u64::MAX if no alarm is scheduled.
+    alarms: Mutex<CriticalSectionRawMutex, [AlarmState; ALARM_COUNT]>,
+}
+
+impl TimerDriverEmbassy {
+    fn init(
+        &self,
+        syscfg: &mut pac::Sysconfig,
+        irqsel: &pac::Irqsel,
+        sysclk: impl Into<Hertz>,
+        timekeeper: TimekeeperClk,
+        alarm_tim: AlarmClk0,
+    ) {
+        enable_peripheral_clock(syscfg, PeripheralSelect::Irqsel);
+        enable_tim_clk(syscfg, TimekeeperClk::TIM_ID);
+        let sysclk = sysclk.into();
+        // Initiate scale value here. This is required to convert timer ticks back to a timestamp.
+        SCALE.set((sysclk.raw() / TICK_HZ as u32) as u64).unwrap();
+        timekeeper
+            .rst_value()
+            .write(|w| unsafe { w.bits(u32::MAX) });
+        // Decrementing counter.
+        timekeeper
+            .cnt_value()
+            .write(|w| unsafe { w.bits(u32::MAX) });
+        // Switch on. Timekeeping should always be done.
+        irqsel
+            .tim0(TimekeeperClk::TIM_ID as usize)
+            .write(|w| unsafe { w.bits(TIMEKEEPER_IRQ as u32) });
+        unsafe {
+            enable_interrupt(TIMEKEEPER_IRQ);
+        }
+        timekeeper.ctrl().modify(|_, w| w.irq_enb().set_bit());
+        timekeeper.enable().write(|w| unsafe { w.bits(1) });
+
+        enable_tim_clk(syscfg, AlarmClk0::TIM_ID);
+
+        // Explicitely disable alarm timer until needed.
+        alarm_tim.ctrl().modify(|_, w| {
+            w.irq_enb().clear_bit();
+            w.enable().clear_bit()
+        });
+        // Enable general interrupts. The IRQ enable of the peripheral remains cleared.
+        unsafe {
+            enable_interrupt(ALARM_IRQ);
+        }
+        irqsel
+            .tim0(AlarmClk0::TIM_ID as usize)
+            .write(|w| unsafe { w.bits(ALARM_IRQ as u32) });
+    }
+
+    // Should be called inside the IRQ of the timekeeper timer.
+    fn on_interrupt_timekeeping(&self) {
+        self.next_period();
+    }
+
+    // Should be called inside the IRQ of the alarm timer.
+    fn on_interrupt_alarm(&self, idx: usize) {
+        critical_section::with(|cs| {
+            if self.alarms.borrow(cs)[idx].timestamp.get() <= self.now() {
+                self.trigger_alarm(idx, cs)
+            }
+        })
+    }
+
+    fn next_period(&self) {
+        let period = self.periods.fetch_add(1, Ordering::AcqRel) + 1;
+        let t = (period as u64) << 32;
+        critical_section::with(|cs| {
+            for i in 0..ALARM_COUNT {
+                let alarm = &self.alarms.borrow(cs)[i];
+                let at = alarm.timestamp.get();
+                let alarm_tim = alarm_tim(0);
+                if at < t {
+                    self.trigger_alarm(i, cs);
+                } else {
+                    let remaining_ticks = (at - t) * *SCALE.get().unwrap();
+                    if remaining_ticks <= u32::MAX as u64 {
+                        alarm_tim.enable().write(|w| unsafe { w.bits(0) });
+                        alarm_tim
+                            .cnt_value()
+                            .write(|w| unsafe { w.bits(remaining_ticks as u32) });
+                        alarm_tim.ctrl().modify(|_, w| w.irq_enb().set_bit());
+                        alarm_tim.enable().write(|w| unsafe { w.bits(1) })
+                    }
+                }
+            }
+        })
+    }
+
+    fn get_alarm<'a>(&'a self, cs: CriticalSection<'a>, alarm: AlarmHandle) -> &'a AlarmState {
+        // safety: we're allowed to assume the AlarmState is created by us, and
+        // we never create one that's out of bounds.
+        unsafe { self.alarms.borrow(cs).get_unchecked(alarm.id() as usize) }
+    }
+
+    fn trigger_alarm(&self, n: usize, cs: CriticalSection) {
+        alarm_tim(n).ctrl().modify(|_, w| {
+            w.irq_enb().clear_bit();
+            w.enable().clear_bit()
+        });
+
+        let alarm = &self.alarms.borrow(cs)[n];
+        // Setting the maximum value disables the alarm.
+        alarm.timestamp.set(u64::MAX);
+
+        // Call after clearing alarm, so the callback can set another alarm.
+
+        // safety:
+        // - we can ignore the possiblity of `f` being unset (null) because of the safety contract of `allocate_alarm`.
+        // - other than that we only store valid function pointers into alarm.callback
+        let f: fn(*mut ()) = unsafe { mem::transmute(alarm.callback.get()) };
+        f(alarm.ctx.get());
+    }
+}
+
+impl Driver for TimerDriverEmbassy {
+    fn now(&self) -> u64 {
+        if SCALE.get().is_none() {
+            return 0;
+        }
+        let mut period1: u32;
+        let mut period2: u32;
+        let mut counter_val: u32;
+
+        loop {
+            // Acquire ensures that we get the latest value of `periods` and
+            // no instructions can be reordered before the load.
+            period1 = self.periods.load(Ordering::Acquire);
+
+            counter_val = u32::MAX - timekeeping_tim().cnt_value().read().bits();
+
+            // Double read to protect against race conditions when the counter is overflowing.
+            period2 = self.periods.load(Ordering::Relaxed);
+            if period1 == period2 {
+                let now = (((period1 as u64) << 32) | counter_val as u64) / *SCALE.get().unwrap();
+                return now;
+            }
+        }
+    }
+
+    unsafe fn allocate_alarm(&self) -> Option<AlarmHandle> {
+        let id = self
+            .alarm_count
+            .fetch_update(Ordering::AcqRel, Ordering::Acquire, |x| {
+                if x < ALARM_COUNT as u8 {
+                    Some(x + 1)
+                } else {
+                    None
+                }
+            });
+
+        match id {
+            Ok(id) => Some(AlarmHandle::new(id)),
+            Err(_) => None,
+        }
+    }
+
+    fn set_alarm_callback(
+        &self,
+        alarm: embassy_time_driver::AlarmHandle,
+        callback: fn(*mut ()),
+        ctx: *mut (),
+    ) {
+        critical_section::with(|cs| {
+            let alarm = self.get_alarm(cs, alarm);
+
+            alarm.callback.set(callback as *const ());
+            alarm.ctx.set(ctx);
+        })
+    }
+
+    fn set_alarm(&self, alarm: embassy_time_driver::AlarmHandle, timestamp: u64) -> bool {
+        if SCALE.get().is_none() {
+            return false;
+        }
+        critical_section::with(|cs| {
+            let n = alarm.id();
+            let alarm_tim = alarm_tim(n.into());
+            alarm_tim.ctrl().modify(|_, w| {
+                w.irq_enb().clear_bit();
+                w.enable().clear_bit()
+            });
+
+            let alarm = self.get_alarm(cs, alarm);
+            alarm.timestamp.set(timestamp);
+
+            let t = self.now();
+            if timestamp <= t {
+                alarm.timestamp.set(u64::MAX);
+                return false;
+            }
+
+            // If it hasn't triggered yet, setup the relevant reset value, regardless of whether
+            // the interrupts are enabled or not. When they are enabled at a later point, the
+            // right value is already set.
+
+            // If the timestamp is in the next few ticks, add a bit of buffer to be sure the alarm
+            // is not missed.
+            //
+            // This means that an alarm can be delayed for up to 2 ticks (from t+1 to t+3), but this is allowed
+            // by the Alarm trait contract. What's not allowed is triggering alarms *before* their scheduled time,
+            // and we don't do that here.
+            let safe_timestamp = timestamp.max(t + 3);
+            let timer_ticks = (safe_timestamp - t) * *SCALE.get().unwrap();
+            alarm_tim.rst_value().write(|w| unsafe { w.bits(u32::MAX) });
+            if timer_ticks <= u32::MAX as u64 {
+                alarm_tim
+                    .cnt_value()
+                    .write(|w| unsafe { w.bits(timer_ticks as u32) });
+                alarm_tim.ctrl().modify(|_, w| w.irq_enb().set_bit());
+                alarm_tim.enable().write(|w| unsafe { w.bits(1) });
+            }
+            // If it's too far in the future, don't enable timer yet.
+            // It will be enabled later by `next_period`.
+
+            true
+        })
+    }
+}

examples/rtic/Cargo.toml

@@ -0,0 +1,33 @@
+[package]
+name = "rtic-example"
+version = "0.1.0"
+edition = "2021"
+
+[dependencies]
+cortex-m = { version = "0.7", features = ["critical-section-single-core"] }
+cortex-m-rt = "0.7"
+embedded-hal = "1"
+embedded-io = "0.6"
+rtt-target = { version = "0.5" }
+# Even though we do not use this directly, we need to activate this feature explicitely
+# so that RTIC compiles because thumv6 does not have CAS operations natively.
+portable-atomic = { version = "1", features = ["unsafe-assume-single-core"]}
+panic-rtt-target = { version = "0.1" }
+
+[dependencies.va108xx-hal]
+path = "../../va108xx-hal"
+
+[dependencies.vorago-reb1]
+path = "../../vorago-reb1"
+
+[dependencies.rtic]
+version = "2"
+features = ["thumbv6-backend"]
+
+[dependencies.rtic-monotonics]
+version = "2"
+features = ["cortex-m-systick"]
+
+[dependencies.rtic-sync]
+version = "1.3"
+features = ["defmt-03"]

examples/rtic/src/bin/blinky-button-rtic.rs

@@ -0,0 +1,144 @@
+//! Blinky button application for the REB1 board using RTIC
+#![no_main]
+#![no_std]
+
+#[rtic::app(device = pac)]
+mod app {
+    use panic_rtt_target as _;
+    use rtic_example::SYSCLK_FREQ;
+    use rtt_target::{rprintln, rtt_init_default, set_print_channel};
+    use va108xx_hal::{
+        clock::{set_clk_div_register, FilterClkSel},
+        gpio::{FilterType, InterruptEdge, PinsA},
+        pac,
+        prelude::*,
+        timer::{default_ms_irq_handler, set_up_ms_tick, IrqCfg},
+    };
+    use vorago_reb1::button::Button;
+    use vorago_reb1::leds::Leds;
+
+    rtic_monotonics::systick_monotonic!(Mono, 1_000);
+
+    #[derive(Debug, PartialEq)]
+    pub enum PressMode {
+        Toggle,
+        Keep,
+    }
+
+    #[derive(Debug, PartialEq)]
+    pub enum CfgMode {
+        Prompt,
+        Fixed,
+    }
+
+    const CFG_MODE: CfgMode = CfgMode::Fixed;
+    // You can change the press mode here
+    const DEFAULT_MODE: PressMode = PressMode::Toggle;
+
+    #[local]
+    struct Local {
+        leds: Leds,
+        button: Button,
+        mode: PressMode,
+    }
+
+    #[shared]
+    struct Shared {}
+
+    #[init]
+    fn init(cx: init::Context) -> (Shared, Local) {
+        let channels = rtt_init_default!();
+        set_print_channel(channels.up.0);
+        rprintln!("-- Vorago Button IRQ Example --");
+        Mono::start(cx.core.SYST, SYSCLK_FREQ.raw());
+
+        let mode = match CFG_MODE {
+            // Ask mode from user via RTT
+            CfgMode::Prompt => prompt_mode(channels.down.0),
+            // Use mode hardcoded in `DEFAULT_MODE`
+            CfgMode::Fixed => DEFAULT_MODE,
+        };
+        rprintln!("Using {:?} mode", mode);
+
+        let mut dp = cx.device;
+        let pinsa = PinsA::new(&mut dp.sysconfig, Some(dp.ioconfig), dp.porta);
+        let edge_irq = match mode {
+            PressMode::Toggle => InterruptEdge::HighToLow,
+            PressMode::Keep => InterruptEdge::BothEdges,
+        };
+
+        // Configure an edge interrupt on the button and route it to interrupt vector 15
+        let mut button = Button::new(pinsa.pa11.into_floating_input()).edge_irq(
+            edge_irq,
+            IrqCfg::new(pac::interrupt::OC15, true, true),
+            Some(&mut dp.sysconfig),
+            Some(&mut dp.irqsel),
+        );
+
+        if mode == PressMode::Toggle {
+            // This filter debounces the switch for edge based interrupts
+            button = button.filter_type(FilterType::FilterFourClockCycles, FilterClkSel::Clk1);
+            set_clk_div_register(&mut dp.sysconfig, FilterClkSel::Clk1, 50_000);
+        }
+        let mut leds = Leds::new(
+            pinsa.pa10.into_push_pull_output(),
+            pinsa.pa7.into_push_pull_output(),
+            pinsa.pa6.into_push_pull_output(),
+        );
+        for led in leds.iter_mut() {
+            led.off();
+        }
+        set_up_ms_tick(
+            IrqCfg::new(pac::Interrupt::OC0, true, true),
+            &mut dp.sysconfig,
+            Some(&mut dp.irqsel),
+            50.MHz(),
+            dp.tim0,
+        );
+        (Shared {}, Local { leds, button, mode })
+    }
+
+    // `shared` cannot be accessed from this context
+    #[idle]
+    fn idle(_cx: idle::Context) -> ! {
+        loop {
+            cortex_m::asm::nop();
+        }
+    }
+
+    #[task(binds = OC15, local=[button, leds, mode])]
+    fn button_task(cx: button_task::Context) {
+        let leds = cx.local.leds;
+        let button = cx.local.button;
+        let mode = cx.local.mode;
+        if *mode == PressMode::Toggle {
+            leds[0].toggle();
+        } else if button.released() {
+            leds[0].off();
+        } else {
+            leds[0].on();
+        }
+    }
+
+    #[task(binds = OC0)]
+    fn ms_tick(_cx: ms_tick::Context) {
+        default_ms_irq_handler();
+    }
+
+    fn prompt_mode(mut down_channel: rtt_target::DownChannel) -> PressMode {
+        rprintln!("Using prompt mode");
+        rprintln!("Please enter the mode [0: Toggle, 1: Keep]");
+        let mut read_buf: [u8; 16] = [0; 16];
+        let mut read;
+        loop {
+            read = down_channel.read(&mut read_buf);
+            for &byte in &read_buf[..read] {
+                match byte as char {
+                    '0' => return PressMode::Toggle,
+                    '1' => return PressMode::Keep,
+                    _ => continue, // Ignore other characters
+                }
+            }
+        }
+    }
+}

examples/rtic/src/bin/uart-rtic.rs

@@ -14,14 +14,13 @@
 mod app {
     use embedded_io::Write;
     use panic_rtt_target as _;
-    use rtic_monotonics::systick::Systick;
+    use rtic_example::SYSCLK_FREQ;
     use rtic_sync::make_channel;
     use rtt_target::{rprintln, rtt_init_print};
     use va108xx_hal::{
         gpio::PinsB,
         pac,
         prelude::*,
-        time::Hertz,
         uart::{self, IrqCfg, IrqResult, UartWithIrqBase},
     };
 
@@ -44,19 +43,14 @@ mod app {
         pub timeout: bool,
     }
 
+    rtic_monotonics::systick_monotonic!(Mono, 1_000);
+
     #[init]
     fn init(cx: init::Context) -> (Shared, Local) {
         rtt_init_print!();
-        //set_print_channel(channels.up.0);
         rprintln!("-- VA108xx UART IRQ example application--");
 
-        // Initialize the systick interrupt & obtain the token to prove that we did
-        let systick_mono_token = rtic_monotonics::create_systick_token!();
-        Systick::start(
-            cx.core.SYST,
-            Hertz::from(50.MHz()).raw(),
-            systick_mono_token,
-        );
+        Mono::start(cx.core.SYST, SYSCLK_FREQ.raw());
 
         let mut dp = cx.device;
         let gpiob = PinsB::new(&mut dp.sysconfig, Some(dp.ioconfig), dp.portb);
@@ -74,7 +68,6 @@ mod app {
 
         let (rx_info_tx, rx_info_rx) = make_channel!(RxInfo, 3);
         let rx_buf: [u8; 64] = [0; 64];
-        //reply_handler::spawn().expect("spawning reply handler failed");
         (
             Shared { irq_uart, rx_buf },
             Local {
@@ -112,8 +105,8 @@ mod app {
                             .expect("Read operation init failed");
 
                         let mut end_idx = 0;
-                        for idx in 0..rx_buf.len() {
-                            if (rx_buf[idx] as char) == '\n' {
+                        for (idx, val) in rx_buf.iter().enumerate() {
+                            if (*val as char) == '\n' {
                                 end_idx = idx;
                                 break;
                             }

examples/rtic/src/lib.rs

@@ -0,0 +1,4 @@
+#![no_std]
+use va108xx_hal::time::Hertz;
+
+pub const SYSCLK_FREQ: Hertz = Hertz::from_raw(50_000_000);

examples/rtic/src/main.rs

@@ -0,0 +1,71 @@
+//! RTIC minimal blinky
+#![no_main]
+#![no_std]
+
+#[rtic::app(device = pac, dispatchers = [OC31, OC30, OC29])]
+mod app {
+    use cortex_m::asm;
+    use embedded_hal::digital::StatefulOutputPin;
+    use panic_rtt_target as _;
+    use rtic_example::SYSCLK_FREQ;
+    use rtic_monotonics::systick::prelude::*;
+    use rtic_monotonics::Monotonic;
+    use rtt_target::{rprintln, rtt_init_print};
+    use va108xx_hal::{
+        gpio::{OutputReadablePushPull, Pin, PinsA, PA10, PA6, PA7},
+        pac,
+    };
+
+    #[local]
+    struct Local {
+        led0: Pin<PA10, OutputReadablePushPull>,
+        led1: Pin<PA7, OutputReadablePushPull>,
+        led2: Pin<PA6, OutputReadablePushPull>,
+    }
+
+    #[shared]
+    struct Shared {}
+
+    rtic_monotonics::systick_monotonic!(Mono, 1_000);
+
+    #[init]
+    fn init(mut cx: init::Context) -> (Shared, Local) {
+        rtt_init_print!();
+        rprintln!("-- Vorago VA108xx RTIC template --");
+
+        Mono::start(cx.core.SYST, SYSCLK_FREQ.raw());
+
+        let porta = PinsA::new(
+            &mut cx.device.sysconfig,
+            Some(cx.device.ioconfig),
+            cx.device.porta,
+        );
+        let led0 = porta.pa10.into_readable_push_pull_output();
+        let led1 = porta.pa7.into_readable_push_pull_output();
+        let led2 = porta.pa6.into_readable_push_pull_output();
+        blinky::spawn().ok();
+        (Shared {}, Local { led0, led1, led2 })
+    }
+
+    // `shared` cannot be accessed from this context
+    #[idle]
+    fn idle(_cx: idle::Context) -> ! {
+        loop {
+            asm::nop();
+        }
+    }
+
+    #[task(
+        priority = 3,
+        local=[led0, led1, led2],
+    )]
+    async fn blinky(cx: blinky::Context) {
+        loop {
+            rprintln!("toggling LEDs");
+            cx.local.led0.toggle().ok();
+            cx.local.led1.toggle().ok();
+            cx.local.led2.toggle().ok();
+            Mono::delay(1000.millis()).await;
+        }
+    }
+}

examples/simple/Cargo.toml

@@ -4,30 +4,20 @@ version = "0.1.0"
 edition = "2021"
 
 [dependencies]
-panic-halt = "0.2"
 cortex-m = {version = "0.7", features = ["critical-section-single-core"]}
-panic-rtt-target = "0.1"
 cortex-m-rt = "0.7"
+panic-halt = "0.2"
+panic-rtt-target = "0.1"
+critical-section = "1"
 rtt-target = "0.5"
-rtic-sync = { version = "1.3", features = ["defmt-03"] }
 embedded-hal = "1"
 embedded-hal-nb = "1"
 embedded-io = "0.6"
 cortex-m-semihosting = "0.5.0"
-# I'd really like to use those, but it is tricky without probe-rs..
-# defmt = "0.3"
-# defmt-brtt = { version = "0.1", default-features = false, features = ["rtt"] }
-# panic-probe = { version = "0.3", features = ["print-defmt"] }
-
-[dependencies.rtic]
-version = "2"
-features = ["thumbv6-backend"]
-
-[dependencies.rtic-monotonics]
-version = "1"
-features = ["cortex-m-systick"]
 
 [dependencies.va108xx-hal]
-version = "0.7"
 path = "../../va108xx-hal"
 features = ["rt", "defmt"]
+
+[dependencies.vorago-reb1]
+path = "../../vorago-reb1"

examples/simple/examples/cascade.rs

@@ -48,7 +48,7 @@ fn main() -> ! {
     let mut cascade_target_1 =
         CountDownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim4).auto_deactivate(true);
     cascade_target_1
-        .cascade_0_source(CascadeSource::TimBase, Some(3))
+        .cascade_0_source(CascadeSource::Tim(3))
         .expect("Configuring cascade source for TIM4 failed");
     let mut csd_cfg = CascadeCtrl {
         enb_start_src_csd0: true,
@@ -75,7 +75,7 @@ fn main() -> ! {
         CountDownTimer::new(&mut dp.sysconfig, 50.MHz(), dp.tim5).auto_deactivate(true);
     // Set TIM4 as cascade source
     cascade_target_2
-        .cascade_1_source(CascadeSource::TimBase, Some(4))
+        .cascade_1_source(CascadeSource::Tim(4))
         .expect("Configuring cascade source for TIM5 failed");
 
     csd_cfg = CascadeCtrl::default();

examples/simple/examples/spi.rs

@@ -16,7 +16,7 @@ use va108xx_hal::{
     pac::{self, interrupt},
     prelude::*,
     pwm::{default_ms_irq_handler, set_up_ms_tick},
-    spi::{self, Spi, SpiBase, TransferConfig},
+    spi::{self, Spi, SpiBase, SpiClkConfig, TransferConfigWithHwcs},
     IrqCfg,
 };
 
@@ -24,8 +24,7 @@ use va108xx_hal::{
 pub enum ExampleSelect {
     // Enter loopback mode. It is not necessary to tie MOSI/MISO together for this
     Loopback,
-    // Send a test buffer and print everything received
-    TestBuffer,
+    MosiMisoTiedTogetherManually,
 }
 
 #[derive(PartialEq, Debug)]
@@ -55,6 +54,8 @@ fn main() -> ! {
         dp.tim0,
     );
 
+    let spi_clk_cfg = SpiClkConfig::from_clk(50.MHz(), SPI_SPEED_KHZ.kHz())
+        .expect("creating SPI clock config failed");
     let spia_ref: RefCell<Option<SpiBase<pac::Spia, u8>>> = RefCell::new(None);
     let spib_ref: RefCell<Option<SpiBase<pac::Spib, u8>>> = RefCell::new(None);
     let pinsa = PinsA::new(&mut dp.sysconfig, None, dp.porta);
@@ -79,7 +80,6 @@ fn main() -> ! {
                 dp.spia,
                 (sck, miso, mosi),
                 spi_cfg,
-                None,
             );
             spia.set_fill_word(FILL_WORD);
             spia_ref.borrow_mut().replace(spia.downgrade());
@@ -96,7 +96,6 @@ fn main() -> ! {
                 dp.spia,
                 (sck, miso, mosi),
                 spi_cfg,
-                None,
             );
             spia.set_fill_word(FILL_WORD);
             spia_ref.borrow_mut().replace(spia.downgrade());
@@ -113,7 +112,6 @@ fn main() -> ! {
                 dp.spib,
                 (sck, miso, mosi),
                 spi_cfg,
-                None,
             );
             spib.set_fill_word(FILL_WORD);
             spib_ref.borrow_mut().replace(spib.downgrade());
@@ -123,17 +121,21 @@ fn main() -> ! {
     match SPI_BUS_SEL {
         SpiBusSelect::SpiAPortA | SpiBusSelect::SpiAPortB => {
             if let Some(ref mut spi) = *spia_ref.borrow_mut() {
-                let transfer_cfg =
-                    TransferConfig::new_no_hw_cs(SPI_SPEED_KHZ.kHz(), SPI_MODE, BLOCKMODE, false);
+                let transfer_cfg = TransferConfigWithHwcs::new_no_hw_cs(
+                    Some(spi_clk_cfg),
+                    Some(SPI_MODE),
+                    BLOCKMODE,
+                    false,
+                );
                 spi.cfg_transfer(&transfer_cfg);
             }
         }
         SpiBusSelect::SpiBPortB => {
             if let Some(ref mut spi) = *spib_ref.borrow_mut() {
                 let hw_cs_pin = pinsb.pb2.into_funsel_1();
-                let transfer_cfg = TransferConfig::new(
-                    SPI_SPEED_KHZ.kHz(),
-                    SPI_MODE,
+                let transfer_cfg = TransferConfigWithHwcs::new(
+                    Some(spi_clk_cfg),
+                    Some(SPI_MODE),
                     Some(hw_cs_pin),
                     BLOCKMODE,
                     false,
@@ -149,92 +151,64 @@ fn main() -> ! {
         match SPI_BUS_SEL {
             SpiBusSelect::SpiAPortA | SpiBusSelect::SpiAPortB => {
                 if let Some(ref mut spi) = *spia_ref.borrow_mut() {
-                    if EXAMPLE_SEL == ExampleSelect::Loopback {
-                        // Can't really verify correct reply here.
-                        spi.write(&[0x42]).expect("write failed");
-                        // Because of the loopback mode, we should get back the fill word here.
-                        spi.read(&mut reply_buf[0..1]).unwrap();
-                        assert_eq!(reply_buf[0], FILL_WORD);
-                        delay.delay_ms(500_u32);
+                    // Can't really verify correct reply here.
+                    spi.write(&[0x42]).expect("write failed");
+                    // Because of the loopback mode, we should get back the fill word here.
+                    spi.read(&mut reply_buf[0..1]).unwrap();
+                    assert_eq!(reply_buf[0], FILL_WORD);
+                    delay.delay_ms(500_u32);
 
-                        let tx_buf: [u8; 3] = [0x01, 0x02, 0x03];
-                        spi.transfer(&mut reply_buf[0..3], &tx_buf).unwrap();
-                        assert_eq!(tx_buf, reply_buf[0..3]);
-                        rprintln!(
-                            "Received reply: {}, {}, {}",
-                            reply_buf[0],
-                            reply_buf[1],
-                            reply_buf[2]
-                        );
-                        delay.delay_ms(500_u32);
+                    let tx_buf: [u8; 3] = [0x01, 0x02, 0x03];
+                    spi.transfer(&mut reply_buf[0..3], &tx_buf).unwrap();
+                    assert_eq!(tx_buf, reply_buf[0..3]);
+                    rprintln!(
+                        "Received reply: {}, {}, {}",
+                        reply_buf[0],
+                        reply_buf[1],
+                        reply_buf[2]
+                    );
+                    delay.delay_ms(500_u32);
 
-                        let mut tx_rx_buf: [u8; 3] = [0x03, 0x02, 0x01];
-                        spi.transfer_in_place(&mut tx_rx_buf).unwrap();
-                        rprintln!(
-                            "Received reply: {}, {}, {}",
-                            tx_rx_buf[0],
-                            tx_rx_buf[1],
-                            tx_rx_buf[2]
-                        );
-                        assert_eq!(&tx_rx_buf[0..3], &[0x03, 0x02, 0x01]);
-                    } else {
-                        let send_buf: [u8; 3] = [0x01, 0x02, 0x03];
-                        spi.transfer(&mut reply_buf[0..3], &send_buf).unwrap();
-                        rprintln!(
-                            "Received reply: {}, {}, {}",
-                            reply_buf[0],
-                            reply_buf[1],
-                            reply_buf[2]
-                        );
-                        delay.delay_ms(1000_u32);
-                    }
+                    let mut tx_rx_buf: [u8; 3] = [0x03, 0x02, 0x01];
+                    spi.transfer_in_place(&mut tx_rx_buf).unwrap();
+                    rprintln!(
+                        "Received reply: {}, {}, {}",
+                        tx_rx_buf[0],
+                        tx_rx_buf[1],
+                        tx_rx_buf[2]
+                    );
+                    assert_eq!(&tx_rx_buf[0..3], &[0x03, 0x02, 0x01]);
                 }
             }
             SpiBusSelect::SpiBPortB => {
                 if let Some(ref mut spi) = *spib_ref.borrow_mut() {
-                    if EXAMPLE_SEL == ExampleSelect::Loopback {
-                        // Can't really verify correct reply here.
-                        spi.write(&[0x42]).expect("write failed");
-                        // Need small delay.. otherwise we will read back the sent byte (which we don't want here).
-                        // The write function will return as soon as all bytes were shifted out, ignoring the
-                        // reply bytes.
-                        delay.delay_us(50);
-                        // Because of the loopback mode, we should get back the fill word here.
-                        spi.read(&mut reply_buf[0..1]).unwrap();
-                        assert_eq!(reply_buf[0], FILL_WORD);
-                        delay.delay_ms(500_u32);
+                    // Can't really verify correct reply here.
+                    spi.write(&[0x42]).expect("write failed");
+                    // Because of the loopback mode, we should get back the fill word here.
+                    spi.read(&mut reply_buf[0..1]).unwrap();
+                    assert_eq!(reply_buf[0], FILL_WORD);
+                    delay.delay_ms(500_u32);
 
-                        let tx_buf: [u8; 3] = [0x01, 0x02, 0x03];
-                        spi.transfer(&mut reply_buf[0..3], &tx_buf).unwrap();
-                        assert_eq!(tx_buf, reply_buf[0..3]);
-                        rprintln!(
-                            "Received reply: {}, {}, {}",
-                            reply_buf[0],
-                            reply_buf[1],
-                            reply_buf[2]
-                        );
-                        delay.delay_ms(500_u32);
+                    let tx_buf: [u8; 3] = [0x01, 0x02, 0x03];
+                    spi.transfer(&mut reply_buf[0..3], &tx_buf).unwrap();
+                    assert_eq!(tx_buf, reply_buf[0..3]);
+                    rprintln!(
+                        "Received reply: {}, {}, {}",
+                        reply_buf[0],
+                        reply_buf[1],
+                        reply_buf[2]
+                    );
+                    delay.delay_ms(500_u32);
 
-                        let mut tx_rx_buf: [u8; 3] = [0x03, 0x02, 0x01];
-                        spi.transfer_in_place(&mut tx_rx_buf).unwrap();
-                        rprintln!(
-                            "Received reply: {}, {}, {}",
-                            tx_rx_buf[0],
-                            tx_rx_buf[1],
-                            tx_rx_buf[2]
-                        );
-                        assert_eq!(&tx_rx_buf[0..3], &[0x03, 0x02, 0x01]);
-                    } else {
-                        let send_buf: [u8; 3] = [0x01, 0x02, 0x03];
-                        spi.transfer(&mut reply_buf[0..3], &send_buf).unwrap();
-                        rprintln!(
-                            "Received reply: {}, {}, {}",
-                            reply_buf[0],
-                            reply_buf[1],
-                            reply_buf[2]
-                        );
-                        delay.delay_ms(1000_u32);
-                    }
+                    let mut tx_rx_buf: [u8; 3] = [0x03, 0x02, 0x01];
+                    spi.transfer_in_place(&mut tx_rx_buf).unwrap();
+                    rprintln!(
+                        "Received reply: {}, {}, {}",
+                        tx_rx_buf[0],
+                        tx_rx_buf[1],
+                        tx_rx_buf[2]
+                    );
+                    assert_eq!(&tx_rx_buf[0..3], &[0x03, 0x02, 0x01]);
                 }
             }
         }

examples/simple/examples/timer-ticks.rs

@@ -3,8 +3,8 @@
 #![no_std]
 
 use core::cell::Cell;
-use cortex_m::interrupt::Mutex;
 use cortex_m_rt::entry;
+use critical_section::Mutex;
 use panic_rtt_target as _;
 use rtt_target::{rprintln, rtt_init_print};
 use va108xx_hal::{
@@ -83,11 +83,12 @@ fn main() -> ! {
         }
     }
     loop {
-        let current_ms = cortex_m::interrupt::free(|cs| MS_COUNTER.borrow(cs).get());
+        let current_ms = critical_section::with(|cs| MS_COUNTER.borrow(cs).get());
         if current_ms - last_ms >= 1000 {
-            last_ms = current_ms;
+            // To prevent drift.
+            last_ms += 1000;
             rprintln!("MS counter: {}", current_ms);
-            let second = cortex_m::interrupt::free(|cs| SEC_COUNTER.borrow(cs).get());
+            let second = critical_section::with(|cs| SEC_COUNTER.borrow(cs).get());
             rprintln!("Second counter: {}", second);
         }
         cortex_m::asm::delay(10000);
@@ -110,7 +111,7 @@ fn OC0() {
 #[interrupt]
 #[allow(non_snake_case)]
 fn OC1() {
-    cortex_m::interrupt::free(|cs| {
+    critical_section::with(|cs| {
         let mut sec = SEC_COUNTER.borrow(cs).get();
         sec += 1;
         SEC_COUNTER.borrow(cs).set(sec);