diff --git a/va108xx-hal/src/spi.rs b/va108xx-hal/src/spi.rs
index 544fafa..1d2ac9c 100644
--- a/va108xx-hal/src/spi.rs
+++ b/va108xx-hal/src/spi.rs
@@ -267,13 +267,13 @@ pub trait TransferConfigProvider {
 #[derive(Copy, Clone, Debug)]
 pub struct TransferConfigWithHwcs<HwCs> {
     pub hw_cs: Option<HwCs>,
-    pub cfg: CommonTransferConfig,
+    pub cfg: TransferConfig,
 }
 
 /// Type erased variant of the transfer configuration. This is required to avoid generics in
 /// the SPI constructor.
 #[derive(Copy, Clone, Debug)]
-pub struct CommonTransferConfig {
+pub struct TransferConfig {
     pub clk_cfg: Option<SpiClkConfig>,
     pub mode: Option<Mode>,
     pub sod: bool,
@@ -293,7 +293,7 @@ impl TransferConfigWithHwcs<NoneT> {
     ) -> Self {
         TransferConfigWithHwcs {
             hw_cs: None,
-            cfg: CommonTransferConfig {
+            cfg: TransferConfig {
                 clk_cfg,
                 mode,
                 sod,
@@ -314,7 +314,7 @@ impl<HwCs: HwCsProvider> TransferConfigWithHwcs<HwCs> {
     ) -> Self {
         TransferConfigWithHwcs {
             hw_cs,
-            cfg: CommonTransferConfig {
+            cfg: TransferConfig {
                 clk_cfg,
                 mode,
                 sod,
@@ -324,7 +324,7 @@ impl<HwCs: HwCsProvider> TransferConfigWithHwcs<HwCs> {
         }
     }
 
-    pub fn downgrade(self) -> CommonTransferConfig {
+    pub fn downgrade(self) -> TransferConfig {
         self.cfg
     }
 }
@@ -591,7 +591,7 @@ where
         spi: SpiI,
         pins: (Sck, Miso, Mosi),
         spi_cfg: SpiConfig,
-        transfer_cfg: Option<&CommonTransferConfig>,
+        transfer_cfg: Option<&TransferConfig>,
     ) -> Self {
         enable_peripheral_clock(syscfg, SpiI::PERIPH_SEL);
         let SpiConfig {