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3 Commits
19a3a2c6c0
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0a31b637e6
Author | SHA1 | Date | |
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0a31b637e6 | |||
6e1ae70054 | |||
8ae2d6189a
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@@ -11,6 +11,7 @@ static SYS_CLOCK: Mutex<OnceCell<Hertz>> = Mutex::new(OnceCell::new());
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pub type PeripheralClocks = PeripheralSelect;
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#[derive(Debug, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum FilterClkSel {
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SysClk = 0,
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Clk1 = 1,
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@@ -69,6 +69,7 @@ use crate::{clock::FilterClkSel, enable_nvic_interrupt, pac, FunSel, InterruptCo
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/// Value-level `enum` for disabled configurations
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#[derive(PartialEq, Eq, Clone, Copy)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum DynDisabled {
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Floating,
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PullDown,
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@@ -156,14 +157,16 @@ pub const DYN_ALT_FUNC_3: DynPinMode = DynPinMode::Alternate(DynAlternate::Sel3)
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//==================================================================================================
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/// Value-level `enum` for pin groups
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#[derive(PartialEq, Eq, Clone, Copy)]
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#[derive(Debug, PartialEq, Eq, Clone, Copy)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum DynGroup {
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A,
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B,
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}
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/// Value-level `struct` representing pin IDs
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#[derive(PartialEq, Eq, Clone, Copy)]
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#[derive(Debug, PartialEq, Eq, Clone, Copy)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub struct DynPinId {
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pub group: DynGroup,
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pub num: u8,
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@@ -177,6 +180,7 @@ pub struct DynPinId {
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///
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/// This `struct` takes ownership of a [`DynPinId`] and provides an API to
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/// access the corresponding regsiters.
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#[derive(Debug)]
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pub(crate) struct DynRegisters(DynPinId);
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// [`DynRegisters`] takes ownership of the [`DynPinId`], and [`DynPin`]
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@@ -209,6 +213,7 @@ impl DynRegisters {
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///
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/// This type acts as a type-erased version of [`Pin`]. Every pin is represented
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/// by the same type, and pins are tracked and distinguished at run-time.
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#[derive(Debug)]
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pub struct DynPin {
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pub(crate) regs: DynRegisters,
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mode: DynPinMode,
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@@ -119,8 +119,11 @@ pub trait InputConfig: Sealed {
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const DYN: DynInput;
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}
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#[derive(Debug)]
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pub enum Floating {}
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#[derive(Debug)]
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pub enum PullDown {}
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#[derive(Debug)]
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pub enum PullUp {}
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impl InputConfig for Floating {
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@@ -148,6 +151,7 @@ pub type InputPullUp = Input<PullUp>;
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///
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/// Type `C` is one of three input configurations: [`Floating`], [`PullDown`] or
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/// [`PullUp`]
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#[derive(Debug)]
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pub struct Input<C: InputConfig> {
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cfg: PhantomData<C>,
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}
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@@ -177,13 +181,17 @@ pub trait OutputConfig: Sealed {
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pub trait ReadableOutput: Sealed {}
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/// Type-level variant of [`OutputConfig`] for a push-pull configuration
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#[derive(Debug)]
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pub enum PushPull {}
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/// Type-level variant of [`OutputConfig`] for an open drain configuration
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#[derive(Debug)]
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pub enum OpenDrain {}
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/// Type-level variant of [`OutputConfig`] for a readable push-pull configuration
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#[derive(Debug)]
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pub enum ReadablePushPull {}
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/// Type-level variant of [`OutputConfig`] for a readable open-drain configuration
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#[derive(Debug)]
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pub enum ReadableOpenDrain {}
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impl Sealed for PushPull {}
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@@ -210,6 +218,7 @@ impl OutputConfig for ReadableOpenDrain {
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///
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/// Type `C` is one of four output configurations: [`PushPull`], [`OpenDrain`] or
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/// their respective readable versions
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#[derive(Debug)]
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pub struct Output<C: OutputConfig> {
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cfg: PhantomData<C>,
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}
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@@ -304,6 +313,7 @@ macro_rules! pin_id {
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// Need paste macro to use ident in doc attribute
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paste! {
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#[doc = "Pin ID representing pin " $Id]
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#[derive(Debug)]
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pub enum $Id {}
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impl Sealed for $Id {}
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impl PinId for $Id {
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@@ -321,6 +331,7 @@ macro_rules! pin_id {
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//==================================================================================================
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/// A type-level GPIO pin, parameterized by [PinId] and [PinMode] types
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#[derive(Debug)]
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pub struct Pin<I: PinId, M: PinMode> {
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inner: DynPin,
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phantom: PhantomData<(I, M)>,
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@@ -741,6 +752,7 @@ macro_rules! pins {
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) => {
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paste!(
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/// Collection of all the individual [`Pin`]s for a given port (PORTA or PORTB)
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#[derive(Debug)]
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pub struct $PinsName {
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port: $Port,
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$(
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@@ -18,6 +18,7 @@ const CLK_400K: Hertz = Hertz::from_raw(400_000);
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const MIN_CLK_400K: Hertz = Hertz::from_raw(8_000_000);
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#[derive(Debug, PartialEq, Eq, Copy, Clone)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum FifoEmptyMode {
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Stall = 0,
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EndTransaction = 1,
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@@ -89,18 +90,21 @@ enum I2cCmd {
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}
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#[derive(Debug, PartialEq, Eq, Copy, Clone)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum I2cSpeed {
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Regular100khz = 0,
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Fast400khz = 1,
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}
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#[derive(Debug, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum I2cDirection {
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Send = 0,
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Read = 1,
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}
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#[derive(Debug, PartialEq, Eq, Copy, Clone)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum I2cAddress {
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Regular(u8),
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TenBit(u16),
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@@ -141,9 +145,12 @@ impl Instance for pac::I2cb {
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// Config
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//==================================================================================================
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub struct TrTfThighTlow(u8, u8, u8, u8);
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub struct TsuStoTsuStaThdStaTBuf(u8, u8, u8, u8);
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub struct TimingCfg {
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// 4 bit max width
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tr: u8,
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@@ -218,6 +225,7 @@ impl Default for TimingCfg {
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}
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}
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub struct MasterConfig {
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pub tx_fe_mode: FifoEmptyMode,
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pub rx_fe_mode: FifoEmptyMode,
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@@ -77,6 +77,7 @@ impl InterruptConfig {
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pub type IrqCfg = InterruptConfig;
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#[derive(Debug, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub struct InvalidPin(pub(crate) ());
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/// Can be used to manually manipulate the function select of port pins
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@@ -15,7 +15,9 @@ use crate::{clock::enable_peripheral_clock, gpio::DynPinId};
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const DUTY_MAX: u16 = u16::MAX;
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pub struct PwmCommon {
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#[derive(Debug)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub(crate) struct PwmCommon {
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sys_clk: Hertz,
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/// For PWMB, this is the upper limit
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current_duty: u16,
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@@ -37,6 +37,7 @@ pub const BMSTART_BMSTOP_MASK: u32 = 1 << 31;
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pub const DEFAULT_CLK_DIV: u16 = 2;
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#[derive(Debug, PartialEq, Eq, Copy, Clone)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum HwChipSelectId {
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Id0 = 0,
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Id1 = 1,
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@@ -50,6 +51,7 @@ pub enum HwChipSelectId {
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}
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#[derive(Debug)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum SpiPort {
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Porta = 0,
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Portb = 1,
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@@ -58,6 +60,7 @@ pub enum SpiPort {
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}
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#[derive(Debug, PartialEq, Eq, Copy, Clone)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum WordSize {
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OneBit = 0x00,
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FourBits = 0x03,
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@@ -79,6 +79,7 @@ pub enum Event {
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}
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#[derive(Default, Debug, PartialEq, Eq, Copy, Clone)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub struct CascadeCtrl {
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/// Enable Cascade 0 signal active as a requirement for counting
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pub enb_start_src_csd0: bool,
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@@ -108,6 +109,7 @@ pub struct CascadeCtrl {
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}
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#[derive(Debug, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum CascadeSel {
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Csd0 = 0,
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Csd1 = 1,
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@@ -23,6 +23,7 @@ use crate::{
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use embedded_hal_nb::serial::Read;
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#[derive(Debug)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum Bank {
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A = 0,
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B = 1,
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@@ -237,6 +238,7 @@ impl From<Hertz> for Config {
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//==================================================================================================
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#[derive(Debug, Copy, Clone)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub struct IrqContextTimeoutOrMaxSize {
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rx_idx: usize,
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mode: IrqReceptionMode,
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@@ -262,6 +264,7 @@ impl IrqContextTimeoutOrMaxSize {
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/// This struct is used to return the default IRQ handler result to the user
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#[derive(Debug, Default)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub struct IrqResult {
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pub bytes_read: usize,
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pub errors: Option<UartErrors>,
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@@ -269,6 +272,7 @@ pub struct IrqResult {
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/// This struct is used to return the default IRQ handler result to the user
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#[derive(Debug, Default)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub struct IrqResultMaxSizeOrTimeout {
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complete: bool,
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timeout: bool,
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@@ -319,6 +323,7 @@ impl IrqResultMaxSizeOrTimeout {
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}
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#[derive(Debug, PartialEq, Copy, Clone)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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enum IrqReceptionMode {
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Idle,
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Pending,
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@@ -407,7 +412,7 @@ impl Instance for pac::Uarta {
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}
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#[inline(always)]
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fn ptr() -> *const uart_base::RegisterBlock {
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pac::Uarta::ptr() as *const _
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Self::ptr() as *const _
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}
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}
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@@ -422,7 +427,7 @@ impl Instance for pac::Uartb {
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}
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#[inline(always)]
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fn ptr() -> *const uart_base::RegisterBlock {
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pac::Uartb::ptr() as *const _
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Self::ptr() as *const _
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}
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}
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@@ -10,6 +10,7 @@ use va108xx_hal::{
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pac, InterruptConfig,
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};
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#[derive(Debug)]
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pub struct Button {
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button: Pin<PA11, InputFloating>,
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}
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Block a user