update probe-rs files

Reviewed-on: #20

.gitignore

@@ -16,3 +16,5 @@ Cargo.lock
 # JetBrains IDEs
 /.idea
 *.iml
+
+/Embed.toml

Embed.toml.sample

@@ -0,0 +1,12 @@
+[default.probe]
+protocol = "Jtag"
+
+[default.general]
+chip = "VA108xx_RAM"
+
+[default.rtt]
+enabled = true
+
+[default.gdb]
+# Whether or not a GDB server should be opened after flashing.
+enabled = false

examples/rtic/Cargo.toml

@@ -38,7 +38,7 @@ default-features = false
 features = ["portable-atomic"]
 
 [dependencies.va108xx-hal]
-path = "../../va108xx-hal"
+version = "0.8"
 
 [dependencies.vorago-reb1]
 path = "../../vorago-reb1"

examples/simple/Cargo.toml

@@ -16,7 +16,7 @@ embedded-io = "0.6"
 cortex-m-semihosting = "0.5.0"
 
 [dependencies.va108xx-hal]
-path = "../../va108xx-hal"
+version = "0.8"
 features = ["rt", "defmt"]
 
 [dependencies.vorago-reb1]

scripts/VA108xx_Series.yaml

@@ -9,6 +9,7 @@ variants:
     core_access_options: !Arm
       ap: 0
       psel: 0x0
+      jtag_tap: 1
   memory_map:
   - !Ram
     name: DRAM
@@ -22,9 +23,11 @@ variants:
     range:
       start: 0x0
       end: 0x20000
-    is_boot_memory: true
     cores:
     - main
+    access:
+      write: false
+      boot: true
   flash_algorithms:
   - va108xx_fm25v20a_fram_128kb_prog
   - va108xx_m95m01_128kb_prog
@@ -37,6 +40,7 @@ variants:
     core_access_options: !Arm
       ap: 0
       psel: 0x0
+      jtag_tap: 1
   memory_map:
   - !Ram
     name: DRAM
@@ -50,9 +54,11 @@ variants:
     range:
       start: 0x0
       end: 0x20000
-    is_boot_memory: true
     cores:
     - main
+    access:
+      write: false
+      boot: true
 flash_algorithms:
 - name: va108xx_fm25v20a_fram_128kb_prog
   description: VA108_FM25V20A_FRAM_128KB

va108xx-hal/CHANGELOG.md

@@ -8,6 +8,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [unreleased]
 
+## [v0.9.0] 2024-10-07
+
+- Deleted some HAL re-exports in the PWM module
+
 ## [v0.8.0] 2024-09-30
 
 ## Changed

va108xx-hal/src/pwm.rs

@@ -9,11 +9,11 @@ use core::convert::Infallible;
 use core::marker::PhantomData;
 
 use crate::pac;
+use crate::time::Hertz;
 use crate::timer::{
     TimAndPinRegister, TimDynRegister, TimPin, TimRegInterface, ValidTim, ValidTimAndPin,
 };
 use crate::{clock::enable_peripheral_clock, gpio::DynPinId};
-pub use crate::{gpio::PinId, time::Hertz};
 
 const DUTY_MAX: u16 = u16::MAX;
 

vorago-reb1/CHANGELOG.md

@@ -8,7 +8,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [unreleased]
 
+## [v0.6.0] 2024-09-30
+
 - Added M95M01 EEPROM module/API
+- Update `va108xx-hal` dependency to range >=v0.8, <0.9
 
 ## [v0.5.1] 2024-07-04
 

vorago-reb1/Cargo.toml

@@ -1,6 +1,6 @@
 [package]
 name = "vorago-reb1"
-version = "0.5.1"
+version = "0.6.0"
 authors = ["Robin Mueller <muellerr@irs.uni-stuttgart.de>"]
 edition = "2021"
 description = "Board Support Crate for the Vorago REB1 development board"
@@ -21,8 +21,7 @@ bitfield = "0.17"
 version = "0.3"
 
 [dependencies.va108xx-hal]
-version = ">=0.7, <=0.8"
+version = ">=0.8, <0.9"
-path = "../va108xx-hal"
 features = ["rt"]
 
 [features]