Improve UART CLK calculation #12
@ -6,6 +6,15 @@ All notable changes to this project will be documented in this file.
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The format is based on [Keep a Changelog](http://keepachangelog.com/)
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and this project adheres to [Semantic Versioning](http://semver.org/).
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## [v0.7.0] 2024-07-04
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- Replace `uarta` and `uartb` `Uart` constructors by `new` constructor
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- Replace SPI `spia`, `spib` and `spic` constructors by `new` constructor
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- Replace I2C `i2ca`, `i2cb` constructors by `new` constructor. Update constructor
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to fail on invalid fast I2C speed system clock values
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- Renamed `gpio::pins` to `gpio::pin` and `gpio::dynpins` to `gpio::dynpin`
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- Simplify UART clock divider calculations and remove `libm` dependency consequently
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## [v0.6.0] 2024-06-16
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- Updated `embedded-hal` to v1
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@ -16,7 +16,6 @@ cortex-m-rt = "0.7"
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nb = "1"
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paste = "1"
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embedded-hal-nb = "1"
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libm = "0.2"
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embedded-io = "0.6"
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fugit = "0.3"
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typenum = "1"
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@ -7,7 +7,6 @@
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use core::{marker::PhantomData, ops::Deref};
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use embedded_hal_nb::serial::Read;
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use fugit::RateExtU32;
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use libm::floorf;
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pub use crate::IrqCfg;
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use crate::{
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@ -363,12 +362,19 @@ impl<UART: Instance> UartBase<UART> {
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false => 16,
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true => 8,
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};
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// This is the calculation: (64.0 * (x - integer_part as f32) + 0.5) as u32 without floating
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// point calculations.
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let frac = ((sys_clk.raw() % (config.baudrate.raw() * 16)) * 64
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+ (config.baudrate.raw() * 8))
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/ (config.baudrate.raw() * 16);
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// Calculations here are derived from chapter 10.4.4 (p.74) of the datasheet.
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let x = sys_clk.raw() as f32 / (config.baudrate.raw() * baud_multiplier) as f32;
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let integer_part = floorf(x) as u32;
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let frac = floorf(64.0 * (x - integer_part as f32) + 0.5) as u32;
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self.uart
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.clkscale()
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.write(|w| unsafe { w.bits(integer_part * 64 + frac) });
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let integer_part = x as u32;
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self.uart.clkscale().write(|w| unsafe {
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w.frac().bits(frac as u8);
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w.int().bits(integer_part)
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});
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let (paren, pareven) = match config.parity {
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Parity::None => (false, false),
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