Robin Mueller
94c6d91bae
- The workspace is now a monorepo without submodules. The HAL, PAC and BSP are integrated directly - Update all dependencies: embedded-hal v1 and RTIC v2
86 lines
3.2 KiB
Rust
86 lines
3.2 KiB
Rust
#[doc = "Register `CTRL0` reader"]
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pub type R = crate::R<Ctrl0Spec>;
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#[doc = "Register `CTRL0` writer"]
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pub type W = crate::W<Ctrl0Spec>;
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#[doc = "Field `SIZE` reader - Data Size(0x3=>4, 0xf=>16)"]
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pub type SizeR = crate::FieldReader;
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#[doc = "Field `SIZE` writer - Data Size(0x3=>4, 0xf=>16)"]
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pub type SizeW<'a, REG> = crate::FieldWriter<'a, REG, 4>;
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#[doc = "Field `SPO` reader - SPI Clock Polarity"]
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pub type SpoR = crate::BitReader;
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#[doc = "Field `SPO` writer - SPI Clock Polarity"]
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pub type SpoW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `SPH` reader - SPI Clock Phase"]
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pub type SphR = crate::BitReader;
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#[doc = "Field `SPH` writer - SPI Clock Phase"]
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pub type SphW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `SCRDV` reader - Serial Clock Rate divide+1 value"]
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pub type ScrdvR = crate::FieldReader;
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#[doc = "Field `SCRDV` writer - Serial Clock Rate divide+1 value"]
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pub type ScrdvW<'a, REG> = crate::FieldWriter<'a, REG, 8>;
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impl R {
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#[doc = "Bits 0:3 - Data Size(0x3=>4, 0xf=>16)"]
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#[inline(always)]
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pub fn size(&self) -> SizeR {
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SizeR::new((self.bits & 0x0f) as u8)
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}
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#[doc = "Bit 6 - SPI Clock Polarity"]
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#[inline(always)]
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pub fn spo(&self) -> SpoR {
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SpoR::new(((self.bits >> 6) & 1) != 0)
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}
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#[doc = "Bit 7 - SPI Clock Phase"]
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#[inline(always)]
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pub fn sph(&self) -> SphR {
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SphR::new(((self.bits >> 7) & 1) != 0)
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}
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#[doc = "Bits 8:15 - Serial Clock Rate divide+1 value"]
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#[inline(always)]
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pub fn scrdv(&self) -> ScrdvR {
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ScrdvR::new(((self.bits >> 8) & 0xff) as u8)
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}
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}
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impl W {
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#[doc = "Bits 0:3 - Data Size(0x3=>4, 0xf=>16)"]
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#[inline(always)]
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#[must_use]
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pub fn size(&mut self) -> SizeW<Ctrl0Spec> {
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SizeW::new(self, 0)
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}
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#[doc = "Bit 6 - SPI Clock Polarity"]
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#[inline(always)]
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#[must_use]
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pub fn spo(&mut self) -> SpoW<Ctrl0Spec> {
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SpoW::new(self, 6)
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}
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#[doc = "Bit 7 - SPI Clock Phase"]
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#[inline(always)]
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#[must_use]
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pub fn sph(&mut self) -> SphW<Ctrl0Spec> {
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SphW::new(self, 7)
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}
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#[doc = "Bits 8:15 - Serial Clock Rate divide+1 value"]
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#[inline(always)]
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#[must_use]
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pub fn scrdv(&mut self) -> ScrdvW<Ctrl0Spec> {
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ScrdvW::new(self, 8)
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}
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}
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#[doc = "Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
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pub struct Ctrl0Spec;
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impl crate::RegisterSpec for Ctrl0Spec {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [`ctrl0::R`](R) reader structure"]
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impl crate::Readable for Ctrl0Spec {}
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#[doc = "`write(|w| ..)` method takes [`ctrl0::W`](W) writer structure"]
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impl crate::Writable for Ctrl0Spec {
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type Safety = crate::Unsafe;
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const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
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const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
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}
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#[doc = "`reset()` method sets CTRL0 to value 0"]
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impl crate::Resettable for Ctrl0Spec {
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const RESET_VALUE: u32 = 0;
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}
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