56 lines
1.8 KiB
Rust
56 lines
1.8 KiB
Rust
#![no_main]
|
|
#![no_std]
|
|
|
|
use cortex_m_rt::entry;
|
|
use embedded_hal::spi::{SpiBus, MODE_0};
|
|
use embedded_hal_bus::spi::ExclusiveDevice;
|
|
use panic_rtt_target as _;
|
|
use rtt_target::{rprintln, rtt_init_print};
|
|
use va108xx_hal::{
|
|
pac,
|
|
spi::{RomCs, RomMiso, RomMosi, RomSck, Spi, SpiClkConfig, SpiConfig, TransferConfigWithHwcs},
|
|
time::Hertz,
|
|
};
|
|
use vorago_reb1::m95m01::{regs::RDSR, M95M01};
|
|
|
|
const CLOCK_FREQ: Hertz = Hertz::from_raw(50_000_000);
|
|
|
|
#[entry]
|
|
fn main() -> ! {
|
|
rtt_init_print!();
|
|
rprintln!("-- VA108XX REB1 NVM example --");
|
|
|
|
let mut dp = pac::Peripherals::take().unwrap();
|
|
let cp = cortex_m::Peripherals::take().unwrap();
|
|
|
|
let mut spi = Spi::new(
|
|
&mut dp.sysconfig,
|
|
CLOCK_FREQ,
|
|
dp.spic,
|
|
(RomSck, RomMiso, RomMosi),
|
|
// These values are taken from the vorago bootloader app, don't want to experiment here..
|
|
SpiConfig::default().clk_cfg(SpiClkConfig::new(2, 4)),
|
|
);
|
|
let mut read_buf: [u8; 2] = [0; 2];
|
|
spi.transfer(&mut read_buf, &[RDSR, 0]);
|
|
rprintln!("read buf {:?}", read_buf);
|
|
let mut nvm =
|
|
M95M01::new(ExclusiveDevice::new_no_delay(spi, dummy_pin::DummyPin::new_low()).unwrap())
|
|
.expect("creating NVM structure failed");
|
|
let status_reg = nvm.read_status_reg().expect("reading status reg failed");
|
|
rprintln!("status reg: {:?}", status_reg);
|
|
if status_reg.zero_segment() == 0b111 {
|
|
panic!("status register unexpected values");
|
|
}
|
|
|
|
let mut read_buf: [u8; 16] = [0; 16];
|
|
nvm.read(0x4000, &mut read_buf[0..4])
|
|
.expect("reading NVM failed");
|
|
rprintln!("NVM address 0x4000: {:x?}", &read_buf[0..4]);
|
|
let write_buf: [u8; 4] = [1, 2, 3, 4];
|
|
nvm.write(0x4000, &write_buf).unwrap();
|
|
nvm.read(0x4000, &mut read_buf[0..4]).unwrap();
|
|
assert_eq!(&read_buf[0..4], write_buf);
|
|
loop {}
|
|
}
|