152 lines
5.8 KiB
Rust
152 lines
5.8 KiB
Rust
#[doc = "Register `CTRL` reader"]
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pub type R = crate::R<CtrlSpec>;
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#[doc = "Register `CTRL` writer"]
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pub type W = crate::W<CtrlSpec>;
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#[doc = "Field `CLKENABLED` reader - I2C CLK Enabled"]
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pub type ClkenabledR = crate::BitReader;
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#[doc = "Field `CLKENABLED` writer - I2C CLK Enabled"]
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pub type ClkenabledW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `ENABLED` reader - I2C Activated"]
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pub type EnabledR = crate::BitReader;
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#[doc = "Field `ENABLED` writer - I2C Activated"]
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pub type EnabledW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `ENABLE` reader - I2C Active"]
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pub type EnableR = crate::BitReader;
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#[doc = "Field `ENABLE` writer - I2C Active"]
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pub type EnableW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `TXFEMD` reader - TX FIFIO Empty Mode"]
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pub type TxfemdR = crate::BitReader;
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#[doc = "Field `TXFEMD` writer - TX FIFIO Empty Mode"]
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pub type TxfemdW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `RXFFMD` reader - RX FIFO Full Mode"]
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pub type RxffmdR = crate::BitReader;
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#[doc = "Field `RXFFMD` writer - RX FIFO Full Mode"]
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pub type RxffmdW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `ALGFILTER` reader - Enable Input Analog Glitch Filter"]
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pub type AlgfilterR = crate::BitReader;
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#[doc = "Field `ALGFILTER` writer - Enable Input Analog Glitch Filter"]
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pub type AlgfilterW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `DLGFILTER` reader - Enable Input Digital Glitch Filter"]
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pub type DlgfilterR = crate::BitReader;
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#[doc = "Field `DLGFILTER` writer - Enable Input Digital Glitch Filter"]
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pub type DlgfilterW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `LOOPBACK` reader - Enable LoopBack Mode"]
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pub type LoopbackR = crate::BitReader;
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#[doc = "Field `LOOPBACK` writer - Enable LoopBack Mode"]
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pub type LoopbackW<'a, REG> = crate::BitWriter<'a, REG>;
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#[doc = "Field `TMCONFIGENB` reader - Enable Timing Config Register"]
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pub type TmconfigenbR = crate::BitReader;
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#[doc = "Field `TMCONFIGENB` writer - Enable Timing Config Register"]
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pub type TmconfigenbW<'a, REG> = crate::BitWriter<'a, REG>;
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impl R {
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#[doc = "Bit 0 - I2C CLK Enabled"]
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#[inline(always)]
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pub fn clkenabled(&self) -> ClkenabledR {
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ClkenabledR::new((self.bits & 1) != 0)
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}
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#[doc = "Bit 1 - I2C Activated"]
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#[inline(always)]
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pub fn enabled(&self) -> EnabledR {
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EnabledR::new(((self.bits >> 1) & 1) != 0)
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}
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#[doc = "Bit 2 - I2C Active"]
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#[inline(always)]
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pub fn enable(&self) -> EnableR {
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EnableR::new(((self.bits >> 2) & 1) != 0)
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}
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#[doc = "Bit 3 - TX FIFIO Empty Mode"]
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#[inline(always)]
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pub fn txfemd(&self) -> TxfemdR {
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TxfemdR::new(((self.bits >> 3) & 1) != 0)
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}
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#[doc = "Bit 4 - RX FIFO Full Mode"]
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#[inline(always)]
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pub fn rxffmd(&self) -> RxffmdR {
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RxffmdR::new(((self.bits >> 4) & 1) != 0)
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}
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#[doc = "Bit 5 - Enable Input Analog Glitch Filter"]
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#[inline(always)]
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pub fn algfilter(&self) -> AlgfilterR {
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AlgfilterR::new(((self.bits >> 5) & 1) != 0)
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}
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#[doc = "Bit 6 - Enable Input Digital Glitch Filter"]
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#[inline(always)]
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pub fn dlgfilter(&self) -> DlgfilterR {
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DlgfilterR::new(((self.bits >> 6) & 1) != 0)
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}
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#[doc = "Bit 8 - Enable LoopBack Mode"]
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#[inline(always)]
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pub fn loopback(&self) -> LoopbackR {
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LoopbackR::new(((self.bits >> 8) & 1) != 0)
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}
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#[doc = "Bit 9 - Enable Timing Config Register"]
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#[inline(always)]
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pub fn tmconfigenb(&self) -> TmconfigenbR {
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TmconfigenbR::new(((self.bits >> 9) & 1) != 0)
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}
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}
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impl W {
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#[doc = "Bit 0 - I2C CLK Enabled"]
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#[inline(always)]
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pub fn clkenabled(&mut self) -> ClkenabledW<CtrlSpec> {
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ClkenabledW::new(self, 0)
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}
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#[doc = "Bit 1 - I2C Activated"]
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#[inline(always)]
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pub fn enabled(&mut self) -> EnabledW<CtrlSpec> {
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EnabledW::new(self, 1)
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}
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#[doc = "Bit 2 - I2C Active"]
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#[inline(always)]
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pub fn enable(&mut self) -> EnableW<CtrlSpec> {
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EnableW::new(self, 2)
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}
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#[doc = "Bit 3 - TX FIFIO Empty Mode"]
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#[inline(always)]
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pub fn txfemd(&mut self) -> TxfemdW<CtrlSpec> {
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TxfemdW::new(self, 3)
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}
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#[doc = "Bit 4 - RX FIFO Full Mode"]
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#[inline(always)]
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pub fn rxffmd(&mut self) -> RxffmdW<CtrlSpec> {
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RxffmdW::new(self, 4)
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}
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#[doc = "Bit 5 - Enable Input Analog Glitch Filter"]
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#[inline(always)]
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pub fn algfilter(&mut self) -> AlgfilterW<CtrlSpec> {
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AlgfilterW::new(self, 5)
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}
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#[doc = "Bit 6 - Enable Input Digital Glitch Filter"]
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#[inline(always)]
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pub fn dlgfilter(&mut self) -> DlgfilterW<CtrlSpec> {
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DlgfilterW::new(self, 6)
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}
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#[doc = "Bit 8 - Enable LoopBack Mode"]
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#[inline(always)]
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pub fn loopback(&mut self) -> LoopbackW<CtrlSpec> {
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LoopbackW::new(self, 8)
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}
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#[doc = "Bit 9 - Enable Timing Config Register"]
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#[inline(always)]
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pub fn tmconfigenb(&mut self) -> TmconfigenbW<CtrlSpec> {
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TmconfigenbW::new(self, 9)
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}
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}
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#[doc = "Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
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pub struct CtrlSpec;
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impl crate::RegisterSpec for CtrlSpec {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [`ctrl::R`](R) reader structure"]
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impl crate::Readable for CtrlSpec {}
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#[doc = "`write(|w| ..)` method takes [`ctrl::W`](W) writer structure"]
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impl crate::Writable for CtrlSpec {
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type Safety = crate::Unsafe;
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const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
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const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
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}
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#[doc = "`reset()` method sets CTRL to value 0"]
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impl crate::Resettable for CtrlSpec {
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const RESET_VALUE: u32 = 0;
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}
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