462 lines
13 KiB
Rust
462 lines
13 KiB
Rust
//! API for Pulse-Width Modulation (PWM)
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//!
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//! The Vorago VA108xx devices use the TIM peripherals to perform PWM related tasks
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//!
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//! ## Examples
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//!
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//! - [PWM example](https://egit.irs.uni-stuttgart.de/rust/va108xx-rs/src/branch/main/examples/simple/examples/pwm.rs)
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use core::convert::Infallible;
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use core::marker::PhantomData;
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use crate::pac;
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use crate::time::Hertz;
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use crate::timer::{TimDynRegister, TimPin, TimRegInterface, ValidTim, ValidTimAndPin};
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use crate::{clock::enable_peripheral_clock, gpio::DynPinId};
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const DUTY_MAX: u16 = u16::MAX;
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pub struct PwmCommon {
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sys_clk: Hertz,
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/// For PWMB, this is the upper limit
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current_duty: u16,
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/// For PWMA, this value will not be used
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current_lower_limit: u16,
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current_period: Hertz,
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current_rst_val: u32,
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}
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enum StatusSelPwm {
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PwmA = 3,
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PwmB = 4,
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}
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pub struct PwmA {}
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pub struct PwmB {}
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//==================================================================================================
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// Strongly typed PWM pin
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//==================================================================================================
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pub struct PwmPin<Pin: TimPin, Tim: ValidTim, Mode = PwmA> {
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pin_and_tim: (Pin, Tim),
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inner: ReducedPwmPin<Mode>,
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mode: PhantomData<Mode>,
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}
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impl<Pin: TimPin, Tim: ValidTim, Mode> PwmPin<Pin, Tim, Mode>
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where
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(Pin, Tim): ValidTimAndPin<Pin, Tim>,
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{
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/// Create a new stronlgy typed PWM pin
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pub fn new(
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sys_cfg: &mut pac::Sysconfig,
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sys_clk: impl Into<Hertz> + Copy,
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pin_and_tim: (Pin, Tim),
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initial_period: impl Into<Hertz> + Copy,
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) -> Self {
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let mut pin = PwmPin {
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pin_and_tim,
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inner: ReducedPwmPin::<Mode>::new(
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Tim::TIM_ID,
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Pin::DYN,
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PwmCommon {
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current_duty: 0,
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current_lower_limit: 0,
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current_period: initial_period.into(),
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current_rst_val: 0,
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sys_clk: sys_clk.into(),
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},
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),
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//unsafe { TimAndPin::new(tim_and_pin.0, tim_and_pin.1) },
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mode: PhantomData,
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};
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enable_peripheral_clock(sys_cfg, crate::clock::PeripheralClocks::Gpio);
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enable_peripheral_clock(sys_cfg, crate::clock::PeripheralClocks::Ioconfig);
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sys_cfg
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.tim_clk_enable()
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.modify(|r, w| unsafe { w.bits(r.bits() | pin.pin_and_tim.1.mask_32()) });
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pin.enable_pwm_a();
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pin.set_period(initial_period);
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pin
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}
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pub fn downgrade(self) -> ReducedPwmPin<Mode> {
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self.inner
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}
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pub fn release(self) -> (Pin, Tim) {
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self.pin_and_tim
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}
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#[inline]
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fn enable_pwm_a(&mut self) {
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self.inner.enable_pwm_a();
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}
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#[inline]
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fn enable_pwm_b(&mut self) {
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self.inner.enable_pwm_b();
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}
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#[inline]
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pub fn get_period(&self) -> Hertz {
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self.inner.get_period()
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}
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#[inline]
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pub fn set_period(&mut self, period: impl Into<Hertz>) {
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self.inner.set_period(period);
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}
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#[inline]
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pub fn disable(&mut self) {
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self.inner.disable();
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}
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#[inline]
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pub fn enable(&mut self) {
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self.inner.enable();
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}
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#[inline]
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pub fn period(&self) -> Hertz {
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self.inner.period()
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}
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#[inline(always)]
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pub fn duty(&self) -> u16 {
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self.inner.duty()
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}
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}
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impl<Pin: TimPin, Tim: ValidTim> From<PwmPin<Pin, Tim, PwmA>> for PwmPin<Pin, Tim, PwmB>
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where
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(Pin, Tim): ValidTimAndPin<Pin, Tim>,
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{
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fn from(other: PwmPin<Pin, Tim, PwmA>) -> Self {
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let mut pwmb = Self {
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mode: PhantomData,
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pin_and_tim: other.pin_and_tim,
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inner: other.inner.into(),
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};
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pwmb.enable_pwm_b();
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pwmb
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}
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}
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impl<PIN: TimPin, TIM: ValidTim> From<PwmPin<PIN, TIM, PwmB>> for PwmPin<PIN, TIM, PwmA>
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where
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(PIN, TIM): ValidTimAndPin<PIN, TIM>,
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{
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fn from(other: PwmPin<PIN, TIM, PwmB>) -> Self {
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let mut pwma = Self {
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mode: PhantomData,
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pin_and_tim: other.pin_and_tim,
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inner: other.inner.into(),
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};
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pwma.enable_pwm_a();
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pwma
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}
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}
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impl<Pin: TimPin, Tim: ValidTim> PwmPin<Pin, Tim, PwmA>
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where
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(Pin, Tim): ValidTimAndPin<Pin, Tim>,
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{
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pub fn pwma(
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sys_cfg: &mut pac::Sysconfig,
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sys_clk: impl Into<Hertz> + Copy,
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pin_and_tim: (Pin, Tim),
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initial_period: impl Into<Hertz> + Copy,
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) -> Self {
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let mut pin: PwmPin<Pin, Tim, PwmA> =
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Self::new(sys_cfg, sys_clk, pin_and_tim, initial_period);
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pin.enable_pwm_a();
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pin
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}
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}
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impl<Pin: TimPin, Tim: ValidTim> PwmPin<Pin, Tim, PwmB>
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where
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(Pin, Tim): ValidTimAndPin<Pin, Tim>,
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{
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pub fn pwmb(
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sys_cfg: &mut pac::Sysconfig,
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sys_clk: impl Into<Hertz> + Copy,
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pin_and_tim: (Pin, Tim),
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initial_period: impl Into<Hertz> + Copy,
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) -> Self {
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let mut pin: PwmPin<Pin, Tim, PwmB> =
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Self::new(sys_cfg, sys_clk, pin_and_tim, initial_period);
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pin.enable_pwm_b();
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pin
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}
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}
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//==================================================================================================
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// Reduced PWM pin
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//==================================================================================================
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/// Reduced version where type information is deleted
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pub struct ReducedPwmPin<Mode = PwmA> {
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dyn_reg: TimDynRegister,
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common: PwmCommon,
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mode: PhantomData<Mode>,
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}
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impl<Mode> ReducedPwmPin<Mode> {
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pub(crate) fn new(tim_id: u8, pin_id: DynPinId, common: PwmCommon) -> Self {
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Self {
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dyn_reg: TimDynRegister { tim_id, pin_id },
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common,
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mode: PhantomData,
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}
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}
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}
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impl<Mode> ReducedPwmPin<Mode> {
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#[inline]
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fn enable_pwm_a(&mut self) {
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self.dyn_reg
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.reg_block()
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.ctrl()
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.modify(|_, w| unsafe { w.status_sel().bits(StatusSelPwm::PwmA as u8) });
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}
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#[inline]
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fn enable_pwm_b(&mut self) {
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self.dyn_reg
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.reg_block()
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.ctrl()
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.modify(|_, w| unsafe { w.status_sel().bits(StatusSelPwm::PwmB as u8) });
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}
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#[inline]
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pub fn get_period(&self) -> Hertz {
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self.common.current_period
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}
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#[inline]
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pub fn set_period(&mut self, period: impl Into<Hertz>) {
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self.common.current_period = period.into();
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// Avoid division by 0
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if self.common.current_period.raw() == 0 {
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return;
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}
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self.common.current_rst_val = self.common.sys_clk.raw() / self.common.current_period.raw();
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self.dyn_reg
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.reg_block()
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.rst_value()
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.write(|w| unsafe { w.bits(self.common.current_rst_val) });
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}
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#[inline]
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pub fn disable(&mut self) {
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self.dyn_reg
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.reg_block()
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.ctrl()
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.modify(|_, w| w.enable().clear_bit());
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}
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#[inline]
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pub fn enable(&mut self) {
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self.dyn_reg
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.reg_block()
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.ctrl()
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.modify(|_, w| w.enable().set_bit());
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}
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#[inline]
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pub fn period(&self) -> Hertz {
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self.common.current_period
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}
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#[inline(always)]
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pub fn duty(&self) -> u16 {
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self.common.current_duty
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}
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}
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impl<Pin: TimPin, Tim: ValidTim> From<PwmPin<Pin, Tim, PwmA>> for ReducedPwmPin<PwmA>
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where
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(Pin, Tim): ValidTimAndPin<Pin, Tim>,
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{
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fn from(value: PwmPin<Pin, Tim, PwmA>) -> Self {
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value.downgrade()
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}
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}
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impl<Pin: TimPin, Tim: ValidTim> From<PwmPin<Pin, Tim, PwmB>> for ReducedPwmPin<PwmB>
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where
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(Pin, Tim): ValidTimAndPin<Pin, Tim>,
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{
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fn from(value: PwmPin<Pin, Tim, PwmB>) -> Self {
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value.downgrade()
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}
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}
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impl From<ReducedPwmPin<PwmA>> for ReducedPwmPin<PwmB> {
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fn from(other: ReducedPwmPin<PwmA>) -> Self {
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let mut pwmb = Self {
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dyn_reg: other.dyn_reg,
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common: other.common,
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mode: PhantomData,
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};
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pwmb.enable_pwm_b();
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pwmb
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}
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}
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impl From<ReducedPwmPin<PwmB>> for ReducedPwmPin<PwmA> {
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fn from(other: ReducedPwmPin<PwmB>) -> Self {
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let mut pwmb = Self {
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dyn_reg: other.dyn_reg,
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common: other.common,
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mode: PhantomData,
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};
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pwmb.enable_pwm_a();
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pwmb
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}
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}
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//==================================================================================================
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// PWMB implementations
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//==================================================================================================
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impl<Pin: TimPin, Tim: ValidTim> PwmPin<Pin, Tim, PwmB>
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where
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(Pin, Tim): ValidTimAndPin<Pin, Tim>,
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{
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pub fn pwmb_lower_limit(&self) -> u16 {
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self.inner.pwmb_lower_limit()
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}
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pub fn pwmb_upper_limit(&self) -> u16 {
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self.inner.pwmb_upper_limit()
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}
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/// Set the lower limit for PWMB
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///
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/// The PWM signal will be 1 as long as the current RST counter is larger than
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/// the lower limit. For example, with a lower limit of 0.5 and and an upper limit
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/// of 0.7, Only a fixed period between 0.5 * period and 0.7 * period will be in a high
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/// state
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pub fn set_pwmb_lower_limit(&mut self, duty: u16) {
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self.inner.set_pwmb_lower_limit(duty);
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}
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/// Set the higher limit for PWMB
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///
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/// The PWM signal will be 1 as long as the current RST counter is smaller than
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/// the higher limit. For example, with a lower limit of 0.5 and and an upper limit
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/// of 0.7, Only a fixed period between 0.5 * period and 0.7 * period will be in a high
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/// state
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pub fn set_pwmb_upper_limit(&mut self, duty: u16) {
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self.inner.set_pwmb_upper_limit(duty);
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}
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}
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impl ReducedPwmPin<PwmB> {
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#[inline(always)]
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pub fn pwmb_lower_limit(&self) -> u16 {
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self.common.current_lower_limit
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}
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#[inline(always)]
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pub fn pwmb_upper_limit(&self) -> u16 {
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self.common.current_duty
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}
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/// Set the lower limit for PWMB
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///
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/// The PWM signal will be 1 as long as the current RST counter is larger than
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/// the lower limit. For example, with a lower limit of 0.5 and and an upper limit
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/// of 0.7, Only a fixed period between 0.5 * period and 0.7 * period will be in a high
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/// state
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#[inline(always)]
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pub fn set_pwmb_lower_limit(&mut self, duty: u16) {
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self.common.current_lower_limit = duty;
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let pwmb_val: u64 = (self.common.current_rst_val as u64
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* self.common.current_lower_limit as u64)
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/ DUTY_MAX as u64;
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self.dyn_reg
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.reg_block()
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.pwmb_value()
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.write(|w| unsafe { w.bits(pwmb_val as u32) });
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}
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/// Set the higher limit for PWMB
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///
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/// The PWM signal will be 1 as long as the current RST counter is smaller than
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/// the higher limit. For example, with a lower limit of 0.5 and and an upper limit
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/// of 0.7, Only a fixed period between 0.5 * period and 0.7 * period will be in a high
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/// state
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pub fn set_pwmb_upper_limit(&mut self, duty: u16) {
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self.common.current_duty = duty;
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let pwma_val: u64 = (self.common.current_rst_val as u64 * self.common.current_duty as u64)
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/ DUTY_MAX as u64;
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self.dyn_reg
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.reg_block()
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.pwma_value()
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.write(|w| unsafe { w.bits(pwma_val as u32) });
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}
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}
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//==================================================================================================
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// Embedded HAL implementation: PWMA only
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//==================================================================================================
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impl<Pin: TimPin, Tim: ValidTim> embedded_hal::pwm::ErrorType for PwmPin<Pin, Tim> {
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type Error = Infallible;
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}
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impl embedded_hal::pwm::ErrorType for ReducedPwmPin {
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type Error = Infallible;
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}
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impl embedded_hal::pwm::SetDutyCycle for ReducedPwmPin {
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#[inline]
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fn max_duty_cycle(&self) -> u16 {
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DUTY_MAX
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}
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#[inline]
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fn set_duty_cycle(&mut self, duty: u16) -> Result<(), Self::Error> {
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self.common.current_duty = duty;
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let pwma_val: u64 = (self.common.current_rst_val as u64
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* (DUTY_MAX as u64 - self.common.current_duty as u64))
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/ DUTY_MAX as u64;
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self.dyn_reg
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.reg_block()
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.pwma_value()
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.write(|w| unsafe { w.bits(pwma_val as u32) });
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Ok(())
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}
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}
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impl<Pin: TimPin, Tim: ValidTim> embedded_hal::pwm::SetDutyCycle for PwmPin<Pin, Tim> {
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#[inline]
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fn max_duty_cycle(&self) -> u16 {
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DUTY_MAX
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}
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#[inline]
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fn set_duty_cycle(&mut self, duty: u16) -> Result<(), Self::Error> {
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self.inner.set_duty_cycle(duty)
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}
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}
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/// Get the corresponding u16 duty cycle from a percent value ranging between 0.0 and 1.0.
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///
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/// Please note that this might load a lot of floating point code because this processor does not
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/// have a FPU
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pub fn get_duty_from_percent(percent: f32) -> u16 {
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if percent > 1.0 {
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DUTY_MAX
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} else if percent <= 0.0 {
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0
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} else {
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(percent * DUTY_MAX as f32) as u16
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}
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}
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