Changed: - Move most library components to new [`vorago-shared-periphs`](https://egit.irs.uni-stuttgart.de/rust/vorago-shared-periphs) which is mostly re-exported in this crate. - All HAL API constructors now have a more consistent argument order: PAC structures and resource management structures first, then clock configuration, then any other configuration. - Overhaul and simplification of several HAL APIs. The system configuration and IRQ router peripheral instance generally does not need to be passed to HAL API anymore. - All HAL drivers are now type erased. The constructors will still expect and consume the PAC singleton component for resource management purposes, but are not cached anymore. - Refactoring of GPIO library to be more inline with embassy GPIO API. Added: - I2C clock timeout feature support.
138 lines
4.2 KiB
Rust
138 lines
4.2 KiB
Rust
//! SPI example application
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#![no_main]
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#![no_std]
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use cortex_m_rt::entry;
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use embedded_hal::{
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delay::DelayNs,
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spi::{Mode, SpiBus, MODE_0},
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};
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// Import panic provider.
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use panic_probe as _;
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// Import logger.
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use defmt_rtt as _;
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use va108xx_hal::{
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pac,
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pins::{PinsA, PinsB},
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prelude::*,
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spi::{self, configure_pin_as_hw_cs_pin, Spi, SpiClkConfig, TransferConfig},
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timer::CountdownTimer,
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};
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#[derive(PartialEq, Debug)]
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pub enum ExampleSelect {
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// Enter loopback mode. It is not necessary to tie MOSI/MISO together for this
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Loopback,
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MosiMisoTiedTogetherManually,
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}
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#[derive(PartialEq, Debug)]
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pub enum SpiBusSelect {
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SpiAPortA,
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SpiAPortB,
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SpiBPortB,
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}
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const EXAMPLE_SEL: ExampleSelect = ExampleSelect::Loopback;
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const SPI_BUS_SEL: SpiBusSelect = SpiBusSelect::SpiBPortB;
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const SPI_SPEED_KHZ: u32 = 1000;
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const SPI_MODE: Mode = MODE_0;
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const BLOCKMODE: bool = true;
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const FILL_WORD: u8 = 0x0f;
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#[entry]
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fn main() -> ! {
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defmt::println!("-- VA108xx SPI example application--");
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let dp = pac::Peripherals::take().unwrap();
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let mut delay = CountdownTimer::new(dp.tim0, 50.MHz());
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let spi_clk_cfg = SpiClkConfig::from_clk(50.MHz(), SPI_SPEED_KHZ.kHz())
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.expect("creating SPI clock config failed");
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let pinsa = PinsA::new(dp.porta);
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let pinsb = PinsB::new(dp.portb);
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let mut spi_cfg = spi::SpiConfig::default();
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if EXAMPLE_SEL == ExampleSelect::Loopback {
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spi_cfg = spi_cfg.loopback(true)
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}
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// Set up the SPI peripheral
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let mut spi = match SPI_BUS_SEL {
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SpiBusSelect::SpiAPortA => {
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let (sck, mosi, miso) = (pinsa.pa31, pinsa.pa30, pinsa.pa29);
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let mut spia = Spi::new(dp.spia, (sck, miso, mosi), spi_cfg).unwrap();
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spia.set_fill_word(FILL_WORD);
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spia
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}
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SpiBusSelect::SpiAPortB => {
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let (sck, mosi, miso) = (pinsb.pb9, pinsb.pb8, pinsb.pb7);
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let mut spia = Spi::new(dp.spia, (sck, miso, mosi), spi_cfg).unwrap();
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spia.set_fill_word(FILL_WORD);
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spia
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}
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SpiBusSelect::SpiBPortB => {
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let (sck, mosi, miso) = (pinsb.pb5, pinsb.pb4, pinsb.pb3);
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let mut spib = Spi::new(dp.spib, (sck, miso, mosi), spi_cfg).unwrap();
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spib.set_fill_word(FILL_WORD);
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spib
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}
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};
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// Configure transfer specific properties here
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match SPI_BUS_SEL {
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SpiBusSelect::SpiAPortA | SpiBusSelect::SpiAPortB => {
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let transfer_cfg = TransferConfig {
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clk_cfg: Some(spi_clk_cfg),
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mode: Some(SPI_MODE),
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sod: true,
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blockmode: BLOCKMODE,
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bmstall: true,
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hw_cs: None,
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};
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spi.cfg_transfer(&transfer_cfg);
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}
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SpiBusSelect::SpiBPortB => {
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let hw_cs_pin = configure_pin_as_hw_cs_pin(pinsb.pb2);
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let transfer_cfg = TransferConfig {
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clk_cfg: Some(spi_clk_cfg),
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mode: Some(SPI_MODE),
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sod: false,
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blockmode: BLOCKMODE,
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bmstall: true,
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hw_cs: Some(hw_cs_pin),
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};
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spi.cfg_transfer(&transfer_cfg);
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}
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}
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// Application logic
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loop {
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let mut reply_buf: [u8; 8] = [0; 8];
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// Can't really verify correct reply here.
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spi.write(&[0x42]).expect("write failed");
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// Because of the loopback mode, we should get back the fill word here.
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spi.read(&mut reply_buf[0..1]).unwrap();
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assert_eq!(reply_buf[0], FILL_WORD);
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delay.delay_ms(500_u32);
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let tx_buf: [u8; 3] = [0x01, 0x02, 0x03];
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spi.transfer(&mut reply_buf[0..3], &tx_buf).unwrap();
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assert_eq!(tx_buf, reply_buf[0..3]);
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defmt::info!(
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"Received reply: {}, {}, {}",
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reply_buf[0],
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reply_buf[1],
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reply_buf[2]
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);
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delay.delay_ms(500_u32);
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let mut tx_rx_buf: [u8; 3] = [0x03, 0x02, 0x01];
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spi.transfer_in_place(&mut tx_rx_buf).unwrap();
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defmt::info!(
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"Received reply: {}, {}, {}",
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tx_rx_buf[0],
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tx_rx_buf[1],
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tx_rx_buf[2]
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);
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assert_eq!(&tx_rx_buf[0..3], &[0x03, 0x02, 0x01]);
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}
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}
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