Robin Mueller
fc0775ddb4
Changed: - Move most library components to new [`vorago-shared-periphs`](https://egit.irs.uni-stuttgart.de/rust/vorago-shared-periphs) which is mostly re-exported in this crate. - All HAL API constructors now have a more consistent argument order: PAC structures and resource management structures first, then clock configuration, then any other configuration. - Overhaul and simplification of several HAL APIs. The system configuration and IRQ router peripheral instance generally does not need to be passed to HAL API anymore. - All HAL drivers are now type erased. The constructors will still expect and consume the PAC singleton component for resource management purposes, but are not cached anymore. - Refactoring of GPIO library to be more inline with embassy GPIO API. Added: - I2C clock timeout feature support.
60 lines
1.5 KiB
Rust
60 lines
1.5 KiB
Rust
#![no_std]
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#![cfg_attr(docsrs, feature(doc_auto_cfg))]
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use gpio::Port;
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pub use va108xx;
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pub use va108xx as pac;
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pub mod clock;
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pub mod gpio;
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pub mod i2c;
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pub mod pins;
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pub mod prelude;
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pub mod pwm;
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pub mod spi;
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pub mod sysconfig;
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pub mod time;
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pub mod timer;
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pub mod uart;
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pub use vorago_shared_periphs::{
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disable_nvic_interrupt, enable_nvic_interrupt, FunSel, InterruptConfig, PeripheralSelect,
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};
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/// This is the NONE destination reigster value for the IRQSEL peripheral.
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pub const IRQ_DST_NONE: u32 = 0xffffffff;
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#[derive(Debug, PartialEq, Eq, thiserror::Error)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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#[error("invalid pin with number {0}")]
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pub struct InvalidPinError(u8);
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/// Can be used to manually manipulate the function select of port pins.
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///
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/// The function selection table can be found on p.36 of the programmers guide. Please note
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/// that most of the structures and APIs in this library will automatically correctly configure
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/// the pin or statically expect the correct pin type.
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pub fn port_function_select(
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ioconfig: &mut pac::Ioconfig,
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port: Port,
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pin: u8,
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funsel: FunSel,
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) -> Result<(), InvalidPinError> {
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if (port == Port::A && pin >= 32) || (port == Port::B && pin >= 24) {
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return Err(InvalidPinError(pin));
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}
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let reg_block = match port {
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Port::A => ioconfig.porta(pin as usize),
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Port::B => ioconfig.portb0(pin as usize),
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};
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reg_block.modify(|_, w| unsafe { w.funsel().bits(funsel as u8) });
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Ok(())
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}
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#[allow(dead_code)]
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pub(crate) mod sealed {
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pub trait Sealed {}
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}
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