#[doc = "Register `ENABLE` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `ENABLE` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `RXENABLE` reader - Rx Enable"] pub struct RXENABLE_R(crate::FieldReader); impl RXENABLE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RXENABLE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RXENABLE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RXENABLE` writer - Rx Enable"] pub struct RXENABLE_W<'a> { w: &'a mut W, } impl<'a> RXENABLE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `TXENABLE` reader - Tx Enable"] pub struct TXENABLE_R(crate::FieldReader); impl TXENABLE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TXENABLE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TXENABLE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TXENABLE` writer - Tx Enable"] pub struct TXENABLE_W<'a> { w: &'a mut W, } impl<'a> TXENABLE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } impl R { #[doc = "Bit 0 - Rx Enable"] #[inline(always)] pub fn rxenable(&self) -> RXENABLE_R { RXENABLE_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Tx Enable"] #[inline(always)] pub fn txenable(&self) -> TXENABLE_R { TXENABLE_R::new(((self.bits >> 1) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Rx Enable"] #[inline(always)] pub fn rxenable(&mut self) -> RXENABLE_W { RXENABLE_W { w: self } } #[doc = "Bit 1 - Tx Enable"] #[inline(always)] pub fn txenable(&mut self) -> TXENABLE_W { TXENABLE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enable](index.html) module"] pub struct ENABLE_SPEC; impl crate::RegisterSpec for ENABLE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [enable::R](R) reader structure"] impl crate::Readable for ENABLE_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [enable::W](W) writer structure"] impl crate::Writable for ENABLE_SPEC { type Writer = W; } #[doc = "`reset()` method sets ENABLE to value 0"] impl crate::Resettable for ENABLE_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } }