#[doc = "Register `IRQ_CLR` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `I2CIDLE` writer - I2C Bus is Idle"] pub struct I2CIDLE_W<'a> { w: &'a mut W, } impl<'a> I2CIDLE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = value as u32; self.w } } #[doc = "Field `IDLE` writer - Controller is Idle"] pub struct IDLE_W<'a> { w: &'a mut W, } impl<'a> IDLE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `WAITING` writer - Controller is Waiting"] pub struct WAITING_W<'a> { w: &'a mut W, } impl<'a> WAITING_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `STALLED` writer - Controller is Stalled"] pub struct STALLED_W<'a> { w: &'a mut W, } impl<'a> STALLED_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `ARBLOST` writer - I2C Arbitration was lost"] pub struct ARBLOST_W<'a> { w: &'a mut W, } impl<'a> ARBLOST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `NACKADDR` writer - I2C Address was not Acknowledged"] pub struct NACKADDR_W<'a> { w: &'a mut W, } impl<'a> NACKADDR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `NACKDATA` writer - I2C Data was not Acknowledged"] pub struct NACKDATA_W<'a> { w: &'a mut W, } impl<'a> NACKDATA_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `CLKLOTO` writer - I2C Clock Low Timeout"] pub struct CLKLOTO_W<'a> { w: &'a mut W, } impl<'a> CLKLOTO_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `TXOVERFLOW` writer - TX FIFO Overflowed"] pub struct TXOVERFLOW_W<'a> { w: &'a mut W, } impl<'a> TXOVERFLOW_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `RXOVERFLOW` writer - TX FIFO Overflowed"] pub struct RXOVERFLOW_W<'a> { w: &'a mut W, } impl<'a> RXOVERFLOW_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `TXREADY` writer - TX FIFO Ready"] pub struct TXREADY_W<'a> { w: &'a mut W, } impl<'a> TXREADY_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `RXREADY` writer - RX FIFO Ready"] pub struct RXREADY_W<'a> { w: &'a mut W, } impl<'a> RXREADY_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `TXEMPTY` writer - TX FIFO Empty"] pub struct TXEMPTY_W<'a> { w: &'a mut W, } impl<'a> TXEMPTY_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `RXFULL` writer - RX FIFO Full"] pub struct RXFULL_W<'a> { w: &'a mut W, } impl<'a> RXFULL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } impl W { #[doc = "Bit 0 - I2C Bus is Idle"] #[inline(always)] pub fn i2cidle(&mut self) -> I2CIDLE_W { I2CIDLE_W { w: self } } #[doc = "Bit 1 - Controller is Idle"] #[inline(always)] pub fn idle(&mut self) -> IDLE_W { IDLE_W { w: self } } #[doc = "Bit 2 - Controller is Waiting"] #[inline(always)] pub fn waiting(&mut self) -> WAITING_W { WAITING_W { w: self } } #[doc = "Bit 3 - Controller is Stalled"] #[inline(always)] pub fn stalled(&mut self) -> STALLED_W { STALLED_W { w: self } } #[doc = "Bit 4 - I2C Arbitration was lost"] #[inline(always)] pub fn arblost(&mut self) -> ARBLOST_W { ARBLOST_W { w: self } } #[doc = "Bit 5 - I2C Address was not Acknowledged"] #[inline(always)] pub fn nackaddr(&mut self) -> NACKADDR_W { NACKADDR_W { w: self } } #[doc = "Bit 6 - I2C Data was not Acknowledged"] #[inline(always)] pub fn nackdata(&mut self) -> NACKDATA_W { NACKDATA_W { w: self } } #[doc = "Bit 7 - I2C Clock Low Timeout"] #[inline(always)] pub fn clkloto(&mut self) -> CLKLOTO_W { CLKLOTO_W { w: self } } #[doc = "Bit 10 - TX FIFO Overflowed"] #[inline(always)] pub fn txoverflow(&mut self) -> TXOVERFLOW_W { TXOVERFLOW_W { w: self } } #[doc = "Bit 11 - TX FIFO Overflowed"] #[inline(always)] pub fn rxoverflow(&mut self) -> RXOVERFLOW_W { RXOVERFLOW_W { w: self } } #[doc = "Bit 12 - TX FIFO Ready"] #[inline(always)] pub fn txready(&mut self) -> TXREADY_W { TXREADY_W { w: self } } #[doc = "Bit 13 - RX FIFO Ready"] #[inline(always)] pub fn rxready(&mut self) -> RXREADY_W { RXREADY_W { w: self } } #[doc = "Bit 14 - TX FIFO Empty"] #[inline(always)] pub fn txempty(&mut self) -> TXEMPTY_W { TXEMPTY_W { w: self } } #[doc = "Bit 15 - RX FIFO Full"] #[inline(always)] pub fn rxfull(&mut self) -> RXFULL_W { RXFULL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Clear Interrupt Status Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irq_clr](index.html) module"] pub struct IRQ_CLR_SPEC; impl crate::RegisterSpec for IRQ_CLR_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [irq_clr::W](W) writer structure"] impl crate::Writable for IRQ_CLR_SPEC { type Writer = W; } #[doc = "`reset()` method sets IRQ_CLR to value 0"] impl crate::Resettable for IRQ_CLR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } }