152 lines
9.6 KiB
Rust
152 lines
9.6 KiB
Rust
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#[repr(C)]
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#[doc = "Register block"]
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pub struct RegisterBlock {
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ctrl: Ctrl,
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sts: Sts,
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defaddr: Defaddr,
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clkdiv: Clkdiv,
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dkey: Dkey,
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tc: Tc,
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tdr: Tdr,
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_reserved7: [u8; 0x04],
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dmactrl0: Dmactrl0,
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dmamaxlen0: Dmamaxlen0,
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dmatxdesc0: Dmatxdesc0,
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dmarxdesc0: Dmarxdesc0,
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dmaaddr0: Dmaaddr0,
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}
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impl RegisterBlock {
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#[doc = "0x00 - Control Register"]
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#[inline(always)]
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pub const fn ctrl(&self) -> &Ctrl {
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&self.ctrl
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}
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#[doc = "0x04 - Status/Interrupt Source Register"]
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#[inline(always)]
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pub const fn sts(&self) -> &Sts {
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&self.sts
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}
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#[doc = "0x08 - Node Address Register"]
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#[inline(always)]
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pub const fn defaddr(&self) -> &Defaddr {
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&self.defaddr
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}
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#[doc = "0x0c - Clock Divisor Register"]
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#[inline(always)]
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pub const fn clkdiv(&self) -> &Clkdiv {
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&self.clkdiv
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}
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#[doc = "0x10 - Destination Key"]
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#[inline(always)]
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pub const fn dkey(&self) -> &Dkey {
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&self.dkey
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}
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#[doc = "0x14 - Time Code Register"]
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#[inline(always)]
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pub const fn tc(&self) -> &Tc {
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&self.tc
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}
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#[doc = "0x18 - Timer and Disconnect Register"]
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#[inline(always)]
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pub const fn tdr(&self) -> &Tdr {
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&self.tdr
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}
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#[doc = "0x20 - DMA Control Register"]
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#[inline(always)]
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pub const fn dmactrl0(&self) -> &Dmactrl0 {
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&self.dmactrl0
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}
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#[doc = "0x24 - DMA RX Maximum Length Register"]
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#[inline(always)]
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pub const fn dmamaxlen0(&self) -> &Dmamaxlen0 {
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&self.dmamaxlen0
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}
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#[doc = "0x28 - DMA Transmitter Descriptor Table Address Register"]
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#[inline(always)]
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pub const fn dmatxdesc0(&self) -> &Dmatxdesc0 {
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&self.dmatxdesc0
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}
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#[doc = "0x2c - DMA Receiver Table Destination Register"]
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#[inline(always)]
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pub const fn dmarxdesc0(&self) -> &Dmarxdesc0 {
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&self.dmarxdesc0
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}
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#[doc = "0x30 - DMA Receiver Table Address Register"]
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#[inline(always)]
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pub const fn dmaaddr0(&self) -> &Dmaaddr0 {
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&self.dmaaddr0
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}
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}
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#[doc = "CTRL (rw) register accessor: Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl`]
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module"]
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#[doc(alias = "CTRL")]
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pub type Ctrl = crate::Reg<ctrl::CtrlSpec>;
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#[doc = "Control Register"]
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pub mod ctrl;
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#[doc = "STS (rw) register accessor: Status/Interrupt Source Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sts::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sts::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sts`]
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module"]
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#[doc(alias = "STS")]
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pub type Sts = crate::Reg<sts::StsSpec>;
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#[doc = "Status/Interrupt Source Register"]
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pub mod sts;
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#[doc = "DEFADDR (rw) register accessor: Node Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`defaddr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`defaddr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@defaddr`]
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module"]
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#[doc(alias = "DEFADDR")]
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pub type Defaddr = crate::Reg<defaddr::DefaddrSpec>;
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#[doc = "Node Address Register"]
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pub mod defaddr;
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#[doc = "CLKDIV (rw) register accessor: Clock Divisor Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clkdiv::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clkdiv::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clkdiv`]
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module"]
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#[doc(alias = "CLKDIV")]
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pub type Clkdiv = crate::Reg<clkdiv::ClkdivSpec>;
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#[doc = "Clock Divisor Register"]
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pub mod clkdiv;
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#[doc = "DKEY (rw) register accessor: Destination Key\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dkey::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dkey::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dkey`]
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module"]
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#[doc(alias = "DKEY")]
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pub type Dkey = crate::Reg<dkey::DkeySpec>;
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#[doc = "Destination Key"]
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pub mod dkey;
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#[doc = "TC (rw) register accessor: Time Code Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tc`]
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module"]
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#[doc(alias = "TC")]
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pub type Tc = crate::Reg<tc::TcSpec>;
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#[doc = "Time Code Register"]
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pub mod tc;
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#[doc = "TDR (r) register accessor: Timer and Disconnect Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tdr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tdr`]
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module"]
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#[doc(alias = "TDR")]
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pub type Tdr = crate::Reg<tdr::TdrSpec>;
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#[doc = "Timer and Disconnect Register"]
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pub mod tdr;
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#[doc = "DMACTRL0 (rw) register accessor: DMA Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmactrl0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmactrl0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmactrl0`]
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module"]
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#[doc(alias = "DMACTRL0")]
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pub type Dmactrl0 = crate::Reg<dmactrl0::Dmactrl0Spec>;
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#[doc = "DMA Control Register"]
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pub mod dmactrl0;
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#[doc = "DMAMAXLEN0 (rw) register accessor: DMA RX Maximum Length Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmamaxlen0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmamaxlen0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmamaxlen0`]
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module"]
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#[doc(alias = "DMAMAXLEN0")]
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pub type Dmamaxlen0 = crate::Reg<dmamaxlen0::Dmamaxlen0Spec>;
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#[doc = "DMA RX Maximum Length Register"]
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pub mod dmamaxlen0;
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#[doc = "DMATXDESC0 (rw) register accessor: DMA Transmitter Descriptor Table Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmatxdesc0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmatxdesc0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmatxdesc0`]
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module"]
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#[doc(alias = "DMATXDESC0")]
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pub type Dmatxdesc0 = crate::Reg<dmatxdesc0::Dmatxdesc0Spec>;
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#[doc = "DMA Transmitter Descriptor Table Address Register"]
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pub mod dmatxdesc0;
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#[doc = "DMARXDESC0 (rw) register accessor: DMA Receiver Table Destination Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmarxdesc0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmarxdesc0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmarxdesc0`]
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module"]
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#[doc(alias = "DMARXDESC0")]
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pub type Dmarxdesc0 = crate::Reg<dmarxdesc0::Dmarxdesc0Spec>;
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#[doc = "DMA Receiver Table Destination Register"]
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pub mod dmarxdesc0;
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#[doc = "DMAADDR0 (rw) register accessor: DMA Receiver Table Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmaaddr0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmaaddr0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmaaddr0`]
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module"]
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#[doc(alias = "DMAADDR0")]
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pub type Dmaaddr0 = crate::Reg<dmaaddr0::Dmaaddr0Spec>;
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#[doc = "DMA Receiver Table Address Register"]
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pub mod dmaaddr0;
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